diff --git a/Makefile b/Makefile
index aba9169baf..0f4ab130bc 100644
--- a/Makefile
+++ b/Makefile
@@ -14,7 +14,7 @@ $(if $(findstring $(space),$(TOPDIR)),$(error ERROR: The path to the OpenWrt dir
 
 world:
 
-DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep -E '\/usr' -m 1)
+DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep '/usr' -m 1)
 export PATH:=$(TOPDIR)/staging_dir/host/bin:$(PATH)
 
 ifneq ($(OPENWRT_BUILD),1)
diff --git a/README.md b/README.md
index f11a0845c1..59b53c764d 100644
--- a/README.md
+++ b/README.md
@@ -7,6 +7,13 @@ Compared the official one, we allow to use hacks or non-upstreamable patches / m
 
 Default login address: http://192.168.1.1 or http://immortalwrt.lan, username: __root__, password: __password__.
 
+## Download
+Built firmware images are available for many architectures and come with a package selection to be used as WiFi home router. To quickly find a factory image usable to migrate from a vendor stock firmware to ImmortalWrt, try the *Firmware Selector*.
+
+- [ImmortalWrt Firmware Selector](https://firmware-selector.immortalwrt.org/)
+
+If your device is supported, please follow the **Info** link to see install instructions or consult the support resources listed below.
+
 ## Development
 To build your own firmware you need a GNU/Linux, BSD or MacOSX system (case sensitive filesystem required). Cygwin is unsupported because of the lack of a case sensitive file system.<br/>
 
@@ -118,11 +125,9 @@ To build your own firmware you need a GNU/Linux, BSD or MacOSX system (case sens
   - [LuCI Web Interface](https://github.com/immortalwrt/luci): Modern and modular interface to control the device via a web browser.
   - [ImmortalWrt Packages](https://github.com/immortalwrt/packages): Community repository of ported packages.
   - [OpenWrt Routing](https://github.com/openwrt/routing): Packages specifically focused on (mesh) routing.
+  - [OpenWrt Video](https://github.com/openwrt/video): Packages specifically focused on display servers and clients (Xorg and Wayland).
   - [CONTRIBUTED.md](https://github.com/immortalwrt/immortalwrt/blob/master/CONTRIBUTED.md): the 3rd-party packages we introduced.
 
-* [OpenWrt Video](https://github.com/openwrt/video): Packages specifically
-  focused on display servers and clients (Xorg and Wayland).
-
 ## Support Information
 For a list of supported devices see the [OpenWrt Hardware Database](https://openwrt.org/supported_devices)
   ### Documentation
diff --git a/config/Config-devel.in b/config/Config-devel.in
index 87f9157106..3f73cb404d 100644
--- a/config/Config-devel.in
+++ b/config/Config-devel.in
@@ -45,6 +45,13 @@ menuconfig DEVEL
 		  This allows you to symlink build_dir into a scratch location, e.g. a ramdisk,
 		  which does not have enough space to keep a complete build_dir.
 
+	config BUILD_ALL_HOST_TOOLS
+		bool "Compile all host tools" if DEVEL
+		default n
+		help
+		  Compile all host host tools even if not needed. This is needed to prepare a
+		  universal precompiled host tools archive to use in another buildroot.
+
 	config BUILD_SUFFIX
 		string "Build suffix to append to the target BUILD_DIR variable" if DEVEL
 		default ""
diff --git a/include/depends.mk b/include/depends.mk
index 073fb03632..a858d4b033 100644
--- a/include/depends.mk
+++ b/include/depends.mk
@@ -12,6 +12,7 @@
 DEP_FINDPARAMS := -x "*/.svn*" -x ".*" -x "*:*" -x "*\!*" -x "* *" -x "*\\\#*" -x "*/.*_check" -x "*/.*.swp" -x "*/.pkgdir*"
 
 find_md5=find $(wildcard $(1)) -type f $(patsubst -x,-and -not -path,$(DEP_FINDPARAMS) $(2)) -printf "%p%T@\n" | sort | $(MKHASH) md5
+find_md5_reproducible=find $(wildcard $(1)) -type f $(patsubst -x,-and -not -path,$(DEP_FINDPARAMS) $(2)) -print0 | xargs -0 $(MKHASH) md5 | sort | $(MKHASH) md5
 
 define rdep
   .PRECIOUS: $(2)
diff --git a/include/download.mk b/include/download.mk
index 68dc39bcd2..6cd5445133 100644
--- a/include/download.mk
+++ b/include/download.mk
@@ -18,6 +18,9 @@ endif
 
 DOWNLOAD_RDEP=$(STAMP_PREPARED) $(HOST_STAMP_PREPARED)
 
+# Export options for download.pl
+export DOWNLOAD_CHECK_CERTIFICATE:=$(CONFIG_DOWNLOAD_CHECK_CERTIFICATE)
+
 define dl_method_git
 $(if $(filter https://github.com/% git://github.com/%,$(1)),github_archive,git)
 endef
diff --git a/include/host-build.mk b/include/host-build.mk
index f06dd80230..22fcc31f15 100644
--- a/include/host-build.mk
+++ b/include/host-build.mk
@@ -21,7 +21,7 @@ include $(INCLUDE_DIR)/depends.mk
 include $(INCLUDE_DIR)/quilt.mk
 
 BUILD_TYPES += host
-HOST_STAMP_PREPARED=$(HOST_BUILD_DIR)/.prepared$(if $(HOST_QUILT)$(DUMP),,$(shell $(call find_md5,${CURDIR} $(PKG_FILE_DEPENDS),))_$(call confvar,CONFIG_AUTOREMOVE $(HOST_PREPARED_DEPENDS)))
+HOST_STAMP_PREPARED=$(HOST_BUILD_DIR)/.prepared$(if $(HOST_QUILT)$(DUMP),,$(shell $(call $(if $(CONFIG_AUTOREMOVE),find_md5_reproducible,find_md5),${CURDIR} $(PKG_FILE_DEPENDS),))_$(call confvar,CONFIG_AUTOREMOVE $(HOST_PREPARED_DEPENDS)))
 HOST_STAMP_CONFIGURED:=$(HOST_BUILD_DIR)/.configured
 HOST_STAMP_BUILT:=$(HOST_BUILD_DIR)/.built
 HOST_BUILD_PREFIX?=$(if $(IS_PACKAGE_BUILD),$(STAGING_DIR_HOSTPKG),$(STAGING_DIR_HOST))
diff --git a/include/kernel-5.10 b/include/kernel-5.10
index 3dee01cdcf..60b71eea92 100644
--- a/include/kernel-5.10
+++ b/include/kernel-5.10
@@ -1,2 +1,2 @@
-LINUX_VERSION-5.10 = .144
-LINUX_KERNEL_HASH-5.10.144 = 20c6d26f4d9d0d15d628982bc5e35862b3016d1832f5a545b3bdb131203cd3ca
+LINUX_VERSION-5.10 = .146
+LINUX_KERNEL_HASH-5.10.146 = 7bbd97f3278eadb73c19a1ca8c1a655c60afcee9f487b910063cdd15e9ee6dc1
diff --git a/include/kernel-5.15 b/include/kernel-5.15
index 1d10e56bb2..3085a029d2 100644
--- a/include/kernel-5.15
+++ b/include/kernel-5.15
@@ -1,2 +1,2 @@
-LINUX_VERSION-5.15 = .69
-LINUX_KERNEL_HASH-5.15.69 = e32839ca761e5251f25708f7939b37b101d28fc29515a97bfc0c838a21efdf34
+LINUX_VERSION-5.15 = .71
+LINUX_KERNEL_HASH-5.15.71 = 5f5408138e016c0e029e015d98ceab86f4e6366c65cd611259dac808ab1d1e53
diff --git a/include/kernel-build.mk b/include/kernel-build.mk
index cc651f29b1..5b332258f8 100644
--- a/include/kernel-build.mk
+++ b/include/kernel-build.mk
@@ -10,7 +10,7 @@ ifneq ($(DUMP),1)
 endif
 
 KERNEL_FILE_DEPENDS=$(GENERIC_BACKPORT_DIR) $(GENERIC_PATCH_DIR) $(GENERIC_HACK_DIR) $(PATCH_DIR) $(GENERIC_FILES_DIR) $(FILES_DIR)
-STAMP_PREPARED=$(LINUX_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell $(call find_md5,$(KERNEL_FILE_DEPENDS),)))
+STAMP_PREPARED=$(LINUX_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell $(call $(if $(CONFIG_AUTOREMOVE),find_md5_reproducible,find_md5),$(KERNEL_FILE_DEPENDS),)))
 STAMP_CONFIGURED:=$(LINUX_DIR)/.configured
 include $(INCLUDE_DIR)/download.mk
 include $(INCLUDE_DIR)/quilt.mk
diff --git a/include/package.mk b/include/package.mk
index 5861533bf5..368bf0d7ca 100644
--- a/include/package.mk
+++ b/include/package.mk
@@ -85,7 +85,7 @@ ifneq ($(PREV_STAMP_PREPARED),)
   STAMP_PREPARED:=$(PREV_STAMP_PREPARED)
   CONFIG_AUTOREBUILD:=
 else
-  STAMP_PREPARED=$(PKG_BUILD_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell $(call find_md5,${CURDIR} $(PKG_FILE_DEPENDS),))_$(call confvar,CONFIG_AUTOREMOVE $(PKG_PREPARED_DEPENDS)))
+  STAMP_PREPARED=$(PKG_BUILD_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell $(call $(if $(CONFIG_AUTOREMOVE),find_md5_reproducible,find_md5),${CURDIR} $(PKG_FILE_DEPENDS),))_$(call confvar,CONFIG_AUTOREMOVE $(PKG_PREPARED_DEPENDS)))
 endif
 STAMP_CONFIGURED=$(PKG_BUILD_DIR)/.configured$(if $(DUMP),,_$(call confvar,$(PKG_CONFIG_DEPENDS)))
 STAMP_CONFIGURED_WILDCARD=$(PKG_BUILD_DIR)/.configured_*
diff --git a/include/prereq-build.mk b/include/prereq-build.mk
index e1687da370..c5c2f1c8bb 100644
--- a/include/prereq-build.mk
+++ b/include/prereq-build.mk
@@ -213,4 +213,4 @@ prereq: $(STAGING_DIR_HOST)/bin/mkhash $(STAGING_DIR_HOST)/bin/xxd
 
 # Install ldconfig stub
 $(eval $(call TestHostCommand,ldconfig-stub,Failed to install stub, \
-	$(LN) /bin/true $(STAGING_DIR_HOST)/bin/ldconfig))
+	$(LN) $(firstword $(wildcard /bin/true /usr/bin/true)) $(STAGING_DIR_HOST)/bin/ldconfig))
diff --git a/include/target.mk b/include/target.mk
index e6fefc5467..a9a19ab479 100644
--- a/include/target.mk
+++ b/include/target.mk
@@ -81,7 +81,7 @@ endif
 
 target_conf=$(subst .,_,$(subst -,_,$(subst /,_,$(1))))
 ifeq ($(DUMP),)
-  PLATFORM_DIR:=$(TOPDIR)/target/linux/$(BOARD)
+  PLATFORM_DIR:=$(firstword $(wildcard $(TOPDIR)/target/linux/feeds/$(BOARD) $(TOPDIR)/target/linux/$(BOARD)))
   SUBTARGET:=$(strip $(foreach subdir,$(patsubst $(PLATFORM_DIR)/%/target.mk,%,$(wildcard $(PLATFORM_DIR)/*/target.mk)),$(if $(CONFIG_TARGET_$(call target_conf,$(BOARD)_$(subdir))),$(subdir))))
 else
   PLATFORM_DIR:=${CURDIR}
diff --git a/package/boot/uboot-mvebu/patches/0001-tools-termios_linux.h-Fix-compilation-on-non-glibc-s.patch b/package/boot/uboot-mvebu/patches/0001-tools-termios_linux.h-Fix-compilation-on-non-glibc-s.patch
new file mode 100644
index 0000000000..e2f8a08bea
--- /dev/null
+++ b/package/boot/uboot-mvebu/patches/0001-tools-termios_linux.h-Fix-compilation-on-non-glibc-s.patch
@@ -0,0 +1,44 @@
+From 82a6da13c3a113eefdb378ff53635f32a6184d6f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Thu, 8 Sep 2022 16:59:36 +0200
+Subject: [PATCH] tools: termios_linux.h: Fix compilation on non-glibc systems
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+TCGETS2 is defined in header file asm/ioctls.h provided by linux kernel.
+On glib systems it is automatically included by some other glibc include
+header file and therefore TCGETS2 is present in termios_linux.h when
+linux kernel provides it.
+
+On non-glibc systems (e.g. musl) asm/ioctls.h is not automatically included
+which results in the strange error that BOTHER is supported, TCGETS2 not
+defined and struct termios does not provide c_ispeed member.
+
+    tools/kwboot.c: In function 'kwboot_tty_change_baudrate':
+    tools/kwboot.c:662:6: error: 'struct termios' has no member named 'c_ospeed'
+      662 |   tio.c_ospeed = tio.c_ispeed = baudrate;
+          |      ^
+
+Fix this issue by explicitly including asm/ioctls.h file which provides
+TCGETS2 macro (if supported on selected architecture) to not depending on
+glibc auto-include behavior and because termios_linux.h requires it.
+
+With this change it is possible compile kwboot with musl libc.
+
+Reported-by: Michal Vasilek <michal.vasilek@nic.cz>
+Signed-off-by: Pali Rohár <pali@kernel.org>
+---
+ tools/termios_linux.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/tools/termios_linux.h
++++ b/tools/termios_linux.h
+@@ -29,6 +29,7 @@
+ #include <errno.h>
+ #include <sys/ioctl.h>
+ #include <sys/types.h>
++#include <asm/ioctls.h>
+ #include <asm/termbits.h>
+ 
+ #if defined(BOTHER) && defined(TCGETS2)
diff --git a/package/boot/uboot-mvebu/patches/0002-tools-mkimage-fix-build-with-LibreSSL.patch b/package/boot/uboot-mvebu/patches/0002-tools-mkimage-fix-build-with-LibreSSL.patch
new file mode 100644
index 0000000000..ebea2a41cd
--- /dev/null
+++ b/package/boot/uboot-mvebu/patches/0002-tools-mkimage-fix-build-with-LibreSSL.patch
@@ -0,0 +1,28 @@
+From aed6107ae96870cd190b23d6da34a7e616799ed3 Mon Sep 17 00:00:00 2001
+From: Michal Vasilek <michal.vasilek@nic.cz>
+Date: Fri, 22 Jul 2022 19:55:53 +0200
+Subject: [PATCH 1/2] tools: mkimage: fix build with LibreSSL
+
+RSA_get0_* functions are not available in LibreSSL
+
+Signed-off-by: Michal Vasilek <michal.vasilek@nic.cz>
+Reviewed-by: Simon Glass <sjg@chromium.org>
+---
+ tools/sunxi_toc0.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/tools/sunxi_toc0.c
++++ b/tools/sunxi_toc0.c
+@@ -34,6 +34,12 @@
+ #define pr_warn(fmt, args...)	fprintf(stderr, pr_fmt(fmt), "warning", ##args)
+ #define pr_info(fmt, args...)	fprintf(stderr, pr_fmt(fmt), "info", ##args)
+ 
++#if defined(LIBRESSL_VERSION_NUMBER)
++#define RSA_get0_n(key) (key)->n
++#define RSA_get0_e(key) (key)->e
++#define RSA_get0_d(key) (key)->d
++#endif
++
+ struct __packed toc0_key_item {
+ 	__le32  vendor_id;
+ 	__le32  key0_n_len;
diff --git a/package/boot/uboot-mvebu/patches/0003-tools-mkimage-fix-build-with-recent-LibreSSL.patch b/package/boot/uboot-mvebu/patches/0003-tools-mkimage-fix-build-with-recent-LibreSSL.patch
new file mode 100644
index 0000000000..2e955848e8
--- /dev/null
+++ b/package/boot/uboot-mvebu/patches/0003-tools-mkimage-fix-build-with-recent-LibreSSL.patch
@@ -0,0 +1,27 @@
+From 16b94d211b18ae0204c4f850fdf23573b19170ec Mon Sep 17 00:00:00 2001
+From: Mark Kettenis <kettenis@openbsd.org>
+Date: Mon, 29 Aug 2022 13:34:01 +0200
+Subject: [PATCH 2/2] tools: mkimage: fix build with recent LibreSSL
+
+LibreSSL 3.5.0 and later (also shipped as part of OpenBSD 7.1 and
+and later) have an opaque RSA object and do provide the
+RSA_get0_* functions that OpenSSL provides.
+
+Fixes: 2ecc354b8e46 ("tools: mkimage: fix build with LibreSSL")
+Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
+Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
+---
+ tools/sunxi_toc0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/tools/sunxi_toc0.c
++++ b/tools/sunxi_toc0.c
+@@ -34,7 +34,7 @@
+ #define pr_warn(fmt, args...)	fprintf(stderr, pr_fmt(fmt), "warning", ##args)
+ #define pr_info(fmt, args...)	fprintf(stderr, pr_fmt(fmt), "info", ##args)
+ 
+-#if defined(LIBRESSL_VERSION_NUMBER)
++#if defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x3050000fL
+ #define RSA_get0_n(key) (key)->n
+ #define RSA_get0_e(key) (key)->e
+ #define RSA_get0_d(key) (key)->d
diff --git a/package/devel/trace-cmd/Makefile b/package/devel/trace-cmd/Makefile
index 3f96d43b77..9e8c46bc6f 100644
--- a/package/devel/trace-cmd/Makefile
+++ b/package/devel/trace-cmd/Makefile
@@ -1,12 +1,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=trace-cmd
-PKG_VERSION:=v3.1.2
+PKG_VERSION:=v3.1.3
 PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://git.kernel.org/pub/scm/utils/trace-cmd/trace-cmd.git/snapshot/
-PKG_HASH:=206672af60aa0bc35cfc44a4be746efa575bac729060e54b6453f7d5dfbcd979
+PKG_HASH:=1fd8515f38fc29fd7a66e7b6b5931856906522e8a1845999fc9033fc80d7b676
 
 PKG_LICENSE:=GPL-2.0-only
 PKG_LICENSE_FILES:=COPYING
diff --git a/package/devel/trace-cmd/patches/100-tracecmd-add-NO_LIBZSTD-option-to-disable-libzstd.patch b/package/devel/trace-cmd/patches/100-tracecmd-add-NO_LIBZSTD-option-to-disable-libzstd.patch
deleted file mode 100644
index 447e3b0790..0000000000
--- a/package/devel/trace-cmd/patches/100-tracecmd-add-NO_LIBZSTD-option-to-disable-libzstd.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 4fcc23ee4291f445cada012b6bef6879274a25f1 Mon Sep 17 00:00:00 2001
-From: Nick Hainke <vincent@systemli.org>
-Date: Sun, 7 Aug 2022 10:11:06 +0200
-Subject: [PATCH] tracecmd: add NO_LIBZSTD option to disable libzstd
-
-Other Linux kernel tools like perf already include options to disable
-libzstd manually. Add this option also to trace-cmd.
-
-The OpenWrt SDK fails to build trace-cmd due to the autodetection of
-libzstd. The package is present in some feed repositories but should
-not be used by trace-cmd. The compilation will fail with:
-
-  Package trace-cmd is missing dependencies for the following libraries:
-  libzstd.so.1
-
-Signed-off-by: Nick Hainke <vincent@systemli.org>
----
- Makefile | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/Makefile
-+++ b/Makefile
-@@ -320,6 +320,7 @@ CFLAGS += -DHAVE_ZLIB
- $(info    Have zlib compression support)
- endif
- 
-+ifndef NO_LIBZSTD
- TEST_LIBZSTD = $(shell sh -c "$(PKG_CONFIG) --atleast-version 1.4.0 libzstd > /dev/null 2>&1 && echo y")
- 
- ifeq ("$(TEST_LIBZSTD)", "y")
-@@ -335,6 +336,7 @@ $(info	  *******************************
- endif
- 
- export LIBZSTD_CFLAGS LIBZSTD_LDLAGS ZSTD_INSTALLED
-+endif
- 
- CUNIT_INSTALLED := $(shell if (printf "$(pound)include <CUnit/Basic.h>\n void main(){CU_initialize_registry();}" | $(CC) -o /dev/null -x c - -lcunit >/dev/null 2>&1) ; then echo 1; else echo 0 ; fi)
- export CUNIT_INSTALLED
diff --git a/package/devel/valgrind/Makefile b/package/devel/valgrind/Makefile
index 270aab6dba..c179f2b39c 100644
--- a/package/devel/valgrind/Makefile
+++ b/package/devel/valgrind/Makefile
@@ -12,7 +12,7 @@ PKG_VERSION:=3.19.0
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
-PKG_SOURCE_URL:=http://sourceware.org/pub/valgrind/
+PKG_SOURCE_URL:=https://sourceware.org/pub/valgrind/
 PKG_HASH:=dd5e34486f1a483ff7be7300cc16b4d6b24690987877c3278d797534d6738f02
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
diff --git a/package/kernel/linux/Makefile b/package/kernel/linux/Makefile
index ad68bde9b3..ff91760270 100644
--- a/package/kernel/linux/Makefile
+++ b/package/kernel/linux/Makefile
@@ -12,7 +12,9 @@ PKG_NAME:=kernel
 PKG_FLAGS:=hold
 
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/packages
-SCAN_DEPS=modules/*.mk $(TOPDIR)/target/linux/*/modules.mk $(TOPDIR)/target/linux/*/*/modules.mk $(TOPDIR)/include/netfilter.mk
+SUBTARGETS = $(sort $(filter-out feeds,$(notdir $(wildcard $(TOPDIR)/target/linux/* $(TOPDIR)/target/linux/feeds/*))))
+SUBTARGET_MODULES = $(foreach t,$(SUBTARGETS),$(firstword $(wildcard $(TOPDIR)/target/linux/feeds/$(t)/modules.mk $(TOPDIR)/target/linux/$(t)/modules.mk)))
+SCAN_DEPS=modules/*.mk $(SUBTARGET_MODULES) $(TOPDIR)/include/netfilter.mk
 
 PKG_LICENSE:=GPL-2.0
 PKG_LICENSE_FILES:=
@@ -63,5 +65,4 @@ endef
 $(eval $(if $(DUMP),,$(call BuildPackage,kernel)))
 
 include $(sort $(wildcard ./modules/*.mk))
--include $(TOPDIR)/target/linux/*/modules.mk
--include $(TOPDIR)/target/linux/*/*/modules.mk
+-include $(SUBTARGET_MODULES)
diff --git a/package/kernel/linux/files/hotplug-sched-teql.sh b/package/kernel/linux/files/hotplug-sched-teql.sh
index a0c0e503aa..2dc4ed4a84 100644
--- a/package/kernel/linux/files/hotplug-sched-teql.sh
+++ b/package/kernel/linux/files/hotplug-sched-teql.sh
@@ -12,7 +12,7 @@ config_get teql $INTERFACE teql
 
 if [ "$teql" != "" ]; then
     logger Adding device $DEVICE to TEQL master $teql
-    insmod sch_teql
+    modprobe sch_teql
     tc qdisc add dev $DEVICE root $teql
 
     # The kernel doesn't let us bring it up until it has at least one
diff --git a/package/kernel/linux/modules/block.mk b/package/kernel/linux/modules/block.mk
index 8affa72296..f6c9df0698 100644
--- a/package/kernel/linux/modules/block.mk
+++ b/package/kernel/linux/modules/block.mk
@@ -90,21 +90,6 @@ endef
 $(eval $(call KernelPackage,ata-artop))
 
 
-define KernelPackage/ata-marvell-sata
-  TITLE:=Marvell Serial ATA support
-  KCONFIG:=CONFIG_SATA_MV
-  FILES:=$(LINUX_DIR)/drivers/ata/sata_mv.ko
-  AUTOLOAD:=$(call AutoLoad,41,sata_mv,1)
-  $(call AddDepends/ata)
-endef
-
-define KernelPackage/ata-marvell-sata/description
- SATA support for marvell chipsets
-endef
-
-$(eval $(call KernelPackage,ata-marvell-sata))
-
-
 define KernelPackage/ata-nvidia-sata
   TITLE:=Nvidia Serial ATA support
   KCONFIG:=CONFIG_SATA_NV
diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk
index 0ab8c7ad4a..f15a08d62e 100644
--- a/package/kernel/linux/modules/other.mk
+++ b/package/kernel/linux/modules/other.mk
@@ -419,23 +419,6 @@ endef
 $(eval $(call KernelPackage,mmc))
 
 
-define KernelPackage/mvsdio
-  SUBMENU:=$(OTHER_MENU)
-  TITLE:=Marvell MMC/SD/SDIO host driver
-  DEPENDS:=+kmod-mmc @TARGET_kirkwood
-  KCONFIG:= CONFIG_MMC_MVSDIO
-  FILES:= \
-	$(LINUX_DIR)/drivers/mmc/host/mvsdio.ko
-  AUTOLOAD:=$(call AutoProbe,mvsdio,1)
-endef
-
-define KernelPackage/mvsdio/description
- Kernel support for the Marvell SDIO host driver.
-endef
-
-$(eval $(call KernelPackage,mvsdio))
-
-
 define KernelPackage/sdhci
   SUBMENU:=$(OTHER_MENU)
   TITLE:=Secure Digital Host Controller Interface support
diff --git a/package/kernel/mac80211/patches/subsys/343-wifi-mac80211-fix-decap-offload-for-stations-on-AP_V.patch b/package/kernel/mac80211/patches/subsys/343-wifi-mac80211-fix-decap-offload-for-stations-on-AP_V.patch
new file mode 100644
index 0000000000..0feb408d21
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/343-wifi-mac80211-fix-decap-offload-for-stations-on-AP_V.patch
@@ -0,0 +1,37 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Wed, 28 Sep 2022 13:50:34 +0200
+Subject: [PATCH] wifi: mac80211: fix decap offload for stations on AP_VLAN
+ interfaces
+
+Since AP_VLAN interfaces are not passed to the driver, check offload_flags
+on the bss vif instead.
+
+Reported-by: Howard Hsu <howard-yh.hsu@mediatek.com>
+Fixes: 80a915ec4427 ("mac80211: add rx decapsulation offload support")
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/rx.c
++++ b/net/mac80211/rx.c
+@@ -4265,6 +4265,7 @@ void ieee80211_check_fast_rx(struct sta_
+ 		.vif_type = sdata->vif.type,
+ 		.control_port_protocol = sdata->control_port_protocol,
+ 	}, *old, *new = NULL;
++	u32 offload_flags;
+ 	bool set_offload = false;
+ 	bool assign = false;
+ 	bool offload;
+@@ -4380,10 +4381,10 @@ void ieee80211_check_fast_rx(struct sta_
+ 	if (assign)
+ 		new = kmemdup(&fastrx, sizeof(fastrx), GFP_KERNEL);
+ 
+-	offload = assign &&
+-		  (sdata->vif.offload_flags & IEEE80211_OFFLOAD_DECAP_ENABLED);
++	offload_flags = get_bss_sdata(sdata)->vif.offload_flags;
++	offload = offload_flags & IEEE80211_OFFLOAD_DECAP_ENABLED;
+ 
+-	if (offload)
++	if (assign && offload)
+ 		set_offload = !test_and_set_sta_flag(sta, WLAN_STA_DECAP_OFFLOAD);
+ 	else
+ 		set_offload = test_and_clear_sta_flag(sta, WLAN_STA_DECAP_OFFLOAD);
diff --git a/package/kernel/mac80211/patches/subsys/344-wifi-cfg80211-fix-ieee80211_data_to_8023_exthdr-hand.patch b/package/kernel/mac80211/patches/subsys/344-wifi-cfg80211-fix-ieee80211_data_to_8023_exthdr-hand.patch
new file mode 100644
index 0000000000..161c7d6c8f
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/344-wifi-cfg80211-fix-ieee80211_data_to_8023_exthdr-hand.patch
@@ -0,0 +1,99 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Fri, 7 Oct 2022 10:54:47 +0200
+Subject: [PATCH] wifi: cfg80211: fix ieee80211_data_to_8023_exthdr
+ handling of small packets
+
+STP topology change notification packets only have a payload of 7 bytes,
+so they get dropped due to the skb->len < hdrlen + 8 check.
+Fix this by removing skb->len based checks and instead check the return code
+on the skb_copy_bits calls.
+
+Fixes: 2d1c304cb2d5 ("cfg80211: add function for 802.3 conversion with separate output buffer")
+Reported-by: Chad Monroe <chad.monroe@smartrg.com>
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/wireless/util.c
++++ b/net/wireless/util.c
+@@ -557,7 +557,7 @@ int ieee80211_data_to_8023_exthdr(struct
+ 		return -1;
+ 
+ 	hdrlen = ieee80211_hdrlen(hdr->frame_control) + data_offset;
+-	if (skb->len < hdrlen + 8)
++	if (skb->len < hdrlen)
+ 		return -1;
+ 
+ 	/* convert IEEE 802.11 header + possible LLC headers into Ethernet
+@@ -572,8 +572,9 @@ int ieee80211_data_to_8023_exthdr(struct
+ 	memcpy(tmp.h_dest, ieee80211_get_DA(hdr), ETH_ALEN);
+ 	memcpy(tmp.h_source, ieee80211_get_SA(hdr), ETH_ALEN);
+ 
+-	if (iftype == NL80211_IFTYPE_MESH_POINT)
+-		skb_copy_bits(skb, hdrlen, &mesh_flags, 1);
++	if (iftype == NL80211_IFTYPE_MESH_POINT &&
++	    skb_copy_bits(skb, hdrlen, &mesh_flags, 1) < 0)
++		return -1;
+ 
+ 	mesh_flags &= MESH_FLAGS_AE;
+ 
+@@ -593,11 +594,12 @@ int ieee80211_data_to_8023_exthdr(struct
+ 		if (iftype == NL80211_IFTYPE_MESH_POINT) {
+ 			if (mesh_flags == MESH_FLAGS_AE_A4)
+ 				return -1;
+-			if (mesh_flags == MESH_FLAGS_AE_A5_A6) {
+-				skb_copy_bits(skb, hdrlen +
+-					offsetof(struct ieee80211s_hdr, eaddr1),
+-					tmp.h_dest, 2 * ETH_ALEN);
+-			}
++			if (mesh_flags == MESH_FLAGS_AE_A5_A6 &&
++			    skb_copy_bits(skb, hdrlen +
++					  offsetof(struct ieee80211s_hdr, eaddr1),
++					  tmp.h_dest, 2 * ETH_ALEN) < 0)
++				return -1;
++
+ 			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
+ 		}
+ 		break;
+@@ -611,10 +613,11 @@ int ieee80211_data_to_8023_exthdr(struct
+ 		if (iftype == NL80211_IFTYPE_MESH_POINT) {
+ 			if (mesh_flags == MESH_FLAGS_AE_A5_A6)
+ 				return -1;
+-			if (mesh_flags == MESH_FLAGS_AE_A4)
+-				skb_copy_bits(skb, hdrlen +
+-					offsetof(struct ieee80211s_hdr, eaddr1),
+-					tmp.h_source, ETH_ALEN);
++			if (mesh_flags == MESH_FLAGS_AE_A4 &&
++			    skb_copy_bits(skb, hdrlen +
++					  offsetof(struct ieee80211s_hdr, eaddr1),
++					  tmp.h_source, ETH_ALEN) < 0)
++				return -1;
+ 			hdrlen += __ieee80211_get_mesh_hdrlen(mesh_flags);
+ 		}
+ 		break;
+@@ -626,18 +629,18 @@ int ieee80211_data_to_8023_exthdr(struct
+ 		break;
+ 	}
+ 
+-	skb_copy_bits(skb, hdrlen, &payload, sizeof(payload));
+-	tmp.h_proto = payload.proto;
+-
+-	if (likely((!is_amsdu && ether_addr_equal(payload.hdr, rfc1042_header) &&
+-		    tmp.h_proto != htons(ETH_P_AARP) &&
+-		    tmp.h_proto != htons(ETH_P_IPX)) ||
+-		   ether_addr_equal(payload.hdr, bridge_tunnel_header)))
++	if (likely(skb_copy_bits(skb, hdrlen, &payload, sizeof(payload)) == 0 &&
++	           ((!is_amsdu && ether_addr_equal(payload.hdr, rfc1042_header) &&
++		     payload.proto != htons(ETH_P_AARP) &&
++		     payload.proto != htons(ETH_P_IPX)) ||
++		    ether_addr_equal(payload.hdr, bridge_tunnel_header)))) {
+ 		/* remove RFC1042 or Bridge-Tunnel encapsulation and
+ 		 * replace EtherType */
+ 		hdrlen += ETH_ALEN + 2;
+-	else
++		tmp.h_proto = payload.proto;
++	} else {
+ 		tmp.h_proto = htons(skb->len - hdrlen);
++	}
+ 
+ 	pskb_pull(skb, hdrlen);
+ 
diff --git a/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-do-not-drop-packets-smaller-than-the-L.patch b/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-do-not-drop-packets-smaller-than-the-L.patch
new file mode 100644
index 0000000000..16cafc447c
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/345-wifi-mac80211-do-not-drop-packets-smaller-than-the-L.patch
@@ -0,0 +1,25 @@
+From: Felix Fietkau <nbd@nbd.name>
+Date: Fri, 7 Oct 2022 10:58:26 +0200
+Subject: [PATCH] wifi: mac80211: do not drop packets smaller than the
+ LLC-SNAP header on fast-rx
+
+Since STP TCN frames are only 7 bytes, the pskb_may_pull call returns an error.
+Instead of dropping those packets, bump them back to the slow path for proper
+processing.
+
+Fixes: 49ddf8e6e234 ("mac80211: add fast-rx path")
+Reported-by: Chad Monroe <chad.monroe@smartrg.com>
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+---
+
+--- a/net/mac80211/rx.c
++++ b/net/mac80211/rx.c
+@@ -4601,7 +4601,7 @@ static bool ieee80211_invoke_fast_rx(str
+ 
+ 	if (!(status->rx_flags & IEEE80211_RX_AMSDU)) {
+ 		if (!pskb_may_pull(skb, snap_offs + sizeof(*payload)))
+-			goto drop;
++			return false;
+ 
+ 		payload = (void *)(skb->data + snap_offs);
+ 
diff --git a/package/kernel/mac80211/patches/subsys/800-mac80211-mask-nested-A-MSDU-support-for-mesh.patch b/package/kernel/mac80211/patches/subsys/800-mac80211-mask-nested-A-MSDU-support-for-mesh.patch
new file mode 100644
index 0000000000..e7da94c9cd
--- /dev/null
+++ b/package/kernel/mac80211/patches/subsys/800-mac80211-mask-nested-A-MSDU-support-for-mesh.patch
@@ -0,0 +1,33 @@
+From 313d8c18385f10957402b475f9b0c209ceab6c5a Mon Sep 17 00:00:00 2001
+From: David Bauer <mail@david-bauer.net>
+Date: Fri, 8 Oct 2021 00:25:19 +0200
+Subject: [PATCH] mac80211: mask nested A-MSDU support for mesh
+
+mac80211 incorrectly processes A-MSDUs contained in A-MPDU frames. This
+results in dropped packets and severely impacted throughput.
+
+As a workaround, don't indicate support for A-MSDUs contained in
+A-MPDUs. This improves throughput over mesh links by factor 10.
+
+Ref: https://github.com/openwrt/mt76/issues/450
+
+Signed-off-by: David Bauer <mail@david-bauer.net>
+---
+ net/mac80211/agg-rx.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/net/mac80211/agg-rx.c
++++ b/net/mac80211/agg-rx.c
+@@ -251,7 +251,11 @@ static void ieee80211_send_addba_resp(st
+ 	mgmt->u.action.u.addba_resp.action_code = WLAN_ACTION_ADDBA_RESP;
+ 	mgmt->u.action.u.addba_resp.dialog_token = dialog_token;
+ 
+-	capab = u16_encode_bits(amsdu, IEEE80211_ADDBA_PARAM_AMSDU_MASK);
++	capab = 0;
++#ifdef CONFIG_MAC80211_MESH
++	if (!sta->mesh)
++#endif
++		capab = u16_encode_bits(amsdu, IEEE80211_ADDBA_PARAM_AMSDU_MASK);
+ 	capab |= u16_encode_bits(policy, IEEE80211_ADDBA_PARAM_POLICY_MASK);
+ 	capab |= u16_encode_bits(tid, IEEE80211_ADDBA_PARAM_TID_MASK);
+ 	capab |= u16_encode_bits(buf_size, IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK);
diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile
index c1c5f36535..628ea79ec9 100644
--- a/package/kernel/mt76/Makefile
+++ b/package/kernel/mt76/Makefile
@@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
 
 PKG_SOURCE_URL:=https://github.com/openwrt/mt76
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_DATE:=2022-09-15
-PKG_SOURCE_VERSION:=763a1d90133bfd2efae1a533d6b571d9802bcaa3
-PKG_MIRROR_HASH:=8adeab19ef8c7df146fa9568bc8aba9418840e543b49e1e79dee85ca70725fa4
+PKG_SOURCE_DATE:=2022-10-01
+PKG_SOURCE_VERSION:=72b87836d368685a093b927229209b61d8272541
+PKG_MIRROR_HASH:=ea4dfe93f7632d5063ac2ccf0f5a3698e2bfeadbbef45910381b5ef07e334cfc
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 PKG_USE_NINJA:=0
diff --git a/package/kernel/ubnt-ledbar/Makefile b/package/kernel/ubnt-ledbar/Makefile
new file mode 100644
index 0000000000..90eccf1c21
--- /dev/null
+++ b/package/kernel/ubnt-ledbar/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2008-2010 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=ubnt-ledbar
+PKG_RELEASE:=1
+PKG_LICENSE:=GPL-2.0
+
+include $(INCLUDE_DIR)/package.mk
+
+define KernelPackage/leds-ubnt-ledbar
+  SUBMENU:=LED modules
+  TITLE:=Ubiquiti UniFi 6 LR LED support
+  FILES:= \
+	$(PKG_BUILD_DIR)/leds-ubnt-ledbar.ko
+  AUTOLOAD:=$(call AutoProbe,leds-ubnt-ledbar,1)
+  DEPENDS:=+kmod-i2c-core
+endef
+
+define KernelPackage/leds-ubnt-ledbar/description
+  LED support for some Ubiquiti UniFi access points.
+endef
+
+define Build/Compile
+	$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
+endef
+
+$(eval $(call KernelPackage,leds-ubnt-ledbar))
diff --git a/package/kernel/ubnt-ledbar/src/Makefile b/package/kernel/ubnt-ledbar/src/Makefile
new file mode 100644
index 0000000000..a81d9377c0
--- /dev/null
+++ b/package/kernel/ubnt-ledbar/src/Makefile
@@ -0,0 +1 @@
+obj-m := leds-ubnt-ledbar.o
diff --git a/target/linux/generic/files/drivers/leds/leds-ubnt-ledbar.c b/package/kernel/ubnt-ledbar/src/leds-ubnt-ledbar.c
similarity index 100%
rename from target/linux/generic/files/drivers/leds/leds-ubnt-ledbar.c
rename to package/kernel/ubnt-ledbar/src/leds-ubnt-ledbar.c
diff --git a/package/libs/libaudit/Makefile b/package/libs/libaudit/Makefile
index d0cca1350a..13263c7deb 100644
--- a/package/libs/libaudit/Makefile
+++ b/package/libs/libaudit/Makefile
@@ -11,7 +11,7 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_NAME:=audit
 PKG_SOURCE:=$(PKG_SOURCE_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://people.redhat.com/sgrubb/audit
+PKG_SOURCE_URL:=https://people.redhat.com/sgrubb/audit
 PKG_HASH:=0e5d4103646e00f8d1981e1cd2faea7a2ae28e854c31a803e907a383c5e2ecb7
 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_SOURCE_NAME)-$(PKG_VERSION)
 HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_SOURCE_NAME)-$(PKG_VERSION)
diff --git a/package/libs/libcap/Makefile b/package/libs/libcap/Makefile
index b3ca20fd8a..afc66d7c09 100644
--- a/package/libs/libcap/Makefile
+++ b/package/libs/libcap/Makefile
@@ -6,12 +6,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libcap
-PKG_VERSION:=2.65
+PKG_VERSION:=2.66
 PKG_RELEASE:=$(AUTORELEASE)
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/libs/security/linux-privs/libcap2
-PKG_HASH:=73e350020cc31fe15360879d19384ffa3395a825f065fcf6bda3a5cdf965bebd
+PKG_HASH:=15c40ededb3003d70a283fe587a36b7d19c8b3b554e33f86129c059a4bb466b2
 
 PKG_MAINTAINER:=Paul Wassi <p.wassi@gmx.at>
 PKG_LICENSE:=GPL-2.0-only
diff --git a/package/libs/libpcap/Makefile b/package/libs/libpcap/Makefile
index d5d9436994..a94a707648 100644
--- a/package/libs/libpcap/Makefile
+++ b/package/libs/libpcap/Makefile
@@ -12,7 +12,7 @@ PKG_VERSION:=1.10.1
 PKG_RELEASE:=$(AUTORELEASE)
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://www.tcpdump.org/release/
+PKG_SOURCE_URL:=https://www.tcpdump.org/release/
 PKG_HASH:=ed285f4accaf05344f90975757b3dbfe772ba41d1c401c2648b7fa45b711bdd4
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
diff --git a/package/libs/libtraceevent/Makefile b/package/libs/libtraceevent/Makefile
index 9fb9304e76..c09197cc78 100644
--- a/package/libs/libtraceevent/Makefile
+++ b/package/libs/libtraceevent/Makefile
@@ -1,12 +1,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libtraceevent
-PKG_VERSION:=1.6.2
+PKG_VERSION:=1.6.3
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://git.kernel.org/pub/scm/libs/libtrace/libtraceevent.git/snapshot/
-PKG_HASH:=1aaeb12f5842a843a06b733e3f4230b0937ba9c2ecd39345edf6f66cc8cbe795
+PKG_HASH:=031e4428586788bb835d894f7f11c54e482764063d96ead303c7f208fb59e353
 
 PKG_MAINTAINER:=Nick Hainke <vincent@systemli.org>
 
diff --git a/package/libs/libtracefs/Makefile b/package/libs/libtracefs/Makefile
index 412c5fd122..55a2ab1d10 100644
--- a/package/libs/libtracefs/Makefile
+++ b/package/libs/libtracefs/Makefile
@@ -1,12 +1,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=libtracefs
-PKG_VERSION:=1.4.2
+PKG_VERSION:=1.5.0
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://git.kernel.org/pub/scm/libs/libtrace/libtracefs.git/snapshot/
-PKG_HASH:=8ad03e6d2a6227f6eb11692d9f04614d3da60ac6c5e4fe436e59b2bed90f031b
+PKG_HASH:=b796af4b6a0a6e6cd17ae150ed69adccc0b6401804e009b363fe7d982b04a58e
 
 PKG_MAINTAINER:=Nick Hainke <vincent@systemli.org>
 
diff --git a/package/libs/popt/Makefile b/package/libs/popt/Makefile
index 5b8b870111..ad767b8eed 100644
--- a/package/libs/popt/Makefile
+++ b/package/libs/popt/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=popt
-PKG_VERSION:=1.18
+PKG_VERSION:=1.19
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=http://ftp.rpm.org/popt/releases/popt-1.x/
-PKG_HASH:=5159bc03a20b28ce363aa96765f37df99ea4d8850b1ece17d1e6ad5c24fdc5d1
+PKG_HASH:=c25a4838fc8e4c1c8aacb8bd620edb3084a3d63bf8987fdad3ca2758c63240f9
 PKG_LICENSE:=MIT
 
 PKG_FIXUP:=autoreconf
diff --git a/package/libs/popt/patches/100-configure.ac-remove-require-gettext-version.patch b/package/libs/popt/patches/100-configure.ac-remove-require-gettext-version.patch
new file mode 100644
index 0000000000..24ad076433
--- /dev/null
+++ b/package/libs/popt/patches/100-configure.ac-remove-require-gettext-version.patch
@@ -0,0 +1,26 @@
+From 19d21b2d9e5aea5f73b1709b3c7803f920471146 Mon Sep 17 00:00:00 2001
+From: Nick Hainke <vincent@systemli.org>
+Date: Sun, 25 Sep 2022 11:52:29 +0200
+Subject: [PATCH] configure.ac: remove require gettext version
+
+This breaks compilation with OpenWrt:
+./configure: line 13059: syntax error near unexpected token `0.19.8'
+./configure: line 13059: `AM_GNU_GETTEXT_REQUIRE_VERSION(0.19.8)'
+
+Fixes: bf8dd64e8aa0 ("Update gettext autoconf usage")
+
+Signed-off-by: Nick Hainke <vincent@systemli.org>
+---
+ configure.ac | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/configure.ac
++++ b/configure.ac
+@@ -53,7 +53,6 @@ AC_SEARCH_LIBS([setreuid], [ucb])
+ AC_CHECK_FUNCS([getuid geteuid iconv mtrace secure_getenv __secure_getenv setreuid setuid stpcpy strerror vasprintf srandom glob_pattern_p mbsrtowcs])
+ 
+ AM_GNU_GETTEXT_VERSION([0.19.8])
+-AM_GNU_GETTEXT_REQUIRE_VERSION([0.19.8])
+ AM_GNU_GETTEXT([external])
+ AM_ICONV_LINK
+ 
diff --git a/package/libs/ustream-ssl/Makefile b/package/libs/ustream-ssl/Makefile
index a5e34a73b4..3181f66c7e 100644
--- a/package/libs/ustream-ssl/Makefile
+++ b/package/libs/ustream-ssl/Makefile
@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=ustream-ssl
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/ustream-ssl.git
diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile
index d090dd5780..08a1ca7401 100644
--- a/package/libs/wolfssl/Makefile
+++ b/package/libs/wolfssl/Makefile
@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=wolfssl
-PKG_VERSION:=5.5.0-stable
+PKG_VERSION:=5.5.1-stable
 PKG_RELEASE:=$(AUTORELEASE)
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
-PKG_HASH:=c34b74b5f689fac7becb05583b044e84d3b10d39f38709f0095dd5d423ded67f
+PKG_HASH:=97339e6956c90e7c881ba5c748dd04f7c30e5dbe0c06da765418c51375a6dee3
 
 PKG_FIXUP:=libtool libtool-abiver
 PKG_INSTALL:=1
diff --git a/package/libs/wolfssl/patches/100-disable-hardening-check.patch b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
index 01bb5974ba..bc5b27626f 100644
--- a/package/libs/wolfssl/patches/100-disable-hardening-check.patch
+++ b/package/libs/wolfssl/patches/100-disable-hardening-check.patch
@@ -1,6 +1,6 @@
 --- a/wolfssl/wolfcrypt/settings.h
 +++ b/wolfssl/wolfcrypt/settings.h
-@@ -2445,7 +2445,7 @@ extern void uITRON4_free(void *p) ;
+@@ -2454,7 +2454,7 @@ extern void uITRON4_free(void *p) ;
  #endif
  
  /* warning for not using harden build options (default with ./configure) */
diff --git a/package/libs/wolfssl/patches/200-ecc-rng.patch b/package/libs/wolfssl/patches/200-ecc-rng.patch
index d68ef7f385..bef2e60872 100644
--- a/package/libs/wolfssl/patches/200-ecc-rng.patch
+++ b/package/libs/wolfssl/patches/200-ecc-rng.patch
@@ -11,7 +11,7 @@ RNG regardless of the built settings for wolfssl.
 
 --- a/wolfcrypt/src/ecc.c
 +++ b/wolfcrypt/src/ecc.c
-@@ -12348,21 +12348,21 @@ void wc_ecc_fp_free(void)
+@@ -12505,21 +12505,21 @@ void wc_ecc_fp_free(void)
  
  #endif /* FP_ECC */
  
@@ -37,7 +37,7 @@ RNG regardless of the built settings for wolfssl.
  
 --- a/wolfssl/wolfcrypt/ecc.h
 +++ b/wolfssl/wolfcrypt/ecc.h
-@@ -650,10 +650,8 @@ WOLFSSL_ABI WOLFSSL_API
+@@ -656,10 +656,8 @@ WOLFSSL_ABI WOLFSSL_API
  void wc_ecc_fp_free(void);
  WOLFSSL_LOCAL
  void wc_ecc_fp_init(void);
diff --git a/package/network/config/qos-scripts/files/usr/bin/qos-start b/package/network/config/qos-scripts/files/usr/bin/qos-start
index 68dae70638..13d7772095 100755
--- a/package/network/config/qos-scripts/files/usr/bin/qos-start
+++ b/package/network/config/qos-scripts/files/usr/bin/qos-start
@@ -1,4 +1,4 @@
 #!/bin/sh
 
-qos-stop 
+qos-stop
 /usr/lib/qos/generate.sh all | sh
diff --git a/package/network/config/qos-scripts/files/usr/bin/qos-stat b/package/network/config/qos-scripts/files/usr/bin/qos-stat
index 03b737c89d..454e18aa72 100755
--- a/package/network/config/qos-scripts/files/usr/bin/qos-stat
+++ b/package/network/config/qos-scripts/files/usr/bin/qos-stat
@@ -32,7 +32,7 @@ print_comments() {
 	echo '# Direction: '"$2"
 	echo '# Stats:     '"$3"
 	echo ''
-}	
+}
 
 get_device() {
 	( config_load network; scan_interfaces; config_get "$1" ifname )
diff --git a/package/network/config/qos-scripts/files/usr/lib/qos/generate.sh b/package/network/config/qos-scripts/files/usr/lib/qos/generate.sh
index 62e7283633..13aa173d18 100755
--- a/package/network/config/qos-scripts/files/usr/lib/qos/generate.sh
+++ b/package/network/config/qos-scripts/files/usr/lib/qos/generate.sh
@@ -2,11 +2,10 @@
 [ -e /lib/functions.sh ] && . /lib/functions.sh || . ./functions.sh
 [ -x /sbin/modprobe ] && {
 	insmod="modprobe"
-	rmmod="$insmod -r"
 } || {
 	insmod="insmod"
-	rmmod="rmmod"
 }
+rmmod="rmmod"
 
 add_insmod() {
 	eval "export isset=\${insmod_$1}"
@@ -65,7 +64,7 @@ parse_matching_rule() {
 	append "$var" "${proto:+-p $proto}"
 	for option in $options; do
 		config_get value "$section" "$option"
-		
+
 		case "$pkt:$option" in
 			*:srchost)
 				append "$var" "-s $value"
@@ -283,14 +282,14 @@ start_interface() {
 	config_get device "$iface" device
 	config_get_bool enabled "$iface" enabled 1
 	[ -z "$device" -o 1 -ne "$enabled" ] && {
-		return 1 
+		return 1
 	}
 	config_get upload "$iface" upload
 	config_get_bool halfduplex "$iface" halfduplex
 	config_get download "$iface" download
 	config_get classgroup "$iface" classgroup
 	config_get_bool overhead "$iface" overhead 0
-	
+
 	download="${download:-${halfduplex:+$upload}}"
 	enum_classes "$classgroup"
 	for dir in ${halfduplex:-up} ${download:+down}; do
@@ -374,7 +373,7 @@ add_rules() {
 	local var="$1"
 	local rules="$2"
 	local prefix="$3"
-	
+
 	for rule in $rules; do
 		unset iptrule
 		config_get target "$rule" target
@@ -438,7 +437,7 @@ EOF
 
 for command in $iptables; do
 	cat <<EOF
-	$command -w -t mangle -N qos_${cg} 
+	$command -w -t mangle -N qos_${cg}
 	$command -w -t mangle -N qos_${cg}_ct
 EOF
 done
diff --git a/package/network/config/qos-scripts/files/usr/lib/qos/tcrules.awk b/package/network/config/qos-scripts/files/usr/lib/qos/tcrules.awk
index 21df391054..be95f99b01 100644
--- a/package/network/config/qos-scripts/files/usr/lib/qos/tcrules.awk
+++ b/package/network/config/qos-scripts/files/usr/lib/qos/tcrules.awk
@@ -103,4 +103,3 @@ END {
 		}
 	}
 }
-
diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile
index 6cd28d51c4..31f226ed23 100644
--- a/package/network/services/dnsmasq/Makefile
+++ b/package/network/services/dnsmasq/Makefile
@@ -13,7 +13,7 @@ PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
 PKG_RELEASE:=$(AUTORELEASE)
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
-PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq/
+PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/
 PKG_HASH:=0228c0364a7f2356fd7e7f1549937cbf3099a78d3b2eb1ba5bb0c31e2b89de7a
 
 PKG_LICENSE:=GPL-2.0
diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile
index e479496879..0eb8279453 100644
--- a/package/network/services/hostapd/Makefile
+++ b/package/network/services/hostapd/Makefile
@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=hostapd
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=$(AUTORELEASE).1
 
 PKG_SOURCE_URL:=http://w1.fi/hostap.git
 PKG_SOURCE_PROTO:=git
diff --git a/package/network/services/ipset-dns/Makefile b/package/network/services/ipset-dns/Makefile
index 3f21d04c47..f55281ef42 100644
--- a/package/network/services/ipset-dns/Makefile
+++ b/package/network/services/ipset-dns/Makefile
@@ -11,7 +11,7 @@ PKG_NAME:=ipset-dns
 PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
-PKG_SOURCE_URL:=http://git.zx2c4.com/ipset-dns
+PKG_SOURCE_URL:=https://git.zx2c4.com/ipset-dns
 PKG_SOURCE_DATE:=2017-10-08
 PKG_SOURCE_VERSION:=ade2cf88e933f4f90451e0a6171f0aa4a523f989
 PKG_MIRROR_HASH:=34ad1f5c7d2eab90b795f2a512102891428216e3d439d918a8992846550e9697
diff --git a/package/network/services/ppp/Makefile b/package/network/services/ppp/Makefile
index 419136ca18..779d2c7b92 100644
--- a/package/network/services/ppp/Makefile
+++ b/package/network/services/ppp/Makefile
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=ppp
-PKG_RELEASE:=6
+PKG_RELEASE:=7
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL:=https://github.com/paulusmack/ppp
diff --git a/package/network/services/ppp/files/ppp.sh b/package/network/services/ppp/files/ppp.sh
index 50dc9c4aef..94654a287c 100755
--- a/package/network/services/ppp/files/ppp.sh
+++ b/package/network/services/ppp/files/ppp.sh
@@ -218,9 +218,7 @@ proto_pppoe_setup() {
 	local config="$1"
 	local iface="$2"
 
-	for module in slhc ppp_generic pppox pppoe; do
-		/sbin/insmod $module 2>&- >&-
-	done
+	/sbin/modprobe -qa slhc ppp_generic pppox pppoe
 
 	json_get_var mtu mtu
 	mtu="${mtu:-1492}"
@@ -269,9 +267,7 @@ proto_pppoa_setup() {
 	local config="$1"
 	local iface="$2"
 
-	for module in slhc ppp_generic pppox pppoatm; do
-		/sbin/insmod $module 2>&- >&-
-	done
+	/sbin/modprobe -qa slhc ppp_generic pppox pppoatm
 
 	json_get_vars atmdev vci vpi encaps
 
@@ -318,13 +314,8 @@ proto_pptp_setup() {
 		exit 1
 	}
 
-	local load
-	for module in slhc ppp_generic ppp_async ppp_mppe ip_gre gre pptp; do
-		grep -q "^$module " /proc/modules && continue
-		/sbin/insmod $module 2>&- >&-
-		load=1
-	done
-	[ "$load" = "1" ] && sleep 1
+	/sbin/modprobe -qa slhc ppp_generic ppp_async ppp_mppe ip_gre gre pptp
+	sleep 1
 
 	ppp_generic_setup "$config" \
 		plugin pptp.so \
@@ -342,4 +333,3 @@ proto_pptp_teardown() {
 	[ -f /usr/lib/pppd/*/pppoatm.so ] && add_protocol pppoa
 	[ -f /usr/lib/pppd/*/pptp.so ] && add_protocol pptp
 }
-
diff --git a/package/network/utils/arptables/Makefile b/package/network/utils/arptables/Makefile
index 5083d1cd9b..7f32ed1395 100644
--- a/package/network/utils/arptables/Makefile
+++ b/package/network/utils/arptables/Makefile
@@ -10,7 +10,7 @@ PKG_VERSION:=0.0.5
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://ftp.netfilter.org/pub/arptables
+PKG_SOURCE_URL:=https://ftp.netfilter.org/pub/arptables
 PKG_HASH:=4f9a0656ce5c90868f551cd4deeb2d04f33899667e1fb2818b64e432fe8f629c
 
 PKG_LICENSE:=GPL-2.0
diff --git a/package/network/utils/ipset/Makefile b/package/network/utils/ipset/Makefile
index 65133d105c..f6ec5cf679 100644
--- a/package/network/utils/ipset/Makefile
+++ b/package/network/utils/ipset/Makefile
@@ -13,7 +13,7 @@ PKG_VERSION:=7.15
 PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
-PKG_SOURCE_URL:=http://ipset.netfilter.org
+PKG_SOURCE_URL:=https://ipset.netfilter.org
 PKG_HASH:=0a5545aaadb640142c1f888d366a78ddf8724799967fa20686a70053bd621751
 
 PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
diff --git a/package/network/utils/tcpdump/Makefile b/package/network/utils/tcpdump/Makefile
index d6da50f25e..dc722f1ad4 100644
--- a/package/network/utils/tcpdump/Makefile
+++ b/package/network/utils/tcpdump/Makefile
@@ -12,7 +12,7 @@ PKG_VERSION:=4.99.1
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://www.tcpdump.org/release/
+PKG_SOURCE_URL:=https://www.tcpdump.org/release/
 PKG_HASH:=79b36985fb2703146618d87c4acde3e068b91c553fb93f021a337f175fd10ebe
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
diff --git a/package/utils/bsdiff/Makefile b/package/utils/bsdiff/Makefile
index db1f320872..09e6f126f6 100644
--- a/package/utils/bsdiff/Makefile
+++ b/package/utils/bsdiff/Makefile
@@ -12,7 +12,7 @@ PKG_VERSION:=4.3
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://www.daemonology.net/bsdiff/
+PKG_SOURCE_URL:=https://www.daemonology.net/bsdiff/
 PKG_HASH:=18821588b2dc5bf159aa37d3bcb7b885d85ffd1e19f23a0c57a58723fea85f48
 PKG_MAINTAINER:=Hauke Mehrtens <hauke@hauke-m.de>
 HOST_BUILD_DEPENDS:=bzip2/host
@@ -27,7 +27,7 @@ define Package/bsdiff
   CATEGORY:=Utilities
   DEPENDS:=+libbz2
   TITLE:=Binary diff tool
-  URL:=http://www.daemonology.net/bsdiff/
+  URL:=https://www.daemonology.net/bsdiff/
 endef
 
 define Package/bspatch
@@ -35,7 +35,7 @@ define Package/bspatch
   CATEGORY:=Utilities
   DEPENDS:=+libbz2
   TITLE:=Binary patch tool
-  URL:=http://www.daemonology.net/bsdiff/
+  URL:=https://www.daemonology.net/bsdiff/
 endef
 
 
diff --git a/package/utils/lua/Makefile b/package/utils/lua/Makefile
index 279759e972..9d7cc40671 100644
--- a/package/utils/lua/Makefile
+++ b/package/utils/lua/Makefile
@@ -12,8 +12,8 @@ PKG_VERSION:=5.1.5
 PKG_RELEASE:=10
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://www.lua.org/ftp/ \
-	http://www.tecgraf.puc-rio.br/lua/ftp/
+PKG_SOURCE_URL:=https://www.lua.org/ftp/ \
+	https://www.tecgraf.puc-rio.br/lua/ftp/
 PKG_HASH:=2640fc56a795f29d28ef15e13c34a47e223960b0240e8cb0a82d9b0738695333
 PKG_BUILD_PARALLEL:=1
 
@@ -30,7 +30,7 @@ define Package/lua/Default
   SECTION:=lang
   CATEGORY:=Languages
   TITLE:=Lua programming language
-  URL:=http://www.lua.org/
+  URL:=https://www.lua.org/
   MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
 endef
 
diff --git a/package/utils/lua5.3/Makefile b/package/utils/lua5.3/Makefile
index 19f3b4dfda..9a707fbbab 100644
--- a/package/utils/lua5.3/Makefile
+++ b/package/utils/lua5.3/Makefile
@@ -12,8 +12,8 @@ PKG_VERSION:=5.3.5
 PKG_RELEASE:=5
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://www.lua.org/ftp/ \
-	http://www.tecgraf.puc-rio.br/lua/ftp/
+PKG_SOURCE_URL:=https://www.lua.org/ftp/ \
+	https://www.tecgraf.puc-rio.br/lua/ftp/
 PKG_HASH:=0c2eed3f960446e1a3e4b9a1ca2f3ff893b6ce41942cf54d5dd59ab4b3b058ac
 PKG_BUILD_PARALLEL:=1
 
@@ -30,7 +30,7 @@ define Package/lua5.3/Default
   SECTION:=lang
   CATEGORY:=Languages
   TITLE:=Lua programming language
-  URL:=http://www.lua.org/
+  URL:=https://www.lua.org/
   MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
 endef
 
diff --git a/package/utils/px5g-wolfssl/Makefile b/package/utils/px5g-wolfssl/Makefile
index 95517c5c00..ea805acd8b 100644
--- a/package/utils/px5g-wolfssl/Makefile
+++ b/package/utils/px5g-wolfssl/Makefile
@@ -5,7 +5,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=px5g-wolfssl
-PKG_RELEASE:=$(COMMITCOUNT)
+PKG_RELEASE:=$(COMMITCOUNT).1
 PKG_LICENSE:=GPL-2.0-or-later
 
 PKG_USE_MIPS16:=0
diff --git a/package/utils/uencrypt/Makefile b/package/utils/uencrypt/Makefile
index 9307f97b6e..023c84b600 100644
--- a/package/utils/uencrypt/Makefile
+++ b/package/utils/uencrypt/Makefile
@@ -4,7 +4,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=uencrypt
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_FLAGS:=nonshared
 PKG_LICENSE:=GPL-2.0-or-later
diff --git a/rules.mk b/rules.mk
index 2072658e78..2de43d490d 100644
--- a/rules.mk
+++ b/rules.mk
@@ -257,9 +257,6 @@ ESED:=$(STAGING_DIR_HOST)/bin/sed -E -i -e
 MKHASH:=$(STAGING_DIR_HOST)/bin/mkhash
 # MKHASH is used in /scripts, so we export it here.
 export MKHASH
-# DOWNLOAD_CHECK_CERTIFICATE is used in /scripts, so we export it here.
-DOWNLOAD_CHECK_CERTIFICATE:=$(CONFIG_DOWNLOAD_CHECK_CERTIFICATE)
-export DOWNLOAD_CHECK_CERTIFICATE
 CP:=cp -fpR
 LN:=ln -sf
 XARGS:=xargs -r
diff --git a/scripts/download.pl b/scripts/download.pl
index 33ce1fa679..9c089760f7 100755
--- a/scripts/download.pl
+++ b/scripts/download.pl
@@ -70,29 +70,30 @@ sub hash_cmd() {
 	return undef;
 }
 
+sub tool_present {
+	my $tool_name = shift;
+	my $compare_line = shift;
+	my $present = 0;
+
+	if (open TOOL, "$tool_name --version 2>/dev/null |") {
+		if (defined(my $line = readline TOOL)) {
+			$present = 1 if $line =~ /^$compare_line /;
+		}
+		close TOOL;
+	}
+
+	return $present
+}
+
 sub download_cmd {
 	my $url = shift;
-	my $have_curl = 0;
-	my $have_aria2c = 0;
 	my $filename = shift;
 	my $additional_mirrors = join(" ", map "$_/$filename", @_);
 
 	my @chArray = ('a'..'z', 'A'..'Z', 0..9);
 	my $rfn = join '', "${filename}_", map{ $chArray[int rand @chArray] } 0..9;
-	if (open CURL, '-|', 'curl', '--version') {
-		if (defined(my $line = readline CURL)) {
-			$have_curl = 1 if $line =~ /^curl /;
-		}
-		close CURL;
-	}
-	if (open ARIA2C, '-|', 'aria2c', '--version') {
-		if (defined(my $line = readline ARIA2C)) {
-			$have_aria2c = 1 if $line =~ /^aria2 /;
-		}
-		close ARIA2C;
-	}
 
-	if ($have_aria2c) {
+	if (tool_present('aria2c', 'aria2')) {
 		@mirrors=();
 		return join(" ", "[ -d $ENV{'TMPDIR'}/aria2c ] || mkdir $ENV{'TMPDIR'}/aria2c;",
 			"touch $ENV{'TMPDIR'}/aria2c/${rfn}_spp;",
@@ -103,7 +104,7 @@ sub download_cmd {
 			"-d $ENV{'TMPDIR'}/aria2c -o $rfn;",
 			"cat $ENV{'TMPDIR'}/aria2c/$rfn;",
 			"rm $ENV{'TMPDIR'}/aria2c/$rfn $ENV{'TMPDIR'}/aria2c/${rfn}_spp");
-	} elsif ($have_curl) {
+	} elsif (tool_present('curl', 'curl')) {
 		return (qw(curl -f --connect-timeout 20 --retry 5 --location),
 			$check_certificate ? () : '--insecure',
 			shellwords($ENV{CURL_OPTIONS} || ''),
@@ -236,6 +237,8 @@ foreach my $mirror (@ARGV) {
 		push @mirrors, "https://ftp.debian.org/debian/$1";
 		push @mirrors, "https://mirror.leaseweb.com/debian/$1";
 		push @mirrors, "https://mirror.netcologne.de/debian/$1";
+		push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/debian/$1";
+		push @mirrors, "https://mirrors.ustc.edu.cn/debian/$1"
 	} elsif ($mirror =~ /^\@APACHE\/(.+)$/) {
 		push @mirrors, "https://mirrors.tencent.com/apache/$1";
 		push @mirrors, "https://mirrors.aliyun.com/apache/$1";
@@ -250,6 +253,8 @@ foreach my $mirror (@ARGV) {
 		push @mirrors, "http://ftp.jaist.ac.jp/pub/apache/$1";
 		push @mirrors, "ftp://apache.cs.utah.edu/apache.org/$1";
 		push @mirrors, "ftp://apache.mirrors.ovh.net/ftp.apache.org/dist/$1";
+		push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/apache/$1";
+		push @mirrors, "https://mirrors.ustc.edu.cn/apache/$1";
 	} elsif ($mirror =~ /^\@GITHUB\/(.+)$/) {
 		my $dir = $1;
 		my $i = 0;
@@ -276,6 +281,8 @@ foreach my $mirror (@ARGV) {
 		push @mirrors, "ftp://mirrors.rit.edu/gnu/$1";
 		push @mirrors, "ftp://download.xs4all.nl/pub/gnu/$1";
 		push @mirrors, "https://ftp.gnu.org/gnu/$1";
+		push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/gnu/$1";
+		push @mirrors, "https://mirrors.ustc.edu.cn/gnu/$1";
 	} elsif ($mirror =~ /^\@SAVANNAH\/(.+)$/) {
 		push @mirrors, "https://mirror.netcologne.de/savannah/$1";
 		push @mirrors, "https://mirror.csclub.uwaterloo.ca/nongnu/$1";
@@ -301,6 +308,8 @@ foreach my $mirror (@ARGV) {
 			push @mirrors, "http://www.ring.gr.jp/archives/linux/kernel.org/$dir";
 			push @mirrors, "ftp://ftp.riken.jp/Linux/kernel.org/$dir";
 			push @mirrors, "ftp://www.mirrorservice.org/sites/ftp.kernel.org/pub/$dir";
+			push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/kernel/$dir";
+			push @mirrors, "https://mirrors.ustc.edu.cn/kernel.org/$dir";
 		}
 	} elsif ($mirror =~ /^\@GNOME\/(.+)$/) {
 		# push @mirrors, "https://mirrors.ustc.edu.cn/gnome/sources/$1";
@@ -313,6 +322,7 @@ foreach my $mirror (@ARGV) {
 		push @mirrors, "http://ftp.belnet.be/ftp.gnome.org/sources/$1";
 		push @mirrors, "ftp://ftp.cse.buffalo.edu/pub/Gnome/sources/$1";
 		push @mirrors, "ftp://ftp.nara.wide.ad.jp/pub/X11/GNOME/sources/$1";
+		push @mirrors, "https://mirrors.ustc.edu.cn/gnome/sources/$1";
 	} else {
 		push @mirrors, $mirror;
 	}
diff --git a/scripts/ext-tools.sh b/scripts/ext-tools.sh
new file mode 100755
index 0000000000..bf56f4d9ed
--- /dev/null
+++ b/scripts/ext-tools.sh
@@ -0,0 +1,98 @@
+#!/usr/bin/env bash
+
+TOOLS_TAR=""
+HOST_BUILD_DIR=$(pwd)/"build_dir/host"
+HOST_STAGING_DIR_STAMP=$(pwd)/"staging_dir/host/stamp"
+
+refresh_timestamps() {
+	find "$1" -not -type l -print0 | xargs -0 touch
+}
+
+extract_prebuilt_tar() {
+	tar -xf "$1"
+}
+
+install_prebuilt_tools() {
+	extract_prebuilt_tar "$TOOLS_TAR"
+
+	if [ ! -d "$HOST_BUILD_DIR" ]; then
+		echo "Can't find Host Build Dir "$HOST_BUILD_DIR"" >&2
+		exit 1
+	fi
+
+	refresh_timestamps "$HOST_BUILD_DIR"
+	sleep 1
+
+	if [ ! -d "$HOST_STAGING_DIR_STAMP" ]; then
+		echo "Can't find Host Staging Dir Stamp "$HOST_STAGING_DIR_STAMP"" >&2
+		exit 1
+	fi
+
+	refresh_timestamps "$HOST_STAGING_DIR_STAMP"
+
+	return 0
+}
+
+while [ -n "$1" ]; do
+	arg="$1"; shift
+	case "$arg" in
+		--host-build-dir)
+			[ -d "$1" ] || {
+				echo "Directory '$1' does not exist." >&2
+				exit 1
+			}
+			HOST_BUILD_DIR="$(cd "$1"; pwd)"; shift
+		;;
+
+		--host-staging-dir-stamp)
+			[ -d "$1" ] || {
+				echo "Directory '$1' does not exist." >&2
+				exit 1
+			}
+			HOST_STAGING_DIR_STAMP="$(cd "$1"; pwd)"; shift
+		;;
+
+		--tools)
+			[ -f "$1" ] || {
+				echo "Tools tar file '$1' does not exist." >&2
+				exit 1
+			}
+			TOOLS_TAR="$1"; shift
+			install_prebuilt_tools
+
+			exit $?
+		;;
+
+		-h|--help)
+			me="$(basename "$0")"
+			echo -e "\nUsage:\n"                                            >&2
+			echo -e "  $me --host-build-dir {directory}"                    >&2
+			echo -e "    Set to refresh timestamp of this build directory"  >&2
+			echo -e "    with --tools."                                     >&2
+			echo -e "    THIS OPTION MUST BE SET BEFORE --tools."           >&2
+			echo -e "    If not provided the default directory is:"         >&2
+			echo -e "    $(pwd)/build_dir/host\n"                           >&2
+			echo -e "  $me --host-staging-dir-stamp {directory}"            >&2
+			echo -e "    Set to refresh staging timestamp present in this"  >&2
+			echo -e "    directory with --tools."                           >&2
+			echo -e "    THIS OPTION MUST BE SET BEFORE --tools."           >&2
+			echo -e "    If not provided the default directory is:"         >&2
+			echo -e "    $(pwd)/staging_dir/host/stamp\n"                   >&2
+			echo -e "  $me --tools {tar}"                                   >&2
+			echo -e "    Install the prebuilt tools present in the passed"  >&2
+			echo -e "    tar and prepare them."                             >&2
+			echo -e "    To correctly use them it's needed to update the."  >&2
+			echo -e "    timestamp of each tools to skip recompilation.\n"  >&2
+			echo -e "  $me --help"                                          >&2
+			echo -e "    Display this help text and exit.\n\n"              >&2
+			exit 1
+		;;
+
+		*)
+			echo "Unknown argument '$arg'" >&2
+			exec $0 --help
+		;;
+	esac
+done
+
+exec $0 --help
diff --git a/target/linux/Makefile b/target/linux/Makefile
index a939d42bc0..8eea40ee18 100644
--- a/target/linux/Makefile
+++ b/target/linux/Makefile
@@ -8,4 +8,4 @@ include $(INCLUDE_DIR)/target.mk
 export TARGET_BUILD=1
 
 prereq clean download prepare compile install oldconfig menuconfig nconfig xconfig update refresh: FORCE
-	@+$(NO_TRACE_MAKE) -C $(BOARD) $@
+	@+$(NO_TRACE_MAKE) -C $(firstword $(wildcard feeds/$(BOARD) $(BOARD))) $@
diff --git a/target/linux/ath79/config-5.10 b/target/linux/ath79/config-5.10
index bdc4b74508..ac903aee6d 100644
--- a/target/linux/ath79/config-5.10
+++ b/target/linux/ath79/config-5.10
@@ -82,7 +82,6 @@ CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HZ_PERIODIC=y
-CONFIG_IMAGE_CMDLINE_HACK=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IRQCHIP=y
 CONFIG_IRQ_DOMAIN=y
diff --git a/target/linux/ath79/dts/qca9557_extreme-networks_ws-ap3805i.dts b/target/linux/ath79/dts/qca9557_extreme-networks_ws-ap3805i.dts
index 8b1477b593..59dd83d5f8 100644
--- a/target/linux/ath79/dts/qca9557_extreme-networks_ws-ap3805i.dts
+++ b/target/linux/ath79/dts/qca9557_extreme-networks_ws-ap3805i.dts
@@ -7,7 +7,7 @@
 
 / {
 	compatible = "extreme-networks,ws-ap3805i", "qca,qca9557";
-	model = "Extreme Networks AP3805i";
+	model = "Extreme Networks WS-AP3805i";
 
 	aliases {
 		led-boot = &led_power_green;
diff --git a/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts b/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts
index 6cd8ba4578..a9c03b7eda 100644
--- a/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts
+++ b/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts
@@ -40,6 +40,10 @@
 	keys {
 		compatible = "gpio-keys";
 
+		pinctrl-names = "default";
+		/* GPIO1 (poe_pass) and GPIO2 (watchdog) requires jtag disabled */
+		pinctrl-0 = <&jtag_disable_pins>;
+
 		reset {
 			label = "Reset";
 			linux,code = <KEY_RESTART>;
diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
index 1955cd288f..0773f1a5af 100644
--- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
+++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
@@ -65,7 +65,7 @@
 #define AG71XX_TX_RING_SIZE_DEFAULT	128
 #define AG71XX_RX_RING_SIZE_DEFAULT	256
 
-#define AG71XX_TX_RING_SIZE_MAX		128
+#define AG71XX_TX_RING_SIZE_MAX		256
 #define AG71XX_RX_RING_SIZE_MAX		256
 
 #ifdef CONFIG_AG71XX_DEBUG
diff --git a/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch
index 7505f682ab..4a721f2af2 100644
--- a/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch
+++ b/target/linux/ath79/patches-5.10/0003-leds-add-reset-controller-based-driver.patch
@@ -13,9 +13,9 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/drivers/leds/Kconfig
 +++ b/drivers/leds/Kconfig
-@@ -941,6 +941,17 @@ config LEDS_UBNT_LEDBAR
- 	  To compile this driver as a module, choose M here: the module
- 	  will be called leds-ubnt-ledbar.
+@@ -931,6 +931,17 @@ config LEDS_ACER_A500
+ 
+ source "drivers/leds/blink/Kconfig"
  
 +config LEDS_RESET
 +	tristate "LED support for reset-controller API"
@@ -176,10 +176,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
 +MODULE_ALIAS("platform:leds-reset");
 --- a/drivers/leds/Makefile
 +++ b/drivers/leds/Makefile
-@@ -94,6 +94,7 @@ obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds
+@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
+ obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
  obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
  obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
- obj-$(CONFIG_LEDS_UBNT_LEDBAR)		+= leds-ubnt-ledbar.o
 +obj-$(CONFIG_LEDS_RESET)		+= leds-reset.o
  
  # LED SPI Drivers
diff --git a/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
index 71acc22210..e460fe58f3 100644
--- a/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
+++ b/target/linux/ath79/patches-5.10/0034-MIPS-ath79-ath9k-exports.patch
@@ -1,3 +1,12 @@
+From: John Crispin <john@phrozen.org>
+Subject: [PATCH] ath79: make ahb wifi work
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ arch/mips/ath79/common.c                      | 3 +++
+ mips/include/asm/mach-ath79/ath79.h           | 1+
+ 1 file changed, 4 insertions(+)
+
 --- a/arch/mips/ath79/common.c
 +++ b/arch/mips/ath79/common.c
 @@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
diff --git a/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch
index 80fcd0a7f5..4732d1b2c8 100644
--- a/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch
+++ b/target/linux/ath79/patches-5.10/0036-MIPS-ath79-remove-irq-code-from-pci.patch
@@ -1,3 +1,13 @@
+From: John Crispin <john@phrozen.org>
+Subject: ath79: fix remove irq code from pci driver patch
+
+This patch got mangled in the void while rebasing it.
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ arch/mips/pci/pci-ar71xx.c                    | 107 ------------------
+ 1 file changed, 141 deletions(-)
+
 --- a/arch/mips/pci/pci-ar71xx.c
 +++ b/arch/mips/pci/pci-ar71xx.c
 @@ -51,11 +51,9 @@
diff --git a/target/linux/ath79/patches-5.10/0037-missing-registers.patch b/target/linux/ath79/patches-5.10/0037-missing-registers.patch
index 9067e4ca7b..0e6ac52ade 100644
--- a/target/linux/ath79/patches-5.10/0037-missing-registers.patch
+++ b/target/linux/ath79/patches-5.10/0037-missing-registers.patch
@@ -1,6 +1,5 @@
-commit f3ffac90bc7266b7d917616f3233f58e8c08a196
-Author: Christian Lamparter <chunkeey@gmail.com>
-Date:   Fri Aug 10 23:24:47 2018 +0200
+From: Christian Lamparter <chunkeey@gmail.com>
+Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for
 
     ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
 
diff --git a/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch
index edf888c7e7..b24ff21692 100644
--- a/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch
+++ b/target/linux/ath79/patches-5.10/0039-MIPS-ath79-export-UART1-reference-clock.patch
@@ -1,3 +1,18 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Subject: [PATCH] ath79: add support for Atheros AR934x HS UART
+
+AR934x chips also got the 'old' qca,ar9330-uart in addition to the
+'new' ns16550a compatible one. Add support for UART1 clock selector as
+well as device-tree bindings in ar934x.dtsi to make use of that uart.
+
+Reported-by: Piotr Dymacz <pepe2k@gmail.com>
+Submitted-by: Daniel Golle <daniel@makrotopia.org>
+---
+ arch/mips/ath79/clock.c                       | 7 +++++++
+ .../mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
+ include/dt-bindings/clock/ath79-clk.h         | 3 ++-
+ 3 files changed, 10 insertions(+), 1 deletion(-)
+
 --- a/arch/mips/ath79/clock.c
 +++ b/arch/mips/ath79/clock.c
 @@ -40,6 +40,7 @@ static const char * const clk_names[ATH7
diff --git a/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
index 4a2a3b741d..154de918a5 100644
--- a/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
+++ b/target/linux/ath79/patches-5.10/004-register_gpio_driver_earlier.patch
@@ -1,6 +1,14 @@
+From: John Crispin <john@phrozen.org>
+Subject: ath79: Register GPIO driver earlier
+
 HACK: register the GPIO driver earlier to ensure that gpio_request calls
 from mach files succeed.
 
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/gpio/gpio-ath79.c                     | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
 --- a/drivers/gpio/gpio-ath79.c
 +++ b/drivers/gpio/gpio-ath79.c
 @@ -306,7 +306,11 @@ static struct platform_driver ath79_gpio
diff --git a/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch b/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch
index bf7cbf2716..4c2b94899a 100644
--- a/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch
+++ b/target/linux/ath79/patches-5.10/0040-ath79-sgmii-config.patch
@@ -1,3 +1,24 @@
+From: David Bauer <mail@david-bauer.net>
+Subject: [PATCH] ath79: force SGMII SerDes mode to MAC operation
+
+The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default.
+This only allows for 1000 Mbit/s links, however when used with an SGMII
+PHY in 100 Mbit/s link mode, the link remains dead.
+
+This strictly has nothing to do with the SerDes calibration, however it
+is done at the same point in the QCA reference U-Boot which is the
+blueprint for everything happening here. As the current state is more or
+less a hack, this should be fine.
+
+This fixes the issues outlined above on a TP-Link EAP-225 Outdoor.
+
+Reported-by: Tom Herbers <freifunk@tomherbers.de>
+Tested-by: Tom Herbers <freifunk@tomherbers.de>
+Submitted-by: David Bauer <mail@david-bauer.net>
+---
+ arch/mips/include/asm/mach-ath79/ar71xx_regs.h           | 1 +
+ 1 files changed, 1 insertion(+)
+
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 @@ -1376,5 +1376,6 @@
diff --git a/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch
index 923589661e..cfc017871f 100644
--- a/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch
+++ b/target/linux/ath79/patches-5.10/404-mtd-cybertan-trx-parser.patch
@@ -1,3 +1,21 @@
+From: Christian Lamparter <chunkeey@gmail.com>
+Subject: [PATCH] ath79: port cybertan_part from ar71xx
+
+This patch ports the cybertan_part code from ar71xx and converts the
+driver to a DT-supported mtd parser. As a result, it will no longer
+add the u-boot, nvram and art partitions, which were never part of
+the special Cybertan header.
+
+Instead these partitions have to be specified in the DT, which has the
+upside of making it possible to add properties (i.e.: read-only), labels
+and references to these important partitions.
+
+Submitted-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/mtd/parsers/Makefile                  | 1 +
+ drivers/mtd/parsers/Kconfig                   | 8 ++++++++
+ 2 files changed, 9 insertions(+)
+
 --- a/drivers/mtd/parsers/Makefile
 +++ b/drivers/mtd/parsers/Makefile
 @@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
diff --git a/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch
index 7ce3f0d29c..65867c1cd5 100644
--- a/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch
+++ b/target/linux/ath79/patches-5.10/420-net-use-downstream-ag71xx.patch
@@ -1,3 +1,16 @@
+From: John Crispin <john@phrozen.org>
+Subject: [PATCH] ath79: add new OF only target for QCA MIPS silicon
+
+This target aims to replace ar71xx mid-term. The big part that is still
+missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
+subtargets will follow.
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/net/ethernet/atheros/Kconfig          | 8 +-------
+ drivers/net/ethernet/atheros/Makefile         | 2 +-
+ 2 files changed, 2 insertions(+), 8 deletions(-)
+
 --- a/drivers/net/ethernet/atheros/Kconfig
 +++ b/drivers/net/ethernet/atheros/Kconfig
 @@ -17,13 +17,7 @@ config NET_VENDOR_ATHEROS
diff --git a/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
index bf224b5f47..92c64ac9c4 100644
--- a/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
+++ b/target/linux/ath79/patches-5.10/425-at803x-allow-sgmii-aneg-override.patch
@@ -1,3 +1,19 @@
+From: David Bauer <mail@david-bauer.net>
+Subject: [PATCH] ath79: allow to override AR8033 SGMII aneg status
+
+In order to make the QCA955x SGMII workaround work, the unsuccessful
+SGMII autonegotiation on the AR8033 should not block the PHY
+state-machine.
+
+Otherwise, the ag71xx driver never becomes aware of the copper-side
+link-establishment and the workaround is never executed.
+
+Submitted-by: David Bauer <mail@david-bauer.net>
+Submitted-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
+---
+ drivers/net/phy/at803x.c-override.patch          | 7 +++++++
+ 1 files changed, 7 insertions(+)
+
 --- a/drivers/net/phy/at803x.c
 +++ b/drivers/net/phy/at803x.c
 @@ -830,6 +830,13 @@ static int at803x_aneg_done(struct phy_d
diff --git a/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
index 7590793dc9..cba537408a 100644
--- a/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
+++ b/target/linux/ath79/patches-5.10/430-drivers-link-spi-before-mtd.patch
@@ -1,3 +1,11 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: [PATCH] ar71xx: Link SPI before MTD
+
+SVN-Revision: 22863
+---
+ drivers/Makefile                              |   2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/drivers/Makefile
 +++ b/drivers/Makefile
 @@ -81,8 +81,8 @@ obj-y				+= scsi/
diff --git a/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch
index 1e2d573ebf..366cf5118e 100644
--- a/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch
+++ b/target/linux/ath79/patches-5.10/440-mtd-ar934x-nand-driver.patch
@@ -1,3 +1,12 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: ar71xx: ar934x_nfc: experimental NAND Flash Controller driver for AR934x
+
+SVN-Revision: 33385
+---
+ drivers/mtd/nand/raw/Kconfig                  | 8 ++++++++
+ drivers/mtd/nand/raw/Makefile                 | 1 +
+ 2 files changed, 9 insertions(+)
+
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
 @@ -556,4 +556,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
diff --git a/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
index 924faec509..3b8fee2269 100644
--- a/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
+++ b/target/linux/ath79/patches-5.10/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
@@ -1,3 +1,14 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: [PATCH] ar71xx: swizzle address for PCI byte/word access on AR71xx
+
+Closes #11683.
+
+SVN-Revision: 32639
+---
+ .../mips/include/asm/mach-ath79/mangle-port.h | 111 ++++++++++++++++++
+ 1 file changed, 111 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-ath79/mangle-port.h
+
 --- /dev/null
 +++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
 @@ -0,0 +1,37 @@
diff --git a/target/linux/ath79/patches-5.10/600-of_net-add-mac-address-ascii-support.patch b/target/linux/ath79/patches-5.10/600-of_net-add-mac-address-ascii-support.patch
index 1788419c70..7f95852c7e 100644
--- a/target/linux/ath79/patches-5.10/600-of_net-add-mac-address-ascii-support.patch
+++ b/target/linux/ath79/patches-5.10/600-of_net-add-mac-address-ascii-support.patch
@@ -1,3 +1,14 @@
+From: Yousong Zhou <yszhou4tech@gmail.com>
+Subject: [PATCH] ath79: add nvmem cell mac-address-ascii support
+
+This is needed for devices with mac address stored in ascii format, e.g.
+HiWiFi HC6361 to be ported in the following patch.
+
+Submitted-by: Yousong Zhou <yszhou4tech@gmail.com>
+---
+ net/ethernet/eth.c                            | 83 ++++++++++++------
+ 1 files changed, 72 insertions(+), 11 deletions(-)
+
 --- a/net/ethernet/eth.c
 +++ b/net/ethernet/eth.c
 @@ -545,6 +545,63 @@ int eth_platform_get_mac_address(struct
diff --git a/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch
index 928f241abd..d35b53638a 100644
--- a/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch
+++ b/target/linux/ath79/patches-5.10/900-mdio_bitbang_ignore_ta_value.patch
@@ -1,3 +1,15 @@
+From: Jonas Gorski <jogo@openwrt.org>
+Subject: ar71xx: add a workaround for ar8316 not always driving the TA bit to low
+
+AR8316 behind a GPIO bitbanged MDIO bus fails to drive the turnaround bit
+to low despite returning a valid value. Ignore it and just use the
+returned value anyway.
+
+SVN-Revision: 28422
+---
+ drivers/net/mdio/mdio-bitbang.c               | 16 ++-----------------
+ 1 file changed, 2 insertions(+), 14 deletions(-)
+
 --- a/drivers/net/mdio/mdio-bitbang.c
 +++ b/drivers/net/mdio/mdio-bitbang.c
 @@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb
diff --git a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
index 07cfb6f4e6..977f394a62 100644
--- a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
+++ b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
@@ -1,3 +1,47 @@
+From: Felix Fietkau <nbd@openwrt.org>
+Subject: [PATCH] ar71xx: fix unaligned access in a few more places
+
+SVN-Revision: 35130
+---
+ arch/mips/include/asm/checksum.h              | 83 +++---------------
+ include/uapi/linux/ip.h                       |  2 +-
+ include/uapi/linux/ipv6.h                     |  2 +-
+ include/uapi/linux/tcp.h                      |  4 ++--
+ include/uapi/linux/udp.h                      |  2 +-
+ net/netfilter/nf_conntrack_core.c             |  4 ++--
+ include/uapi/linux/icmp.h                     |  2 +-
+ include/uapi/linux/in6.h                      |  2 +-
+ net/ipv6/tcp_ipv6.c                           |  9 +++--
+ net/ipv6/datagram.c                           |  6 ++--
+ net/ipv6/exthdrs.c                            |  2 +-
+ include/linux/types.h                         |  5 +++
+ net/ipv4/af_inet.c                            |  4 ++--
+ net/ipv4/tcp_output.c                         | 69 +++++++++--------
+ include/uapi/linux/igmp.h                     |  8 +++---
+ net/core/flow_dissector.c                     |  2 +-
+ include/uapi/linux/icmpv6.h                   |  2 +-
+ include/net/ndisc.h                           | 10 ++++----
+ net/sched/cls_u32.c                           |  6 +++---
+ net/ipv6/ip6_offload.c                        |  2 +-
+ include/net/addrconf.h                        |  2 +-
+ include/net/inet_ecn.h                        |  4 ++--
+ include/net/ipv6.h                            | 23 +++++----
+ include/net/secure_seq.h                      |  1 +
+ include/uapi/linux/in.h                       |  2 +-
+ net/ipv6/ip6_fib.h                            |  2 +-
+ net/netfilter/nf_conntrack_proto_tcp.c        |  2 +-
+ net/xfrm/xfrm_input.c                         |  4 ++--
+ net/ipv4/tcp_input.c                          | 12 ++++---
+ include/uapi/linux/if_pppox.h                 |  1 +
+ net/ipv6/netfilter/nf_log_ipv6.c              |  4 ++--
+ include/net/neighbour.h                       |  6 +++--
+ include/uapi/linux/netfilter_arp/arp_tables.h |  2 +-
+ net/core/utils.c                              | 10 +++++--
+ include/linux/etherdevice.h                   | 11 ++++---
+ net/ipv4/tcp_offload.c                        |  6 +++---
+ net/ipv6/netfilter/ip6table_mangle.c          |  4 ++--
+ 37 file changed, 171 insertions(+), 141 deletions(-)
+
 --- a/arch/mips/include/asm/checksum.h
 +++ b/arch/mips/include/asm/checksum.h
 @@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const
@@ -229,16 +273,6 @@
  	}
  
  #ifdef CONFIG_TCP_MD5SIG
---- a/include/linux/ipv6.h
-+++ b/include/linux/ipv6.h
-@@ -6,6 +6,7 @@
- 
- #define ipv6_optlen(p)  (((p)->hdrlen+1) << 3)
- #define ipv6_authlen(p) (((p)->hdrlen+2) << 2)
-+
- /*
-  * This structure contains configuration options per IPv6 link.
-  */
 --- a/net/ipv6/datagram.c
 +++ b/net/ipv6/datagram.c
 @@ -492,7 +492,7 @@ int ipv6_recv_error(struct sock *sk, str
diff --git a/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch b/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch
index 4ed13deb5c..5cd522cacb 100644
--- a/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch
+++ b/target/linux/ath79/patches-5.10/920-mikrotik-rb4xx.patch
@@ -1,3 +1,48 @@
+From: Christopher Hill <ch6574@gmail.com>
+Subject: [PATCH] ath79: add Mikrotik rb4xx series drivers
+
+This adds 3 Mikrotik rb4xx series drivers as follows:
+
+rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
+that interfaces between the SoC SPI bus and its two children below.
+rb4xx-gpio: This is the GPIO expander.
+rb4xx-nand: This is the NAND driver.
+
+The history of this code comes in three phases.
+
+1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
+drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
+
+Module-author: Gabor Juhos <juhosg@openwrt.org>
+Module-author: Imre Kaloz <kaloz@openwrt.org>
+Module-author: Bert Vermeulen <bert@biot.com>
+
+2. Next several ar71xx patches were applied bringing the code current.
+
+commit 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c
+Submitted-by: Hauke Mehrtens <hauke@hauke-m.de>
+
+commit af79fdbe4af32a287798b579141204bda056b8aa
+commit 889272d92db689fd9c910243635e44c9d8323095
+commit e21cb649a235180563363b8af5ba8296b9ac0baa
+commit 7c09fa4a7492ca436f2c94bd9a465b7c5bbeed6f
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+
+3. Finally a heavy refactor to split the driver into the three new
+subsystems, and updated to work with the device tree configuration, plus
+updates and review feedback incorporated
+
+Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
+Submitted-by: Christopher Hill <ch6574@gmail.com>
+---
+ drivers/mfd/Kconfig                           | 8 ++++++++
+ drivers/mfd/Makefile                          | 1 +
+ drivers/gpio/Kconfig                          | 6 ++++++
+ drivers/gpio/Makefile                         | 1 +
+ drivers/mtd/nand/raw/Kconfig                  | 7 +++++++
+ drivers/mtd/nand/raw/Makefile                 | 1 +
+ 6 files changed, 24 insertions(+)
+
 --- a/drivers/mfd/Kconfig
 +++ b/drivers/mfd/Kconfig
 @@ -2142,6 +2142,14 @@ config RAVE_SP_CORE
diff --git a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch
index 4cf6bb08df..7990061cbd 100644
--- a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch
+++ b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch
@@ -1,3 +1,32 @@
+From: Denis Kalashnikov <denis281089@gmail.com>
+Subject: [PATCH] ath79: add support for reset key on MikroTik RB912UAG-2HPnD
+
+On MikroTik RB91x board series a reset key shares SoC gpio
+line #15 with NAND ALE and NAND IO7. So we need a custom
+gpio driver to manage this non-trivial connection schema.
+Also rb91x-nand needs to have an ability to disable a polling
+of the key while it works with NAND.
+
+While we've been integrating rb91x-key into a firmware, we've
+figured out that:
+* In the gpio-latch driver we need to add a "cansleep" suffix to
+several gpiolib calls,
+* When gpio-latch and rb91x-nand fail to get a gpio and an error
+is -EPROBE_DEFER, they shouldn't report about this, since this
+actually is not an error and occurs when the gpio-latch probe
+function is called before the rb91x-key probe.
+We fix these related things here too.
+
+Submitted-by: Denis Kalashnikov <denis281089@gmail.com>
+Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
+---
+ drivers/gpio/Kconfig                          | 11 +++++++++++
+ drivers/gpio/Makefile                         |  2 ++
+ drivers/mtd/nand/raw/Kconfig                  |  6 ++++++
+ drivers/mtd/nand/raw/Makefile                 |  1 +
+ 7 files changed, 20 insertions(+)
+
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -341,6 +341,13 @@ config GPIO_IXP4XX
diff --git a/target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch
index f958e79608..7122756c52 100644
--- a/target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch
+++ b/target/linux/ath79/patches-5.15/0003-leds-add-reset-controller-based-driver.patch
@@ -13,9 +13,9 @@ Signed-off-by: John Crispin <john@phrozen.org>
 
 --- a/drivers/leds/Kconfig
 +++ b/drivers/leds/Kconfig
-@@ -886,6 +886,17 @@ config LEDS_UBNT_LEDBAR
- 	  To compile this driver as a module, choose M here: the module
- 	  will be called leds-ubnt-ledbar.
+@@ -876,6 +876,17 @@ source "drivers/leds/blink/Kconfig"
+ comment "Flash and Torch LED drivers"
+ source "drivers/leds/flash/Kconfig"
  
 +config LEDS_RESET
 +	tristate "LED support for reset-controller API"
@@ -176,10 +176,10 @@ Signed-off-by: John Crispin <john@phrozen.org>
 +MODULE_ALIAS("platform:leds-reset");
 --- a/drivers/leds/Makefile
 +++ b/drivers/leds/Makefile
-@@ -88,6 +88,7 @@ obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds
+@@ -87,6 +87,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
+ obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
  obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
  obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
- obj-$(CONFIG_LEDS_UBNT_LEDBAR)		+= leds-ubnt-ledbar.o
 +obj-$(CONFIG_LEDS_RESET)		+= leds-reset.o
  
  # LED SPI Drivers
diff --git a/target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch
index 71acc22210..e460fe58f3 100644
--- a/target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch
+++ b/target/linux/ath79/patches-5.15/0034-MIPS-ath79-ath9k-exports.patch
@@ -1,3 +1,12 @@
+From: John Crispin <john@phrozen.org>
+Subject: [PATCH] ath79: make ahb wifi work
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ arch/mips/ath79/common.c                      | 3 +++
+ mips/include/asm/mach-ath79/ath79.h           | 1+
+ 1 file changed, 4 insertions(+)
+
 --- a/arch/mips/ath79/common.c
 +++ b/arch/mips/ath79/common.c
 @@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
diff --git a/target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch
index 80fcd0a7f5..4732d1b2c8 100644
--- a/target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch
+++ b/target/linux/ath79/patches-5.15/0036-MIPS-ath79-remove-irq-code-from-pci.patch
@@ -1,3 +1,13 @@
+From: John Crispin <john@phrozen.org>
+Subject: ath79: fix remove irq code from pci driver patch
+
+This patch got mangled in the void while rebasing it.
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ arch/mips/pci/pci-ar71xx.c                    | 107 ------------------
+ 1 file changed, 141 deletions(-)
+
 --- a/arch/mips/pci/pci-ar71xx.c
 +++ b/arch/mips/pci/pci-ar71xx.c
 @@ -51,11 +51,9 @@
diff --git a/target/linux/ath79/patches-5.15/0037-missing-registers.patch b/target/linux/ath79/patches-5.15/0037-missing-registers.patch
index 9067e4ca7b..0e6ac52ade 100644
--- a/target/linux/ath79/patches-5.15/0037-missing-registers.patch
+++ b/target/linux/ath79/patches-5.15/0037-missing-registers.patch
@@ -1,6 +1,5 @@
-commit f3ffac90bc7266b7d917616f3233f58e8c08a196
-Author: Christian Lamparter <chunkeey@gmail.com>
-Date:   Fri Aug 10 23:24:47 2018 +0200
+From: Christian Lamparter <chunkeey@gmail.com>
+Subject: [PATCH] ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for
 
     ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
 
diff --git a/target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch
index edf888c7e7..b24ff21692 100644
--- a/target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch
+++ b/target/linux/ath79/patches-5.15/0039-MIPS-ath79-export-UART1-reference-clock.patch
@@ -1,3 +1,18 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Subject: [PATCH] ath79: add support for Atheros AR934x HS UART
+
+AR934x chips also got the 'old' qca,ar9330-uart in addition to the
+'new' ns16550a compatible one. Add support for UART1 clock selector as
+well as device-tree bindings in ar934x.dtsi to make use of that uart.
+
+Reported-by: Piotr Dymacz <pepe2k@gmail.com>
+Submitted-by: Daniel Golle <daniel@makrotopia.org>
+---
+ arch/mips/ath79/clock.c                       | 7 +++++++
+ .../mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
+ include/dt-bindings/clock/ath79-clk.h         | 3 ++-
+ 3 files changed, 10 insertions(+), 1 deletion(-)
+
 --- a/arch/mips/ath79/clock.c
 +++ b/arch/mips/ath79/clock.c
 @@ -40,6 +40,7 @@ static const char * const clk_names[ATH7
diff --git a/target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch
index 153cfb438a..a8680ceac4 100644
--- a/target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch
+++ b/target/linux/ath79/patches-5.15/004-register_gpio_driver_earlier.patch
@@ -1,6 +1,14 @@
+From: John Crispin <john@phrozen.org>
+Subject: ath79: Register GPIO driver earlier
+
 HACK: register the GPIO driver earlier to ensure that gpio_request calls
 from mach files succeed.
 
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/gpio/gpio-ath79.c                     | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
 --- a/drivers/gpio/gpio-ath79.c
 +++ b/drivers/gpio/gpio-ath79.c
 @@ -297,7 +297,11 @@ static struct platform_driver ath79_gpio
diff --git a/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch b/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch
index bf7cbf2716..4c2b94899a 100644
--- a/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch
+++ b/target/linux/ath79/patches-5.15/0040-ath79-sgmii-config.patch
@@ -1,3 +1,24 @@
+From: David Bauer <mail@david-bauer.net>
+Subject: [PATCH] ath79: force SGMII SerDes mode to MAC operation
+
+The mode on the SGMII SerDes on the QCA9563 is 1000 Base-X by default.
+This only allows for 1000 Mbit/s links, however when used with an SGMII
+PHY in 100 Mbit/s link mode, the link remains dead.
+
+This strictly has nothing to do with the SerDes calibration, however it
+is done at the same point in the QCA reference U-Boot which is the
+blueprint for everything happening here. As the current state is more or
+less a hack, this should be fine.
+
+This fixes the issues outlined above on a TP-Link EAP-225 Outdoor.
+
+Reported-by: Tom Herbers <freifunk@tomherbers.de>
+Tested-by: Tom Herbers <freifunk@tomherbers.de>
+Submitted-by: David Bauer <mail@david-bauer.net>
+---
+ arch/mips/include/asm/mach-ath79/ar71xx_regs.h           | 1 +
+ 1 files changed, 1 insertion(+)
+
 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
 @@ -1376,5 +1376,6 @@
diff --git a/target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch
index 923589661e..cfc017871f 100644
--- a/target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch
+++ b/target/linux/ath79/patches-5.15/404-mtd-cybertan-trx-parser.patch
@@ -1,3 +1,21 @@
+From: Christian Lamparter <chunkeey@gmail.com>
+Subject: [PATCH] ath79: port cybertan_part from ar71xx
+
+This patch ports the cybertan_part code from ar71xx and converts the
+driver to a DT-supported mtd parser. As a result, it will no longer
+add the u-boot, nvram and art partitions, which were never part of
+the special Cybertan header.
+
+Instead these partitions have to be specified in the DT, which has the
+upside of making it possible to add properties (i.e.: read-only), labels
+and references to these important partitions.
+
+Submitted-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/mtd/parsers/Makefile                  | 1 +
+ drivers/mtd/parsers/Kconfig                   | 8 ++++++++
+ 2 files changed, 9 insertions(+)
+
 --- a/drivers/mtd/parsers/Makefile
 +++ b/drivers/mtd/parsers/Makefile
 @@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS)		+= ofpart.o
diff --git a/target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch
index 7a1a03430d..54e64fb11c 100644
--- a/target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch
+++ b/target/linux/ath79/patches-5.15/420-net-use-downstream-ag71xx.patch
@@ -1,3 +1,16 @@
+From: John Crispin <john@phrozen.org>
+Subject: [PATCH] ath79: add new OF only target for QCA MIPS silicon
+
+This target aims to replace ar71xx mid-term. The big part that is still
+missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
+subtargets will follow.
+
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/net/ethernet/atheros/Kconfig          | 8 +-------
+ drivers/net/ethernet/atheros/Makefile         | 2 +-
+ 2 files changed, 2 insertions(+), 8 deletions(-)
+
 --- a/drivers/net/ethernet/atheros/Kconfig
 +++ b/drivers/net/ethernet/atheros/Kconfig
 @@ -17,14 +17,7 @@ config NET_VENDOR_ATHEROS
diff --git a/target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch
index 4c6558db90..0cd96909eb 100644
--- a/target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch
+++ b/target/linux/ath79/patches-5.15/430-drivers-link-spi-before-mtd.patch
@@ -1,3 +1,11 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: [PATCH] ar71xx: Link SPI before MTD
+
+SVN-Revision: 22863
+---
+ drivers/Makefile                              |   2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/drivers/Makefile
 +++ b/drivers/Makefile
 @@ -80,8 +80,8 @@ obj-y				+= scsi/
diff --git a/target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch
index 3ce64aa51d..63bc98e14c 100644
--- a/target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch
+++ b/target/linux/ath79/patches-5.15/440-mtd-ar934x-nand-driver.patch
@@ -1,3 +1,12 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: ar71xx: ar934x_nfc: experimental NAND Flash Controller driver for AR934x
+
+SVN-Revision: 33385
+---
+ drivers/mtd/nand/raw/Kconfig                  | 8 ++++++++
+ drivers/mtd/nand/raw/Makefile                 | 1 +
+ 2 files changed, 9 insertions(+)
+
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
 @@ -555,4 +555,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE
diff --git a/target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
index 924faec509..3b8fee2269 100644
--- a/target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
+++ b/target/linux/ath79/patches-5.15/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch
@@ -1,3 +1,14 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: [PATCH] ar71xx: swizzle address for PCI byte/word access on AR71xx
+
+Closes #11683.
+
+SVN-Revision: 32639
+---
+ .../mips/include/asm/mach-ath79/mangle-port.h | 111 ++++++++++++++++++
+ 1 file changed, 111 insertions(+)
+ create mode 100644 arch/mips/include/asm/mach-ath79/mangle-port.h
+
 --- /dev/null
 +++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
 @@ -0,0 +1,37 @@
diff --git a/target/linux/ath79/patches-5.15/600-of_net-add-mac-address-ascii-support.patch b/target/linux/ath79/patches-5.15/600-of_net-add-mac-address-ascii-support.patch
index 2e1e7293b6..ff22945eb4 100644
--- a/target/linux/ath79/patches-5.15/600-of_net-add-mac-address-ascii-support.patch
+++ b/target/linux/ath79/patches-5.15/600-of_net-add-mac-address-ascii-support.patch
@@ -1,3 +1,14 @@
+From: Yousong Zhou <yszhou4tech@gmail.com>
+Subject: [PATCH] ath79: add nvmem cell mac-address-ascii support
+
+This is needed for devices with mac address stored in ascii format, e.g.
+HiWiFi HC6361 to be ported in the following patch.
+
+Submitted-by: Yousong Zhou <yszhou4tech@gmail.com>
+---
+ net/ethernet/eth.c                            | 83 ++++++++++++------
+ 1 files changed, 72 insertions(+), 11 deletions(-)
+
 --- a/net/ethernet/eth.c
 +++ b/net/ethernet/eth.c
 @@ -544,6 +544,63 @@ int eth_platform_get_mac_address(struct
diff --git a/target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch
index 4c8d2c2ea9..5363bb37b0 100644
--- a/target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch
+++ b/target/linux/ath79/patches-5.15/900-mdio_bitbang_ignore_ta_value.patch
@@ -1,3 +1,15 @@
+From: Jonas Gorski <jogo@openwrt.org>
+Subject: ar71xx: add a workaround for ar8316 not always driving the TA bit to low
+
+AR8316 behind a GPIO bitbanged MDIO bus fails to drive the turnaround bit
+to low despite returning a valid value. Ignore it and just use the
+returned value anyway.
+
+SVN-Revision: 28422
+---
+ drivers/net/mdio/mdio-bitbang.c               | 16 ++-----------------
+ 1 file changed, 2 insertions(+), 14 deletions(-)
+
 --- a/drivers/net/mdio/mdio-bitbang.c
 +++ b/drivers/net/mdio/mdio-bitbang.c
 @@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb
diff --git a/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch
index d166702047..f5d3a5ed58 100644
--- a/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch
+++ b/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch
@@ -1,3 +1,47 @@
+From: Felix Fietkau <nbd@openwrt.org>
+Subject: [PATCH] ar71xx: fix unaligned access in a few more places
+
+SVN-Revision: 35130
+---
+ arch/mips/include/asm/checksum.h              | 83 +++---------------
+ include/uapi/linux/ip.h                       |  2 +-
+ include/uapi/linux/ipv6.h                     |  2 +-
+ include/uapi/linux/tcp.h                      |  4 ++--
+ include/uapi/linux/udp.h                      |  2 +-
+ net/netfilter/nf_conntrack_core.c             |  4 ++--
+ include/uapi/linux/icmp.h                     |  2 +-
+ include/uapi/linux/in6.h                      |  2 +-
+ net/ipv6/tcp_ipv6.c                           |  9 +++--
+ net/ipv6/datagram.c                           |  6 ++--
+ net/ipv6/exthdrs.c                            |  2 +-
+ include/linux/types.h                         |  5 +++
+ net/ipv4/af_inet.c                            |  4 ++--
+ net/ipv4/tcp_output.c                         | 69 +++++++++--------
+ include/uapi/linux/igmp.h                     |  8 +++---
+ net/core/flow_dissector.c                     |  2 +-
+ include/uapi/linux/icmpv6.h                   |  2 +-
+ include/net/ndisc.h                           | 10 ++++----
+ net/sched/cls_u32.c                           |  6 +++---
+ net/ipv6/ip6_offload.c                        |  2 +-
+ include/net/addrconf.h                        |  2 +-
+ include/net/inet_ecn.h                        |  4 ++--
+ include/net/ipv6.h                            | 23 +++++----
+ include/net/secure_seq.h                      |  1 +
+ include/uapi/linux/in.h                       |  2 +-
+ net/ipv6/ip6_fib.h                            |  2 +-
+ net/netfilter/nf_conntrack_proto_tcp.c        |  2 +-
+ net/xfrm/xfrm_input.c                         |  4 ++--
+ net/ipv4/tcp_input.c                          | 12 ++++---
+ include/uapi/linux/if_pppox.h                 |  1 +
+ net/ipv6/netfilter/nf_log_ipv6.c              |  4 ++--
+ include/net/neighbour.h                       |  6 +++--
+ include/uapi/linux/netfilter_arp/arp_tables.h |  2 +-
+ net/core/utils.c                              | 10 +++++--
+ include/linux/etherdevice.h                   | 11 ++++---
+ net/ipv4/tcp_offload.c                        |  6 +++---
+ net/ipv6/netfilter/ip6table_mangle.c          |  4 ++--
+ 37 file changed, 171 insertions(+), 141 deletions(-)
+
 --- a/arch/mips/include/asm/checksum.h
 +++ b/arch/mips/include/asm/checksum.h
 @@ -100,26 +100,30 @@ static inline __sum16 ip_fast_csum(const
diff --git a/target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch b/target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch
index 904f212e41..5492687251 100644
--- a/target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch
+++ b/target/linux/ath79/patches-5.15/920-mikrotik-rb4xx.patch
@@ -1,3 +1,48 @@
+From: Christopher Hill <ch6574@gmail.com>
+Subject: [PATCH] ath79: add Mikrotik rb4xx series drivers
+
+This adds 3 Mikrotik rb4xx series drivers as follows:
+
+rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
+that interfaces between the SoC SPI bus and its two children below.
+rb4xx-gpio: This is the GPIO expander.
+rb4xx-nand: This is the NAND driver.
+
+The history of this code comes in three phases.
+
+1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
+drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
+
+Module-author: Gabor Juhos <juhosg@openwrt.org>
+Module-author: Imre Kaloz <kaloz@openwrt.org>
+Module-author: Bert Vermeulen <bert@biot.com>
+
+2. Next several ar71xx patches were applied bringing the code current.
+
+commit 7bbf4117c6fe4b764d9d7c62fb2bcf6dd93bff2c
+Submitted-by: Hauke Mehrtens <hauke@hauke-m.de>
+
+commit af79fdbe4af32a287798b579141204bda056b8aa
+commit 889272d92db689fd9c910243635e44c9d8323095
+commit e21cb649a235180563363b8af5ba8296b9ac0baa
+commit 7c09fa4a7492ca436f2c94bd9a465b7c5bbeed6f
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+
+3. Finally a heavy refactor to split the driver into the three new
+subsystems, and updated to work with the device tree configuration, plus
+updates and review feedback incorporated
+
+Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
+Submitted-by: Christopher Hill <ch6574@gmail.com>
+---
+ drivers/mfd/Kconfig                           | 8 ++++++++
+ drivers/mfd/Makefile                          | 1 +
+ drivers/gpio/Kconfig                          | 6 ++++++
+ drivers/gpio/Makefile                         | 1 +
+ drivers/mtd/nand/raw/Kconfig                  | 7 +++++++
+ drivers/mtd/nand/raw/Makefile                 | 1 +
+ 6 files changed, 24 insertions(+)
+
 --- a/drivers/mfd/Kconfig
 +++ b/drivers/mfd/Kconfig
 @@ -2174,6 +2174,14 @@ config RAVE_SP_CORE
@@ -13,7 +58,7 @@
 +	  Routerboard RB4xx series.
 +
  config SGI_MFD_IOC3
- 	bool "SGI IOC3 core driver"
+	bool "SGI IOC3 core driver"
  	depends on PCI && MIPS && 64BIT
 --- a/drivers/mfd/Makefile
 +++ b/drivers/mfd/Makefile
diff --git a/target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch
index 4a852886bf..459b6ff9b1 100644
--- a/target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch
+++ b/target/linux/ath79/patches-5.15/939-mikrotik-rb91x.patch
@@ -1,3 +1,32 @@
+From: Denis Kalashnikov <denis281089@gmail.com>
+Subject: [PATCH] ath79: add support for reset key on MikroTik RB912UAG-2HPnD
+
+On MikroTik RB91x board series a reset key shares SoC gpio
+line #15 with NAND ALE and NAND IO7. So we need a custom
+gpio driver to manage this non-trivial connection schema.
+Also rb91x-nand needs to have an ability to disable a polling
+of the key while it works with NAND.
+
+While we've been integrating rb91x-key into a firmware, we've
+figured out that:
+* In the gpio-latch driver we need to add a "cansleep" suffix to
+several gpiolib calls,
+* When gpio-latch and rb91x-nand fail to get a gpio and an error
+is -EPROBE_DEFER, they shouldn't report about this, since this
+actually is not an error and occurs when the gpio-latch probe
+function is called before the rb91x-key probe.
+We fix these related things here too.
+
+Submitted-by: Denis Kalashnikov <denis281089@gmail.com>
+Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
+Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
+---
+ drivers/gpio/Kconfig                          | 11 +++++++++++
+ drivers/gpio/Makefile                         |  2 ++
+ drivers/mtd/nand/raw/Kconfig                  |  6 ++++++
+ drivers/mtd/nand/raw/Makefile                 |  1 +
+ 7 files changed, 20 insertions(+)
+
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -353,6 +353,13 @@ config GPIO_IXP4XX
@@ -15,8 +44,8 @@
  	tristate "Xylon LogiCVC GPIO support"
  	depends on MFD_SYSCON && OF
 @@ -529,6 +536,10 @@ config GPIO_ROCKCHIP
- 	help
- 	  Say yes here to support GPIO on Rockchip SoCs.
+	help
+	  Say yes here to support GPIO on Rockchip SoCs.
  
 +config GPIO_RB91X_KEY
 +	tristate "MikroTik RB91x board series reset key support"
diff --git a/target/linux/bcm53xx/patches-5.10/083-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch b/target/linux/bcm53xx/patches-5.10/083-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch
new file mode 100644
index 0000000000..12c60ce297
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.10/083-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch
@@ -0,0 +1,72 @@
+From 1b24a132eba7a1c19475ba2510ec1c00af3ff914 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 5 Sep 2022 09:15:03 -0700
+Subject: [PATCH] clk: iproc: Do not rely on node name for correct PLL setup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+After commit 31fd9b79dc58 ("ARM: dts: BCM5301X: update CRU block
+description") a warning from clk-iproc-pll.c was generated due to a
+duplicate PLL name as well as the console stopped working. Upon closer
+inspection it became clear that iproc_pll_clk_setup() used the Device
+Tree node unit name as an unique identifier as well as a parent name to
+parent all clocks under the PLL.
+
+BCM5301X was the first platform on which that got noticed because of the
+DT node unit name renaming but the same assumptions hold true for any
+user of the iproc_pll_clk_setup() function.
+
+The first 'clock-output-names' property is always guaranteed to be
+unique as well as providing the actual desired PLL clock name, so we
+utilize that to register the PLL and as a parent name of all children
+clock.
+
+Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Link: https://lore.kernel.org/r/20220905161504.1526-1-f.fainelli@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/bcm/clk-iproc-pll.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/clk/bcm/clk-iproc-pll.c
++++ b/drivers/clk/bcm/clk-iproc-pll.c
+@@ -736,6 +736,7 @@ void iproc_pll_clk_setup(struct device_n
+ 	const char *parent_name;
+ 	struct iproc_clk *iclk_array;
+ 	struct clk_hw_onecell_data *clk_data;
++	const char *clk_name;
+ 
+ 	if (WARN_ON(!pll_ctrl) || WARN_ON(!clk_ctrl))
+ 		return;
+@@ -783,7 +784,12 @@ void iproc_pll_clk_setup(struct device_n
+ 	iclk = &iclk_array[0];
+ 	iclk->pll = pll;
+ 
+-	init.name = node->name;
++	ret = of_property_read_string_index(node, "clock-output-names",
++					    0, &clk_name);
++	if (WARN_ON(ret))
++		goto err_pll_register;
++
++	init.name = clk_name;
+ 	init.ops = &iproc_pll_ops;
+ 	init.flags = 0;
+ 	parent_name = of_clk_get_parent_name(node, 0);
+@@ -803,13 +809,11 @@ void iproc_pll_clk_setup(struct device_n
+ 		goto err_pll_register;
+ 
+ 	clk_data->hws[0] = &iclk->hw;
++	parent_name = clk_name;
+ 
+ 	/* now initialize and register all leaf clocks */
+ 	for (i = 1; i < num_clks; i++) {
+-		const char *clk_name;
+-
+ 		memset(&init, 0, sizeof(init));
+-		parent_name = node->name;
+ 
+ 		ret = of_property_read_string_index(node, "clock-output-names",
+ 						    i, &clk_name);
diff --git a/target/linux/bcm53xx/patches-5.10/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch b/target/linux/bcm53xx/patches-5.10/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch
deleted file mode 100644
index cee37732ab..0000000000
--- a/target/linux/bcm53xx/patches-5.10/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 23 Nov 2021 13:13:05 +0100
-Subject: [PATCH] ARM: dts: BCM5301X: Switch back to old clock nodes names
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-First of all using the same node name prefix resulted in trying to
-register 2 clocks under the same "clock-controller" name:
-
-[    0.000000] __clk_core_init: clk clock-controller already initialized
-[    0.000000] ------------[ cut here ]------------
-[    0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/bcm/clk-iproc-pll.c:802 iproc_pll_clk_setup+0x4c8/0x4f4
-[    0.000000] Modules linked in:
-[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.80 #0
-[    0.000000] Hardware name: BCM5301X
-[    0.000000] [<c0108410>] (unwind_backtrace) from [<c0104bc4>] (show_stack+0x10/0x14)
-[    0.000000] [<c0104bc4>] (show_stack) from [<c03dca28>] (dump_stack+0x94/0xa8)
-[    0.000000] [<c03dca28>] (dump_stack) from [<c0118440>] (__warn+0xb8/0x114)
-[    0.000000] [<c0118440>] (__warn) from [<c0118504>] (warn_slowpath_fmt+0x68/0x78)
-[    0.000000] [<c0118504>] (warn_slowpath_fmt) from [<c043281c>] (iproc_pll_clk_setup+0x4c8/0x4f4)
-[    0.000000] [<c043281c>] (iproc_pll_clk_setup) from [<c0818c04>] (nsp_genpll_clk_init+0x30/0x38)
-[    0.000000] [<c0818c04>] (nsp_genpll_clk_init) from [<c0818634>] (of_clk_init+0x118/0x1f8)
-[    0.000000] [<c0818634>] (of_clk_init) from [<c08039b0>] (time_init+0x24/0x30)
-[    0.000000] [<c08039b0>] (time_init) from [<c0800d14>] (start_kernel+0x398/0x50c)
-[    0.000000] [<c0800d14>] (start_kernel) from [<00000000>] (0x0)
-[    0.000000] ---[ end trace fe236bfe9559ee50 ]---
-
-Secondly using any other names than "lcpll0" and "genpll" breaks output
-clocks:
-
-$ cat /sys/kernel/debug/clk/usbclk/clk_rate
-0
-
-For some reason iproc_clk_recalc_rate() gets called with "parent_rate"
-argument 0 whenever clocks aren't named "lcpll0" and "genpll".
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -421,7 +421,7 @@
- 			#address-cells = <1>;
- 			#size-cells = <1>;
- 
--			lcpll0: clock-controller@100 {
-+			lcpll0: lcpll0@100 {
- 				#clock-cells = <1>;
- 				compatible = "brcm,nsp-lcpll0";
- 				reg = <0x100 0x14>;
-@@ -430,7 +430,7 @@
- 						     "sdio", "ddr_phy";
- 			};
- 
--			genpll: clock-controller@140 {
-+			genpll: genpll@140 {
- 				#clock-cells = <1>;
- 				compatible = "brcm,nsp-genpll";
- 				reg = <0x140 0x24>;
diff --git a/target/linux/bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch b/target/linux/bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch
new file mode 100644
index 0000000000..12c60ce297
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch
@@ -0,0 +1,72 @@
+From 1b24a132eba7a1c19475ba2510ec1c00af3ff914 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 5 Sep 2022 09:15:03 -0700
+Subject: [PATCH] clk: iproc: Do not rely on node name for correct PLL setup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+After commit 31fd9b79dc58 ("ARM: dts: BCM5301X: update CRU block
+description") a warning from clk-iproc-pll.c was generated due to a
+duplicate PLL name as well as the console stopped working. Upon closer
+inspection it became clear that iproc_pll_clk_setup() used the Device
+Tree node unit name as an unique identifier as well as a parent name to
+parent all clocks under the PLL.
+
+BCM5301X was the first platform on which that got noticed because of the
+DT node unit name renaming but the same assumptions hold true for any
+user of the iproc_pll_clk_setup() function.
+
+The first 'clock-output-names' property is always guaranteed to be
+unique as well as providing the actual desired PLL clock name, so we
+utilize that to register the PLL and as a parent name of all children
+clock.
+
+Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Link: https://lore.kernel.org/r/20220905161504.1526-1-f.fainelli@gmail.com
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/bcm/clk-iproc-pll.c | 12 ++++++++----
+ 1 file changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/clk/bcm/clk-iproc-pll.c
++++ b/drivers/clk/bcm/clk-iproc-pll.c
+@@ -736,6 +736,7 @@ void iproc_pll_clk_setup(struct device_n
+ 	const char *parent_name;
+ 	struct iproc_clk *iclk_array;
+ 	struct clk_hw_onecell_data *clk_data;
++	const char *clk_name;
+ 
+ 	if (WARN_ON(!pll_ctrl) || WARN_ON(!clk_ctrl))
+ 		return;
+@@ -783,7 +784,12 @@ void iproc_pll_clk_setup(struct device_n
+ 	iclk = &iclk_array[0];
+ 	iclk->pll = pll;
+ 
+-	init.name = node->name;
++	ret = of_property_read_string_index(node, "clock-output-names",
++					    0, &clk_name);
++	if (WARN_ON(ret))
++		goto err_pll_register;
++
++	init.name = clk_name;
+ 	init.ops = &iproc_pll_ops;
+ 	init.flags = 0;
+ 	parent_name = of_clk_get_parent_name(node, 0);
+@@ -803,13 +809,11 @@ void iproc_pll_clk_setup(struct device_n
+ 		goto err_pll_register;
+ 
+ 	clk_data->hws[0] = &iclk->hw;
++	parent_name = clk_name;
+ 
+ 	/* now initialize and register all leaf clocks */
+ 	for (i = 1; i < num_clks; i++) {
+-		const char *clk_name;
+-
+ 		memset(&init, 0, sizeof(init));
+-		parent_name = node->name;
+ 
+ 		ret = of_property_read_string_index(node, "clock-output-names",
+ 						    i, &clk_name);
diff --git a/target/linux/bcm53xx/patches-5.15/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch b/target/linux/bcm53xx/patches-5.15/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch
deleted file mode 100644
index cee37732ab..0000000000
--- a/target/linux/bcm53xx/patches-5.15/320-ARM-dts-BCM5301X-Switch-back-to-old-clock-nodes-name.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 23 Nov 2021 13:13:05 +0100
-Subject: [PATCH] ARM: dts: BCM5301X: Switch back to old clock nodes names
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-First of all using the same node name prefix resulted in trying to
-register 2 clocks under the same "clock-controller" name:
-
-[    0.000000] __clk_core_init: clk clock-controller already initialized
-[    0.000000] ------------[ cut here ]------------
-[    0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/bcm/clk-iproc-pll.c:802 iproc_pll_clk_setup+0x4c8/0x4f4
-[    0.000000] Modules linked in:
-[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.80 #0
-[    0.000000] Hardware name: BCM5301X
-[    0.000000] [<c0108410>] (unwind_backtrace) from [<c0104bc4>] (show_stack+0x10/0x14)
-[    0.000000] [<c0104bc4>] (show_stack) from [<c03dca28>] (dump_stack+0x94/0xa8)
-[    0.000000] [<c03dca28>] (dump_stack) from [<c0118440>] (__warn+0xb8/0x114)
-[    0.000000] [<c0118440>] (__warn) from [<c0118504>] (warn_slowpath_fmt+0x68/0x78)
-[    0.000000] [<c0118504>] (warn_slowpath_fmt) from [<c043281c>] (iproc_pll_clk_setup+0x4c8/0x4f4)
-[    0.000000] [<c043281c>] (iproc_pll_clk_setup) from [<c0818c04>] (nsp_genpll_clk_init+0x30/0x38)
-[    0.000000] [<c0818c04>] (nsp_genpll_clk_init) from [<c0818634>] (of_clk_init+0x118/0x1f8)
-[    0.000000] [<c0818634>] (of_clk_init) from [<c08039b0>] (time_init+0x24/0x30)
-[    0.000000] [<c08039b0>] (time_init) from [<c0800d14>] (start_kernel+0x398/0x50c)
-[    0.000000] [<c0800d14>] (start_kernel) from [<00000000>] (0x0)
-[    0.000000] ---[ end trace fe236bfe9559ee50 ]---
-
-Secondly using any other names than "lcpll0" and "genpll" breaks output
-clocks:
-
-$ cat /sys/kernel/debug/clk/usbclk/clk_rate
-0
-
-For some reason iproc_clk_recalc_rate() gets called with "parent_rate"
-argument 0 whenever clocks aren't named "lcpll0" and "genpll".
-
-Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -421,7 +421,7 @@
- 			#address-cells = <1>;
- 			#size-cells = <1>;
- 
--			lcpll0: clock-controller@100 {
-+			lcpll0: lcpll0@100 {
- 				#clock-cells = <1>;
- 				compatible = "brcm,nsp-lcpll0";
- 				reg = <0x100 0x14>;
-@@ -430,7 +430,7 @@
- 						     "sdio", "ddr_phy";
- 			};
- 
--			genpll: clock-controller@140 {
-+			genpll: genpll@140 {
- 				#clock-cells = <1>;
- 				compatible = "brcm,nsp-genpll";
- 				reg = <0x140 0x24>;
diff --git a/target/linux/generic/backport-5.10/415-v6.0-mtd-core-check-partition-before-dereference.patch b/target/linux/generic/backport-5.10/415-v6.0-mtd-core-check-partition-before-dereference.patch
new file mode 100644
index 0000000000..65789ddf2d
--- /dev/null
+++ b/target/linux/generic/backport-5.10/415-v6.0-mtd-core-check-partition-before-dereference.patch
@@ -0,0 +1,30 @@
+From 7ec4cdb321738d44ae5d405e7b6ac73dfbf99caa Mon Sep 17 00:00:00 2001
+From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
+Date: Mon, 25 Jul 2022 22:49:25 +0900
+Subject: [PATCH] mtd: core: check partition before dereference
+
+syzbot is reporting NULL pointer dereference at mtd_check_of_node() [1],
+for mtdram test device (CONFIG_MTD_MTDRAM) is not partition.
+
+Link: https://syzkaller.appspot.com/bug?extid=fe013f55a2814a9e8cfd [1]
+Reported-by: syzbot <syzbot+fe013f55a2814a9e8cfd@syzkaller.appspotmail.com>
+Reported-by: kernel test robot <oliver.sang@intel.com>
+Fixes: ad9b10d1eaada169 ("mtd: core: introduce of support for dynamic partitions")
+Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
+CC: stable@vger.kernel.org
+Signed-off-by: Richard Weinberger <richard@nod.at>
+---
+ drivers/mtd/mtdcore.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -574,6 +574,8 @@ static void mtd_check_of_node(struct mtd
+ 		return;
+ 
+ 	/* Check if a partitions node exist */
++	if (!mtd_is_partition(mtd))
++		return;
+ 	parent = mtd->parent;
+ 	parent_dn = dev_of_node(&parent->dev);
+ 	if (!parent_dn)
diff --git a/target/linux/generic/backport-5.10/774-v5.15-net-dsa-mv88e6xxx-keep-the-pvid-at-0-when-VLAN-unawa.patch b/target/linux/generic/backport-5.10/774-v5.15-net-dsa-mv88e6xxx-keep-the-pvid-at-0-when-VLAN-unawa.patch
index 24bb5aa9c8..13cc8f3d69 100644
--- a/target/linux/generic/backport-5.10/774-v5.15-net-dsa-mv88e6xxx-keep-the-pvid-at-0-when-VLAN-unawa.patch
+++ b/target/linux/generic/backport-5.10/774-v5.15-net-dsa-mv88e6xxx-keep-the-pvid-at-0-when-VLAN-unawa.patch
@@ -63,7 +63,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -1586,6 +1586,26 @@ static int mv88e6xxx_port_check_hw_vlan(
+@@ -1590,6 +1590,26 @@ static int mv88e6xxx_port_check_hw_vlan(
  	return 0;
  }
  
@@ -90,7 +90,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  static int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
  					 bool vlan_filtering,
  					 struct switchdev_trans *trans)
-@@ -1599,7 +1619,16 @@ static int mv88e6xxx_port_vlan_filtering
+@@ -1603,7 +1623,16 @@ static int mv88e6xxx_port_vlan_filtering
  		return chip->info->max_vid ? 0 : -EOPNOTSUPP;
  
  	mv88e6xxx_reg_lock(chip);
@@ -107,7 +107,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  	mv88e6xxx_reg_unlock(chip);
  
  	return err;
-@@ -1982,8 +2011,10 @@ static void mv88e6xxx_port_vlan_add(stru
+@@ -1986,8 +2015,10 @@ static void mv88e6xxx_port_vlan_add(stru
  	struct mv88e6xxx_chip *chip = ds->priv;
  	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
  	bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
@@ -118,7 +118,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  	u16 vid;
  
  	if (!chip->info->max_vid)
-@@ -2008,9 +2039,23 @@ static void mv88e6xxx_port_vlan_add(stru
+@@ -2012,9 +2043,23 @@ static void mv88e6xxx_port_vlan_add(stru
  			dev_err(ds->dev, "p%d: failed to add VLAN %d%c\n", port,
  				vid, untagged ? 'u' : 't');
  
@@ -145,7 +145,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  
  	mv88e6xxx_reg_unlock(chip);
  }
-@@ -2061,6 +2106,7 @@ static int mv88e6xxx_port_vlan_del(struc
+@@ -2065,6 +2110,7 @@ static int mv88e6xxx_port_vlan_del(struc
  				   const struct switchdev_obj_port_vlan *vlan)
  {
  	struct mv88e6xxx_chip *chip = ds->priv;
@@ -153,7 +153,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  	u16 pvid, vid;
  	int err = 0;
  
-@@ -2079,7 +2125,9 @@ static int mv88e6xxx_port_vlan_del(struc
+@@ -2083,7 +2129,9 @@ static int mv88e6xxx_port_vlan_del(struc
  			goto unlock;
  
  		if (vid == pvid) {
diff --git a/target/linux/generic/backport-5.15/404-v6.0-mtd-core-check-partition-before-dereference.patch b/target/linux/generic/backport-5.15/404-v6.0-mtd-core-check-partition-before-dereference.patch
new file mode 100644
index 0000000000..e45e2ab48e
--- /dev/null
+++ b/target/linux/generic/backport-5.15/404-v6.0-mtd-core-check-partition-before-dereference.patch
@@ -0,0 +1,30 @@
+From 7ec4cdb321738d44ae5d405e7b6ac73dfbf99caa Mon Sep 17 00:00:00 2001
+From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
+Date: Mon, 25 Jul 2022 22:49:25 +0900
+Subject: [PATCH] mtd: core: check partition before dereference
+
+syzbot is reporting NULL pointer dereference at mtd_check_of_node() [1],
+for mtdram test device (CONFIG_MTD_MTDRAM) is not partition.
+
+Link: https://syzkaller.appspot.com/bug?extid=fe013f55a2814a9e8cfd [1]
+Reported-by: syzbot <syzbot+fe013f55a2814a9e8cfd@syzkaller.appspotmail.com>
+Reported-by: kernel test robot <oliver.sang@intel.com>
+Fixes: ad9b10d1eaada169 ("mtd: core: introduce of support for dynamic partitions")
+Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
+CC: stable@vger.kernel.org
+Signed-off-by: Richard Weinberger <richard@nod.at>
+---
+ drivers/mtd/mtdcore.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -577,6 +577,8 @@ static void mtd_check_of_node(struct mtd
+ 		return;
+ 
+ 	/* Check if a partitions node exist */
++	if (!mtd_is_partition(mtd))
++		return;
+ 	parent = mtd->parent;
+ 	parent_dn = dev_of_node(&parent->dev);
+ 	if (!parent_dn)
diff --git a/target/linux/generic/backport-5.15/600-v5.18-page_pool-Add-allocation-stats.patch b/target/linux/generic/backport-5.15/600-v5.18-page_pool-Add-allocation-stats.patch
index 7b97181403..9e383de92c 100644
--- a/target/linux/generic/backport-5.15/600-v5.18-page_pool-Add-allocation-stats.patch
+++ b/target/linux/generic/backport-5.15/600-v5.18-page_pool-Add-allocation-stats.patch
@@ -1,29 +1,33 @@
-commit 8610037e8106b48c79cfe0afb92b2b2466e51c3d
-Author: Joe Damato <jdamato@fastly.com>
-Date:   Tue Mar 1 23:55:47 2022 -0800
+From 8610037e8106b48c79cfe0afb92b2b2466e51c3d Mon Sep 17 00:00:00 2001
+From: Joe Damato <jdamato@fastly.com>
+Date: Tue, 1 Mar 2022 23:55:47 -0800
+Subject: [PATCH] page_pool: Add allocation stats
 
-    page_pool: Add allocation stats
-    
-    Add per-pool statistics counters for the allocation path of a page pool.
-    These stats are incremented in softirq context, so no locking or per-cpu
-    variables are needed.
-    
-    This code is disabled by default and a kernel config option is provided for
-    users who wish to enable them.
-    
-    The statistics added are:
-            - fast: successful fast path allocations
-            - slow: slow path order-0 allocations
-            - slow_high_order: slow path high order allocations
-            - empty: ptr ring is empty, so a slow path allocation was forced.
-            - refill: an allocation which triggered a refill of the cache
-            - waive: pages obtained from the ptr ring that cannot be added to
-              the cache due to a NUMA mismatch.
-    
-    Signed-off-by: Joe Damato <jdamato@fastly.com>
-    Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
-    Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-    Signed-off-by: David S. Miller <davem@davemloft.net>
+Add per-pool statistics counters for the allocation path of a page pool.
+These stats are incremented in softirq context, so no locking or per-cpu
+variables are needed.
+
+This code is disabled by default and a kernel config option is provided for
+users who wish to enable them.
+
+The statistics added are:
+	- fast: successful fast path allocations
+	- slow: slow path order-0 allocations
+	- slow_high_order: slow path high order allocations
+	- empty: ptr ring is empty, so a slow path allocation was forced.
+	- refill: an allocation which triggered a refill of the cache
+	- waive: pages obtained from the ptr ring that cannot be added to
+	  the cache due to a NUMA mismatch.
+
+Signed-off-by: Joe Damato <jdamato@fastly.com>
+Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
+Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ include/net/page_pool.h | 18 ++++++++++++++++++
+ net/Kconfig             | 13 +++++++++++++
+ net/core/page_pool.c    | 24 ++++++++++++++++++++----
+ 3 files changed, 51 insertions(+), 4 deletions(-)
 
 --- a/include/net/page_pool.h
 +++ b/include/net/page_pool.h
diff --git a/target/linux/generic/backport-5.15/601-v5.18-page_pool-Add-recycle-stats.patch b/target/linux/generic/backport-5.15/601-v5.18-page_pool-Add-recycle-stats.patch
index 8330ae811d..fb11f0035f 100644
--- a/target/linux/generic/backport-5.15/601-v5.18-page_pool-Add-recycle-stats.patch
+++ b/target/linux/generic/backport-5.15/601-v5.18-page_pool-Add-recycle-stats.patch
@@ -1,20 +1,23 @@
-commit ad6fa1e1ab1b8164f1ba296b1b4dc556a483bcad
-Author: Joe Damato <jdamato@fastly.com>
-Date:   Tue Mar 1 23:55:48 2022 -0800
+From ad6fa1e1ab1b8164f1ba296b1b4dc556a483bcad Mon Sep 17 00:00:00 2001
+From: Joe Damato <jdamato@fastly.com>
+Date: Tue, 1 Mar 2022 23:55:48 -0800
+Subject: [PATCH 2/3] page_pool: Add recycle stats
 
-    page_pool: Add recycle stats
-    
-    Add per-cpu stats tracking page pool recycling events:
-            - cached: recycling placed page in the page pool cache
-            - cache_full: page pool cache was full
-            - ring: page placed into the ptr ring
-            - ring_full: page released from page pool because the ptr ring was full
-            - released_refcnt: page released (and not recycled) because refcnt > 1
-    
-    Signed-off-by: Joe Damato <jdamato@fastly.com>
-    Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
-    Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-    Signed-off-by: David S. Miller <davem@davemloft.net>
+Add per-cpu stats tracking page pool recycling events:
+	- cached: recycling placed page in the page pool cache
+	- cache_full: page pool cache was full
+	- ring: page placed into the ptr ring
+	- ring_full: page released from page pool because the ptr ring was full
+	- released_refcnt: page released (and not recycled) because refcnt > 1
+
+Signed-off-by: Joe Damato <jdamato@fastly.com>
+Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
+Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ include/net/page_pool.h | 16 ++++++++++++++++
+ net/core/page_pool.c    | 30 ++++++++++++++++++++++++++++--
+ 2 files changed, 44 insertions(+), 2 deletions(-)
 
 --- a/include/net/page_pool.h
 +++ b/include/net/page_pool.h
diff --git a/target/linux/generic/backport-5.15/602-v5.18-page_pool-Add-function-to-batch-and-return-stats.patch b/target/linux/generic/backport-5.15/602-v5.18-page_pool-Add-function-to-batch-and-return-stats.patch
index 8afbd5d120..41188fb7f2 100644
--- a/target/linux/generic/backport-5.15/602-v5.18-page_pool-Add-function-to-batch-and-return-stats.patch
+++ b/target/linux/generic/backport-5.15/602-v5.18-page_pool-Add-function-to-batch-and-return-stats.patch
@@ -1,16 +1,19 @@
-commit 6b95e3388b1ea0ca63500c5a6e39162dbf828433
-Author: Joe Damato <jdamato@fastly.com>
-Date:   Tue Mar 1 23:55:49 2022 -0800
+From 6b95e3388b1ea0ca63500c5a6e39162dbf828433 Mon Sep 17 00:00:00 2001
+From: Joe Damato <jdamato@fastly.com>
+Date: Tue, 1 Mar 2022 23:55:49 -0800
+Subject: [PATCH 3/3] page_pool: Add function to batch and return stats
 
-    page_pool: Add function to batch and return stats
-    
-    Adds a function page_pool_get_stats which can be used by drivers to obtain
-    stats for a specified page_pool.
-    
-    Signed-off-by: Joe Damato <jdamato@fastly.com>
-    Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
-    Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-    Signed-off-by: David S. Miller <davem@davemloft.net>
+Adds a function page_pool_get_stats which can be used by drivers to obtain
+stats for a specified page_pool.
+
+Signed-off-by: Joe Damato <jdamato@fastly.com>
+Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
+Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ include/net/page_pool.h | 17 +++++++++++++++++
+ net/core/page_pool.c    | 25 +++++++++++++++++++++++++
+ 2 files changed, 42 insertions(+)
 
 --- a/include/net/page_pool.h
 +++ b/include/net/page_pool.h
diff --git a/target/linux/generic/backport-5.15/603-v5.19-page_pool-Add-recycle-stats-to-page_pool_put_page_bu.patch b/target/linux/generic/backport-5.15/603-v5.19-page_pool-Add-recycle-stats-to-page_pool_put_page_bu.patch
index 90f307772a..6ae3fb7133 100644
--- a/target/linux/generic/backport-5.15/603-v5.19-page_pool-Add-recycle-stats-to-page_pool_put_page_bu.patch
+++ b/target/linux/generic/backport-5.15/603-v5.19-page_pool-Add-recycle-stats-to-page_pool_put_page_bu.patch
@@ -1,16 +1,18 @@
-commit 590032a4d2133ecc10d3078a8db1d85a4842f12c
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Mon Apr 11 16:05:26 2022 +0200
+From 590032a4d2133ecc10d3078a8db1d85a4842f12c Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 11 Apr 2022 16:05:26 +0200
+Subject: [PATCH] page_pool: Add recycle stats to page_pool_put_page_bulk
 
-    page_pool: Add recycle stats to page_pool_put_page_bulk
-    
-    Add missing recycle stats to page_pool_put_page_bulk routine.
-    
-    Reviewed-by: Joe Damato <jdamato@fastly.com>
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-    Link: https://lore.kernel.org/r/3712178b51c007cfaed910ea80e68f00c916b1fa.1649685634.git.lorenzo@kernel.org
-    Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Add missing recycle stats to page_pool_put_page_bulk routine.
+
+Reviewed-by: Joe Damato <jdamato@fastly.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Link: https://lore.kernel.org/r/3712178b51c007cfaed910ea80e68f00c916b1fa.1649685634.git.lorenzo@kernel.org
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ net/core/page_pool.c | 15 +++++++++++++--
+ 1 file changed, 13 insertions(+), 2 deletions(-)
 
 --- a/net/core/page_pool.c
 +++ b/net/core/page_pool.c
diff --git a/target/linux/generic/backport-5.15/604-v5.19-net-page_pool-introduce-ethtool-stats.patch b/target/linux/generic/backport-5.15/604-v5.19-net-page_pool-introduce-ethtool-stats.patch
index 0694c5cfcb..e5cf91ceee 100644
--- a/target/linux/generic/backport-5.15/604-v5.19-net-page_pool-introduce-ethtool-stats.patch
+++ b/target/linux/generic/backport-5.15/604-v5.19-net-page_pool-introduce-ethtool-stats.patch
@@ -1,16 +1,19 @@
-commit f3c5264f452a5b0ac1de1f2f657efbabdea3c76a
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Tue Apr 12 18:31:58 2022 +0200
+From f3c5264f452a5b0ac1de1f2f657efbabdea3c76a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Tue, 12 Apr 2022 18:31:58 +0200
+Subject: [PATCH] net: page_pool: introduce ethtool stats
 
-    net: page_pool: introduce ethtool stats
-    
-    Introduce page_pool APIs to report stats through ethtool and reduce
-    duplicated code in each driver.
-    
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Reviewed-by: Jakub Kicinski <kuba@kernel.org>
-    Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-    Signed-off-by: David S. Miller <davem@davemloft.net>
+Introduce page_pool APIs to report stats through ethtool and reduce
+duplicated code in each driver.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Jakub Kicinski <kuba@kernel.org>
+Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ include/net/page_pool.h | 21 ++++++++++++++
+ net/core/page_pool.c    | 63 ++++++++++++++++++++++++++++++++++++++++-
+ 2 files changed, 83 insertions(+), 1 deletion(-)
 
 --- a/include/net/page_pool.h
 +++ b/include/net/page_pool.h
diff --git a/target/linux/generic/backport-5.15/605-v5.18-xdp-introduce-flags-field-in-xdp_buff-xdp_frame.patch b/target/linux/generic/backport-5.15/605-v5.18-xdp-introduce-flags-field-in-xdp_buff-xdp_frame.patch
index 9c5a14c41b..4a914404a2 100644
--- a/target/linux/generic/backport-5.15/605-v5.18-xdp-introduce-flags-field-in-xdp_buff-xdp_frame.patch
+++ b/target/linux/generic/backport-5.15/605-v5.18-xdp-introduce-flags-field-in-xdp_buff-xdp_frame.patch
@@ -1,24 +1,26 @@
-commit 2e88d4ff03013937028f5397268b21e10cf68713
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Fri Jan 21 11:09:45 2022 +0100
+From 2e88d4ff03013937028f5397268b21e10cf68713 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 21 Jan 2022 11:09:45 +0100
+Subject: [PATCH] xdp: introduce flags field in xdp_buff/xdp_frame
 
-    xdp: introduce flags field in xdp_buff/xdp_frame
-    
-    Introduce flags field in xdp_frame and xdp_buffer data structures
-    to define additional buffer features. At the moment the only
-    supported buffer feature is frags bit (XDP_FLAGS_HAS_FRAGS).
-    frags bit is used to specify if this is a linear buffer
-    (XDP_FLAGS_HAS_FRAGS not set) or a frags frame (XDP_FLAGS_HAS_FRAGS
-    set). In the latter case the driver is expected to initialize the
-    skb_shared_info structure at the end of the first buffer to link together
-    subsequent buffers belonging to the same frame.
-    
-    Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
-    Acked-by: John Fastabend <john.fastabend@gmail.com>
-    Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Link: https://lore.kernel.org/r/e389f14f3a162c0a5bc6a2e1aa8dd01a90be117d.1642758637.git.lorenzo@kernel.org
-    Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+Introduce flags field in xdp_frame and xdp_buffer data structures
+to define additional buffer features. At the moment the only
+supported buffer feature is frags bit (XDP_FLAGS_HAS_FRAGS).
+frags bit is used to specify if this is a linear buffer
+(XDP_FLAGS_HAS_FRAGS not set) or a frags frame (XDP_FLAGS_HAS_FRAGS
+set). In the latter case the driver is expected to initialize the
+skb_shared_info structure at the end of the first buffer to link together
+subsequent buffers belonging to the same frame.
+
+Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
+Acked-by: John Fastabend <john.fastabend@gmail.com>
+Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://lore.kernel.org/r/e389f14f3a162c0a5bc6a2e1aa8dd01a90be117d.1642758637.git.lorenzo@kernel.org
+Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+---
+ include/net/xdp.h | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
 
 --- a/include/net/xdp.h
 +++ b/include/net/xdp.h
diff --git a/target/linux/generic/backport-5.15/606-v5.18-xdp-add-frags-support-to-xdp_return_-buff-frame.patch b/target/linux/generic/backport-5.15/606-v5.18-xdp-add-frags-support-to-xdp_return_-buff-frame.patch
index 5a04948002..86d24367dd 100644
--- a/target/linux/generic/backport-5.15/606-v5.18-xdp-add-frags-support-to-xdp_return_-buff-frame.patch
+++ b/target/linux/generic/backport-5.15/606-v5.18-xdp-add-frags-support-to-xdp_return_-buff-frame.patch
@@ -1,18 +1,21 @@
-commit 7c48cb0176c6d6d3b55029f7ff4ffa05faee6446
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Fri Jan 21 11:09:50 2022 +0100
+From 7c48cb0176c6d6d3b55029f7ff4ffa05faee6446 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 21 Jan 2022 11:09:50 +0100
+Subject: [PATCH] xdp: add frags support to xdp_return_{buff/frame}
 
-    xdp: add frags support to xdp_return_{buff/frame}
-    
-    Take into account if the received xdp_buff/xdp_frame is non-linear
-    recycling/returning the frame memory to the allocator or into
-    xdp_frame_bulk.
-    
-    Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
-    Acked-by: John Fastabend <john.fastabend@gmail.com>
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Link: https://lore.kernel.org/r/a961069febc868508ce1bdf5e53a343eb4e57cb2.1642758637.git.lorenzo@kernel.org
-    Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+Take into account if the received xdp_buff/xdp_frame is non-linear
+recycling/returning the frame memory to the allocator or into
+xdp_frame_bulk.
+
+Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
+Acked-by: John Fastabend <john.fastabend@gmail.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://lore.kernel.org/r/a961069febc868508ce1bdf5e53a343eb4e57cb2.1642758637.git.lorenzo@kernel.org
+Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+---
+ include/net/xdp.h | 18 ++++++++++++++--
+ net/core/xdp.c    | 54 ++++++++++++++++++++++++++++++++++++++++++++++-
+ 2 files changed, 69 insertions(+), 3 deletions(-)
 
 --- a/include/net/xdp.h
 +++ b/include/net/xdp.h
diff --git a/target/linux/generic/backport-5.15/607-v5.18-net-skbuff-add-size-metadata-to-skb_shared_info-for-.patch b/target/linux/generic/backport-5.15/607-v5.18-net-skbuff-add-size-metadata-to-skb_shared_info-for-.patch
index 5ded882f90..a0344a332a 100644
--- a/target/linux/generic/backport-5.15/607-v5.18-net-skbuff-add-size-metadata-to-skb_shared_info-for-.patch
+++ b/target/linux/generic/backport-5.15/607-v5.18-net-skbuff-add-size-metadata-to-skb_shared_info-for-.patch
@@ -1,21 +1,23 @@
-commit d16697cb6261d4cc23422e6b1cb2759df8aa76d0
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Fri Jan 21 11:09:44 2022 +0100
+From d16697cb6261d4cc23422e6b1cb2759df8aa76d0 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 21 Jan 2022 11:09:44 +0100
+Subject: [PATCH] net: skbuff: add size metadata to skb_shared_info for xdp
 
-    net: skbuff: add size metadata to skb_shared_info for xdp
-    
-    Introduce xdp_frags_size field in skb_shared_info data structure
-    to store xdp_buff/xdp_frame frame paged size (xdp_frags_size will
-    be used in xdp frags support). In order to not increase
-    skb_shared_info size we will use a hole due to skb_shared_info
-    alignment.
-    
-    Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
-    Acked-by: John Fastabend <john.fastabend@gmail.com>
-    Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Link: https://lore.kernel.org/r/8a849819a3e0a143d540f78a3a5add76e17e980d.1642758637.git.lorenzo@kernel.org
-    Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+Introduce xdp_frags_size field in skb_shared_info data structure
+to store xdp_buff/xdp_frame frame paged size (xdp_frags_size will
+be used in xdp frags support). In order to not increase
+skb_shared_info size we will use a hole due to skb_shared_info
+alignment.
+
+Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
+Acked-by: John Fastabend <john.fastabend@gmail.com>
+Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://lore.kernel.org/r/8a849819a3e0a143d540f78a3a5add76e17e980d.1642758637.git.lorenzo@kernel.org
+Signed-off-by: Alexei Starovoitov <ast@kernel.org>
+---
+ include/linux/skbuff.h | 1 +
+ 1 file changed, 1 insertion(+)
 
 --- a/include/linux/skbuff.h
 +++ b/include/linux/skbuff.h
diff --git a/target/linux/generic/backport-5.15/608-v5.18-net-veth-Account-total-xdp_frame-len-running-ndo_xdp.patch b/target/linux/generic/backport-5.15/608-v5.18-net-veth-Account-total-xdp_frame-len-running-ndo_xdp.patch
index 9b16fc00b7..3bdba8728c 100644
--- a/target/linux/generic/backport-5.15/608-v5.18-net-veth-Account-total-xdp_frame-len-running-ndo_xdp.patch
+++ b/target/linux/generic/backport-5.15/608-v5.18-net-veth-Account-total-xdp_frame-len-running-ndo_xdp.patch
@@ -1,21 +1,24 @@
-commit 5142239a22219921a7863cf00c9ab853c00689d8
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Fri Mar 11 10:14:18 2022 +0100
+From 5142239a22219921a7863cf00c9ab853c00689d8 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 11 Mar 2022 10:14:18 +0100
+Subject: [PATCH] net: veth: Account total xdp_frame len running ndo_xdp_xmit
 
-    net: veth: Account total xdp_frame len running ndo_xdp_xmit
-    
-    Even if this is a theoretical issue since it is not possible to perform
-    XDP_REDIRECT on a non-linear xdp_frame, veth driver does not account
-    paged area in ndo_xdp_xmit function pointer.
-    Introduce xdp_get_frame_len utility routine to get the xdp_frame full
-    length and account total frame size running XDP_REDIRECT of a
-    non-linear xdp frame into a veth device.
-    
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
-    Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
-    Acked-by: John Fastabend <john.fastabend@gmail.com>
-    Link: https://lore.kernel.org/bpf/54f9fd3bb65d190daf2c0bbae2f852ff16cfbaa0.1646989407.git.lorenzo@kernel.org
+Even if this is a theoretical issue since it is not possible to perform
+XDP_REDIRECT on a non-linear xdp_frame, veth driver does not account
+paged area in ndo_xdp_xmit function pointer.
+Introduce xdp_get_frame_len utility routine to get the xdp_frame full
+length and account total frame size running XDP_REDIRECT of a
+non-linear xdp frame into a veth device.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
+Acked-by: Toke Hoiland-Jorgensen <toke@redhat.com>
+Acked-by: John Fastabend <john.fastabend@gmail.com>
+Link: https://lore.kernel.org/bpf/54f9fd3bb65d190daf2c0bbae2f852ff16cfbaa0.1646989407.git.lorenzo@kernel.org
+---
+ drivers/net/veth.c |  4 ++--
+ include/net/xdp.h  | 14 ++++++++++++++
+ 2 files changed, 16 insertions(+), 2 deletions(-)
 
 --- a/drivers/net/veth.c
 +++ b/drivers/net/veth.c
diff --git a/target/linux/generic/backport-5.15/609-v5.18-veth-Allow-jumbo-frames-in-xdp-mode.patch b/target/linux/generic/backport-5.15/609-v5.18-veth-Allow-jumbo-frames-in-xdp-mode.patch
index 8080d621da..08744be524 100644
--- a/target/linux/generic/backport-5.15/609-v5.18-veth-Allow-jumbo-frames-in-xdp-mode.patch
+++ b/target/linux/generic/backport-5.15/609-v5.18-veth-Allow-jumbo-frames-in-xdp-mode.patch
@@ -1,17 +1,22 @@
-commit 7cda76d858a4e71ac4a04066c093679a12e1312c
-Author: Lorenzo Bianconi <lorenzo@kernel.org>
-Date:   Fri Mar 11 10:14:20 2022 +0100
+From 7cda76d858a4e71ac4a04066c093679a12e1312c Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 11 Mar 2022 10:14:20 +0100
+Subject: [PATCH] veth: Allow jumbo frames in xdp mode
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
 
-    veth: Allow jumbo frames in xdp mode
-    
-    Allow increasing the MTU over page boundaries on veth devices
-    if the attached xdp program declares to support xdp fragments.
-    
-    Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
-    Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
-    Acked-by: Toke Høiland-Jørgensen <toke@redhat.com>
-    Acked-by: John Fastabend <john.fastabend@gmail.com>
-    Link: https://lore.kernel.org/bpf/d5dc039c3d4123426e7023a488c449181a7bc57f.1646989407.git.lorenzo@kernel.org
+Allow increasing the MTU over page boundaries on veth devices
+if the attached xdp program declares to support xdp fragments.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
+Acked-by: Toke Høiland-Jørgensen <toke@redhat.com>
+Acked-by: John Fastabend <john.fastabend@gmail.com>
+Link: https://lore.kernel.org/bpf/d5dc039c3d4123426e7023a488c449181a7bc57f.1646989407.git.lorenzo@kernel.org
+---
+ drivers/net/veth.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
 
 --- a/drivers/net/veth.c
 +++ b/drivers/net/veth.c
diff --git a/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch b/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch
index 8063d20270..555e7eaa95 100644
--- a/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch
+++ b/target/linux/generic/backport-5.15/703-00-v5.16-net-convert-users-of-bitmap_foo-to-linkmode_foo.patch
@@ -637,7 +637,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  static void macb_usx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
 --- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c
 +++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
-@@ -940,7 +940,7 @@ static void enetc_pl_mac_validate(struct
+@@ -968,7 +968,7 @@ static void enetc_pl_mac_validate(struct
  	    state->interface != PHY_INTERFACE_MODE_2500BASEX &&
  	    state->interface != PHY_INTERFACE_MODE_USXGMII &&
  	    !phy_interface_mode_is_rgmii(state->interface)) {
@@ -646,7 +646,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
  		return;
  	}
  
-@@ -963,10 +963,8 @@ static void enetc_pl_mac_validate(struct
+@@ -991,10 +991,8 @@ static void enetc_pl_mac_validate(struct
  		phylink_set(mask, 2500baseX_Full);
  	}
  
diff --git a/target/linux/generic/pending-5.15/781-net-ethernet-mtk_eth_soc-move-gdma_to_ppe-and-ppe_ba.patch b/target/linux/generic/backport-5.15/713-v6.0-net-ethernet-mtk_eth_soc-move-gdma_to_ppe-and-ppe_ba.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/781-net-ethernet-mtk_eth_soc-move-gdma_to_ppe-and-ppe_ba.patch
rename to target/linux/generic/backport-5.15/713-v6.0-net-ethernet-mtk_eth_soc-move-gdma_to_ppe-and-ppe_ba.patch
diff --git a/target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch b/target/linux/generic/backport-5.15/714-v6.0-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch
similarity index 96%
rename from target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch
rename to target/linux/generic/backport-5.15/714-v6.0-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch
index 89a3aa9893..dd3bb15800 100644
--- a/target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch
+++ b/target/linux/generic/backport-5.15/714-v6.0-net-ethernet-mtk_eth_soc-move-ppe-table-hash-offset-.patch
@@ -44,7 +44,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
 
 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4150,6 +4150,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4148,6 +4148,7 @@ static const struct mtk_soc_data mt7621_
  	.required_clks = MT7621_CLKS_BITMAP,
  	.required_pctl = false,
  	.offload_version = 2,
@@ -52,7 +52,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4168,6 +4169,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4166,6 +4167,7 @@ static const struct mtk_soc_data mt7622_
  	.required_clks = MT7622_CLKS_BITMAP,
  	.required_pctl = false,
  	.offload_version = 2,
@@ -60,7 +60,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4185,6 +4187,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4183,6 +4185,7 @@ static const struct mtk_soc_data mt7623_
  	.required_clks = MT7623_CLKS_BITMAP,
  	.required_pctl = true,
  	.offload_version = 2,
@@ -68,7 +68,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4218,6 +4221,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4216,6 +4219,7 @@ static const struct mtk_soc_data mt7986_
  	.caps = MT7986_CAPS,
  	.required_clks = MT7986_CLKS_BITMAP,
  	.required_pctl = false,
diff --git a/target/linux/generic/pending-5.15/790-net-ethernet-mtk_eth_soc-add-the-capability-to-run-m.patch b/target/linux/generic/backport-5.15/715-v6.0-net-ethernet-mtk_eth_soc-add-the-capability-to-run-m.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/790-net-ethernet-mtk_eth_soc-add-the-capability-to-run-m.patch
rename to target/linux/generic/backport-5.15/715-v6.0-net-ethernet-mtk_eth_soc-add-the-capability-to-run-m.patch
diff --git a/target/linux/generic/pending-5.15/791-net-ethernet-mtk_eth_soc-move-wdma_base-definitions-.patch b/target/linux/generic/backport-5.15/716-v6.0-net-ethernet-mtk_eth_soc-move-wdma_base-definitions-.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/791-net-ethernet-mtk_eth_soc-move-wdma_base-definitions-.patch
rename to target/linux/generic/backport-5.15/716-v6.0-net-ethernet-mtk_eth_soc-move-wdma_base-definitions-.patch
diff --git a/target/linux/generic/pending-5.15/792-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch b/target/linux/generic/backport-5.15/717-v6.0-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch
similarity index 97%
rename from target/linux/generic/pending-5.15/792-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch
rename to target/linux/generic/backport-5.15/717-v6.0-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch
index 16bc8e29fc..c24bd8022c 100644
--- a/target/linux/generic/pending-5.15/792-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch
+++ b/target/linux/generic/backport-5.15/717-v6.0-net-ethernet-mtk_eth_soc-add-foe_entry_size-to-mtk_e.patch
@@ -21,7 +21,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
 
 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4167,6 +4167,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4165,6 +4165,7 @@ static const struct mtk_soc_data mt7621_
  	.required_pctl = false,
  	.offload_version = 2,
  	.hash_offset = 2,
@@ -29,7 +29,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4186,6 +4187,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4184,6 +4185,7 @@ static const struct mtk_soc_data mt7622_
  	.required_pctl = false,
  	.offload_version = 2,
  	.hash_offset = 2,
@@ -37,7 +37,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4204,6 +4206,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4202,6 +4204,7 @@ static const struct mtk_soc_data mt7623_
  	.required_pctl = true,
  	.offload_version = 2,
  	.hash_offset = 2,
diff --git a/target/linux/generic/pending-5.15/793-net-ethernet-mtk_eth_soc-fix-typo-in-__mtk_foe_entry.patch b/target/linux/generic/backport-5.15/718-v6.0-net-ethernet-mtk_eth_soc-fix-typo-in-__mtk_foe_entry.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/793-net-ethernet-mtk_eth_soc-fix-typo-in-__mtk_foe_entry.patch
rename to target/linux/generic/backport-5.15/718-v6.0-net-ethernet-mtk_eth_soc-fix-typo-in-__mtk_foe_entry.patch
diff --git a/target/linux/generic/pending-5.15/794-net-ethernet-mtk_eth_soc-check-max-allowed-value-in-.patch b/target/linux/generic/backport-5.15/719-v6.0-net-ethernet-mtk_eth_soc-check-max-allowed-value-in-.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/794-net-ethernet-mtk_eth_soc-check-max-allowed-value-in-.patch
rename to target/linux/generic/backport-5.15/719-v6.0-net-ethernet-mtk_eth_soc-check-max-allowed-value-in-.patch
diff --git a/target/linux/generic/pending-5.15/795-net-ethernet-mtk_eth_wed-add-mtk_wed_configure_irq-a.patch b/target/linux/generic/backport-5.15/720-v6.0-net-ethernet-mtk_eth_wed-add-mtk_wed_configure_irq-a.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/795-net-ethernet-mtk_eth_wed-add-mtk_wed_configure_irq-a.patch
rename to target/linux/generic/backport-5.15/720-v6.0-net-ethernet-mtk_eth_wed-add-mtk_wed_configure_irq-a.patch
diff --git a/target/linux/generic/pending-5.15/796-net-ethernet-mtk_eth_wed-add-wed-support-for-mt7986-.patch b/target/linux/generic/backport-5.15/721-v6.0-net-ethernet-mtk_eth_wed-add-wed-support-for-mt7986-.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/796-net-ethernet-mtk_eth_wed-add-wed-support-for-mt7986-.patch
rename to target/linux/generic/backport-5.15/721-v6.0-net-ethernet-mtk_eth_wed-add-wed-support-for-mt7986-.patch
diff --git a/target/linux/generic/pending-5.15/797-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch b/target/linux/generic/backport-5.15/722-v6.0-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch
similarity index 100%
rename from target/linux/generic/pending-5.15/797-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch
rename to target/linux/generic/backport-5.15/722-v6.0-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch
diff --git a/target/linux/generic/pending-5.15/798-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch b/target/linux/generic/backport-5.15/723-v6.0-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch
similarity index 99%
rename from target/linux/generic/pending-5.15/798-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch
rename to target/linux/generic/backport-5.15/723-v6.0-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch
index 2fb0b1dfd6..1ecbf485f1 100644
--- a/target/linux/generic/pending-5.15/798-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch
+++ b/target/linux/generic/backport-5.15/723-v6.0-net-ethernet-mtk_eth_soc-introduce-flow-offloading-s.patch
@@ -49,7 +49,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  		if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
  			mtk_ppe_check_skb(eth->ppe[0], skb, hash);
  
-@@ -4183,7 +4184,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4181,7 +4182,7 @@ static const struct mtk_soc_data mt7621_
  	.required_pctl = false,
  	.offload_version = 2,
  	.hash_offset = 2,
@@ -58,7 +58,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4203,7 +4204,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4201,7 +4202,7 @@ static const struct mtk_soc_data mt7622_
  	.required_pctl = false,
  	.offload_version = 2,
  	.hash_offset = 2,
@@ -67,7 +67,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4222,7 +4223,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4220,7 +4221,7 @@ static const struct mtk_soc_data mt7623_
  	.required_pctl = true,
  	.offload_version = 2,
  	.hash_offset = 2,
@@ -76,7 +76,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  	.txrx = {
  		.txd_size = sizeof(struct mtk_tx_dma),
  		.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4254,9 +4255,11 @@ static const struct mtk_soc_data mt7986_
+@@ -4252,9 +4253,11 @@ static const struct mtk_soc_data mt7986_
  	.reg_map = &mt7986_reg_map,
  	.ana_rgc3 = 0x128,
  	.caps = MT7986_CAPS,
diff --git a/target/linux/generic/pending-5.15/799-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch b/target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch
similarity index 94%
rename from target/linux/generic/pending-5.15/799-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch
rename to target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch
index 5b94c3ad3a..037e9d4443 100644
--- a/target/linux/generic/pending-5.15/799-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch
+++ b/target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-enable-flow-offloading-supp.patch
@@ -16,7 +16,7 @@ Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
 
 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4258,6 +4258,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4256,6 +4256,7 @@ static const struct mtk_soc_data mt7986_
  	.hw_features = MTK_HW_FEATURES,
  	.required_clks = MT7986_CLKS_BITMAP,
  	.required_pctl = false,
diff --git a/target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-fix-wrong-use-of-new-helper.patch b/target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-fix-wrong-use-of-new-helper.patch
new file mode 100644
index 0000000000..c4bd29365c
--- /dev/null
+++ b/target/linux/generic/backport-5.15/724-v6.0-net-ethernet-mtk_eth_soc-fix-wrong-use-of-new-helper.patch
@@ -0,0 +1,46 @@
+From 40350ce3ae8701146aafd79c5f7b5582d9955e58 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sun, 25 Sep 2022 15:12:35 +0100
+Subject: [PATCH 1/2] net: ethernet: mtk_eth_soc: fix wrong use of new helper
+ function
+To: linux-mediatek@lists.infradead.org,
+    netdev@vger.kernel.org,
+    Lorenzo Bianconi <lorenzo@kernel.org>
+Cc: Sujuan Chen <sujuan.chen@mediatek.com>,
+    Bo Jiao <Bo.Jiao@mediatek.com>,
+    Felix Fietkau <nbd@nbd.name>,
+    John Crispin <john@phrozen.org>,
+    Sean Wang <sean.wang@mediatek.com>,
+    Mark Lee <Mark-MC.Lee@mediatek.com>,
+    David S. Miller <davem@davemloft.net>,
+    Eric Dumazet <edumazet@google.com>,
+    Jakub Kicinski <kuba@kernel.org>,
+    Paolo Abeni <pabeni@redhat.com>,
+    Matthias Brugger <matthias.bgg@gmail.com>,
+    Chen Minqiang <ptpt52@gmail.com>
+
+In function mtk_foe_entry_set_vlan() the call to field accessor macro
+FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, entry->ib1)
+has been wrongly replaced by
+mtk_prep_ib1_vlan_layer(eth, entry->ib1)
+
+Use correct helper function mtk_get_ib1_vlan_layer instead.
+
+Reported-by: Chen Minqiang <ptpt52@gmail.com>
+Fixes: 03a3180e5c09e1 ("net: ethernet: mtk_eth_soc: introduce flow offloading support for mt7986")
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/ethernet/mediatek/mtk_ppe.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -337,7 +337,7 @@ int mtk_foe_entry_set_vlan(struct mtk_et
+ {
+ 	struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry);
+ 
+-	switch (mtk_prep_ib1_vlan_layer(eth, entry->ib1)) {
++	switch (mtk_get_ib1_vlan_layer(eth, entry->ib1)) {
+ 	case 0:
+ 		entry->ib1 |= mtk_get_ib1_vlan_tag_mask(eth) |
+ 			      mtk_prep_ib1_vlan_layer(eth, 1);
diff --git a/target/linux/generic/backport-5.15/725-v6.0-net-ethernet-mtk_eth_soc-fix-usage-of-foe_entry_size.patch b/target/linux/generic/backport-5.15/725-v6.0-net-ethernet-mtk_eth_soc-fix-usage-of-foe_entry_size.patch
new file mode 100644
index 0000000000..bb02f401a2
--- /dev/null
+++ b/target/linux/generic/backport-5.15/725-v6.0-net-ethernet-mtk_eth_soc-fix-usage-of-foe_entry_size.patch
@@ -0,0 +1,49 @@
+From fcf14c2c5deae8f8c3d25530bab10856f63f8a63 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Sun, 25 Sep 2022 15:18:54 +0100
+Subject: [PATCH 2/2] net: ethernet: mtk_eth_soc: fix usage of foe_entry_size
+To: linux-mediatek@lists.infradead.org,
+    netdev@vger.kernel.org,
+    Lorenzo Bianconi <lorenzo@kernel.org>
+Cc: Sujuan Chen <sujuan.chen@mediatek.com>,
+    Bo Jiao <Bo.Jiao@mediatek.com>,
+    Felix Fietkau <nbd@nbd.name>,
+    John Crispin <john@phrozen.org>,
+    Sean Wang <sean.wang@mediatek.com>,
+    Mark Lee <Mark-MC.Lee@mediatek.com>,
+    David S. Miller <davem@davemloft.net>,
+    Eric Dumazet <edumazet@google.com>,
+    Jakub Kicinski <kuba@kernel.org>,
+    Paolo Abeni <pabeni@redhat.com>,
+    Matthias Brugger <matthias.bgg@gmail.com>,
+    Chen Minqiang <ptpt52@gmail.com>
+
+As sizeof(hwe->data) can now longer be used as the actual size depends
+on foe_entry_size, in commit 9d8cb4c096ab02
+("net: ethernet: mtk_eth_soc: add foe_entry_size to mtk_eth_soc") the
+use of sizeof(hwe->data) is hence replaced.
+However, replacing it with ppe->eth->soc->foe_entry_size is wrong as
+foe_entry_size represents the size of the whole descriptor and not just
+the 'data' field.
+Fix this by subtracing the size of the only other field in the struct
+'ib1', so we actually end up with the correct size to be copied to the
+data field.
+
+Reported-by: Chen Minqiang <ptpt52@gmail.com>
+Fixes: 9d8cb4c096ab02 ("net: ethernet: mtk_eth_soc: add foe_entry_size to mtk_eth_soc")
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/ethernet/mediatek/mtk_ppe.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -547,7 +547,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
+ 	}
+ 
+ 	hwe = mtk_foe_get_entry(ppe, hash);
+-	memcpy(&hwe->data, &entry->data, eth->soc->foe_entry_size);
++	memcpy(&hwe->data, &entry->data, eth->soc->foe_entry_size - sizeof(hwe->ib1));
+ 	wmb();
+ 	hwe->ib1 = entry->ib1;
+ 
diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10
index 1d84af7a6a..fb74fd785e 100644
--- a/target/linux/generic/config-5.10
+++ b/target/linux/generic/config-5.10
@@ -2529,7 +2529,6 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_IKCONFIG_PROC is not set
 # CONFIG_IKHEADERS is not set
 # CONFIG_IMA is not set
-# CONFIG_IMAGE_CMDLINE_HACK is not set
 # CONFIG_IMGPDC_WDT is not set
 # CONFIG_IMG_MDC_DMA is not set
 # CONFIG_IMX7D_ADC is not set
@@ -3063,7 +3062,6 @@ CONFIG_LEDS_TRIGGER_NETDEV=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 # CONFIG_LEDS_TRIGGER_TRANSIENT is not set
 # CONFIG_LEDS_TURRIS_OMNIA is not set
-# CONFIG_LEDS_UBNT_LEDBAR is not set
 # CONFIG_LEDS_USER is not set
 # CONFIG_LED_TRIGGER_PHY is not set
 # CONFIG_LEGACY_PTYS is not set
diff --git a/target/linux/generic/config-5.15 b/target/linux/generic/config-5.15
index 5564aaecec..60a0d4ad6b 100644
--- a/target/linux/generic/config-5.15
+++ b/target/linux/generic/config-5.15
@@ -1631,6 +1631,7 @@ CONFIG_DQL=y
 # CONFIG_DRM_RADEON_USERPTR is not set
 # CONFIG_DRM_RCAR_DW_HDMI is not set
 # CONFIG_DRM_RCAR_LVDS is not set
+# CONFIG_DRM_ROCKCHIP is not set
 # CONFIG_DRM_SII902X is not set
 # CONFIG_DRM_SII9234 is not set
 # CONFIG_DRM_SIL_SII8620 is not set
@@ -2620,7 +2621,6 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
 # CONFIG_IKCONFIG_PROC is not set
 # CONFIG_IKHEADERS is not set
 # CONFIG_IMA is not set
-# CONFIG_IMAGE_CMDLINE_HACK is not set
 # CONFIG_IMGPDC_WDT is not set
 # CONFIG_IMG_MDC_DMA is not set
 # CONFIG_IMX7D_ADC is not set
@@ -3166,7 +3166,6 @@ CONFIG_LEDS_TRIGGER_TIMER=y
 # CONFIG_LEDS_TRIGGER_TRANSIENT is not set
 # CONFIG_LEDS_TRIGGER_TTY is not set
 # CONFIG_LEDS_TURRIS_OMNIA is not set
-# CONFIG_LEDS_UBNT_LEDBAR is not set
 # CONFIG_LEDS_USER is not set
 # CONFIG_LED_TRIGGER_PHY is not set
 # CONFIG_LEGACY_PTYS is not set
@@ -6091,6 +6090,8 @@ CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
 # CONFIG_SND_SOC_PCM512x_SPI is not set
 # CONFIG_SND_SOC_QCOM is not set
 # CONFIG_SND_SOC_RK3328 is not set
+# CONFIG_SND_SOC_RK817 is not set
+# CONFIG_SND_SOC_ROCKCHIP is not set
 # CONFIG_SND_SOC_RT5616 is not set
 # CONFIG_SND_SOC_RT5631 is not set
 # CONFIG_SND_SOC_RT5640 is not set
@@ -7311,6 +7312,7 @@ CONFIG_VHOST_MENU=y
 # CONFIG_VIDEO_RDACM20 is not set
 # CONFIG_VIDEO_RDACM21 is not set
 # CONFIG_VIDEO_RJ54N1 is not set
+# CONFIG_VIDEO_ROCKCHIP_ISP1 is not set
 # CONFIG_VIDEO_S5C73M3 is not set
 # CONFIG_VIDEO_S5K4ECGX is not set
 # CONFIG_VIDEO_S5K5BAF is not set
diff --git a/target/linux/generic/hack-5.10/205-kconfig-exit.patch b/target/linux/generic/hack-5.10/205-kconfig-exit.patch
index c3fb7a1f99..591daf624a 100644
--- a/target/linux/generic/hack-5.10/205-kconfig-exit.patch
+++ b/target/linux/generic/hack-5.10/205-kconfig-exit.patch
@@ -1,3 +1,20 @@
+From: David Bauer <mail@david-bauer.net>
+Subject: Kconfig: exit on unset symbol
+
+When a target configuration has unset Kconfig symbols, the build will
+fail when OpenWrt is compiled with V=s and stdin is connected to a tty.
+
+In case OpenWrt is compiled without either of these preconditions, the
+build will succeed with the symbols in question being unset.
+
+Modify the kernel configuration in a way it fails on unset symbols
+regardless of the aforementioned preconditions.
+
+Submitted-by: David Bauer <mail@david-bauer.net>
+---
+ scripts/kconfig/conf.c                                |  2 +
+ 1 files changed, 2 insertions(+)
+
 --- a/scripts/kconfig/conf.c
 +++ b/scripts/kconfig/conf.c
 @@ -215,6 +215,8 @@ static int conf_sym(struct menu *menu)
diff --git a/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch
deleted file mode 100644
index 2c74298dfe..0000000000
--- a/target/linux/generic/hack-5.10/249-udp-tunnel-selection.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/net/ipv4/Kconfig
-+++ b/net/ipv4/Kconfig
-@@ -315,7 +315,7 @@ config NET_IPVTI
- 	  on top.
- 
- config NET_UDP_TUNNEL
--	tristate
-+	tristate "IP: UDP tunneling support"
- 	select NET_IP_TUNNEL
- 	default n
- 
diff --git a/target/linux/generic/hack-5.10/252-SATA_PMP.patch b/target/linux/generic/hack-5.10/252-SATA_PMP.patch
deleted file mode 100644
index 6502d1d6ed..0000000000
--- a/target/linux/generic/hack-5.10/252-SATA_PMP.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 8c817e33be829c7249c2cfd59ff48ad5fac6a31d Mon Sep 17 00:00:00 2001
-From: Sungbo Eo <mans0n@gorani.run>
-Date: Fri, 7 Jul 2017 17:09:21 +0200
-Subject: [PATCH] kconfig: solidify SATA_PMP config
-
-SATA_PMP option in kernel config file disappears for every kernel_oldconfig refresh.
-To prevent this, SATA_HOST is now selected automatically when SATA_PMP is enabled.
-This patch can be dropped if SATA_MV is ever re-added into the config.
----
- drivers/ata/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/ata/Kconfig
-+++ b/drivers/ata/Kconfig
-@@ -112,7 +112,7 @@ config SATA_ZPODD
- 
- config SATA_PMP
- 	bool "SATA Port Multiplier support"
--	depends on SATA_HOST
-+	select SATA_HOST
- 	default y
- 	help
- 	  This option adds support for SATA Port Multipliers
diff --git a/target/linux/generic/hack-5.10/253-ksmbd-config.patch b/target/linux/generic/hack-5.10/253-ksmbd-config.patch
index 4d07c1c00e..2992dbeda0 100644
--- a/target/linux/generic/hack-5.10/253-ksmbd-config.patch
+++ b/target/linux/generic/hack-5.10/253-ksmbd-config.patch
@@ -1,3 +1,15 @@
+From: Rosen Penev <rosenp@gmail.com>
+Subject: Kconfig: add help text to kernel config
+
+These options will be used for ksmbd. Once kernel 5.15
+makes it in, this patch can go away.
+
+Submitted-by: Rosen Penev <rosenp@gmail.com>
+---
+ init/Kconfig | 2 +-
+ lib/Kconfig  | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
 --- a/init/Kconfig
 +++ b/init/Kconfig
 @@ -2384,7 +2384,7 @@ config PADATA
@@ -19,4 +31,3 @@
 +	tristate "OID"
  	help
  	  Enable fast lookup object identifier registry.
- 
diff --git a/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch b/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch
index 4ffd8cfa37..b61dd269a4 100644
--- a/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch
+++ b/target/linux/generic/hack-5.10/261-lib-arc4-unhide.patch
@@ -1,7 +1,20 @@
+From: Koen Vandeputte <koen.vandeputte@ncentric.com>
+Subject: crypto: arc4 unhide
+
 This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We 
 need this to be able to compile this into the kernel and make use of it 
 from backports.
 
+Submitted-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
+Submitted-by: David Bauer <mail@david-bauer.net>
+Submitted-by: Christian Lamparter <chunkeey@gmail.com>
+Submitted-by: Ansuel Smith <ansuelsmth@gmail.com>
+Submitted-by: Robert Marko <robimarko@gmail.com>
+Submitted-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ lib/crypto/Kconfig                            |   2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/lib/crypto/Kconfig
 +++ b/lib/crypto/Kconfig
 @@ -6,7 +6,7 @@ config CRYPTO_LIB_AES
diff --git a/target/linux/generic/hack-5.10/402-mtd-blktrans-call-add-disks-after-mtd-device.patch b/target/linux/generic/hack-5.10/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
index 7de27fddb1..55388aa40c 100644
--- a/target/linux/generic/hack-5.10/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
+++ b/target/linux/generic/hack-5.10/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
@@ -77,7 +77,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #include "mtdcore.h"
  
-@@ -922,6 +923,8 @@ int mtd_device_parse_register(struct mtd
+@@ -924,6 +925,8 @@ int mtd_device_parse_register(struct mtd
  		register_reboot_notifier(&mtd->reboot_notifier);
  	}
  
diff --git a/target/linux/generic/hack-5.10/410-block-fit-partition-parser.patch b/target/linux/generic/hack-5.10/410-block-fit-partition-parser.patch
index 7816356227..405cc9d0d4 100644
--- a/target/linux/generic/hack-5.10/410-block-fit-partition-parser.patch
+++ b/target/linux/generic/hack-5.10/410-block-fit-partition-parser.patch
@@ -1,3 +1,30 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Subject: [PATCH] kernel: fix FIT partition parser compatibility issues
+
+The uImage.FIT partition parser used to squeeze in FIT partitions in
+the range where partition editor tools (fdisk and such) expect the
+regular partition. This is confusing people and tools when adding
+additional partitions on top of the partition used for OpenWrt's
+uImage.FIT.
+Instead of squeezing in the additional partitions, rather start with
+all uImage.FIT partitions at offset 64.
+
+Submitted-by: Daniel Golle <daniel@makrotopia.org>
+---
+ block/blk.h                                            |  2 ++
+ block/partitions/Kconfig                               |  7 +++
+ block/partitions/Makefile                              |  1 +
+ block/partitions/check.h                               |  3 ++
+ block/partitions/core.c                                | 15 +++++++
+ drivers/mtd/ubi/block.c                                |  7 +++
+ block/partitions/efi.c                                 |  8 +++++++
+ block/partitions/efi.h                                 |  3 ++
+ drivers/mtd/mtdblock.c                                 |  4 +++
+ drivers/mtd/mtd_blkdevs.c                              | 14 +------
+ block/partitions/msdos.c                               | 10 ++++++
+ include/linux/msdos_partition.h                        |  1 +
+ 12 files changed, 52 insertions(+), 13 deletions(-)
+
 --- a/block/blk.h
 +++ b/block/blk.h
 @@ -361,6 +361,8 @@ char *disk_name(struct gendisk *hd, int
diff --git a/target/linux/generic/hack-5.10/420-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/hack-5.10/420-mtd-set-rootfs-to-be-root-dev.patch
index ad68d52c72..5529bba12c 100644
--- a/target/linux/generic/hack-5.10/420-mtd-set-rootfs-to-be-root-dev.patch
+++ b/target/linux/generic/hack-5.10/420-mtd-set-rootfs-to-be-root-dev.patch
@@ -20,7 +20,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  #include <linux/nvmem-provider.h>
  
  #include <linux/mtd/mtd.h>
-@@ -765,6 +766,19 @@ int add_mtd_device(struct mtd_info *mtd)
+@@ -767,6 +768,19 @@ int add_mtd_device(struct mtd_info *mtd)
  	   of this try_ nonsense, and no bitching about it
  	   either. :) */
  	__module_get(THIS_MODULE);
diff --git a/target/linux/generic/hack-5.10/430-mtk-bmt-support.patch b/target/linux/generic/hack-5.10/430-mtk-bmt-support.patch
index 62ddd66bf2..b18df7584d 100644
--- a/target/linux/generic/hack-5.10/430-mtk-bmt-support.patch
+++ b/target/linux/generic/hack-5.10/430-mtk-bmt-support.patch
@@ -1,3 +1,14 @@
+From 11425c9de29c8b9c5e4d7eec163a6afbb7fbdce2 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <nbd@nbd.name>
+Date: Thu, 9 Apr 2020 09:53:24 +0200
+Subject: mediatek: Implement bad-block management table support
+
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+---
+ drivers/mtd/nand/Kconfig                      |   4 ++++
+ drivers/mtd/nand/Makefile                     |   1 +
+ 2 files changed, 5 insertions(+)
+
 --- a/drivers/mtd/nand/Kconfig
 +++ b/drivers/mtd/nand/Kconfig
 @@ -15,6 +15,10 @@ config MTD_NAND_ECC
diff --git a/target/linux/generic/hack-5.10/531-debloat_lzma.patch b/target/linux/generic/hack-5.10/531-debloat_lzma.patch
deleted file mode 100644
index 2f70eee3e9..0000000000
--- a/target/linux/generic/hack-5.10/531-debloat_lzma.patch
+++ /dev/null
@@ -1,1040 +0,0 @@
-From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Sat, 15 Jul 2017 21:15:44 +0200
-Subject: lzma: de-bloat the lzma library used by jffs2
-
-lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/linux/lzma/LzFind.h  |  17 ---
- include/linux/lzma/LzmaDec.h | 101 ---------------
- include/linux/lzma/LzmaEnc.h |  20 ---
- lib/lzma/LzFind.c            | 287 ++++---------------------------------------
- lib/lzma/LzmaDec.c           |  86 +------------
- lib/lzma/LzmaEnc.c           | 172 ++------------------------
- 6 files changed, 42 insertions(+), 641 deletions(-)
-
---- a/include/linux/lzma/LzFind.h
-+++ b/include/linux/lzma/LzFind.h
-@@ -55,11 +55,6 @@ typedef struct _CMatchFinder
- 
- #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
- 
--int MatchFinder_NeedMove(CMatchFinder *p);
--Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
--void MatchFinder_MoveBlock(CMatchFinder *p);
--void MatchFinder_ReadIfRequired(CMatchFinder *p);
--
- void MatchFinder_Construct(CMatchFinder *p);
- 
- /* Conditions:
-@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p,
-     UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
-     ISzAlloc *alloc);
- void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
--void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
--void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
--
--UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
--    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
--    UInt32 *distances, UInt32 maxLen);
- 
- /*
- Conditions:
-@@ -102,12 +91,6 @@ typedef struct _IMatchFinder
- 
- void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
- 
--void MatchFinder_Init(CMatchFinder *p);
--UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
--UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
--void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
--void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
--
- #ifdef __cplusplus
- }
- #endif
---- a/include/linux/lzma/LzmaDec.h
-+++ b/include/linux/lzma/LzmaDec.h
-@@ -31,14 +31,6 @@ typedef struct _CLzmaProps
-   UInt32 dicSize;
- } CLzmaProps;
- 
--/* LzmaProps_Decode - decodes properties
--Returns:
--  SZ_OK
--  SZ_ERROR_UNSUPPORTED - Unsupported properties
--*/
--
--SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
--
- 
- /* ---------- LZMA Decoder state ---------- */
- 
-@@ -70,8 +62,6 @@ typedef struct
- 
- #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
- 
--void LzmaDec_Init(CLzmaDec *p);
--
- /* There are two types of LZMA streams:
-      0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
-      1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
-@@ -108,97 +98,6 @@ typedef enum
- 
- /* ELzmaStatus is used only as output value for function call */
- 
--
--/* ---------- Interfaces ---------- */
--
--/* There are 3 levels of interfaces:
--     1) Dictionary Interface
--     2) Buffer Interface
--     3) One Call Interface
--   You can select any of these interfaces, but don't mix functions from different
--   groups for same object. */
--
--
--/* There are two variants to allocate state for Dictionary Interface:
--     1) LzmaDec_Allocate / LzmaDec_Free
--     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
--   You can use variant 2, if you set dictionary buffer manually.
--   For Buffer Interface you must always use variant 1.
--
--LzmaDec_Allocate* can return:
--  SZ_OK
--  SZ_ERROR_MEM         - Memory allocation error
--  SZ_ERROR_UNSUPPORTED - Unsupported properties
--*/
--
--SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
--void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
--
--SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
--void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
--
--/* ---------- Dictionary Interface ---------- */
--
--/* You can use it, if you want to eliminate the overhead for data copying from
--   dictionary to some other external buffer.
--   You must work with CLzmaDec variables directly in this interface.
--
--   STEPS:
--     LzmaDec_Constr()
--     LzmaDec_Allocate()
--     for (each new stream)
--     {
--       LzmaDec_Init()
--       while (it needs more decompression)
--       {
--         LzmaDec_DecodeToDic()
--         use data from CLzmaDec::dic and update CLzmaDec::dicPos
--       }
--     }
--     LzmaDec_Free()
--*/
--
--/* LzmaDec_DecodeToDic
--
--   The decoding to internal dictionary buffer (CLzmaDec::dic).
--   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
--
--finishMode:
--  It has meaning only if the decoding reaches output limit (dicLimit).
--  LZMA_FINISH_ANY - Decode just dicLimit bytes.
--  LZMA_FINISH_END - Stream must be finished after dicLimit.
--
--Returns:
--  SZ_OK
--    status:
--      LZMA_STATUS_FINISHED_WITH_MARK
--      LZMA_STATUS_NOT_FINISHED
--      LZMA_STATUS_NEEDS_MORE_INPUT
--      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
--  SZ_ERROR_DATA - Data error
--*/
--
--SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
--    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
--
--
--/* ---------- Buffer Interface ---------- */
--
--/* It's zlib-like interface.
--   See LzmaDec_DecodeToDic description for information about STEPS and return results,
--   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
--   to work with CLzmaDec variables manually.
--
--finishMode:
--  It has meaning only if the decoding reaches output limit (*destLen).
--  LZMA_FINISH_ANY - Decode just destLen bytes.
--  LZMA_FINISH_END - Stream must be finished after (*destLen).
--*/
--
--SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
--    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
--
--
- /* ---------- One Call Interface ---------- */
- 
- /* LzmaDecode
---- a/include/linux/lzma/LzmaEnc.h
-+++ b/include/linux/lzma/LzmaEnc.h
-@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps
- } CLzmaEncProps;
- 
- void LzmaEncProps_Init(CLzmaEncProps *p);
--void LzmaEncProps_Normalize(CLzmaEncProps *p);
--UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
--
- 
- /* ---------- CLzmaEncHandle Interface ---------- */
- 
-@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
- void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
- SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
- SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
--SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
- SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-     int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
- 
--/* ---------- One Call Interface ---------- */
--
--/* LzmaEncode
--Return code:
--  SZ_OK               - OK
--  SZ_ERROR_MEM        - Memory allocation error
--  SZ_ERROR_PARAM      - Incorrect paramater
--  SZ_ERROR_OUTPUT_EOF - output buffer overflow
--  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
--*/
--
--SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
--    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
--
- #ifdef __cplusplus
- }
- #endif
---- a/lib/lzma/LzFind.c
-+++ b/lib/lzma/LzFind.c
-@@ -14,9 +14,15 @@
- 
- #define kStartMaxLen 3
- 
-+#if 0
-+#define DIRECT_INPUT	p->directInput
-+#else
-+#define DIRECT_INPUT	1
-+#endif
-+
- static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
- {
--  if (!p->directInput)
-+  if (!DIRECT_INPUT)
-   {
-     alloc->Free(alloc, p->bufferBase);
-     p->bufferBase = 0;
-@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder
- static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
- {
-   UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-   {
-     p->blockSize = blockSize;
-     return 1;
-@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde
-   return (p->bufferBase != 0);
- }
- 
--Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
--Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
-+static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-+static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
- 
--UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
-+static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
- 
--void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
-+static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
- {
-   p->posLimit -= subValue;
-   p->pos -= subValue;
-@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch
- {
-   if (p->streamEndWasReached || p->result != SZ_OK)
-     return;
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-   {
-     UInt32 curSize = 0xFFFFFFFF - p->streamPos;
-     if (curSize > p->directInputRem)
-@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch
-   }
- }
- 
--void MatchFinder_MoveBlock(CMatchFinder *p)
-+static void MatchFinder_MoveBlock(CMatchFinder *p)
- {
-   memmove(p->bufferBase,
-     p->buffer - p->keepSizeBefore,
-@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder
-   p->buffer = p->bufferBase + p->keepSizeBefore;
- }
- 
--int MatchFinder_NeedMove(CMatchFinder *p)
-+static int MatchFinder_NeedMove(CMatchFinder *p)
- {
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-     return 0;
-   /* if (p->streamEndWasReached) return 0; */
-   return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
- }
- 
--void MatchFinder_ReadIfRequired(CMatchFinder *p)
--{
--  if (p->streamEndWasReached)
--    return;
--  if (p->keepSizeAfter >= p->streamPos - p->pos)
--    MatchFinder_ReadBlock(p);
--}
--
- static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
- {
-   if (MatchFinder_NeedMove(p))
-@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch
-   p->posLimit = p->pos + limit;
- }
- 
--void MatchFinder_Init(CMatchFinder *p)
-+static void MatchFinder_Init(CMatchFinder *p)
- {
-   UInt32 i;
-   for (i = 0; i < p->hashSizeSum; i++)
-@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM
-   return (p->pos - p->historySize - 1) & kNormalizeMask;
- }
- 
--void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
-+static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
- {
-   UInt32 i;
-   for (i = 0; i < numItems; i++)
-@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat
-   MatchFinder_SetLimits(p);
- }
- 
--static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
--    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
--    UInt32 *distances, UInt32 maxLen)
--{
--  son[_cyclicBufferPos] = curMatch;
--  for (;;)
--  {
--    UInt32 delta = pos - curMatch;
--    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
--      return distances;
--    {
--      const Byte *pb = cur - delta;
--      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
--      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
--      {
--        UInt32 len = 0;
--        while (++len != lenLimit)
--          if (pb[len] != cur[len])
--            break;
--        if (maxLen < len)
--        {
--          *distances++ = maxLen = len;
--          *distances++ = delta - 1;
--          if (len == lenLimit)
--            return distances;
--        }
--      }
--    }
--  }
--}
--
--UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-     UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-     UInt32 *distances, UInt32 maxLen)
- {
-@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi
-   p->buffer++; \
-   if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
- 
--#define MOVE_POS_RET MOVE_POS return offset;
--
- static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
- 
-+#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
-+
- #define GET_MATCHES_HEADER2(minLen, ret_op) \
-   UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
-   lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
-@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi
-   distances + offset, maxLen) - distances); MOVE_POS_RET;
- 
- #define SKIP_FOOTER \
--  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
--
--static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(2)
--  HASH2_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = 0;
--  GET_MATCHES_FOOTER(offset, 1)
--}
--
--UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(3)
--  HASH_ZIP_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = 0;
--  GET_MATCHES_FOOTER(offset, 2)
--}
--
--static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 hash2Value, delta2, maxLen, offset;
--  GET_MATCHES_HEADER(3)
--
--  HASH3_CALC;
--
--  delta2 = p->pos - p->hash[hash2Value];
--  curMatch = p->hash[kFix3HashSize + hashValue];
--
--  p->hash[hash2Value] =
--  p->hash[kFix3HashSize + hashValue] = p->pos;
--
--
--  maxLen = 2;
--  offset = 0;
--  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
--  {
--    for (; maxLen != lenLimit; maxLen++)
--      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
--        break;
--    distances[0] = maxLen;
--    distances[1] = delta2 - 1;
--    offset = 2;
--    if (maxLen == lenLimit)
--    {
--      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
--      MOVE_POS_RET;
--    }
--  }
--  GET_MATCHES_FOOTER(offset, maxLen)
--}
-+  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
- 
- static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
- {
-@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches
-   GET_MATCHES_FOOTER(offset, maxLen)
- }
- 
--static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
--  GET_MATCHES_HEADER(4)
--
--  HASH4_CALC;
--
--  delta2 = p->pos - p->hash[                hash2Value];
--  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
--  curMatch = p->hash[kFix4HashSize + hashValue];
--
--  p->hash[                hash2Value] =
--  p->hash[kFix3HashSize + hash3Value] =
--  p->hash[kFix4HashSize + hashValue] = p->pos;
--
--  maxLen = 1;
--  offset = 0;
--  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
--  {
--    distances[0] = maxLen = 2;
--    distances[1] = delta2 - 1;
--    offset = 2;
--  }
--  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
--  {
--    maxLen = 3;
--    distances[offset + 1] = delta3 - 1;
--    offset += 2;
--    delta2 = delta3;
--  }
--  if (offset != 0)
--  {
--    for (; maxLen != lenLimit; maxLen++)
--      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
--        break;
--    distances[offset - 2] = maxLen;
--    if (maxLen == lenLimit)
--    {
--      p->son[p->cyclicBufferPos] = curMatch;
--      MOVE_POS_RET;
--    }
--  }
--  if (maxLen < 3)
--    maxLen = 3;
--  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
--    distances + offset, maxLen) - (distances));
--  MOVE_POS_RET
--}
--
--UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(3)
--  HASH_ZIP_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
--    distances, 2) - (distances));
--  MOVE_POS_RET
--}
--
--static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(2)
--    HASH2_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
--void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(3)
--    HASH_ZIP_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
--static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    UInt32 hash2Value;
--    SKIP_HEADER(3)
--    HASH3_CALC;
--    curMatch = p->hash[kFix3HashSize + hashValue];
--    p->hash[hash2Value] =
--    p->hash[kFix3HashSize + hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
- static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
- {
-   do
-@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF
-   while (--num != 0);
- }
- 
--static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    UInt32 hash2Value, hash3Value;
--    SKIP_HEADER(4)
--    HASH4_CALC;
--    curMatch = p->hash[kFix4HashSize + hashValue];
--    p->hash[                hash2Value] =
--    p->hash[kFix3HashSize + hash3Value] =
--    p->hash[kFix4HashSize + hashValue] = p->pos;
--    p->son[p->cyclicBufferPos] = curMatch;
--    MOVE_POS
--  }
--  while (--num != 0);
--}
--
--void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(3)
--    HASH_ZIP_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    p->son[p->cyclicBufferPos] = curMatch;
--    MOVE_POS
--  }
--  while (--num != 0);
--}
--
- void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
- {
-   vTable->Init = (Mf_Init_Func)MatchFinder_Init;
-   vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
-   vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
-   vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
--  if (!p->btMode)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
--  }
--  else if (p->numHashBytes == 2)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
--  }
--  else if (p->numHashBytes == 3)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
--  }
--  else
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
--  }
-+  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-+  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
- }
---- a/lib/lzma/LzmaDec.c
-+++ b/lib/lzma/LzmaDec.c
-@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p,
-   p->needFlush = 0;
- }
- 
--void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
-+static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
- {
-   p->needFlush = 1;
-   p->remainLen = 0;
-@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p
-     p->needInitState = 1;
- }
- 
--void LzmaDec_Init(CLzmaDec *p)
-+static void LzmaDec_Init(CLzmaDec *p)
- {
-   p->dicPos = 0;
-   LzmaDec_InitDicAndState(p, True, True);
-@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD
-   p->needInitState = 0;
- }
- 
--SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-+static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-     ELzmaFinishMode finishMode, ELzmaStatus *status)
- {
-   SizeT inSize = *srcLen;
-@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si
-   return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
- }
- 
--SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
--{
--  SizeT outSize = *destLen;
--  SizeT inSize = *srcLen;
--  *srcLen = *destLen = 0;
--  for (;;)
--  {
--    SizeT inSizeCur = inSize, outSizeCur, dicPos;
--    ELzmaFinishMode curFinishMode;
--    SRes res;
--    if (p->dicPos == p->dicBufSize)
--      p->dicPos = 0;
--    dicPos = p->dicPos;
--    if (outSize > p->dicBufSize - dicPos)
--    {
--      outSizeCur = p->dicBufSize;
--      curFinishMode = LZMA_FINISH_ANY;
--    }
--    else
--    {
--      outSizeCur = dicPos + outSize;
--      curFinishMode = finishMode;
--    }
--
--    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
--    src += inSizeCur;
--    inSize -= inSizeCur;
--    *srcLen += inSizeCur;
--    outSizeCur = p->dicPos - dicPos;
--    memcpy(dest, p->dic + dicPos, outSizeCur);
--    dest += outSizeCur;
--    outSize -= outSizeCur;
--    *destLen += outSizeCur;
--    if (res != 0)
--      return res;
--    if (outSizeCur == 0 || outSize == 0)
--      return SZ_OK;
--  }
--}
--
--void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
-+static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
- {
-   alloc->Free(alloc, p->probs);
-   p->probs = 0;
- }
- 
--static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
--{
--  alloc->Free(alloc, p->dic);
--  p->dic = 0;
--}
--
--void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
--{
--  LzmaDec_FreeProbs(p, alloc);
--  LzmaDec_FreeDict(p, alloc);
--}
--
--SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
-+static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
- {
-   UInt32 dicSize;
-   Byte d;
-@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma
-   return SZ_OK;
- }
- 
--SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
- {
-   CLzmaProps propNew;
-   RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p,
-   p->prop = propNew;
-   return SZ_OK;
- }
--
--SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
--{
--  CLzmaProps propNew;
--  SizeT dicBufSize;
--  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
--  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
--  dicBufSize = propNew.dicSize;
--  if (p->dic == 0 || dicBufSize != p->dicBufSize)
--  {
--    LzmaDec_FreeDict(p, alloc);
--    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
--    if (p->dic == 0)
--    {
--      LzmaDec_FreeProbs(p, alloc);
--      return SZ_ERROR_MEM;
--    }
--  }
--  p->dicBufSize = dicBufSize;
--  p->prop = propNew;
--  return SZ_OK;
--}
- 
- SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
-     const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
---- a/lib/lzma/LzmaEnc.c
-+++ b/lib/lzma/LzmaEnc.c
-@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p)
-   p->writeEndMark = 0;
- }
- 
--void LzmaEncProps_Normalize(CLzmaEncProps *p)
-+static void LzmaEncProps_Normalize(CLzmaEncProps *p)
- {
-   int level = p->level;
-   if (level < 0) level = 5;
-@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp
-       #endif
- }
- 
--UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
-+static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
- {
-   CLzmaEncProps props = *props2;
-   LzmaEncProps_Normalize(&props);
-@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL
- 
- #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
- 
--UInt32 GetPosSlot1(UInt32 pos)
-+static UInt32 GetPosSlot1(UInt32 pos)
- {
-   UInt32 res;
-   BSR2_RET(pos, res);
-@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos)
- #define kNumLogBits (9 + (int)sizeof(size_t) / 2)
- #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
- 
--void LzmaEnc_FastPosInit(Byte *g_FastPos)
-+static void LzmaEnc_FastPosInit(Byte *g_FastPos)
- {
-   int c = 2, slotFast;
-   g_FastPos[0] = 0;
-@@ -339,58 +339,6 @@ typedef struct
-   CSaveState saveState;
- } CLzmaEnc;
- 
--void LzmaEnc_SaveState(CLzmaEncHandle pp)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  CSaveState *dest = &p->saveState;
--  int i;
--  dest->lenEnc = p->lenEnc;
--  dest->repLenEnc = p->repLenEnc;
--  dest->state = p->state;
--
--  for (i = 0; i < kNumStates; i++)
--  {
--    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
--    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
--  }
--  for (i = 0; i < kNumLenToPosStates; i++)
--    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
--  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
--  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
--  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
--  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
--  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
--  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
--  memcpy(dest->reps, p->reps, sizeof(p->reps));
--  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
--}
--
--void LzmaEnc_RestoreState(CLzmaEncHandle pp)
--{
--  CLzmaEnc *dest = (CLzmaEnc *)pp;
--  const CSaveState *p = &dest->saveState;
--  int i;
--  dest->lenEnc = p->lenEnc;
--  dest->repLenEnc = p->repLenEnc;
--  dest->state = p->state;
--
--  for (i = 0; i < kNumStates; i++)
--  {
--    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
--    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
--  }
--  for (i = 0; i < kNumLenToPosStates; i++)
--    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
--  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
--  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
--  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
--  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
--  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
--  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
--  memcpy(dest->reps, p->reps, sizeof(p->reps));
--  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
--}
--
- SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE
-   while (symbol < 0x10000);
- }
- 
--void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
-+static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
- {
-   UInt32 i;
-   for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
-@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc
-   p->matchPriceCount = 0;
- }
- 
--void LzmaEnc_Construct(CLzmaEnc *p)
-+static void LzmaEnc_Construct(CLzmaEnc *p)
- {
-   RangeEnc_Construct(&p->rc);
-   MatchFinder_Construct(&p->matchFinderBase);
-@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
-   return p;
- }
- 
--void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
-+static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
- {
-   alloc->Free(alloc, p->litProbs);
-   alloc->Free(alloc, p->saveState.litProbs);
-@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl
-   p->saveState.litProbs = 0;
- }
- 
--void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
-+static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
- {
-   #ifndef _7ZIP_ST
-   MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
-@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U
-   return SZ_OK;
- }
- 
--void LzmaEnc_Init(CLzmaEnc *p)
-+static void LzmaEnc_Init(CLzmaEnc *p)
- {
-   UInt32 i;
-   p->state = 0;
-@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p)
-   p->lpMask = (1 << p->lp) - 1;
- }
- 
--void LzmaEnc_InitPrices(CLzmaEnc *p)
-+static void LzmaEnc_InitPrices(CLzmaEnc *p)
- {
-   if (!p->fastMode)
-   {
-@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn
-   return SZ_OK;
- }
- 
--static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  p->matchFinderBase.stream = inStream;
--  p->needInit = 1;
--  p->rc.outStream = outStream;
--  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
--}
--
--SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
--    ISeqInStream *inStream, UInt32 keepWindowSize,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  p->matchFinderBase.stream = inStream;
--  p->needInit = 1;
--  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
--}
--
- static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
- {
-   p->matchFinderBase.directInput = 1;
-@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc
-   p->matchFinderBase.directInputRem = srcLen;
- }
- 
--SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-+static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-     UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p
-   return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
- }
- 
--void LzmaEnc_Finish(CLzmaEncHandle pp)
-+static void LzmaEnc_Finish(CLzmaEncHandle pp)
- {
-   #ifndef _7ZIP_ST
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo
-   return size;
- }
- 
--
--UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
--{
--  const CLzmaEnc *p = (CLzmaEnc *)pp;
--  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
--}
--
--const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
--{
--  const CLzmaEnc *p = (CLzmaEnc *)pp;
--  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
--}
--
--SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
--    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  UInt64 nowPos64;
--  SRes res;
--  CSeqOutStreamBuf outStream;
--
--  outStream.funcTable.Write = MyWrite;
--  outStream.data = dest;
--  outStream.rem = *destLen;
--  outStream.overflow = False;
--
--  p->writeEndMark = False;
--  p->finished = False;
--  p->result = SZ_OK;
--
--  if (reInit)
--    LzmaEnc_Init(p);
--  LzmaEnc_InitPrices(p);
--  nowPos64 = p->nowPos64;
--  RangeEnc_Init(&p->rc);
--  p->rc.outStream = &outStream.funcTable;
--
--  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
--
--  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
--  *destLen -= outStream.rem;
--  if (outStream.overflow)
--    return SZ_ERROR_OUTPUT_EOF;
--
--  return res;
--}
--
- static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
- {
-   SRes res = SZ_OK;
-@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p,
-   return res;
- }
- 
--SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
--  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
--}
--
- SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp
-     return SZ_ERROR_OUTPUT_EOF;
-   return res;
- }
--
--SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
--    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
--  SRes res;
--  if (p == 0)
--    return SZ_ERROR_MEM;
--
--  res = LzmaEnc_SetProps(p, props);
--  if (res == SZ_OK)
--  {
--    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
--    if (res == SZ_OK)
--      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
--          writeEndMark, progress, alloc, allocBig);
--  }
--
--  LzmaEnc_Destroy(p, alloc, allocBig);
--  return res;
--}
diff --git a/target/linux/generic/hack-5.10/600-bridge_offload.patch b/target/linux/generic/hack-5.10/600-bridge_offload.patch
index b704c98dc8..82282627ea 100644
--- a/target/linux/generic/hack-5.10/600-bridge_offload.patch
+++ b/target/linux/generic/hack-5.10/600-bridge_offload.patch
@@ -1,3 +1,31 @@
+From: Felix Fietkau <nbd@nbd.name>
+Subject: bridge: Add a fast path for the bridge code
+
+This caches flows between MAC addresses on separate ports, including their VLAN
+in order to bypass the normal bridge forwarding code.
+In my test on MT7622, this reduces LAN->WLAN bridging CPU usage by 6-10%,
+potentially even more on weaker platforms
+
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+---
+ include/linux/if_bridge.h                     |   1 +
+ net/bridge/Makefile                           |   2 +-
+ net/bridge/br.c                               |   8 +++
+ net/bridge/br_device.c                        |   7 +++
+ net/bridge/br_forward.c                       |   3 ++
+ net/bridge/br_if.c                            |   7 ++-
+ net/bridge/br_input.c                         |   5 ++
+ net/bridge/br_offload.c                       | 436 +++++++++++++++
+ net/bridge/br_private.h                       |  22 ++++-
+ net/bridge/br_private_offload.h               |  21 +++++
+ net/bridge/br_stp.c                           |   3 +
+ net/bridge/br_sysfs_br.c                      |  35 ++++++
+ net/bridge/br_sysfs_if.c                      |   2 +
+ net/bridge/br_vlan_tunnel.c                   |   3 ++
+ 14 files changed, 552 insertions(+), 3 deletions(-)
+ create mode 100644 net/bridge/br_offload.c
+ create mode 100644 net/bridge/br_private_offload.h
+
 --- a/include/linux/if_bridge.h
 +++ b/include/linux/if_bridge.h
 @@ -57,6 +57,7 @@ struct br_ip_list {
diff --git a/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
index e69113d3c1..648134c6d0 100644
--- a/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
+++ b/target/linux/generic/hack-5.10/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
@@ -1,6 +1,35 @@
+From: DENG Qingfang <dqfext@gmail.com>
+Subject: DSA: roaming fix for Marvell mv88e6xxx
+
+Marvell mv88e6xxx switch series cannot perform MAC learning from
+CPU-injected (FROM_CPU) DSA frames, which results in 2 issues.
+- excessive flooding, due to the fact that DSA treats those addresses
+as unknown
+- the risk of stale routes, which can lead to temporary packet loss
+
+Backport those patch series from netdev mailing list, which solve these
+issues by adding and clearing static entries to the switch's FDB.
+
+Add a hack patch to set default VID to 1 in port_fdb_{add,del}. Otherwise
+the static entries will be added to the switch's private FDB if VLAN
+filtering disabled, which will not work.
+
+The switch may generate an "ATU violation" warning when a client moves
+from the CPU port to a switch port because the static ATU entry added by
+DSA core still points to the CPU port. DSA core will then clear the static
+entry so it is not fatal. Disable the warning so it will not confuse users.
+
+Link: https://lore.kernel.org/netdev/20210106095136.224739-1-olteanv@gmail.com/
+Link: https://lore.kernel.org/netdev/20210116012515.3152-1-tobias@waldekranz.com/
+Ref: https://gitlab.nic.cz/turris/turris-build/-/issues/165
+Submitted-by: DENG Qingfang <dqfext@gmail.com>
+---
+ drivers/net/dsa/mv88e6xxx/chip.c              | 3 +++
+ 3 files changed, 3 insertions(+)
+
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -2705,6 +2705,9 @@ static int mv88e6xxx_setup_port(struct m
+@@ -2709,6 +2709,9 @@ static int mv88e6xxx_setup_port(struct m
  	if (dsa_is_cpu_port(ds, port))
  		reg = 0;
  
diff --git a/target/linux/generic/hack-5.10/720-net-phy-add-aqr-phys.patch b/target/linux/generic/hack-5.10/720-net-phy-add-aqr-phys.patch
index f7dd2f7187..e90447e0cb 100644
--- a/target/linux/generic/hack-5.10/720-net-phy-add-aqr-phys.patch
+++ b/target/linux/generic/hack-5.10/720-net-phy-add-aqr-phys.patch
@@ -20,7 +20,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -343,6 +345,49 @@ static int aqr107_read_rate(struct phy_d
+@@ -352,6 +354,49 @@ static int aqr107_read_rate(struct phy_d
  	return 0;
  }
  
@@ -70,7 +70,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  static int aqr107_read_status(struct phy_device *phydev)
  {
  	int val, ret;
-@@ -473,7 +518,7 @@ static void aqr107_chip_info(struct phy_
+@@ -482,7 +527,7 @@ static void aqr107_chip_info(struct phy_
  	build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);
  	prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);
  
@@ -79,7 +79,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  		   fw_major, fw_minor, build_id, prov_id);
  }
  
-@@ -645,6 +690,24 @@ static struct phy_driver aqr_driver[] =
+@@ -690,6 +735,24 @@ static struct phy_driver aqr_driver[] =
  	.link_change_notify = aqr107_link_change_notify,
  },
  {
@@ -104,7 +104,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  	PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
  	.name		= "Aquantia AQCS109",
  	.probe		= aqr107_probe,
-@@ -670,6 +733,24 @@ static struct phy_driver aqr_driver[] =
+@@ -715,6 +778,24 @@ static struct phy_driver aqr_driver[] =
  	.ack_interrupt	= aqr_ack_interrupt,
  	.read_status	= aqr_read_status,
  },
@@ -129,7 +129,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  };
  
  module_phy_driver(aqr_driver);
-@@ -680,8 +761,10 @@ static struct mdio_device_id __maybe_unu
+@@ -725,8 +806,10 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
diff --git a/target/linux/generic/hack-5.10/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-5.10/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index ae85a21f97..42bf8951d6 100644
--- a/target/linux/generic/hack-5.10/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-5.10/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -27,9 +27,9 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  #define PHY_ID_AQR813	0x31c31cb2
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
-@@ -125,6 +127,29 @@
- #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2	BIT(1)
- #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3	BIT(0)
+@@ -134,6 +136,29 @@
+ #define AQR107_OP_IN_PROG_SLEEP		1000
+ #define AQR107_OP_IN_PROG_TIMEOUT	100000
  
 +/* registers in MDIO_MMD_VEND1 region */
 +#define AQUANTIA_VND1_GLOBAL_SC			0x000
@@ -57,7 +57,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  struct aqr107_hw_stat {
  	const char *name;
  	int reg;
-@@ -256,6 +281,51 @@ static int aqr_config_aneg(struct phy_de
+@@ -265,6 +290,51 @@ static int aqr_config_aneg(struct phy_de
  	return genphy_c45_check_and_restart_aneg(phydev, changed);
  }
  
@@ -109,7 +109,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -751,6 +821,30 @@ static struct phy_driver aqr_driver[] =
+@@ -796,6 +866,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  	.link_change_notify = aqr107_link_change_notify,
  },
@@ -140,7 +140,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  };
  
  module_phy_driver(aqr_driver);
-@@ -761,9 +855,11 @@ static struct mdio_device_id __maybe_unu
+@@ -806,9 +900,11 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
diff --git a/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
index 5ce07c9aa4..c65f273a8a 100644
--- a/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
+++ b/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
@@ -14,7 +14,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
 
 --- a/drivers/net/phy/aquantia_main.c
 +++ b/drivers/net/phy/aquantia_main.c
-@@ -314,10 +314,16 @@ static int aqr_config_aneg_set_prot(stru
+@@ -323,10 +323,16 @@ static int aqr_config_aneg_set_prot(stru
  	phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
  		      aquantia_syscfg[if_type].start_rate);
  
diff --git a/target/linux/generic/hack-5.10/724-net-phy-aquantia-Add-AQR113-driver-support.patch b/target/linux/generic/hack-5.10/724-net-phy-aquantia-Add-AQR113-driver-support.patch
index 5d7213957e..8fd3b018b4 100644
--- a/target/linux/generic/hack-5.10/724-net-phy-aquantia-Add-AQR113-driver-support.patch
+++ b/target/linux/generic/hack-5.10/724-net-phy-aquantia-Add-AQR113-driver-support.patch
@@ -18,7 +18,7 @@ Add a new entry for AQR113 PHY_ID
  #define PHY_ID_AQR113C	0x31c31c12
  #define PHY_ID_AQCS109	0x03a1b5c2
  #define PHY_ID_AQR405	0x03a1b4b0
-@@ -840,6 +841,14 @@ static struct phy_driver aqr_driver[] =
+@@ -885,6 +886,14 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  },
  {
@@ -33,7 +33,7 @@ Add a new entry for AQR113 PHY_ID
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
  	.name		= "Aquantia AQR412",
  	.probe		= aqr107_probe,
-@@ -862,6 +871,7 @@ static struct mdio_device_id __maybe_unu
+@@ -907,6 +916,7 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
diff --git a/target/linux/generic/hack-5.10/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-5.10/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index a307a8f399..f2db552a1e 100644
--- a/target/linux/generic/hack-5.10/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-5.10/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  #define PHY_ID_AQR113	0x31c31c40
  #define PHY_ID_AQR113C	0x31c31c12
  #define PHY_ID_AQCS109	0x03a1b5c2
-@@ -841,6 +843,30 @@ static struct phy_driver aqr_driver[] =
+@@ -886,6 +888,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  },
  {
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR113),
  	.name		= "Aquantia AQR113",
  	.config_aneg	= aqr_config_aneg,
-@@ -871,6 +897,8 @@ static struct mdio_device_id __maybe_unu
+@@ -916,6 +942,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
diff --git a/target/linux/generic/hack-5.10/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.10/780-usb-net-MeigLink_modem_support.patch
index 0c0739e7eb..36fc383dc1 100644
--- a/target/linux/generic/hack-5.10/780-usb-net-MeigLink_modem_support.patch
+++ b/target/linux/generic/hack-5.10/780-usb-net-MeigLink_modem_support.patch
@@ -1,9 +1,23 @@
+From: Daniel Golle <daniel@makrotopia.org>
+Subject: wwan: Add MeigLink SLM750 modem support
+
+Add patch found in Teltonika RUT9_R_00.07.01.4 GPL SDK download[1]
+adding USB IDs of the MeigLink SLM750 to the relevant kernel drivers.
+Newer versions of Teltonika's 2G/3G/4G RUT9XX WWAN router series come
+with this kind of modem.
+
+[1]: https://wiki.teltonika-networks.com/view/GPL
+Submitted-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/usb/qmi_wwan.c                    | 8 ++++++
+ 1 file changed, 8 insertions(+)
+
 --- a/drivers/net/usb/qmi_wwan.c
 +++ b/drivers/net/usb/qmi_wwan.c
-@@ -1024,6 +1024,7 @@ static const struct usb_device_id produc
- 	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0512)},	/* Quectel EG12/EM12 */
+@@ -1025,6 +1025,7 @@ static const struct usb_device_id produc
  	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)},	/* Quectel EM160R-GL */
  	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)},	/* Quectel RM500Q-GL */
+ 	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0801)},	/* Quectel RM520N */
 +	{QMI_MATCH_FF_FF_FF(0x05c6, 0xf601)},   /* MeigLink SLM750 */
  
  	/* 3. Combined interface devices matching on interface number */
@@ -19,8 +33,8 @@
  
  #define QUECTEL_VENDOR_ID			0x2c7c
  /* These Quectel products use Quectel's vendor ID */
-@@ -1140,6 +1142,11 @@ static const struct usb_device_id option
- 	{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) },
+@@ -1143,6 +1145,11 @@ static const struct usb_device_id option
+ 	  .driver_info = ZLP },
  	{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
  	  .driver_info = RSVD(4) },
 +	/* Meiglink products using Qualcomm vendor ID */
diff --git a/target/linux/generic/hack-5.10/800-ubnt-ledbar-driver.patch b/target/linux/generic/hack-5.10/800-ubnt-ledbar-driver.patch
deleted file mode 100644
index 2b4baab456..0000000000
--- a/target/linux/generic/hack-5.10/800-ubnt-ledbar-driver.patch
+++ /dev/null
@@ -1,29 +0,0 @@
---- a/drivers/leds/Kconfig
-+++ b/drivers/leds/Kconfig
-@@ -931,6 +931,16 @@ config LEDS_ACER_A500
- 
- source "drivers/leds/blink/Kconfig"
- 
-+config LEDS_UBNT_LEDBAR
-+	tristate "LED support for Ubiquiti UniFi 6 LR"
-+	depends on LEDS_CLASS && I2C && OF
-+	help
-+	  This option enables support for the Ubiquiti LEDBAR
-+	  LED driver.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called leds-ubnt-ledbar.
-+
- comment "LED Triggers"
- source "drivers/leds/trigger/Kconfig"
- 
---- a/drivers/leds/Makefile
-+++ b/drivers/leds/Makefile
-@@ -93,6 +93,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
- obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
- obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
- obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
-+obj-$(CONFIG_LEDS_UBNT_LEDBAR)		+= leds-ubnt-ledbar.o
- 
- # LED SPI Drivers
- obj-$(CONFIG_LEDS_CR0014114)		+= leds-cr0014114.o
diff --git a/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch b/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch
index 247b50d536..5302c793de 100644
--- a/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch
+++ b/target/linux/generic/hack-5.10/901-debloat_sock_diag.patch
@@ -33,7 +33,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  obj-y		     += dev.o dev_addr_lists.o dst.o netevent.o \
  			neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
 -			sock_diag.o dev_ioctl.o tso.o sock_reuseport.o \
-+ 			dev_ioctl.o tso.o sock_reuseport.o \
++			dev_ioctl.o tso.o sock_reuseport.o \
  			fib_notifier.o xdp.o flow_offload.o
  
 +obj-$(CONFIG_SOCK_DIAG) += sock_diag.o
diff --git a/target/linux/generic/hack-5.10/920-device_tree_cmdline.patch b/target/linux/generic/hack-5.10/920-device_tree_cmdline.patch
index 27d4d7f1e5..17d3f2ffd5 100644
--- a/target/linux/generic/hack-5.10/920-device_tree_cmdline.patch
+++ b/target/linux/generic/hack-5.10/920-device_tree_cmdline.patch
@@ -1,3 +1,19 @@
+From a9968d9cb8cb10030491fa05e24b00bd42f6d3a9 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@openwrt.org>
+Date: Thu, 30 May 2013 16:00:42 +0000
+Subject: fdt: enable retrieving kernel args from bootloader
+
+This patch is a device tree enhancement that IMHO is worthy of mainline.
+It allows the bootloader's commandline to be preserved even when the
+device tree specifies one.
+
+Submitted-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+
+SVN-Revision: 36780
+---
+ drivers/of/fdt.c                                     | 3 +++
+ 1 file changed, 3 insertions(+)
+
 --- a/drivers/of/fdt.c
 +++ b/drivers/of/fdt.c
 @@ -1055,6 +1055,9 @@ int __init early_init_dt_scan_chosen(uns
diff --git a/target/linux/generic/hack-5.15/221-module_exports.patch b/target/linux/generic/hack-5.15/221-module_exports.patch
index 204027d769..af21a2db8b 100644
--- a/target/linux/generic/hack-5.15/221-module_exports.patch
+++ b/target/linux/generic/hack-5.15/221-module_exports.patch
@@ -56,7 +56,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	}								\
  									\
  	/* __*init sections */						\
-@@ -1018,6 +1028,8 @@
+@@ -1017,6 +1027,8 @@
  
  #define COMMON_DISCARDS							\
  	SANITIZER_DISCARDS						\
diff --git a/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch
deleted file mode 100644
index 5e154004d0..0000000000
--- a/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch
+++ /dev/null
@@ -1,20 +0,0 @@
-From 4487708144118bfd5e1b1da7003a486951fb9c5a Mon Sep 17 00:00:00 2001
-From: OpenWrt community <openwrt-devel@lists.openwrt.org>
-Date: Wed, 13 Jul 2022 13:31:51 +0200
-Subject: [PATCH] net/ipv4: add udp tunnel tristate string
-
----
- net/ipv4/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/net/ipv4/Kconfig
-+++ b/net/ipv4/Kconfig
-@@ -315,7 +315,7 @@ config NET_IPVTI
- 	  on top.
- 
- config NET_UDP_TUNNEL
--	tristate
-+	tristate "IP: UDP tunneling support"
- 	select NET_IP_TUNNEL
- 	default n
- 
diff --git a/target/linux/generic/hack-5.15/252-SATA_PMP.patch b/target/linux/generic/hack-5.15/252-SATA_PMP.patch
deleted file mode 100644
index 6502d1d6ed..0000000000
--- a/target/linux/generic/hack-5.15/252-SATA_PMP.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 8c817e33be829c7249c2cfd59ff48ad5fac6a31d Mon Sep 17 00:00:00 2001
-From: Sungbo Eo <mans0n@gorani.run>
-Date: Fri, 7 Jul 2017 17:09:21 +0200
-Subject: [PATCH] kconfig: solidify SATA_PMP config
-
-SATA_PMP option in kernel config file disappears for every kernel_oldconfig refresh.
-To prevent this, SATA_HOST is now selected automatically when SATA_PMP is enabled.
-This patch can be dropped if SATA_MV is ever re-added into the config.
----
- drivers/ata/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/ata/Kconfig
-+++ b/drivers/ata/Kconfig
-@@ -112,7 +112,7 @@ config SATA_ZPODD
- 
- config SATA_PMP
- 	bool "SATA Port Multiplier support"
--	depends on SATA_HOST
-+	select SATA_HOST
- 	default y
- 	help
- 	  This option adds support for SATA Port Multipliers
diff --git a/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch b/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
index 011f790fa7..eaba093376 100644
--- a/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
+++ b/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
@@ -77,7 +77,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  
  #include "mtdcore.h"
  
-@@ -1073,6 +1074,8 @@ int mtd_device_parse_register(struct mtd
+@@ -1075,6 +1076,8 @@ int mtd_device_parse_register(struct mtd
  
  	ret = mtd_otp_nvmem_add(mtd);
  
diff --git a/target/linux/generic/hack-5.15/420-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/hack-5.15/420-mtd-set-rootfs-to-be-root-dev.patch
index 90254c63bf..8bf8288bbd 100644
--- a/target/linux/generic/hack-5.15/420-mtd-set-rootfs-to-be-root-dev.patch
+++ b/target/linux/generic/hack-5.15/420-mtd-set-rootfs-to-be-root-dev.patch
@@ -20,7 +20,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  #include <linux/nvmem-provider.h>
  
  #include <linux/mtd/mtd.h>
-@@ -768,6 +769,16 @@ int add_mtd_device(struct mtd_info *mtd)
+@@ -770,6 +771,16 @@ int add_mtd_device(struct mtd_info *mtd)
  	   of this try_ nonsense, and no bitching about it
  	   either. :) */
  	__module_get(THIS_MODULE);
diff --git a/target/linux/generic/hack-5.15/531-debloat_lzma.patch b/target/linux/generic/hack-5.15/531-debloat_lzma.patch
deleted file mode 100644
index 2f70eee3e9..0000000000
--- a/target/linux/generic/hack-5.15/531-debloat_lzma.patch
+++ /dev/null
@@ -1,1040 +0,0 @@
-From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@nbd.name>
-Date: Sat, 15 Jul 2017 21:15:44 +0200
-Subject: lzma: de-bloat the lzma library used by jffs2
-
-lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6
-Signed-off-by: Felix Fietkau <nbd@nbd.name>
----
- include/linux/lzma/LzFind.h  |  17 ---
- include/linux/lzma/LzmaDec.h | 101 ---------------
- include/linux/lzma/LzmaEnc.h |  20 ---
- lib/lzma/LzFind.c            | 287 ++++---------------------------------------
- lib/lzma/LzmaDec.c           |  86 +------------
- lib/lzma/LzmaEnc.c           | 172 ++------------------------
- 6 files changed, 42 insertions(+), 641 deletions(-)
-
---- a/include/linux/lzma/LzFind.h
-+++ b/include/linux/lzma/LzFind.h
-@@ -55,11 +55,6 @@ typedef struct _CMatchFinder
- 
- #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
- 
--int MatchFinder_NeedMove(CMatchFinder *p);
--Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
--void MatchFinder_MoveBlock(CMatchFinder *p);
--void MatchFinder_ReadIfRequired(CMatchFinder *p);
--
- void MatchFinder_Construct(CMatchFinder *p);
- 
- /* Conditions:
-@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p,
-     UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
-     ISzAlloc *alloc);
- void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
--void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
--void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
--
--UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
--    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
--    UInt32 *distances, UInt32 maxLen);
- 
- /*
- Conditions:
-@@ -102,12 +91,6 @@ typedef struct _IMatchFinder
- 
- void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
- 
--void MatchFinder_Init(CMatchFinder *p);
--UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
--UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
--void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
--void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
--
- #ifdef __cplusplus
- }
- #endif
---- a/include/linux/lzma/LzmaDec.h
-+++ b/include/linux/lzma/LzmaDec.h
-@@ -31,14 +31,6 @@ typedef struct _CLzmaProps
-   UInt32 dicSize;
- } CLzmaProps;
- 
--/* LzmaProps_Decode - decodes properties
--Returns:
--  SZ_OK
--  SZ_ERROR_UNSUPPORTED - Unsupported properties
--*/
--
--SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
--
- 
- /* ---------- LZMA Decoder state ---------- */
- 
-@@ -70,8 +62,6 @@ typedef struct
- 
- #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
- 
--void LzmaDec_Init(CLzmaDec *p);
--
- /* There are two types of LZMA streams:
-      0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
-      1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
-@@ -108,97 +98,6 @@ typedef enum
- 
- /* ELzmaStatus is used only as output value for function call */
- 
--
--/* ---------- Interfaces ---------- */
--
--/* There are 3 levels of interfaces:
--     1) Dictionary Interface
--     2) Buffer Interface
--     3) One Call Interface
--   You can select any of these interfaces, but don't mix functions from different
--   groups for same object. */
--
--
--/* There are two variants to allocate state for Dictionary Interface:
--     1) LzmaDec_Allocate / LzmaDec_Free
--     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
--   You can use variant 2, if you set dictionary buffer manually.
--   For Buffer Interface you must always use variant 1.
--
--LzmaDec_Allocate* can return:
--  SZ_OK
--  SZ_ERROR_MEM         - Memory allocation error
--  SZ_ERROR_UNSUPPORTED - Unsupported properties
--*/
--
--SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
--void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
--
--SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
--void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
--
--/* ---------- Dictionary Interface ---------- */
--
--/* You can use it, if you want to eliminate the overhead for data copying from
--   dictionary to some other external buffer.
--   You must work with CLzmaDec variables directly in this interface.
--
--   STEPS:
--     LzmaDec_Constr()
--     LzmaDec_Allocate()
--     for (each new stream)
--     {
--       LzmaDec_Init()
--       while (it needs more decompression)
--       {
--         LzmaDec_DecodeToDic()
--         use data from CLzmaDec::dic and update CLzmaDec::dicPos
--       }
--     }
--     LzmaDec_Free()
--*/
--
--/* LzmaDec_DecodeToDic
--
--   The decoding to internal dictionary buffer (CLzmaDec::dic).
--   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
--
--finishMode:
--  It has meaning only if the decoding reaches output limit (dicLimit).
--  LZMA_FINISH_ANY - Decode just dicLimit bytes.
--  LZMA_FINISH_END - Stream must be finished after dicLimit.
--
--Returns:
--  SZ_OK
--    status:
--      LZMA_STATUS_FINISHED_WITH_MARK
--      LZMA_STATUS_NOT_FINISHED
--      LZMA_STATUS_NEEDS_MORE_INPUT
--      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
--  SZ_ERROR_DATA - Data error
--*/
--
--SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
--    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
--
--
--/* ---------- Buffer Interface ---------- */
--
--/* It's zlib-like interface.
--   See LzmaDec_DecodeToDic description for information about STEPS and return results,
--   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
--   to work with CLzmaDec variables manually.
--
--finishMode:
--  It has meaning only if the decoding reaches output limit (*destLen).
--  LZMA_FINISH_ANY - Decode just destLen bytes.
--  LZMA_FINISH_END - Stream must be finished after (*destLen).
--*/
--
--SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
--    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
--
--
- /* ---------- One Call Interface ---------- */
- 
- /* LzmaDecode
---- a/include/linux/lzma/LzmaEnc.h
-+++ b/include/linux/lzma/LzmaEnc.h
-@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps
- } CLzmaEncProps;
- 
- void LzmaEncProps_Init(CLzmaEncProps *p);
--void LzmaEncProps_Normalize(CLzmaEncProps *p);
--UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
--
- 
- /* ---------- CLzmaEncHandle Interface ---------- */
- 
-@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
- void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
- SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
- SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
--SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
- SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-     int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
- 
--/* ---------- One Call Interface ---------- */
--
--/* LzmaEncode
--Return code:
--  SZ_OK               - OK
--  SZ_ERROR_MEM        - Memory allocation error
--  SZ_ERROR_PARAM      - Incorrect paramater
--  SZ_ERROR_OUTPUT_EOF - output buffer overflow
--  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
--*/
--
--SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
--    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
--
- #ifdef __cplusplus
- }
- #endif
---- a/lib/lzma/LzFind.c
-+++ b/lib/lzma/LzFind.c
-@@ -14,9 +14,15 @@
- 
- #define kStartMaxLen 3
- 
-+#if 0
-+#define DIRECT_INPUT	p->directInput
-+#else
-+#define DIRECT_INPUT	1
-+#endif
-+
- static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
- {
--  if (!p->directInput)
-+  if (!DIRECT_INPUT)
-   {
-     alloc->Free(alloc, p->bufferBase);
-     p->bufferBase = 0;
-@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder
- static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
- {
-   UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-   {
-     p->blockSize = blockSize;
-     return 1;
-@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde
-   return (p->bufferBase != 0);
- }
- 
--Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
--Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
-+static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-+static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
- 
--UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
-+static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
- 
--void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
-+static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
- {
-   p->posLimit -= subValue;
-   p->pos -= subValue;
-@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch
- {
-   if (p->streamEndWasReached || p->result != SZ_OK)
-     return;
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-   {
-     UInt32 curSize = 0xFFFFFFFF - p->streamPos;
-     if (curSize > p->directInputRem)
-@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch
-   }
- }
- 
--void MatchFinder_MoveBlock(CMatchFinder *p)
-+static void MatchFinder_MoveBlock(CMatchFinder *p)
- {
-   memmove(p->bufferBase,
-     p->buffer - p->keepSizeBefore,
-@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder
-   p->buffer = p->bufferBase + p->keepSizeBefore;
- }
- 
--int MatchFinder_NeedMove(CMatchFinder *p)
-+static int MatchFinder_NeedMove(CMatchFinder *p)
- {
--  if (p->directInput)
-+  if (DIRECT_INPUT)
-     return 0;
-   /* if (p->streamEndWasReached) return 0; */
-   return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
- }
- 
--void MatchFinder_ReadIfRequired(CMatchFinder *p)
--{
--  if (p->streamEndWasReached)
--    return;
--  if (p->keepSizeAfter >= p->streamPos - p->pos)
--    MatchFinder_ReadBlock(p);
--}
--
- static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
- {
-   if (MatchFinder_NeedMove(p))
-@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch
-   p->posLimit = p->pos + limit;
- }
- 
--void MatchFinder_Init(CMatchFinder *p)
-+static void MatchFinder_Init(CMatchFinder *p)
- {
-   UInt32 i;
-   for (i = 0; i < p->hashSizeSum; i++)
-@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM
-   return (p->pos - p->historySize - 1) & kNormalizeMask;
- }
- 
--void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
-+static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
- {
-   UInt32 i;
-   for (i = 0; i < numItems; i++)
-@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat
-   MatchFinder_SetLimits(p);
- }
- 
--static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
--    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
--    UInt32 *distances, UInt32 maxLen)
--{
--  son[_cyclicBufferPos] = curMatch;
--  for (;;)
--  {
--    UInt32 delta = pos - curMatch;
--    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
--      return distances;
--    {
--      const Byte *pb = cur - delta;
--      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
--      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
--      {
--        UInt32 len = 0;
--        while (++len != lenLimit)
--          if (pb[len] != cur[len])
--            break;
--        if (maxLen < len)
--        {
--          *distances++ = maxLen = len;
--          *distances++ = delta - 1;
--          if (len == lenLimit)
--            return distances;
--        }
--      }
--    }
--  }
--}
--
--UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-     UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-     UInt32 *distances, UInt32 maxLen)
- {
-@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi
-   p->buffer++; \
-   if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
- 
--#define MOVE_POS_RET MOVE_POS return offset;
--
- static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
- 
-+#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
-+
- #define GET_MATCHES_HEADER2(minLen, ret_op) \
-   UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
-   lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
-@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi
-   distances + offset, maxLen) - distances); MOVE_POS_RET;
- 
- #define SKIP_FOOTER \
--  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
--
--static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(2)
--  HASH2_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = 0;
--  GET_MATCHES_FOOTER(offset, 1)
--}
--
--UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(3)
--  HASH_ZIP_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = 0;
--  GET_MATCHES_FOOTER(offset, 2)
--}
--
--static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 hash2Value, delta2, maxLen, offset;
--  GET_MATCHES_HEADER(3)
--
--  HASH3_CALC;
--
--  delta2 = p->pos - p->hash[hash2Value];
--  curMatch = p->hash[kFix3HashSize + hashValue];
--
--  p->hash[hash2Value] =
--  p->hash[kFix3HashSize + hashValue] = p->pos;
--
--
--  maxLen = 2;
--  offset = 0;
--  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
--  {
--    for (; maxLen != lenLimit; maxLen++)
--      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
--        break;
--    distances[0] = maxLen;
--    distances[1] = delta2 - 1;
--    offset = 2;
--    if (maxLen == lenLimit)
--    {
--      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
--      MOVE_POS_RET;
--    }
--  }
--  GET_MATCHES_FOOTER(offset, maxLen)
--}
-+  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
- 
- static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
- {
-@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches
-   GET_MATCHES_FOOTER(offset, maxLen)
- }
- 
--static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
--  GET_MATCHES_HEADER(4)
--
--  HASH4_CALC;
--
--  delta2 = p->pos - p->hash[                hash2Value];
--  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
--  curMatch = p->hash[kFix4HashSize + hashValue];
--
--  p->hash[                hash2Value] =
--  p->hash[kFix3HashSize + hash3Value] =
--  p->hash[kFix4HashSize + hashValue] = p->pos;
--
--  maxLen = 1;
--  offset = 0;
--  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
--  {
--    distances[0] = maxLen = 2;
--    distances[1] = delta2 - 1;
--    offset = 2;
--  }
--  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
--  {
--    maxLen = 3;
--    distances[offset + 1] = delta3 - 1;
--    offset += 2;
--    delta2 = delta3;
--  }
--  if (offset != 0)
--  {
--    for (; maxLen != lenLimit; maxLen++)
--      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
--        break;
--    distances[offset - 2] = maxLen;
--    if (maxLen == lenLimit)
--    {
--      p->son[p->cyclicBufferPos] = curMatch;
--      MOVE_POS_RET;
--    }
--  }
--  if (maxLen < 3)
--    maxLen = 3;
--  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
--    distances + offset, maxLen) - (distances));
--  MOVE_POS_RET
--}
--
--UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
--{
--  UInt32 offset;
--  GET_MATCHES_HEADER(3)
--  HASH_ZIP_CALC;
--  curMatch = p->hash[hashValue];
--  p->hash[hashValue] = p->pos;
--  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
--    distances, 2) - (distances));
--  MOVE_POS_RET
--}
--
--static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(2)
--    HASH2_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
--void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(3)
--    HASH_ZIP_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
--static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    UInt32 hash2Value;
--    SKIP_HEADER(3)
--    HASH3_CALC;
--    curMatch = p->hash[kFix3HashSize + hashValue];
--    p->hash[hash2Value] =
--    p->hash[kFix3HashSize + hashValue] = p->pos;
--    SKIP_FOOTER
--  }
--  while (--num != 0);
--}
--
- static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
- {
-   do
-@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF
-   while (--num != 0);
- }
- 
--static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    UInt32 hash2Value, hash3Value;
--    SKIP_HEADER(4)
--    HASH4_CALC;
--    curMatch = p->hash[kFix4HashSize + hashValue];
--    p->hash[                hash2Value] =
--    p->hash[kFix3HashSize + hash3Value] =
--    p->hash[kFix4HashSize + hashValue] = p->pos;
--    p->son[p->cyclicBufferPos] = curMatch;
--    MOVE_POS
--  }
--  while (--num != 0);
--}
--
--void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
--{
--  do
--  {
--    SKIP_HEADER(3)
--    HASH_ZIP_CALC;
--    curMatch = p->hash[hashValue];
--    p->hash[hashValue] = p->pos;
--    p->son[p->cyclicBufferPos] = curMatch;
--    MOVE_POS
--  }
--  while (--num != 0);
--}
--
- void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
- {
-   vTable->Init = (Mf_Init_Func)MatchFinder_Init;
-   vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
-   vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
-   vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
--  if (!p->btMode)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
--  }
--  else if (p->numHashBytes == 2)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
--  }
--  else if (p->numHashBytes == 3)
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
--  }
--  else
--  {
--    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
--    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
--  }
-+  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-+  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
- }
---- a/lib/lzma/LzmaDec.c
-+++ b/lib/lzma/LzmaDec.c
-@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p,
-   p->needFlush = 0;
- }
- 
--void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
-+static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
- {
-   p->needFlush = 1;
-   p->remainLen = 0;
-@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p
-     p->needInitState = 1;
- }
- 
--void LzmaDec_Init(CLzmaDec *p)
-+static void LzmaDec_Init(CLzmaDec *p)
- {
-   p->dicPos = 0;
-   LzmaDec_InitDicAndState(p, True, True);
-@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD
-   p->needInitState = 0;
- }
- 
--SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-+static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
-     ELzmaFinishMode finishMode, ELzmaStatus *status)
- {
-   SizeT inSize = *srcLen;
-@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si
-   return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
- }
- 
--SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
--{
--  SizeT outSize = *destLen;
--  SizeT inSize = *srcLen;
--  *srcLen = *destLen = 0;
--  for (;;)
--  {
--    SizeT inSizeCur = inSize, outSizeCur, dicPos;
--    ELzmaFinishMode curFinishMode;
--    SRes res;
--    if (p->dicPos == p->dicBufSize)
--      p->dicPos = 0;
--    dicPos = p->dicPos;
--    if (outSize > p->dicBufSize - dicPos)
--    {
--      outSizeCur = p->dicBufSize;
--      curFinishMode = LZMA_FINISH_ANY;
--    }
--    else
--    {
--      outSizeCur = dicPos + outSize;
--      curFinishMode = finishMode;
--    }
--
--    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
--    src += inSizeCur;
--    inSize -= inSizeCur;
--    *srcLen += inSizeCur;
--    outSizeCur = p->dicPos - dicPos;
--    memcpy(dest, p->dic + dicPos, outSizeCur);
--    dest += outSizeCur;
--    outSize -= outSizeCur;
--    *destLen += outSizeCur;
--    if (res != 0)
--      return res;
--    if (outSizeCur == 0 || outSize == 0)
--      return SZ_OK;
--  }
--}
--
--void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
-+static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
- {
-   alloc->Free(alloc, p->probs);
-   p->probs = 0;
- }
- 
--static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
--{
--  alloc->Free(alloc, p->dic);
--  p->dic = 0;
--}
--
--void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
--{
--  LzmaDec_FreeProbs(p, alloc);
--  LzmaDec_FreeDict(p, alloc);
--}
--
--SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
-+static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
- {
-   UInt32 dicSize;
-   Byte d;
-@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma
-   return SZ_OK;
- }
- 
--SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
- {
-   CLzmaProps propNew;
-   RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p,
-   p->prop = propNew;
-   return SZ_OK;
- }
--
--SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
--{
--  CLzmaProps propNew;
--  SizeT dicBufSize;
--  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
--  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
--  dicBufSize = propNew.dicSize;
--  if (p->dic == 0 || dicBufSize != p->dicBufSize)
--  {
--    LzmaDec_FreeDict(p, alloc);
--    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
--    if (p->dic == 0)
--    {
--      LzmaDec_FreeProbs(p, alloc);
--      return SZ_ERROR_MEM;
--    }
--  }
--  p->dicBufSize = dicBufSize;
--  p->prop = propNew;
--  return SZ_OK;
--}
- 
- SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
-     const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
---- a/lib/lzma/LzmaEnc.c
-+++ b/lib/lzma/LzmaEnc.c
-@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p)
-   p->writeEndMark = 0;
- }
- 
--void LzmaEncProps_Normalize(CLzmaEncProps *p)
-+static void LzmaEncProps_Normalize(CLzmaEncProps *p)
- {
-   int level = p->level;
-   if (level < 0) level = 5;
-@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp
-       #endif
- }
- 
--UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
-+static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
- {
-   CLzmaEncProps props = *props2;
-   LzmaEncProps_Normalize(&props);
-@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL
- 
- #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
- 
--UInt32 GetPosSlot1(UInt32 pos)
-+static UInt32 GetPosSlot1(UInt32 pos)
- {
-   UInt32 res;
-   BSR2_RET(pos, res);
-@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos)
- #define kNumLogBits (9 + (int)sizeof(size_t) / 2)
- #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
- 
--void LzmaEnc_FastPosInit(Byte *g_FastPos)
-+static void LzmaEnc_FastPosInit(Byte *g_FastPos)
- {
-   int c = 2, slotFast;
-   g_FastPos[0] = 0;
-@@ -339,58 +339,6 @@ typedef struct
-   CSaveState saveState;
- } CLzmaEnc;
- 
--void LzmaEnc_SaveState(CLzmaEncHandle pp)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  CSaveState *dest = &p->saveState;
--  int i;
--  dest->lenEnc = p->lenEnc;
--  dest->repLenEnc = p->repLenEnc;
--  dest->state = p->state;
--
--  for (i = 0; i < kNumStates; i++)
--  {
--    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
--    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
--  }
--  for (i = 0; i < kNumLenToPosStates; i++)
--    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
--  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
--  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
--  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
--  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
--  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
--  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
--  memcpy(dest->reps, p->reps, sizeof(p->reps));
--  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
--}
--
--void LzmaEnc_RestoreState(CLzmaEncHandle pp)
--{
--  CLzmaEnc *dest = (CLzmaEnc *)pp;
--  const CSaveState *p = &dest->saveState;
--  int i;
--  dest->lenEnc = p->lenEnc;
--  dest->repLenEnc = p->repLenEnc;
--  dest->state = p->state;
--
--  for (i = 0; i < kNumStates; i++)
--  {
--    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
--    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
--  }
--  for (i = 0; i < kNumLenToPosStates; i++)
--    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
--  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
--  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
--  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
--  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
--  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
--  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
--  memcpy(dest->reps, p->reps, sizeof(p->reps));
--  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
--}
--
- SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE
-   while (symbol < 0x10000);
- }
- 
--void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
-+static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
- {
-   UInt32 i;
-   for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
-@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc
-   p->matchPriceCount = 0;
- }
- 
--void LzmaEnc_Construct(CLzmaEnc *p)
-+static void LzmaEnc_Construct(CLzmaEnc *p)
- {
-   RangeEnc_Construct(&p->rc);
-   MatchFinder_Construct(&p->matchFinderBase);
-@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
-   return p;
- }
- 
--void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
-+static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
- {
-   alloc->Free(alloc, p->litProbs);
-   alloc->Free(alloc, p->saveState.litProbs);
-@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl
-   p->saveState.litProbs = 0;
- }
- 
--void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
-+static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
- {
-   #ifndef _7ZIP_ST
-   MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
-@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U
-   return SZ_OK;
- }
- 
--void LzmaEnc_Init(CLzmaEnc *p)
-+static void LzmaEnc_Init(CLzmaEnc *p)
- {
-   UInt32 i;
-   p->state = 0;
-@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p)
-   p->lpMask = (1 << p->lp) - 1;
- }
- 
--void LzmaEnc_InitPrices(CLzmaEnc *p)
-+static void LzmaEnc_InitPrices(CLzmaEnc *p)
- {
-   if (!p->fastMode)
-   {
-@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn
-   return SZ_OK;
- }
- 
--static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  p->matchFinderBase.stream = inStream;
--  p->needInit = 1;
--  p->rc.outStream = outStream;
--  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
--}
--
--SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
--    ISeqInStream *inStream, UInt32 keepWindowSize,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  p->matchFinderBase.stream = inStream;
--  p->needInit = 1;
--  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
--}
--
- static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
- {
-   p->matchFinderBase.directInput = 1;
-@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc
-   p->matchFinderBase.directInputRem = srcLen;
- }
- 
--SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-+static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
-     UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p
-   return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
- }
- 
--void LzmaEnc_Finish(CLzmaEncHandle pp)
-+static void LzmaEnc_Finish(CLzmaEncHandle pp)
- {
-   #ifndef _7ZIP_ST
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo
-   return size;
- }
- 
--
--UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
--{
--  const CLzmaEnc *p = (CLzmaEnc *)pp;
--  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
--}
--
--const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
--{
--  const CLzmaEnc *p = (CLzmaEnc *)pp;
--  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
--}
--
--SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
--    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
--{
--  CLzmaEnc *p = (CLzmaEnc *)pp;
--  UInt64 nowPos64;
--  SRes res;
--  CSeqOutStreamBuf outStream;
--
--  outStream.funcTable.Write = MyWrite;
--  outStream.data = dest;
--  outStream.rem = *destLen;
--  outStream.overflow = False;
--
--  p->writeEndMark = False;
--  p->finished = False;
--  p->result = SZ_OK;
--
--  if (reInit)
--    LzmaEnc_Init(p);
--  LzmaEnc_InitPrices(p);
--  nowPos64 = p->nowPos64;
--  RangeEnc_Init(&p->rc);
--  p->rc.outStream = &outStream.funcTable;
--
--  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
--
--  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
--  *destLen -= outStream.rem;
--  if (outStream.overflow)
--    return SZ_ERROR_OUTPUT_EOF;
--
--  return res;
--}
--
- static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
- {
-   SRes res = SZ_OK;
-@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p,
-   return res;
- }
- 
--SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
--    ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
--  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
--}
--
- SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
- {
-   CLzmaEnc *p = (CLzmaEnc *)pp;
-@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp
-     return SZ_ERROR_OUTPUT_EOF;
-   return res;
- }
--
--SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
--    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
--    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
--{
--  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
--  SRes res;
--  if (p == 0)
--    return SZ_ERROR_MEM;
--
--  res = LzmaEnc_SetProps(p, props);
--  if (res == SZ_OK)
--  {
--    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
--    if (res == SZ_OK)
--      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
--          writeEndMark, progress, alloc, allocBig);
--  }
--
--  LzmaEnc_Destroy(p, alloc, allocBig);
--  return res;
--}
diff --git a/target/linux/generic/hack-5.15/720-net-phy-add-aqr-phys.patch b/target/linux/generic/hack-5.15/720-net-phy-add-aqr-phys.patch
index 65d8f47521..29050d38ea 100644
--- a/target/linux/generic/hack-5.15/720-net-phy-add-aqr-phys.patch
+++ b/target/linux/generic/hack-5.15/720-net-phy-add-aqr-phys.patch
@@ -20,7 +20,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
  #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)
-@@ -372,6 +374,49 @@ static int aqr107_read_rate(struct phy_d
+@@ -381,6 +383,49 @@ static int aqr107_read_rate(struct phy_d
  	return 0;
  }
  
@@ -70,7 +70,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  static int aqr107_read_status(struct phy_device *phydev)
  {
  	int val, ret;
-@@ -502,7 +547,7 @@ static void aqr107_chip_info(struct phy_
+@@ -511,7 +556,7 @@ static void aqr107_chip_info(struct phy_
  	build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);
  	prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);
  
@@ -79,7 +79,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  		   fw_major, fw_minor, build_id, prov_id);
  }
  
-@@ -674,6 +719,24 @@ static struct phy_driver aqr_driver[] =
+@@ -719,6 +764,24 @@ static struct phy_driver aqr_driver[] =
  	.link_change_notify = aqr107_link_change_notify,
  },
  {
@@ -104,7 +104,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  	PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),
  	.name		= "Aquantia AQCS109",
  	.probe		= aqr107_probe,
-@@ -699,6 +762,24 @@ static struct phy_driver aqr_driver[] =
+@@ -744,6 +807,24 @@ static struct phy_driver aqr_driver[] =
  	.handle_interrupt = aqr_handle_interrupt,
  	.read_status	= aqr_read_status,
  },
@@ -129,7 +129,7 @@ Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
  };
  
  module_phy_driver(aqr_driver);
-@@ -709,8 +790,10 @@ static struct mdio_device_id __maybe_unu
+@@ -754,8 +835,10 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
diff --git a/target/linux/generic/hack-5.15/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-5.15/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
index f1901853e1..211696c568 100644
--- a/target/linux/generic/hack-5.15/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
+++ b/target/linux/generic/hack-5.15/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -27,9 +27,9 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  #define PHY_ID_AQR813	0x31c31cb2
  
  #define MDIO_PHYXS_VEND_IF_STATUS		0xe812
-@@ -126,6 +128,29 @@
- #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2	BIT(1)
- #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3	BIT(0)
+@@ -135,6 +137,29 @@
+ #define AQR107_OP_IN_PROG_SLEEP		1000
+ #define AQR107_OP_IN_PROG_TIMEOUT	100000
  
 +/* registers in MDIO_MMD_VEND1 region */
 +#define AQUANTIA_VND1_GLOBAL_SC			0x000
@@ -57,7 +57,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  struct aqr107_hw_stat {
  	const char *name;
  	int reg;
-@@ -257,6 +282,51 @@ static int aqr_config_aneg(struct phy_de
+@@ -266,6 +291,51 @@ static int aqr_config_aneg(struct phy_de
  	return genphy_c45_check_and_restart_aneg(phydev, changed);
  }
  
@@ -109,7 +109,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  static int aqr_config_intr(struct phy_device *phydev)
  {
  	bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
-@@ -780,6 +850,30 @@ static struct phy_driver aqr_driver[] =
+@@ -825,6 +895,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  	.link_change_notify = aqr107_link_change_notify,
  },
@@ -140,7 +140,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
  };
  
  module_phy_driver(aqr_driver);
-@@ -790,9 +884,11 @@ static struct mdio_device_id __maybe_unu
+@@ -835,9 +929,11 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
diff --git a/target/linux/generic/hack-5.15/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-5.15/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
index d99b4951b8..7d16c8aa28 100644
--- a/target/linux/generic/hack-5.15/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
+++ b/target/linux/generic/hack-5.15/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
@@ -14,7 +14,7 @@ Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
 
 --- a/drivers/net/phy/aquantia_main.c
 +++ b/drivers/net/phy/aquantia_main.c
-@@ -315,10 +315,16 @@ static int aqr_config_aneg_set_prot(stru
+@@ -324,10 +324,16 @@ static int aqr_config_aneg_set_prot(stru
  	phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
  		      aquantia_syscfg[if_type].start_rate);
  
diff --git a/target/linux/generic/hack-5.15/724-net-phy-aquantia-Add-AQR113-driver-support.patch b/target/linux/generic/hack-5.15/724-net-phy-aquantia-Add-AQR113-driver-support.patch
index 634288c780..d03c3430fa 100644
--- a/target/linux/generic/hack-5.15/724-net-phy-aquantia-Add-AQR113-driver-support.patch
+++ b/target/linux/generic/hack-5.15/724-net-phy-aquantia-Add-AQR113-driver-support.patch
@@ -18,7 +18,7 @@ Add a new entry for AQR113 PHY_ID
  #define PHY_ID_AQR113C	0x31c31c12
  #define PHY_ID_AQCS109	0x03a1b5c2
  #define PHY_ID_AQR405	0x03a1b4b0
-@@ -869,6 +870,14 @@ static struct phy_driver aqr_driver[] =
+@@ -914,6 +915,14 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  },
  {
@@ -33,7 +33,7 @@ Add a new entry for AQR113 PHY_ID
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
  	.name		= "Aquantia AQR412",
  	.probe		= aqr107_probe,
-@@ -891,6 +900,7 @@ static struct mdio_device_id __maybe_unu
+@@ -936,6 +945,7 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
diff --git a/target/linux/generic/hack-5.15/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-5.15/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
index f7ccc454e9..9821c0c86e 100644
--- a/target/linux/generic/hack-5.15/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
+++ b/target/linux/generic/hack-5.15/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -21,7 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  #define PHY_ID_AQR113	0x31c31c40
  #define PHY_ID_AQR113C	0x31c31c12
  #define PHY_ID_AQCS109	0x03a1b5c2
-@@ -870,6 +872,30 @@ static struct phy_driver aqr_driver[] =
+@@ -915,6 +917,30 @@ static struct phy_driver aqr_driver[] =
  	.get_stats	= aqr107_get_stats,
  },
  {
@@ -52,7 +52,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  	PHY_ID_MATCH_MODEL(PHY_ID_AQR113),
  	.name		= "Aquantia AQR113",
  	.config_aneg	= aqr_config_aneg,
-@@ -900,6 +926,8 @@ static struct mdio_device_id __maybe_unu
+@@ -945,6 +971,8 @@ static struct mdio_device_id __maybe_unu
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
  	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
diff --git a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch
index 683c29620b..34a741b1c7 100644
--- a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch
+++ b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch
@@ -10,10 +10,10 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
 
 --- a/drivers/net/usb/qmi_wwan.c
 +++ b/drivers/net/usb/qmi_wwan.c
-@@ -1085,6 +1085,7 @@ static const struct usb_device_id produc
- 	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0512)},	/* Quectel EG12/EM12 */
+@@ -1086,6 +1086,7 @@ static const struct usb_device_id produc
  	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)},	/* Quectel EM160R-GL */
  	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)},	/* Quectel RM500Q-GL */
+ 	{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0801)},	/* Quectel RM520N */
 +	{QMI_MATCH_FF_FF_FF(0x05c6, 0xf601)},   /* MeigLink SLM750 */
  
  	/* 3. Combined interface devices matching on interface number */
@@ -29,8 +29,8 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
  
  #define QUECTEL_VENDOR_ID			0x2c7c
  /* These Quectel products use Quectel's vendor ID */
-@@ -1140,6 +1142,11 @@ static const struct usb_device_id option
- 	{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) },
+@@ -1143,6 +1145,11 @@ static const struct usb_device_id option
+ 	  .driver_info = ZLP },
  	{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
  	  .driver_info = RSVD(4) },
 +	/* Meiglink products using Qualcomm vendor ID */
diff --git a/target/linux/generic/hack-5.15/800-ubnt-ledbar-driver.patch b/target/linux/generic/hack-5.15/800-ubnt-ledbar-driver.patch
deleted file mode 100644
index 146e6ae2f5..0000000000
--- a/target/linux/generic/hack-5.15/800-ubnt-ledbar-driver.patch
+++ /dev/null
@@ -1,29 +0,0 @@
---- a/drivers/leds/Kconfig
-+++ b/drivers/leds/Kconfig
-@@ -876,6 +876,16 @@ source "drivers/leds/blink/Kconfig"
- comment "Flash and Torch LED drivers"
- source "drivers/leds/flash/Kconfig"
- 
-+config LEDS_UBNT_LEDBAR
-+	tristate "LED support for Ubiquiti UniFi 6 LR"
-+	depends on LEDS_CLASS && I2C && OF
-+	help
-+	  This option enables support for the Ubiquiti LEDBAR
-+	  LED driver.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called leds-ubnt-ledbar.
-+
- comment "LED Triggers"
- source "drivers/leds/trigger/Kconfig"
- 
---- a/drivers/leds/Makefile
-+++ b/drivers/leds/Makefile
-@@ -87,6 +87,7 @@ obj-$(CONFIG_LEDS_TURRIS_OMNIA)		+= leds
- obj-$(CONFIG_LEDS_WM831X_STATUS)	+= leds-wm831x-status.o
- obj-$(CONFIG_LEDS_WM8350)		+= leds-wm8350.o
- obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
-+obj-$(CONFIG_LEDS_UBNT_LEDBAR)		+= leds-ubnt-ledbar.o
- 
- # LED SPI Drivers
- obj-$(CONFIG_LEDS_CR0014114)		+= leds-cr0014114.o
diff --git a/target/linux/generic/pending-5.10/101-Use-stddefs.h-instead-of-compiler.h.patch b/target/linux/generic/pending-5.10/101-Use-stddefs.h-instead-of-compiler.h.patch
index 824b9444ee..7057d65ce8 100644
--- a/target/linux/generic/pending-5.10/101-Use-stddefs.h-instead-of-compiler.h.patch
+++ b/target/linux/generic/pending-5.10/101-Use-stddefs.h-instead-of-compiler.h.patch
@@ -1,3 +1,11 @@
+From: Felix Fietkau <nbd@nbd.name>
+Subject: uapi: Fix an issue with kernel headers that broke perf
+
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+---
+ include/uapi/linux/swab.h                             | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/include/uapi/linux/swab.h
 +++ b/include/uapi/linux/swab.h
 @@ -3,7 +3,7 @@
diff --git a/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch
index 30158cf399..4a76e216d5 100644
--- a/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch
+++ b/target/linux/generic/pending-5.10/332-arc-add-OWRTDTB-section.patch
@@ -74,7 +74,7 @@ Signed-off-by: Evgeniy Didin <Evgeniy.Didin@synopsys.com>
 +	*
 +	* Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it.
 +	*/
-+ 	.owrt : {
++	.owrt : {
 +		*(.owrt)
 +	. = ALIGN(PAGE_SIZE);
 +	}
diff --git a/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch b/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch
index ce4743879d..b34c041df0 100644
--- a/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch
+++ b/target/linux/generic/pending-5.10/400-mtd-mtdsplit-support.patch
@@ -1,3 +1,25 @@
+From: Gabor Juhos <juhosg@openwrt.org>
+Subject: mtd: Add new Kconfig option for firmware partition split
+
+Add a new kernel config option for generic firmware partition
+split support and change the uImage split support to depend on
+the new option. Aslo rename the MTD_UIMAGE_SPLIT_NAME option to
+MTD_SPLIT_FIRMWARE_NAME to make it more generic.
+
+The patch is in preparation for multiple firmware format
+support.
+
+Submitted-by: Gabor Juhos <juhosg@openwrt.org>
+
+SVN-Revision: 38002
+---
+ drivers/mtd/Kconfig                           |  19 +
+ drivers/mtd/mtdpart.c                         | 144 +++++++++++++-----
+ include/linux/mtd/partitions.h                |   7 +
+ drivers/mtd/Makefile                          |   2 +
+ include/linux/mtd/mtd.h                       |  25 +
+ 5 files changed, 171 insertions(+), 25 deletions(-)
+
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
 @@ -12,6 +12,25 @@ menuconfig MTD
diff --git a/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch b/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch
index 6f41546964..b18ba15671 100644
--- a/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch
+++ b/target/linux/generic/pending-5.10/483-mtd-spi-nor-add-gd25q512.patch
@@ -1,3 +1,12 @@
+From: Roman Yeryomin <roman@advem.lv>
+Subject: mtd/spi-nor/gigadevice: Add gd25q512 SPI NOR flash
+
+Submitted-by: Roman Yeryomin <roman@advem.lv>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/mtd/spi-nor/gigadevice.c              |    3 +++
+ 1 files changed, 3 insertions(+)
+
 --- a/drivers/mtd/spi-nor/gigadevice.c
 +++ b/drivers/mtd/spi-nor/gigadevice.c
 @@ -53,6 +53,9 @@ static const struct flash_info gigadevic
diff --git a/target/linux/generic/pending-5.10/484-mtd-spi-nor-add-esmt-f25l16pa.patch b/target/linux/generic/pending-5.10/484-mtd-spi-nor-add-esmt-f25l16pa.patch
index ce3857d511..bf2f1e6aa6 100644
--- a/target/linux/generic/pending-5.10/484-mtd-spi-nor-add-esmt-f25l16pa.patch
+++ b/target/linux/generic/pending-5.10/484-mtd-spi-nor-add-esmt-f25l16pa.patch
@@ -1,3 +1,16 @@
+From: Jihoon Han <rapid_renard@renard.ga>
+Subject: mtd/spi-nor/esmt: Add support for ESMT F25L16PA(2S) SPI-NOR
+
+This fixes support for Dongwon T&I DW02-412H which uses F25L16PA(2S) flash.
+
+Submitted-by: Jihoon Han <rapid_renard@renard.ga>
+Reviewed-by: Sungbo Eo <mans0n@gorani.run>
+[refresh patches]
+Submitted-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
+---
+ drivers/mtd/spi-nor/esmt.c                            |  2 ++
+ 1 files changed, 2 insertions(+)
+
 --- a/drivers/mtd/spi-nor/esmt.c
 +++ b/drivers/mtd/spi-nor/esmt.c
 @@ -10,6 +10,8 @@
diff --git a/target/linux/generic/pending-5.10/485-mtd-spi-nor-add-xmc-xm25qh128c.patch b/target/linux/generic/pending-5.10/485-mtd-spi-nor-add-xmc-xm25qh128c.patch
index 4b3f674170..ba654ce4ca 100644
--- a/target/linux/generic/pending-5.10/485-mtd-spi-nor-add-xmc-xm25qh128c.patch
+++ b/target/linux/generic/pending-5.10/485-mtd-spi-nor-add-xmc-xm25qh128c.patch
@@ -1,3 +1,14 @@
+From: Langhua Ye <y1248289414@outlook.com>
+Subject: mtd/spi-nor/xmc: add support for XMC XM25QH128C
+
+The XMC XM25QH128C is a 16MB SPI NOR chip. The patch is verified on Ruijie RG-EW3200GX PRO.
+Datasheet available at https://www.xmcwh.com/uploads/435/XM25QH128C.pdf
+
+Submitted-by: Langhua Ye <y1248289414@outlook.com>
+---
+ drivers/mtd/spi-nor/xmc.c                             | 2 ++
+ 1 file changed, 2 insertions(+)
+
 --- a/drivers/mtd/spi-nor/xmc.c
 +++ b/drivers/mtd/spi-nor/xmc.c
 @@ -14,6 +14,8 @@ static const struct flash_info xmc_parts
diff --git a/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch b/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch
index 0a5a3aae5d..620bf72b4d 100644
--- a/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch
+++ b/target/linux/generic/pending-5.10/500-fs_cdrom_dependencies.patch
@@ -1,3 +1,14 @@
+From: Felix Fietkau <nbd@nbd.name>
+Subject: fs: Add CDROM dependencies
+
+Submitted-by: Felix Fietkau <nbd@nbd.name>
+---
+ fs/hfs/Kconfig                                |    1 +
+ fs/hfsplus/Kconfig                            |    1 +
+ fs/isofs/Kconfig                              |    1 +
+ fs/udf/Kconfig                                |    1 +
+ 4 files changed, 4 insertions(+)
+
 --- a/fs/hfs/Kconfig
 +++ b/fs/hfs/Kconfig
 @@ -2,6 +2,7 @@
diff --git a/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch
index bd901efd71..52071ca673 100644
--- a/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch
+++ b/target/linux/generic/pending-5.10/530-jffs2_make_lzma_available.patch
@@ -356,7 +356,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzFind.h
-@@ -0,0 +1,115 @@
+@@ -0,0 +1,98 @@
 +/* LzFind.h -- Match finder for LZ algorithms
 +2009-04-22 : Igor Pavlov : Public domain */
 +
@@ -414,11 +414,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
 +
-+int MatchFinder_NeedMove(CMatchFinder *p);
-+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
-+void MatchFinder_MoveBlock(CMatchFinder *p);
-+void MatchFinder_ReadIfRequired(CMatchFinder *p);
-+
 +void MatchFinder_Construct(CMatchFinder *p);
 +
 +/* Conditions:
@@ -429,12 +424,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
 +    ISzAlloc *alloc);
 +void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
-+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
-+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
-+
-+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
-+    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
-+    UInt32 *distances, UInt32 maxLen);
 +
 +/*
 +Conditions:
@@ -461,12 +450,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
 +
-+void MatchFinder_Init(CMatchFinder *p);
-+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+
 +#ifdef __cplusplus
 +}
 +#endif
@@ -531,7 +514,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzmaDec.h
-@@ -0,0 +1,231 @@
+@@ -0,0 +1,130 @@
 +/* LzmaDec.h -- LZMA Decoder
 +2009-02-07 : Igor Pavlov : Public domain */
 +
@@ -565,14 +548,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  UInt32 dicSize;
 +} CLzmaProps;
 +
-+/* LzmaProps_Decode - decodes properties
-+Returns:
-+  SZ_OK
-+  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+*/
-+
-+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
-+
 +
 +/* ---------- LZMA Decoder state ---------- */
 +
@@ -604,8 +579,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
 +
-+void LzmaDec_Init(CLzmaDec *p);
-+
 +/* There are two types of LZMA streams:
 +     0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
 +     1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
@@ -642,97 +615,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +/* ELzmaStatus is used only as output value for function call */
 +
-+
-+/* ---------- Interfaces ---------- */
-+
-+/* There are 3 levels of interfaces:
-+     1) Dictionary Interface
-+     2) Buffer Interface
-+     3) One Call Interface
-+   You can select any of these interfaces, but don't mix functions from different
-+   groups for same object. */
-+
-+
-+/* There are two variants to allocate state for Dictionary Interface:
-+     1) LzmaDec_Allocate / LzmaDec_Free
-+     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
-+   You can use variant 2, if you set dictionary buffer manually.
-+   For Buffer Interface you must always use variant 1.
-+
-+LzmaDec_Allocate* can return:
-+  SZ_OK
-+  SZ_ERROR_MEM         - Memory allocation error
-+  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+*/
-+
-+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
-+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
-+
-+SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
-+void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
-+
-+/* ---------- Dictionary Interface ---------- */
-+
-+/* You can use it, if you want to eliminate the overhead for data copying from
-+   dictionary to some other external buffer.
-+   You must work with CLzmaDec variables directly in this interface.
-+
-+   STEPS:
-+     LzmaDec_Constr()
-+     LzmaDec_Allocate()
-+     for (each new stream)
-+     {
-+       LzmaDec_Init()
-+       while (it needs more decompression)
-+       {
-+         LzmaDec_DecodeToDic()
-+         use data from CLzmaDec::dic and update CLzmaDec::dicPos
-+       }
-+     }
-+     LzmaDec_Free()
-+*/
-+
-+/* LzmaDec_DecodeToDic
-+
-+   The decoding to internal dictionary buffer (CLzmaDec::dic).
-+   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
-+
-+finishMode:
-+  It has meaning only if the decoding reaches output limit (dicLimit).
-+  LZMA_FINISH_ANY - Decode just dicLimit bytes.
-+  LZMA_FINISH_END - Stream must be finished after dicLimit.
-+
-+Returns:
-+  SZ_OK
-+    status:
-+      LZMA_STATUS_FINISHED_WITH_MARK
-+      LZMA_STATUS_NOT_FINISHED
-+      LZMA_STATUS_NEEDS_MORE_INPUT
-+      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
-+  SZ_ERROR_DATA - Data error
-+*/
-+
-+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
-+    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+
-+
-+/* ---------- Buffer Interface ---------- */
-+
-+/* It's zlib-like interface.
-+   See LzmaDec_DecodeToDic description for information about STEPS and return results,
-+   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
-+   to work with CLzmaDec variables manually.
-+
-+finishMode:
-+  It has meaning only if the decoding reaches output limit (*destLen).
-+  LZMA_FINISH_ANY - Decode just destLen bytes.
-+  LZMA_FINISH_END - Stream must be finished after (*destLen).
-+*/
-+
-+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
-+    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+
-+
 +/* ---------- One Call Interface ---------- */
 +
 +/* LzmaDecode
@@ -765,7 +647,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzmaEnc.h
-@@ -0,0 +1,80 @@
+@@ -0,0 +1,60 @@
 +/*  LzmaEnc.h -- LZMA Encoder
 +2009-02-07 : Igor Pavlov : Public domain */
 +
@@ -799,9 +681,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +} CLzmaEncProps;
 +
 +void LzmaEncProps_Init(CLzmaEncProps *p);
-+void LzmaEncProps_Normalize(CLzmaEncProps *p);
-+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
-+
 +
 +/* ---------- CLzmaEncHandle Interface ---------- */
 +
@@ -821,26 +700,9 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
 +SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
 +SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
-+SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
 +SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
 +    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
 +
-+/* ---------- One Call Interface ---------- */
-+
-+/* LzmaEncode
-+Return code:
-+  SZ_OK               - OK
-+  SZ_ERROR_MEM        - Memory allocation error
-+  SZ_ERROR_PARAM      - Incorrect paramater
-+  SZ_ERROR_OUTPUT_EOF - output buffer overflow
-+  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
-+*/
-+
-+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-+
 +#ifdef __cplusplus
 +}
 +#endif
@@ -1130,7 +992,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
  lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
 --- /dev/null
 +++ b/lib/lzma/LzFind.c
-@@ -0,0 +1,761 @@
+@@ -0,0 +1,522 @@
 +/* LzFind.c -- Match finder for LZ algorithms
 +2009-04-22 : Igor Pavlov : Public domain */
 +
@@ -1147,9 +1009,15 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define kStartMaxLen 3
 +
++#if 0
++#define DIRECT_INPUT	p->directInput
++#else
++#define DIRECT_INPUT	1
++#endif
++
 +static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
 +{
-+  if (!p->directInput)
++  if (!DIRECT_INPUT)
 +  {
 +    alloc->Free(alloc, p->bufferBase);
 +    p->bufferBase = 0;
@@ -1161,7 +1029,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
 +{
 +  UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +  {
 +    p->blockSize = blockSize;
 +    return 1;
@@ -1175,12 +1043,12 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->bufferBase != 0);
 +}
 +
-+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-+Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
++static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
 +
-+UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
 +
-+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
++static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
 +{
 +  p->posLimit -= subValue;
 +  p->pos -= subValue;
@@ -1191,7 +1059,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +{
 +  if (p->streamEndWasReached || p->result != SZ_OK)
 +    return;
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +  {
 +    UInt32 curSize = 0xFFFFFFFF - p->streamPos;
 +    if (curSize > p->directInputRem)
@@ -1222,7 +1090,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  }
 +}
 +
-+void MatchFinder_MoveBlock(CMatchFinder *p)
++static void MatchFinder_MoveBlock(CMatchFinder *p)
 +{
 +  memmove(p->bufferBase,
 +    p->buffer - p->keepSizeBefore,
@@ -1230,22 +1098,14 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->buffer = p->bufferBase + p->keepSizeBefore;
 +}
 +
-+int MatchFinder_NeedMove(CMatchFinder *p)
++static int MatchFinder_NeedMove(CMatchFinder *p)
 +{
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +    return 0;
 +  /* if (p->streamEndWasReached) return 0; */
 +  return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
 +}
 +
-+void MatchFinder_ReadIfRequired(CMatchFinder *p)
-+{
-+  if (p->streamEndWasReached)
-+    return;
-+  if (p->keepSizeAfter >= p->streamPos - p->pos)
-+    MatchFinder_ReadBlock(p);
-+}
-+
 +static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
 +{
 +  if (MatchFinder_NeedMove(p))
@@ -1401,7 +1261,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->posLimit = p->pos + limit;
 +}
 +
-+void MatchFinder_Init(CMatchFinder *p)
++static void MatchFinder_Init(CMatchFinder *p)
 +{
 +  UInt32 i;
 +  for (i = 0; i < p->hashSizeSum; i++)
@@ -1420,7 +1280,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->pos - p->historySize - 1) & kNormalizeMask;
 +}
 +
-+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
++static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
 +{
 +  UInt32 i;
 +  for (i = 0; i < numItems; i++)
@@ -1452,38 +1312,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  MatchFinder_SetLimits(p);
 +}
 +
-+static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-+    UInt32 *distances, UInt32 maxLen)
-+{
-+  son[_cyclicBufferPos] = curMatch;
-+  for (;;)
-+  {
-+    UInt32 delta = pos - curMatch;
-+    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-+      return distances;
-+    {
-+      const Byte *pb = cur - delta;
-+      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
-+      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
-+      {
-+        UInt32 len = 0;
-+        while (++len != lenLimit)
-+          if (pb[len] != cur[len])
-+            break;
-+        if (maxLen < len)
-+        {
-+          *distances++ = maxLen = len;
-+          *distances++ = delta - 1;
-+          if (len == lenLimit)
-+            return distances;
-+        }
-+      }
-+    }
-+  }
-+}
-+
-+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
 +    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
 +    UInt32 *distances, UInt32 maxLen)
 +{
@@ -1593,10 +1422,10 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->buffer++; \
 +  if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
 +
-+#define MOVE_POS_RET MOVE_POS return offset;
-+
 +static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
 +
++#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
++
 +#define GET_MATCHES_HEADER2(minLen, ret_op) \
 +  UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
 +  lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
@@ -1612,62 +1441,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  distances + offset, maxLen) - distances); MOVE_POS_RET;
 +
 +#define SKIP_FOOTER \
-+  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
-+
-+static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(2)
-+  HASH2_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = 0;
-+  GET_MATCHES_FOOTER(offset, 1)
-+}
-+
-+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(3)
-+  HASH_ZIP_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = 0;
-+  GET_MATCHES_FOOTER(offset, 2)
-+}
-+
-+static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 hash2Value, delta2, maxLen, offset;
-+  GET_MATCHES_HEADER(3)
-+
-+  HASH3_CALC;
-+
-+  delta2 = p->pos - p->hash[hash2Value];
-+  curMatch = p->hash[kFix3HashSize + hashValue];
-+
-+  p->hash[hash2Value] =
-+  p->hash[kFix3HashSize + hashValue] = p->pos;
-+
-+
-+  maxLen = 2;
-+  offset = 0;
-+  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+  {
-+    for (; maxLen != lenLimit; maxLen++)
-+      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+        break;
-+    distances[0] = maxLen;
-+    distances[1] = delta2 - 1;
-+    offset = 2;
-+    if (maxLen == lenLimit)
-+    {
-+      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
-+      MOVE_POS_RET;
-+    }
-+  }
-+  GET_MATCHES_FOOTER(offset, maxLen)
-+}
++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
 +
 +static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
 +{
@@ -1716,108 +1490,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  GET_MATCHES_FOOTER(offset, maxLen)
 +}
 +
-+static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
-+  GET_MATCHES_HEADER(4)
-+
-+  HASH4_CALC;
-+
-+  delta2 = p->pos - p->hash[                hash2Value];
-+  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
-+  curMatch = p->hash[kFix4HashSize + hashValue];
-+
-+  p->hash[                hash2Value] =
-+  p->hash[kFix3HashSize + hash3Value] =
-+  p->hash[kFix4HashSize + hashValue] = p->pos;
-+
-+  maxLen = 1;
-+  offset = 0;
-+  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+  {
-+    distances[0] = maxLen = 2;
-+    distances[1] = delta2 - 1;
-+    offset = 2;
-+  }
-+  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
-+  {
-+    maxLen = 3;
-+    distances[offset + 1] = delta3 - 1;
-+    offset += 2;
-+    delta2 = delta3;
-+  }
-+  if (offset != 0)
-+  {
-+    for (; maxLen != lenLimit; maxLen++)
-+      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+        break;
-+    distances[offset - 2] = maxLen;
-+    if (maxLen == lenLimit)
-+    {
-+      p->son[p->cyclicBufferPos] = curMatch;
-+      MOVE_POS_RET;
-+    }
-+  }
-+  if (maxLen < 3)
-+    maxLen = 3;
-+  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+    distances + offset, maxLen) - (distances));
-+  MOVE_POS_RET
-+}
-+
-+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(3)
-+  HASH_ZIP_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+    distances, 2) - (distances));
-+  MOVE_POS_RET
-+}
-+
-+static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(2)
-+    HASH2_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
-+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(3)
-+    HASH_ZIP_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
-+static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    UInt32 hash2Value;
-+    SKIP_HEADER(3)
-+    HASH3_CALC;
-+    curMatch = p->hash[kFix3HashSize + hashValue];
-+    p->hash[hash2Value] =
-+    p->hash[kFix3HashSize + hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
 +static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
 +{
 +  do
@@ -1834,67 +1506,18 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  while (--num != 0);
 +}
 +
-+static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    UInt32 hash2Value, hash3Value;
-+    SKIP_HEADER(4)
-+    HASH4_CALC;
-+    curMatch = p->hash[kFix4HashSize + hashValue];
-+    p->hash[                hash2Value] =
-+    p->hash[kFix3HashSize + hash3Value] =
-+    p->hash[kFix4HashSize + hashValue] = p->pos;
-+    p->son[p->cyclicBufferPos] = curMatch;
-+    MOVE_POS
-+  }
-+  while (--num != 0);
-+}
-+
-+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(3)
-+    HASH_ZIP_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    p->son[p->cyclicBufferPos] = curMatch;
-+    MOVE_POS
-+  }
-+  while (--num != 0);
-+}
-+
 +void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
 +{
 +  vTable->Init = (Mf_Init_Func)MatchFinder_Init;
 +  vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
 +  vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
 +  vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
-+  if (!p->btMode)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
-+  }
-+  else if (p->numHashBytes == 2)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
-+  }
-+  else if (p->numHashBytes == 3)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
-+  }
-+  else
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
-+  }
++  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
++  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
 +}
 --- /dev/null
 +++ b/lib/lzma/LzmaDec.c
-@@ -0,0 +1,999 @@
+@@ -0,0 +1,925 @@
 +/* LzmaDec.c -- LZMA Decoder
 +2009-09-20 : Igor Pavlov : Public domain */
 +
@@ -2579,7 +2202,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->needFlush = 0;
 +}
 +
-+void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
 +{
 +  p->needFlush = 1;
 +  p->remainLen = 0;
@@ -2595,7 +2218,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    p->needInitState = 1;
 +}
 +
-+void LzmaDec_Init(CLzmaDec *p)
++static void LzmaDec_Init(CLzmaDec *p)
 +{
 +  p->dicPos = 0;
 +  LzmaDec_InitDicAndState(p, True, True);
@@ -2613,7 +2236,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->needInitState = 0;
 +}
 +
-+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
++static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
 +    ELzmaFinishMode finishMode, ELzmaStatus *status)
 +{
 +  SizeT inSize = *srcLen;
@@ -2734,65 +2357,13 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
 +}
 +
-+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
-+{
-+  SizeT outSize = *destLen;
-+  SizeT inSize = *srcLen;
-+  *srcLen = *destLen = 0;
-+  for (;;)
-+  {
-+    SizeT inSizeCur = inSize, outSizeCur, dicPos;
-+    ELzmaFinishMode curFinishMode;
-+    SRes res;
-+    if (p->dicPos == p->dicBufSize)
-+      p->dicPos = 0;
-+    dicPos = p->dicPos;
-+    if (outSize > p->dicBufSize - dicPos)
-+    {
-+      outSizeCur = p->dicBufSize;
-+      curFinishMode = LZMA_FINISH_ANY;
-+    }
-+    else
-+    {
-+      outSizeCur = dicPos + outSize;
-+      curFinishMode = finishMode;
-+    }
-+
-+    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
-+    src += inSizeCur;
-+    inSize -= inSizeCur;
-+    *srcLen += inSizeCur;
-+    outSizeCur = p->dicPos - dicPos;
-+    memcpy(dest, p->dic + dicPos, outSizeCur);
-+    dest += outSizeCur;
-+    outSize -= outSizeCur;
-+    *destLen += outSizeCur;
-+    if (res != 0)
-+      return res;
-+    if (outSizeCur == 0 || outSize == 0)
-+      return SZ_OK;
-+  }
-+}
-+
-+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
++static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
 +{
 +  alloc->Free(alloc, p->probs);
 +  p->probs = 0;
 +}
 +
-+static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
-+{
-+  alloc->Free(alloc, p->dic);
-+  p->dic = 0;
-+}
-+
-+void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
-+{
-+  LzmaDec_FreeProbs(p, alloc);
-+  LzmaDec_FreeDict(p, alloc);
-+}
-+
-+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
++static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
 +{
 +  UInt32 dicSize;
 +  Byte d;
@@ -2832,7 +2403,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
 +{
 +  CLzmaProps propNew;
 +  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
@@ -2841,28 +2412,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+{
-+  CLzmaProps propNew;
-+  SizeT dicBufSize;
-+  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-+  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
-+  dicBufSize = propNew.dicSize;
-+  if (p->dic == 0 || dicBufSize != p->dicBufSize)
-+  {
-+    LzmaDec_FreeDict(p, alloc);
-+    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
-+    if (p->dic == 0)
-+    {
-+      LzmaDec_FreeProbs(p, alloc);
-+      return SZ_ERROR_MEM;
-+    }
-+  }
-+  p->dicBufSize = dicBufSize;
-+  p->prop = propNew;
-+  return SZ_OK;
-+}
-+
 +SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
 +    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
 +    ELzmaStatus *status, ISzAlloc *alloc)
@@ -2896,7 +2445,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +}
 --- /dev/null
 +++ b/lib/lzma/LzmaEnc.c
-@@ -0,0 +1,2271 @@
+@@ -0,0 +1,2123 @@
 +/* LzmaEnc.c -- LZMA Encoder
 +2009-11-24 : Igor Pavlov : Public domain */
 +
@@ -2952,7 +2501,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->writeEndMark = 0;
 +}
 +
-+void LzmaEncProps_Normalize(CLzmaEncProps *p)
++static void LzmaEncProps_Normalize(CLzmaEncProps *p)
 +{
 +  int level = p->level;
 +  if (level < 0) level = 5;
@@ -2975,7 +2524,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +      #endif
 +}
 +
-+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
++static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
 +{
 +  CLzmaEncProps props = *props2;
 +  LzmaEncProps_Normalize(&props);
@@ -2992,7 +2541,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
 +
-+UInt32 GetPosSlot1(UInt32 pos)
++static UInt32 GetPosSlot1(UInt32 pos)
 +{
 +  UInt32 res;
 +  BSR2_RET(pos, res);
@@ -3006,7 +2555,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#define kNumLogBits (9 + (int)sizeof(size_t) / 2)
 +#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
 +
-+void LzmaEnc_FastPosInit(Byte *g_FastPos)
++static void LzmaEnc_FastPosInit(Byte *g_FastPos)
 +{
 +  int c = 2, slotFast;
 +  g_FastPos[0] = 0;
@@ -3238,58 +2787,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  CSaveState saveState;
 +} CLzmaEnc;
 +
-+void LzmaEnc_SaveState(CLzmaEncHandle pp)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  CSaveState *dest = &p->saveState;
-+  int i;
-+  dest->lenEnc = p->lenEnc;
-+  dest->repLenEnc = p->repLenEnc;
-+  dest->state = p->state;
-+
-+  for (i = 0; i < kNumStates; i++)
-+  {
-+    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+  }
-+  for (i = 0; i < kNumLenToPosStates; i++)
-+    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
-+}
-+
-+void LzmaEnc_RestoreState(CLzmaEncHandle pp)
-+{
-+  CLzmaEnc *dest = (CLzmaEnc *)pp;
-+  const CSaveState *p = &dest->saveState;
-+  int i;
-+  dest->lenEnc = p->lenEnc;
-+  dest->repLenEnc = p->repLenEnc;
-+  dest->state = p->state;
-+
-+  for (i = 0; i < kNumStates; i++)
-+  {
-+    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+  }
-+  for (i = 0; i < kNumLenToPosStates; i++)
-+    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
-+}
-+
 +SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -3499,7 +2996,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  while (symbol < 0x10000);
 +}
 +
-+void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
 +{
 +  UInt32 i;
 +  for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
@@ -4575,7 +4072,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->matchPriceCount = 0;
 +}
 +
-+void LzmaEnc_Construct(CLzmaEnc *p)
++static void LzmaEnc_Construct(CLzmaEnc *p)
 +{
 +  RangeEnc_Construct(&p->rc);
 +  MatchFinder_Construct(&p->matchFinderBase);
@@ -4608,7 +4105,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return p;
 +}
 +
-+void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
 +{
 +  alloc->Free(alloc, p->litProbs);
 +  alloc->Free(alloc, p->saveState.litProbs);
@@ -4616,7 +4113,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->saveState.litProbs = 0;
 +}
 +
-+void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
 +{
 +  #ifndef _7ZIP_ST
 +  MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
@@ -4846,7 +4343,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+void LzmaEnc_Init(CLzmaEnc *p)
++static void LzmaEnc_Init(CLzmaEnc *p)
 +{
 +  UInt32 i;
 +  p->state = 0;
@@ -4904,7 +4401,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->lpMask = (1 << p->lp) - 1;
 +}
 +
-+void LzmaEnc_InitPrices(CLzmaEnc *p)
++static void LzmaEnc_InitPrices(CLzmaEnc *p)
 +{
 +  if (!p->fastMode)
 +  {
@@ -4936,26 +4433,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  p->matchFinderBase.stream = inStream;
-+  p->needInit = 1;
-+  p->rc.outStream = outStream;
-+  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
-+}
-+
-+SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
-+    ISeqInStream *inStream, UInt32 keepWindowSize,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  p->matchFinderBase.stream = inStream;
-+  p->needInit = 1;
-+  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-+}
-+
 +static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
 +{
 +  p->matchFinderBase.directInput = 1;
@@ -4963,7 +4440,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->matchFinderBase.directInputRem = srcLen;
 +}
 +
-+SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
 +    UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -4973,7 +4450,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
 +}
 +
-+void LzmaEnc_Finish(CLzmaEncHandle pp)
++static void LzmaEnc_Finish(CLzmaEncHandle pp)
 +{
 +  #ifndef _7ZIP_ST
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -5006,53 +4483,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return size;
 +}
 +
-+
-+UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
-+{
-+  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
-+}
-+
-+const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
-+{
-+  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
-+}
-+
-+SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
-+    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  UInt64 nowPos64;
-+  SRes res;
-+  CSeqOutStreamBuf outStream;
-+
-+  outStream.funcTable.Write = MyWrite;
-+  outStream.data = dest;
-+  outStream.rem = *destLen;
-+  outStream.overflow = False;
-+
-+  p->writeEndMark = False;
-+  p->finished = False;
-+  p->result = SZ_OK;
-+
-+  if (reInit)
-+    LzmaEnc_Init(p);
-+  LzmaEnc_InitPrices(p);
-+  nowPos64 = p->nowPos64;
-+  RangeEnc_Init(&p->rc);
-+  p->rc.outStream = &outStream.funcTable;
-+
-+  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
-+
-+  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
-+  *destLen -= outStream.rem;
-+  if (outStream.overflow)
-+    return SZ_ERROR_OUTPUT_EOF;
-+
-+  return res;
-+}
-+
 +static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
 +{
 +  SRes res = SZ_OK;
@@ -5083,13 +4513,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return res;
 +}
 +
-+SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
-+  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
-+}
-+
 +SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -5146,28 +4569,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    return SZ_ERROR_OUTPUT_EOF;
 +  return res;
 +}
-+
-+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
-+  SRes res;
-+  if (p == 0)
-+    return SZ_ERROR_MEM;
-+
-+  res = LzmaEnc_SetProps(p, props);
-+  if (res == SZ_OK)
-+  {
-+    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
-+    if (res == SZ_OK)
-+      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
-+          writeEndMark, progress, alloc, allocBig);
-+  }
-+
-+  LzmaEnc_Destroy(p, alloc, allocBig);
-+  return res;
-+}
 --- /dev/null
 +++ b/lib/lzma/Makefile
 @@ -0,0 +1,7 @@
diff --git a/target/linux/generic/pending-5.10/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-5.10/683-of_net-add-mac-address-to-of-tree.patch
index 03cd763d9d..501422551b 100644
--- a/target/linux/generic/pending-5.10/683-of_net-add-mac-address-to-of-tree.patch
+++ b/target/linux/generic/pending-5.10/683-of_net-add-mac-address-to-of-tree.patch
@@ -1,3 +1,19 @@
+From: David Bauer <mail@david-bauer.net>
+Subject: of/net: Add MAC address to of tree
+
+The label-mac logic relies on the mac-address property of a netdev
+devices of-node. However, the mac address can also be stored as a
+different property or read from e.g. an mtd device.
+
+Create this node when reading a mac-address from OF if it does not
+already exist and copy the mac-address used for the device to this
+property. This way, the MAC address can be accessed using procfs.
+
+Submitted-by: David Bauer <mail@david-bauer.net>
+---
+ drivers/of/of_net.c                           | 22 ++++++++++++++
+ 1 files changed, 22 insertions(+)
+
 --- a/drivers/of/of_net.c
 +++ b/drivers/of/of_net.c
 @@ -95,6 +95,27 @@ static int of_get_mac_addr_nvmem(struct
diff --git a/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch b/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
index 4e960a0b8a..fff817dd8c 100644
--- a/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
+++ b/target/linux/generic/pending-5.10/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch
@@ -17,7 +17,7 @@ Signed-off-by: DENG Qingfang <dqfext@gmail.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -2917,6 +2917,7 @@ static int mv88e6xxx_setup(struct dsa_sw
+@@ -2921,6 +2921,7 @@ static int mv88e6xxx_setup(struct dsa_sw
  
  	chip->ds = ds;
  	ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip);
diff --git a/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
index c952fd4b3a..80e2b481bf 100644
--- a/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
+++ b/target/linux/generic/pending-5.10/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
@@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
 
 --- a/drivers/net/dsa/mv88e6xxx/chip.c
 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
-@@ -5486,6 +5486,7 @@ static int mv88e6xxx_register_switch(str
+@@ -5490,6 +5490,7 @@ static int mv88e6xxx_register_switch(str
  	ds->ops = &mv88e6xxx_switch_ops;
  	ds->ageing_time_min = chip->info->age_time_coeff;
  	ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
diff --git a/target/linux/generic/pending-5.10/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch b/target/linux/generic/pending-5.10/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
index f2f0e61089..c6f127add1 100644
--- a/target/linux/generic/pending-5.10/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
+++ b/target/linux/generic/pending-5.10/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
@@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
 
 --- a/drivers/net/usb/qmi_wwan.c
 +++ b/drivers/net/usb/qmi_wwan.c
-@@ -1252,6 +1252,7 @@ static const struct usb_device_id produc
+@@ -1253,6 +1253,7 @@ static const struct usb_device_id produc
  	{QMI_FIXED_INTF(0x19d2, 0x1426, 2)},	/* ZTE MF91 */
  	{QMI_FIXED_INTF(0x19d2, 0x1428, 2)},	/* Telewell TW-LTE 4G v2 */
  	{QMI_FIXED_INTF(0x19d2, 0x1432, 3)},	/* ZTE ME3620 */
diff --git a/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch b/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
index c32e15d0c6..2f604cfa98 100644
--- a/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
+++ b/target/linux/generic/pending-5.15/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
@@ -1,3 +1,43 @@
+From f32085fc0b87049491b07e198d924d738a1a2834 Mon Sep 17 00:00:00 2001
+From: Daniel Danzberger <daniel@dd-wrt.com>
+Date: Wed, 3 Aug 2022 17:31:03 +0200
+Subject: [PATCH] mtd: spinand: Add support for Etron EM73D044VCx
+
+Airoha is a new ARM platform based on Cortex-A53 which has recently been
+merged into linux-next.
+
+Due to BootROM limitations on this platform, the Cortex-A53 can't run in
+Aarch64 mode and code must be compiled for 32-Bit ARM.
+
+This support is based mostly on those linux-next commits backported
+for kernel 5.15.
+
+Patches:
+1 - platform support = linux-next
+2 - clock driver = linux-next
+3 - gpio driver = linux-next
+4 - linux,usable-memory-range dts support = linux-next
+5 - mtd spinand driver
+6 - spi driver
+7 - pci driver (kconfig only, uses mediatek PCI) = linux-next
+
+Still missing:
+- Ethernet driver
+- Sysupgrade support
+
+A.t.m there exists one subtarget EN7523 with only one evaluation
+board.
+
+The initramfs can be run with the following commands from u-boot:
+-
+u-boot> setenv bootfile \
+	openwrt-airoha-airoha_en7523-evb-initramfs-kernel.bin
+u-boot> tftpboot
+u-boot> bootm 0x81800000
+-
+
+Submitted-by: Daniel Danzberger <daniel@dd-wrt.com>
+
 --- a/drivers/mtd/nand/spi/Makefile
 +++ b/drivers/mtd/nand/spi/Makefile
 @@ -1,3 +1,3 @@
diff --git a/target/linux/generic/pending-5.15/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-5.15/530-jffs2_make_lzma_available.patch
index fd6ca784c0..ac784d0b0b 100644
--- a/target/linux/generic/pending-5.15/530-jffs2_make_lzma_available.patch
+++ b/target/linux/generic/pending-5.15/530-jffs2_make_lzma_available.patch
@@ -356,7 +356,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzFind.h
-@@ -0,0 +1,115 @@
+@@ -0,0 +1,98 @@
 +/* LzFind.h -- Match finder for LZ algorithms
 +2009-04-22 : Igor Pavlov : Public domain */
 +
@@ -414,11 +414,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
 +
-+int MatchFinder_NeedMove(CMatchFinder *p);
-+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
-+void MatchFinder_MoveBlock(CMatchFinder *p);
-+void MatchFinder_ReadIfRequired(CMatchFinder *p);
-+
 +void MatchFinder_Construct(CMatchFinder *p);
 +
 +/* Conditions:
@@ -429,12 +424,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
 +    ISzAlloc *alloc);
 +void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
-+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
-+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
-+
-+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
-+    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
-+    UInt32 *distances, UInt32 maxLen);
 +
 +/*
 +Conditions:
@@ -461,12 +450,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
 +
-+void MatchFinder_Init(CMatchFinder *p);
-+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
-+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
-+
 +#ifdef __cplusplus
 +}
 +#endif
@@ -531,7 +514,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzmaDec.h
-@@ -0,0 +1,231 @@
+@@ -0,0 +1,130 @@
 +/* LzmaDec.h -- LZMA Decoder
 +2009-02-07 : Igor Pavlov : Public domain */
 +
@@ -565,14 +548,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  UInt32 dicSize;
 +} CLzmaProps;
 +
-+/* LzmaProps_Decode - decodes properties
-+Returns:
-+  SZ_OK
-+  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+*/
-+
-+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
-+
 +
 +/* ---------- LZMA Decoder state ---------- */
 +
@@ -604,8 +579,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
 +
-+void LzmaDec_Init(CLzmaDec *p);
-+
 +/* There are two types of LZMA streams:
 +     0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
 +     1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
@@ -642,97 +615,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +/* ELzmaStatus is used only as output value for function call */
 +
-+
-+/* ---------- Interfaces ---------- */
-+
-+/* There are 3 levels of interfaces:
-+     1) Dictionary Interface
-+     2) Buffer Interface
-+     3) One Call Interface
-+   You can select any of these interfaces, but don't mix functions from different
-+   groups for same object. */
-+
-+
-+/* There are two variants to allocate state for Dictionary Interface:
-+     1) LzmaDec_Allocate / LzmaDec_Free
-+     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
-+   You can use variant 2, if you set dictionary buffer manually.
-+   For Buffer Interface you must always use variant 1.
-+
-+LzmaDec_Allocate* can return:
-+  SZ_OK
-+  SZ_ERROR_MEM         - Memory allocation error
-+  SZ_ERROR_UNSUPPORTED - Unsupported properties
-+*/
-+
-+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
-+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
-+
-+SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
-+void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
-+
-+/* ---------- Dictionary Interface ---------- */
-+
-+/* You can use it, if you want to eliminate the overhead for data copying from
-+   dictionary to some other external buffer.
-+   You must work with CLzmaDec variables directly in this interface.
-+
-+   STEPS:
-+     LzmaDec_Constr()
-+     LzmaDec_Allocate()
-+     for (each new stream)
-+     {
-+       LzmaDec_Init()
-+       while (it needs more decompression)
-+       {
-+         LzmaDec_DecodeToDic()
-+         use data from CLzmaDec::dic and update CLzmaDec::dicPos
-+       }
-+     }
-+     LzmaDec_Free()
-+*/
-+
-+/* LzmaDec_DecodeToDic
-+
-+   The decoding to internal dictionary buffer (CLzmaDec::dic).
-+   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
-+
-+finishMode:
-+  It has meaning only if the decoding reaches output limit (dicLimit).
-+  LZMA_FINISH_ANY - Decode just dicLimit bytes.
-+  LZMA_FINISH_END - Stream must be finished after dicLimit.
-+
-+Returns:
-+  SZ_OK
-+    status:
-+      LZMA_STATUS_FINISHED_WITH_MARK
-+      LZMA_STATUS_NOT_FINISHED
-+      LZMA_STATUS_NEEDS_MORE_INPUT
-+      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
-+  SZ_ERROR_DATA - Data error
-+*/
-+
-+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
-+    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+
-+
-+/* ---------- Buffer Interface ---------- */
-+
-+/* It's zlib-like interface.
-+   See LzmaDec_DecodeToDic description for information about STEPS and return results,
-+   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
-+   to work with CLzmaDec variables manually.
-+
-+finishMode:
-+  It has meaning only if the decoding reaches output limit (*destLen).
-+  LZMA_FINISH_ANY - Decode just destLen bytes.
-+  LZMA_FINISH_END - Stream must be finished after (*destLen).
-+*/
-+
-+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
-+    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
-+
-+
 +/* ---------- One Call Interface ---------- */
 +
 +/* LzmaDecode
@@ -765,7 +647,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#endif
 --- /dev/null
 +++ b/include/linux/lzma/LzmaEnc.h
-@@ -0,0 +1,80 @@
+@@ -0,0 +1,60 @@
 +/*  LzmaEnc.h -- LZMA Encoder
 +2009-02-07 : Igor Pavlov : Public domain */
 +
@@ -799,9 +681,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +} CLzmaEncProps;
 +
 +void LzmaEncProps_Init(CLzmaEncProps *p);
-+void LzmaEncProps_Normalize(CLzmaEncProps *p);
-+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
-+
 +
 +/* ---------- CLzmaEncHandle Interface ---------- */
 +
@@ -821,26 +700,9 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
 +SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
 +SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
-+SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
 +SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
 +    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
 +
-+/* ---------- One Call Interface ---------- */
-+
-+/* LzmaEncode
-+Return code:
-+  SZ_OK               - OK
-+  SZ_ERROR_MEM        - Memory allocation error
-+  SZ_ERROR_PARAM      - Incorrect paramater
-+  SZ_ERROR_OUTPUT_EOF - output buffer overflow
-+  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
-+*/
-+
-+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
-+
 +#ifdef __cplusplus
 +}
 +#endif
@@ -1130,7 +992,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
  lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
 --- /dev/null
 +++ b/lib/lzma/LzFind.c
-@@ -0,0 +1,761 @@
+@@ -0,0 +1,522 @@
 +/* LzFind.c -- Match finder for LZ algorithms
 +2009-04-22 : Igor Pavlov : Public domain */
 +
@@ -1147,9 +1009,15 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define kStartMaxLen 3
 +
++#if 0
++#define DIRECT_INPUT	p->directInput
++#else
++#define DIRECT_INPUT	1
++#endif
++
 +static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
 +{
-+  if (!p->directInput)
++  if (!DIRECT_INPUT)
 +  {
 +    alloc->Free(alloc, p->bufferBase);
 +    p->bufferBase = 0;
@@ -1161,7 +1029,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
 +{
 +  UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +  {
 +    p->blockSize = blockSize;
 +    return 1;
@@ -1175,12 +1043,12 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->bufferBase != 0);
 +}
 +
-+Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
-+Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
++static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
 +
-+UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
 +
-+void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
++static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
 +{
 +  p->posLimit -= subValue;
 +  p->pos -= subValue;
@@ -1191,7 +1059,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +{
 +  if (p->streamEndWasReached || p->result != SZ_OK)
 +    return;
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +  {
 +    UInt32 curSize = 0xFFFFFFFF - p->streamPos;
 +    if (curSize > p->directInputRem)
@@ -1222,7 +1090,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  }
 +}
 +
-+void MatchFinder_MoveBlock(CMatchFinder *p)
++static void MatchFinder_MoveBlock(CMatchFinder *p)
 +{
 +  memmove(p->bufferBase,
 +    p->buffer - p->keepSizeBefore,
@@ -1230,22 +1098,14 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->buffer = p->bufferBase + p->keepSizeBefore;
 +}
 +
-+int MatchFinder_NeedMove(CMatchFinder *p)
++static int MatchFinder_NeedMove(CMatchFinder *p)
 +{
-+  if (p->directInput)
++  if (DIRECT_INPUT)
 +    return 0;
 +  /* if (p->streamEndWasReached) return 0; */
 +  return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
 +}
 +
-+void MatchFinder_ReadIfRequired(CMatchFinder *p)
-+{
-+  if (p->streamEndWasReached)
-+    return;
-+  if (p->keepSizeAfter >= p->streamPos - p->pos)
-+    MatchFinder_ReadBlock(p);
-+}
-+
 +static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
 +{
 +  if (MatchFinder_NeedMove(p))
@@ -1401,7 +1261,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->posLimit = p->pos + limit;
 +}
 +
-+void MatchFinder_Init(CMatchFinder *p)
++static void MatchFinder_Init(CMatchFinder *p)
 +{
 +  UInt32 i;
 +  for (i = 0; i < p->hashSizeSum; i++)
@@ -1420,7 +1280,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->pos - p->historySize - 1) & kNormalizeMask;
 +}
 +
-+void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
++static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
 +{
 +  UInt32 i;
 +  for (i = 0; i < numItems; i++)
@@ -1452,38 +1312,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  MatchFinder_SetLimits(p);
 +}
 +
-+static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
-+    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
-+    UInt32 *distances, UInt32 maxLen)
-+{
-+  son[_cyclicBufferPos] = curMatch;
-+  for (;;)
-+  {
-+    UInt32 delta = pos - curMatch;
-+    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
-+      return distances;
-+    {
-+      const Byte *pb = cur - delta;
-+      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
-+      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
-+      {
-+        UInt32 len = 0;
-+        while (++len != lenLimit)
-+          if (pb[len] != cur[len])
-+            break;
-+        if (maxLen < len)
-+        {
-+          *distances++ = maxLen = len;
-+          *distances++ = delta - 1;
-+          if (len == lenLimit)
-+            return distances;
-+        }
-+      }
-+    }
-+  }
-+}
-+
-+UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
 +    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
 +    UInt32 *distances, UInt32 maxLen)
 +{
@@ -1593,10 +1422,10 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->buffer++; \
 +  if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
 +
-+#define MOVE_POS_RET MOVE_POS return offset;
-+
 +static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
 +
++#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
++
 +#define GET_MATCHES_HEADER2(minLen, ret_op) \
 +  UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
 +  lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
@@ -1612,62 +1441,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  distances + offset, maxLen) - distances); MOVE_POS_RET;
 +
 +#define SKIP_FOOTER \
-+  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
-+
-+static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(2)
-+  HASH2_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = 0;
-+  GET_MATCHES_FOOTER(offset, 1)
-+}
-+
-+UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(3)
-+  HASH_ZIP_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = 0;
-+  GET_MATCHES_FOOTER(offset, 2)
-+}
-+
-+static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 hash2Value, delta2, maxLen, offset;
-+  GET_MATCHES_HEADER(3)
-+
-+  HASH3_CALC;
-+
-+  delta2 = p->pos - p->hash[hash2Value];
-+  curMatch = p->hash[kFix3HashSize + hashValue];
-+
-+  p->hash[hash2Value] =
-+  p->hash[kFix3HashSize + hashValue] = p->pos;
-+
-+
-+  maxLen = 2;
-+  offset = 0;
-+  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+  {
-+    for (; maxLen != lenLimit; maxLen++)
-+      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+        break;
-+    distances[0] = maxLen;
-+    distances[1] = delta2 - 1;
-+    offset = 2;
-+    if (maxLen == lenLimit)
-+    {
-+      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
-+      MOVE_POS_RET;
-+    }
-+  }
-+  GET_MATCHES_FOOTER(offset, maxLen)
-+}
++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
 +
 +static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
 +{
@@ -1716,108 +1490,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  GET_MATCHES_FOOTER(offset, maxLen)
 +}
 +
-+static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
-+  GET_MATCHES_HEADER(4)
-+
-+  HASH4_CALC;
-+
-+  delta2 = p->pos - p->hash[                hash2Value];
-+  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
-+  curMatch = p->hash[kFix4HashSize + hashValue];
-+
-+  p->hash[                hash2Value] =
-+  p->hash[kFix3HashSize + hash3Value] =
-+  p->hash[kFix4HashSize + hashValue] = p->pos;
-+
-+  maxLen = 1;
-+  offset = 0;
-+  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
-+  {
-+    distances[0] = maxLen = 2;
-+    distances[1] = delta2 - 1;
-+    offset = 2;
-+  }
-+  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
-+  {
-+    maxLen = 3;
-+    distances[offset + 1] = delta3 - 1;
-+    offset += 2;
-+    delta2 = delta3;
-+  }
-+  if (offset != 0)
-+  {
-+    for (; maxLen != lenLimit; maxLen++)
-+      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
-+        break;
-+    distances[offset - 2] = maxLen;
-+    if (maxLen == lenLimit)
-+    {
-+      p->son[p->cyclicBufferPos] = curMatch;
-+      MOVE_POS_RET;
-+    }
-+  }
-+  if (maxLen < 3)
-+    maxLen = 3;
-+  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+    distances + offset, maxLen) - (distances));
-+  MOVE_POS_RET
-+}
-+
-+UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
-+{
-+  UInt32 offset;
-+  GET_MATCHES_HEADER(3)
-+  HASH_ZIP_CALC;
-+  curMatch = p->hash[hashValue];
-+  p->hash[hashValue] = p->pos;
-+  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
-+    distances, 2) - (distances));
-+  MOVE_POS_RET
-+}
-+
-+static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(2)
-+    HASH2_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
-+void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(3)
-+    HASH_ZIP_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
-+static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    UInt32 hash2Value;
-+    SKIP_HEADER(3)
-+    HASH3_CALC;
-+    curMatch = p->hash[kFix3HashSize + hashValue];
-+    p->hash[hash2Value] =
-+    p->hash[kFix3HashSize + hashValue] = p->pos;
-+    SKIP_FOOTER
-+  }
-+  while (--num != 0);
-+}
-+
 +static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
 +{
 +  do
@@ -1834,67 +1506,18 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  while (--num != 0);
 +}
 +
-+static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    UInt32 hash2Value, hash3Value;
-+    SKIP_HEADER(4)
-+    HASH4_CALC;
-+    curMatch = p->hash[kFix4HashSize + hashValue];
-+    p->hash[                hash2Value] =
-+    p->hash[kFix3HashSize + hash3Value] =
-+    p->hash[kFix4HashSize + hashValue] = p->pos;
-+    p->son[p->cyclicBufferPos] = curMatch;
-+    MOVE_POS
-+  }
-+  while (--num != 0);
-+}
-+
-+void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
-+{
-+  do
-+  {
-+    SKIP_HEADER(3)
-+    HASH_ZIP_CALC;
-+    curMatch = p->hash[hashValue];
-+    p->hash[hashValue] = p->pos;
-+    p->son[p->cyclicBufferPos] = curMatch;
-+    MOVE_POS
-+  }
-+  while (--num != 0);
-+}
-+
 +void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
 +{
 +  vTable->Init = (Mf_Init_Func)MatchFinder_Init;
 +  vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
 +  vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
 +  vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
-+  if (!p->btMode)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
-+  }
-+  else if (p->numHashBytes == 2)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
-+  }
-+  else if (p->numHashBytes == 3)
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
-+  }
-+  else
-+  {
-+    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
-+    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
-+  }
++  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
++  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
 +}
 --- /dev/null
 +++ b/lib/lzma/LzmaDec.c
-@@ -0,0 +1,999 @@
+@@ -0,0 +1,925 @@
 +/* LzmaDec.c -- LZMA Decoder
 +2009-09-20 : Igor Pavlov : Public domain */
 +
@@ -2579,7 +2202,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->needFlush = 0;
 +}
 +
-+void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
 +{
 +  p->needFlush = 1;
 +  p->remainLen = 0;
@@ -2595,7 +2218,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    p->needInitState = 1;
 +}
 +
-+void LzmaDec_Init(CLzmaDec *p)
++static void LzmaDec_Init(CLzmaDec *p)
 +{
 +  p->dicPos = 0;
 +  LzmaDec_InitDicAndState(p, True, True);
@@ -2613,7 +2236,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->needInitState = 0;
 +}
 +
-+SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
++static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
 +    ELzmaFinishMode finishMode, ELzmaStatus *status)
 +{
 +  SizeT inSize = *srcLen;
@@ -2734,65 +2357,13 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
 +}
 +
-+SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
-+{
-+  SizeT outSize = *destLen;
-+  SizeT inSize = *srcLen;
-+  *srcLen = *destLen = 0;
-+  for (;;)
-+  {
-+    SizeT inSizeCur = inSize, outSizeCur, dicPos;
-+    ELzmaFinishMode curFinishMode;
-+    SRes res;
-+    if (p->dicPos == p->dicBufSize)
-+      p->dicPos = 0;
-+    dicPos = p->dicPos;
-+    if (outSize > p->dicBufSize - dicPos)
-+    {
-+      outSizeCur = p->dicBufSize;
-+      curFinishMode = LZMA_FINISH_ANY;
-+    }
-+    else
-+    {
-+      outSizeCur = dicPos + outSize;
-+      curFinishMode = finishMode;
-+    }
-+
-+    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
-+    src += inSizeCur;
-+    inSize -= inSizeCur;
-+    *srcLen += inSizeCur;
-+    outSizeCur = p->dicPos - dicPos;
-+    memcpy(dest, p->dic + dicPos, outSizeCur);
-+    dest += outSizeCur;
-+    outSize -= outSizeCur;
-+    *destLen += outSizeCur;
-+    if (res != 0)
-+      return res;
-+    if (outSizeCur == 0 || outSize == 0)
-+      return SZ_OK;
-+  }
-+}
-+
-+void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
++static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
 +{
 +  alloc->Free(alloc, p->probs);
 +  p->probs = 0;
 +}
 +
-+static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
-+{
-+  alloc->Free(alloc, p->dic);
-+  p->dic = 0;
-+}
-+
-+void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
-+{
-+  LzmaDec_FreeProbs(p, alloc);
-+  LzmaDec_FreeDict(p, alloc);
-+}
-+
-+SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
++static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
 +{
 +  UInt32 dicSize;
 +  Byte d;
@@ -2832,7 +2403,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
 +{
 +  CLzmaProps propNew;
 +  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
@@ -2841,28 +2412,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
-+{
-+  CLzmaProps propNew;
-+  SizeT dicBufSize;
-+  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
-+  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
-+  dicBufSize = propNew.dicSize;
-+  if (p->dic == 0 || dicBufSize != p->dicBufSize)
-+  {
-+    LzmaDec_FreeDict(p, alloc);
-+    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
-+    if (p->dic == 0)
-+    {
-+      LzmaDec_FreeProbs(p, alloc);
-+      return SZ_ERROR_MEM;
-+    }
-+  }
-+  p->dicBufSize = dicBufSize;
-+  p->prop = propNew;
-+  return SZ_OK;
-+}
-+
 +SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
 +    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
 +    ELzmaStatus *status, ISzAlloc *alloc)
@@ -2896,7 +2445,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +}
 --- /dev/null
 +++ b/lib/lzma/LzmaEnc.c
-@@ -0,0 +1,2271 @@
+@@ -0,0 +1,2123 @@
 +/* LzmaEnc.c -- LZMA Encoder
 +2009-11-24 : Igor Pavlov : Public domain */
 +
@@ -2952,7 +2501,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->writeEndMark = 0;
 +}
 +
-+void LzmaEncProps_Normalize(CLzmaEncProps *p)
++static void LzmaEncProps_Normalize(CLzmaEncProps *p)
 +{
 +  int level = p->level;
 +  if (level < 0) level = 5;
@@ -2975,7 +2524,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +      #endif
 +}
 +
-+UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
++static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
 +{
 +  CLzmaEncProps props = *props2;
 +  LzmaEncProps_Normalize(&props);
@@ -2992,7 +2541,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +
 +#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
 +
-+UInt32 GetPosSlot1(UInt32 pos)
++static UInt32 GetPosSlot1(UInt32 pos)
 +{
 +  UInt32 res;
 +  BSR2_RET(pos, res);
@@ -3006,7 +2555,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +#define kNumLogBits (9 + (int)sizeof(size_t) / 2)
 +#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
 +
-+void LzmaEnc_FastPosInit(Byte *g_FastPos)
++static void LzmaEnc_FastPosInit(Byte *g_FastPos)
 +{
 +  int c = 2, slotFast;
 +  g_FastPos[0] = 0;
@@ -3238,58 +2787,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  CSaveState saveState;
 +} CLzmaEnc;
 +
-+void LzmaEnc_SaveState(CLzmaEncHandle pp)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  CSaveState *dest = &p->saveState;
-+  int i;
-+  dest->lenEnc = p->lenEnc;
-+  dest->repLenEnc = p->repLenEnc;
-+  dest->state = p->state;
-+
-+  for (i = 0; i < kNumStates; i++)
-+  {
-+    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+  }
-+  for (i = 0; i < kNumLenToPosStates; i++)
-+    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
-+}
-+
-+void LzmaEnc_RestoreState(CLzmaEncHandle pp)
-+{
-+  CLzmaEnc *dest = (CLzmaEnc *)pp;
-+  const CSaveState *p = &dest->saveState;
-+  int i;
-+  dest->lenEnc = p->lenEnc;
-+  dest->repLenEnc = p->repLenEnc;
-+  dest->state = p->state;
-+
-+  for (i = 0; i < kNumStates; i++)
-+  {
-+    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
-+    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
-+  }
-+  for (i = 0; i < kNumLenToPosStates; i++)
-+    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
-+  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
-+  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
-+  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
-+  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
-+  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
-+  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
-+  memcpy(dest->reps, p->reps, sizeof(p->reps));
-+  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
-+}
-+
 +SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -3499,7 +2996,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  while (symbol < 0x10000);
 +}
 +
-+void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
 +{
 +  UInt32 i;
 +  for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
@@ -4575,7 +4072,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->matchPriceCount = 0;
 +}
 +
-+void LzmaEnc_Construct(CLzmaEnc *p)
++static void LzmaEnc_Construct(CLzmaEnc *p)
 +{
 +  RangeEnc_Construct(&p->rc);
 +  MatchFinder_Construct(&p->matchFinderBase);
@@ -4608,7 +4105,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return p;
 +}
 +
-+void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
 +{
 +  alloc->Free(alloc, p->litProbs);
 +  alloc->Free(alloc, p->saveState.litProbs);
@@ -4616,7 +4113,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->saveState.litProbs = 0;
 +}
 +
-+void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
 +{
 +  #ifndef _7ZIP_ST
 +  MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
@@ -4846,7 +4343,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+void LzmaEnc_Init(CLzmaEnc *p)
++static void LzmaEnc_Init(CLzmaEnc *p)
 +{
 +  UInt32 i;
 +  p->state = 0;
@@ -4904,7 +4401,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->lpMask = (1 << p->lp) - 1;
 +}
 +
-+void LzmaEnc_InitPrices(CLzmaEnc *p)
++static void LzmaEnc_InitPrices(CLzmaEnc *p)
 +{
 +  if (!p->fastMode)
 +  {
@@ -4936,26 +4433,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return SZ_OK;
 +}
 +
-+static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  p->matchFinderBase.stream = inStream;
-+  p->needInit = 1;
-+  p->rc.outStream = outStream;
-+  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
-+}
-+
-+SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
-+    ISeqInStream *inStream, UInt32 keepWindowSize,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  p->matchFinderBase.stream = inStream;
-+  p->needInit = 1;
-+  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
-+}
-+
 +static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
 +{
 +  p->matchFinderBase.directInput = 1;
@@ -4963,7 +4440,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  p->matchFinderBase.directInputRem = srcLen;
 +}
 +
-+SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
 +    UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -4973,7 +4450,7 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
 +}
 +
-+void LzmaEnc_Finish(CLzmaEncHandle pp)
++static void LzmaEnc_Finish(CLzmaEncHandle pp)
 +{
 +  #ifndef _7ZIP_ST
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -5006,53 +4483,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return size;
 +}
 +
-+
-+UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
-+{
-+  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
-+}
-+
-+const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
-+{
-+  const CLzmaEnc *p = (CLzmaEnc *)pp;
-+  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
-+}
-+
-+SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
-+    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)pp;
-+  UInt64 nowPos64;
-+  SRes res;
-+  CSeqOutStreamBuf outStream;
-+
-+  outStream.funcTable.Write = MyWrite;
-+  outStream.data = dest;
-+  outStream.rem = *destLen;
-+  outStream.overflow = False;
-+
-+  p->writeEndMark = False;
-+  p->finished = False;
-+  p->result = SZ_OK;
-+
-+  if (reInit)
-+    LzmaEnc_Init(p);
-+  LzmaEnc_InitPrices(p);
-+  nowPos64 = p->nowPos64;
-+  RangeEnc_Init(&p->rc);
-+  p->rc.outStream = &outStream.funcTable;
-+
-+  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
-+
-+  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
-+  *destLen -= outStream.rem;
-+  if (outStream.overflow)
-+    return SZ_ERROR_OUTPUT_EOF;
-+
-+  return res;
-+}
-+
 +static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
 +{
 +  SRes res = SZ_OK;
@@ -5083,13 +4513,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +  return res;
 +}
 +
-+SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
-+    ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
-+  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
-+}
-+
 +SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
 +{
 +  CLzmaEnc *p = (CLzmaEnc *)pp;
@@ -5146,28 +4569,6 @@ Signed-off-by: Alexandros C. Couloumbis <alex@ozo.com>
 +    return SZ_ERROR_OUTPUT_EOF;
 +  return res;
 +}
-+
-+SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
-+    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
-+    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-+{
-+  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
-+  SRes res;
-+  if (p == 0)
-+    return SZ_ERROR_MEM;
-+
-+  res = LzmaEnc_SetProps(p, props);
-+  if (res == SZ_OK)
-+  {
-+    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
-+    if (res == SZ_OK)
-+      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
-+          writeEndMark, progress, alloc, allocBig);
-+  }
-+
-+  LzmaEnc_Destroy(p, alloc, allocBig);
-+  return res;
-+}
 --- /dev/null
 +++ b/lib/lzma/Makefile
 @@ -0,0 +1,7 @@
diff --git a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
index 49c6ea1c03..670c2b04a8 100644
--- a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
+++ b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
 
 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2789,8 +2789,8 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -2802,8 +2802,8 @@ static irqreturn_t mtk_handle_irq_rx(int
  
  	eth->rx_events++;
  	if (likely(napi_schedule_prep(&eth->rx_napi))) {
@@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	}
  
  	return IRQ_HANDLED;
-@@ -2802,8 +2802,8 @@ static irqreturn_t mtk_handle_irq_tx(int
+@@ -2815,8 +2815,8 @@ static irqreturn_t mtk_handle_irq_tx(int
  
  	eth->tx_events++;
  	if (likely(napi_schedule_prep(&eth->tx_napi))) {
@@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  	}
  
  	return IRQ_HANDLED;
-@@ -4074,6 +4074,8 @@ static int mtk_probe(struct platform_dev
+@@ -4114,6 +4114,8 @@ static int mtk_probe(struct platform_dev
  	 * for NAPI to work
  	 */
  	init_dummy_netdev(&eth->dummy_dev);
diff --git a/target/linux/generic/pending-5.15/781-net-ethernet-mtk_eth_soc-fix-mask-of-RX_DMA_GET_SPOR.patch b/target/linux/generic/pending-5.15/781-net-ethernet-mtk_eth_soc-fix-mask-of-RX_DMA_GET_SPOR.patch
new file mode 100644
index 0000000000..65845ea4c6
--- /dev/null
+++ b/target/linux/generic/pending-5.15/781-net-ethernet-mtk_eth_soc-fix-mask-of-RX_DMA_GET_SPOR.patch
@@ -0,0 +1,45 @@
+From 8743af8a77dd909970462ca578358128cce5d027 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Tue, 27 Sep 2022 15:39:39 +0100
+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix mask of
+ RX_DMA_GET_SPORT{,_V2}
+To: linux-mediatek@lists.infradead.org,
+    netdev@vger.kernel.org,
+    Lorenzo Bianconi <lorenzo@kernel.org>
+Cc: Sujuan Chen <sujuan.chen@mediatek.com>,
+    Bo Jiao <Bo.Jiao@mediatek.com>,
+    Felix Fietkau <nbd@nbd.name>,
+    John Crispin <john@phrozen.org>,
+    Sean Wang <sean.wang@mediatek.com>,
+    Mark Lee <Mark-MC.Lee@mediatek.com>,
+    David S. Miller <davem@davemloft.net>,
+    Eric Dumazet <edumazet@google.com>,
+    Jakub Kicinski <kuba@kernel.org>,
+    Paolo Abeni <pabeni@redhat.com>,
+    Matthias Brugger <matthias.bgg@gmail.com>,
+    Chen Minqiang <ptpt52@gmail.com>
+
+The bitmasks applied in RX_DMA_GET_SPORT and RX_DMA_GET_SPORT_V2 macros
+were swapped. Fix that.
+
+Reported-by: Chen Minqiang <ptpt52@gmail.com>
+Fixes: 160d3a9b192985 ("net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support")
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+@@ -315,8 +315,8 @@
+ #define MTK_RXD5_PPE_CPU_REASON	GENMASK(22, 18)
+ #define MTK_RXD5_SRC_PORT	GENMASK(29, 26)
+ 
+-#define RX_DMA_GET_SPORT(x)	(((x) >> 19) & 0xf)
+-#define RX_DMA_GET_SPORT_V2(x)	(((x) >> 26) & 0x7)
++#define RX_DMA_GET_SPORT(x)	(((x) >> 19) & 0x7)
++#define RX_DMA_GET_SPORT_V2(x)	(((x) >> 26) & 0xf)
+ 
+ /* PDMA V2 descriptor rxd3 */
+ #define RX_DMA_VTAG_V2		BIT(0)
diff --git a/target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-fix-state-in-__mtk_foe_entr.patch b/target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-fix-state-in-__mtk_foe_entr.patch
new file mode 100644
index 0000000000..cc71ec60f3
--- /dev/null
+++ b/target/linux/generic/pending-5.15/782-net-ethernet-mtk_eth_soc-fix-state-in-__mtk_foe_entr.patch
@@ -0,0 +1,51 @@
+From cd8e1f340c3e571b78952d4ca2c128d183a47cc2 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Wed, 28 Sep 2022 02:17:02 +0100
+Subject: [PATCH] net: ethernet: mtk_eth_soc: fix state in
+ __mtk_foe_entry_clear
+To: linux-mediatek@lists.infradead.org,
+    netdev@vger.kernel.org,
+    Lorenzo Bianconi <lorenzo@kernel.org>
+Cc: Sujuan Chen <sujuan.chen@mediatek.com>,
+    Bo Jiao <Bo.Jiao@mediatek.com>,
+    Felix Fietkau <nbd@nbd.name>,
+    John Crispin <john@phrozen.org>,
+    Sean Wang <sean.wang@mediatek.com>,
+    Mark Lee <Mark-MC.Lee@mediatek.com>,
+    David S. Miller <davem@davemloft.net>,
+    Eric Dumazet <edumazet@google.com>,
+    Jakub Kicinski <kuba@kernel.org>,
+    Paolo Abeni <pabeni@redhat.com>,
+    Matthias Brugger <matthias.bgg@gmail.com>,
+    Chen Minqiang <ptpt52@gmail.com>,
+    Thomas Hühn <thomas.huehn@hs-nordhausen.de>
+
+Setting ib1 state to MTK_FOE_STATE_UNBIND in __mtk_foe_entry_clear
+routine as done by commit 0e80707d94e4c8 ("net: ethernet: mtk_eth_soc:
+fix typo in __mtk_foe_entry_clear") breaks flow offloading, at least
+on older MTK_NETSYS_V1 SoCs, OpenWrt users have confirmed the bug on
+MT7622 and MT7621 systems.
+Felix Fietkau suggested to use MTK_FOE_STATE_INVALID instead which
+works well on both, MTK_NETSYS_V1 and MTK_NETSYS_V2.
+
+Tested on MT7622 (Linksys E8450) and MT7986 (BananaPi BPI-R3).
+
+Suggested-by: Felix Fietkau <nbd@nbd.name>
+Fixes: 0e80707d94e4c8 ("net: ethernet: mtk_eth_soc: fix typo in __mtk_foe_entry_clear")
+Fixes: 33fc42de33278 ("net: ethernet: mtk_eth_soc: support creating mac address based offload entries")
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/ethernet/mediatek/mtk_ppe.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
+@@ -442,7 +442,7 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp
+ 		struct mtk_foe_entry *hwe = mtk_foe_get_entry(ppe, entry->hash);
+ 
+ 		hwe->ib1 &= ~MTK_FOE_IB1_STATE;
+-		hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_UNBIND);
++		hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID);
+ 		dma_wmb();
+ 	}
+ 	entry->hash = 0xffff;
diff --git a/target/linux/generic/pending-5.15/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch b/target/linux/generic/pending-5.15/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
index 530ab9ba13..05eadcf764 100644
--- a/target/linux/generic/pending-5.15/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
+++ b/target/linux/generic/pending-5.15/842-net-qmi_wwan-add-ZTE-MF286D-modem-19d2-1485.patch
@@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
 
 --- a/drivers/net/usb/qmi_wwan.c
 +++ b/drivers/net/usb/qmi_wwan.c
-@@ -1313,6 +1313,7 @@ static const struct usb_device_id produc
+@@ -1314,6 +1314,7 @@ static const struct usb_device_id produc
  	{QMI_FIXED_INTF(0x19d2, 0x1426, 2)},	/* ZTE MF91 */
  	{QMI_FIXED_INTF(0x19d2, 0x1428, 2)},	/* Telewell TW-LTE 4G v2 */
  	{QMI_FIXED_INTF(0x19d2, 0x1432, 3)},	/* ZTE ME3620 */
diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile
index 9f784e5a42..5d3458b835 100644
--- a/target/linux/ipq40xx/Makefile
+++ b/target/linux/ipq40xx/Makefile
@@ -15,7 +15,7 @@ KERNELNAME:=zImage Image dtbs
 include $(INCLUDE_DIR)/target.mk
 DEFAULT_PACKAGES += \
 	kmod-usb-dwc3-qcom \
-	kmod-leds-gpio kmod-gpio-button-hotplug swconfig \
+	kmod-leds-gpio kmod-gpio-button-hotplug \
 	kmod-ath10k-ct wpad-openssl \
 	kmod-usb3 kmod-usb-dwc3 ath10k-firmware-qca4019-ct \
 	uboot-envtools
diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
index 4b9522af92..74f31e778f 100644
--- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
@@ -10,7 +10,7 @@ board=$(board_name)
 
 case "$board" in
 alfa-network,ap120c-ac)
-	ucidef_set_led_netdev "wan" "WAN" "amber:wan" "eth1"
+	ucidef_set_led_netdev "wan" "WAN" "amber:wan" "wan"
 	;;
 asus,rt-ac42u)
 	ucidef_set_led_switch "lan1" "LAN1" "blue:lan-1" "switch0" "0x02"
@@ -24,7 +24,7 @@ asus,rt-ac58u)
 	;;
 avm,fritzbox-4040)
 	ucidef_set_led_wlan "wlan" "WLAN" "green:wlan" "phy0tpt" "phy1tpt"
-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
 	ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x1e"
 	;;
 avm,fritzbox-7530 |\
@@ -58,17 +58,17 @@ glinet,gl-ap1300)
 mikrotik,cap-ac)
 	ucidef_set_led_default "power" "POWER" "blue:power" "1"
 	ucidef_set_led_default "user" "USER" "green:user" "0"
-	ucidef_set_led_switch "eth1" "ETH1" "green:eth1" "switch0" "0x20"
-	ucidef_set_led_switch "eth2" "ETH2" "green:eth2" "switch0" "0x10"
+	ucidef_set_led_netdev "eth1" "ETH1" "green:eth1" "wan"
+	ucidef_set_led_netdev "eth2" "ETH2" "green:eth2" "lan"
 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy1tpt"
 	;;
 mikrotik,hap-ac3)
-	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
-	ucidef_set_led_switch "lan1" "LAN1" "green:lan1" "switch0" "0x10"
-	ucidef_set_led_switch "lan2" "LAN2" "green:lan2" "switch0" "0x08"
-	ucidef_set_led_switch "lan3" "LAN3" "green:lan3" "switch0" "0x04"
-	ucidef_set_led_switch "lan4" "LAN4" "green:lan4" "switch0" "0x02"
+	ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0"
+	ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "lan1"
+	ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "lan2"
+	ucidef_set_led_netdev "lan3" "LAN3" "green:lan3" "lan3"
+	ucidef_set_led_netdev "lan4" "LAN4" "green:lan4" "lan4"
 	ucidef_set_led_gpio "poe" "POE" "red:poe" "452" "0"
 	;;
 mikrotik,sxtsq-5-ac)
diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network
index d13d21334c..163dcdcbc6 100644
--- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
@@ -12,154 +12,52 @@ ipq40xx_setup_interfaces()
 
 	case "$board" in
 	8dev,habanero-dvk|\
-	8dev,jalapeno|\
-	alfa-network,ap120c-ac|\
-	engenius,emr3500|\
-	engenius,ens620ext|\
-	luma,wrtq-329acn|\
-	netgear,wac510|\
-	plasmacloud,pa1200|\
-	plasmacloud,pa2200|\
-	sony,ncp-hg100-cellular)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		;;
-	aruba,ap-303|\
-	aruba,ap-365|\
-	avm,fritzrepeater-1200|\
-	dlink,dap-2610 |\
-	engenius,eap1300|\
-	engenius,emd1|\
-	extreme-networks,ws-ap3915i|\
-	meraki,mr33|\
-	meraki,mr74|\
-	mikrotik,lhgg-60ad|\
-	mikrotik,sxtsq-5-ac|\
-	netgear,ex6100v2|\
-	netgear,ex6150v2|\
-	zyxel,wre6606)
-		ucidef_set_interface_lan "eth0"
-		;;
-	aruba,ap-303h|\
-	teltonika,rutx10)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "0u@eth1" "5:wan"
-		;;
-	asus,map-ac2200|\
-	cilab,meshpoint-one|\
-	edgecore,ecw5211|\
-	edgecore,oap100|\
-	google,wifi|\
-	openmesh,a42|\
-	openmesh,a62)
-		ucidef_set_interfaces_lan_wan "eth1" "eth0"
-		;;
-	mikrotik,cap-ac)
-		ucidef_add_switch "switch0" \
-			"0t@eth0" "4:lan" "5:wan"
-		;;
-	asus,rt-ac42u|\
+	avm,fritzbox-4040|\
 	asus,rt-ac58u|\
+	linksys,ea6350v3|\
+	linksys,ea8300|\
+	linksys,mr8300|\
 	mikrotik,hap-ac2|\
 	mikrotik,hap-ac3|\
 	p2w,r619ac-64m|\
 	p2w,r619ac-128m|\
+	pakedge,wr-1|\
 	zyxel,nbg6617)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1"
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
 		;;
-	avm,fritzbox-4040|\
-	linksys,ea6350v3|\
-	linksys,ea8300)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan"
+	8dev,jalapeno|\
+	alfa-network,ap120c-ac|\
+	asus,map-ac2200|\
+	cilab,meshpoint-one|\
+	edgecore,ecw5211|\
+	glinet,gl-b2200|\
+	luma,wrtq-329acn|\
+	mikrotik,cap-ac|\
+	netgear,wac510)
+		ucidef_set_interfaces_lan_wan "lan" "wan"
 		;;
-	linksys,mr8300)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+	aruba,ap-303|\
+	avm,fritzrepeater-1200|\
+	meraki,mr33|\
+	meraki,mr74|\
+	mikrotik,lhgg-60ad|\
+	mikrotik,sxtsq-5-ac)
+		ucidef_set_interface_lan "lan"
 		;;
 	avm,fritzbox-7530)
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1"
-		;;
-	avm,fritzrepeater-3000|\
-	linksys,whw01-v1)
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "4:lan:1" "5:lan:2"
-		;;
-	compex,wpj419|\
-	compex,wpj428|\
-	engenius,eap2200|\
-	mikrotik,wap-ac)
-		ucidef_set_interface_lan "eth0 eth1"
-		;;
-	buffalo,wtr-m2133hp)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "2:lan:3" "3:lan:2" "4:lan:1"
+		ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
 		;;
 	cellc,rtl30vw)
-		ucidef_set_interface_lan "eth0"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "3:lan" "4:lan"
+		ucidef_set_interface_lan "lan1 lan2"
 		;;
-	devolo,magic-2-wifi-next)
-		ucidef_set_interface_lan "eth0 eth1 eth2"
+	glinet,gl-b1300)
+		ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
 		;;
-	ezviz,cs-w3-wd1200g-eup)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "2:lan:3" "3:lan:2" "4:lan:1" "0u@eth1" "5:wan"
-		;;
-	glinet,gl-ap1300 |\
-	glinet,gl-b1300 |\
-	glinet,gl-s1300)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "3:lan" "4:lan"
-		;;
-	glinet,gl-b2200)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan" "2:lan" "3:lan" "5:lan" "0u@eth1" "4:wan"
-		;;
-	mobipromo,cm520-79f)
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "3:lan:2" "4:lan:1"
-		ucidef_set_interface_wan "eth1"
-		;;
-	netgear,rbr50|\
-	netgear,rbs50|\
-	netgear,srr60|\
-	netgear,srs60)
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "2:lan" "3:lan" "4:lan"
-		ucidef_set_interface_wan "eth1"
-		;;
-	pakedge,wr-1)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0u@eth1" "5:wan"
-		;;
-	qxwlan,e2600ac-c1 |\
-	qxwlan,e2600ac-c2)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "3:lan" "4:lan" "0u@eth1" "5:wan"
-		;;
-	unielec,u4019-32m |\
-	tel,x1pro)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "0u@eth1" "5:wan"
+	compex,wpj428)
+		ucidef_set_interface_lan "lan1 lan2"
 		;;
 	zte,mf286d)
-		ucidef_set_interfaces_lan_wan "eth0" "eth1"
-		ucidef_add_switch "switch0" \
-			"0u@eth0" "2:lan:4" "3:lan:3" "4:lan:2" "0u@eth1" "5:wan"
+		ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" "wan"
 		;;
 	zte,mf289f)
 		ucidef_set_interfaces_lan_wan "eth0" "eth1"
@@ -216,7 +114,9 @@ ipq40xx_setup_macs()
 	ezviz,cs-w3-wd1200g-eup)
 		label_mac=$(mtd_get_mac_binary "ART" 0x6)
 		;;
-	linksys,ea6350v3)
+	linksys,ea6350v3|\
+	linksys,ea8300  |\
+	linksys,mr8300)
 		wan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
 		lan_mac=$(macaddr_add "$wan_mac" 1)
 		;;
diff --git a/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version b/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version
new file mode 100644
index 0000000000..70272f99ed
--- /dev/null
+++ b/target/linux/ipq40xx/base-files/etc/board.d/05_compat-version
@@ -0,0 +1,18 @@
+#
+# Copyright (C) 2022 OpenWrt.org
+#
+
+. /lib/functions.sh
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+	*)
+		ucidef_set_compat_version "1.1"
+		;;
+esac
+
+board_config_flush
+
+exit 0
diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
index 3ce2c4006e..64215746d5 100644
--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
@@ -13,7 +13,6 @@ case "$FIRMWARE" in
 	meraki,mr74)
 		caldata_extract_ubi "ART" 0x9000 0x844
 		caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844
-		ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 1)
 		;;
 	esac
 	;;
@@ -52,9 +51,6 @@ case "$FIRMWARE" in
 		caldata_extract_mmc "0:ART" 0x9000 0x2f20
 		ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x12)
 		;;
-	openmesh,a62)
-		caldata_extract "0:ART" 0x9000 0x2f20
-		;;
 	esac
 	;;
 "ath10k/pre-cal-ahb-a000000.wifi.bin")
@@ -120,7 +116,6 @@ case "$FIRMWARE" in
 	meraki,mr74)
 		caldata_extract_ubi "ART" 0x1000 0x2f20
 		caldata_valid "202f" || caldata_extract "ART" 0x1000 0x2f20
-		ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 2)
 		;;
 	mikrotik,cap-ac |\
 	mikrotik,hap-ac2 |\
@@ -217,7 +212,6 @@ case "$FIRMWARE" in
 	meraki,mr74)
 		caldata_extract_ubi "ART" 0x5000 0x2f20
 		caldata_valid "202f" || caldata_extract "ART" 0x5000 0x2f20
-		ath10k_patch_mac $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66) 3)
 		;;
 	mikrotik,cap-ac |\
 	mikrotik,hap-ac2 |\
diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
index 940af0528d..18c24e0511 100644
--- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
+++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
@@ -21,13 +21,8 @@ preinit_set_mac_address() {
 	linksys,ea8300|\
 	linksys,mr8300)
 		base_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
-		ip link set dev eth0 address "$base_mac"
-		ip link set dev eth1 address $(macaddr_add "$base_mac" 1)
-		;;
-	meraki,mr33|\
-	meraki,mr74)
-		mac_lan=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66)
-		[ -n "$mac_lan" ] && ip link set dev eth0 address "$mac_lan"
+		ip link set dev lan1 address $(macaddr_add "$base_mac" 1)
+		ip link set dev eth0 address $(macaddr_setbit "$base_mac" 7)
 		;;
 	mikrotik,wap-ac)
 		base_mac=$(cat /sys/firmware/mikrotik/hard_config/mac_base)
diff --git a/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh
deleted file mode 100644
index a8a4469e6c..0000000000
--- a/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh
+++ /dev/null
@@ -1,24 +0,0 @@
-set_preinit_iface() {
-	. /lib/functions.sh
-
-	case $(board_name) in
-	aruba,ap-303| \
-	asus,rt-ac42u| \
-	asus,rt-ac58u| \
-	avm,fritzbox-4040| \
-	ezviz,cs-w3-wd1200g-eup| \
-	glinet,gl-b1300| \
-	linksys,ea8300| \
-	linksys,mr8300| \
-	meraki,mr33| \
-	meraki,mr74| \
-	zyxel,nbg6617)
-		ifname=eth0
-		;;
-	devolo,magic-2-wifi-next)
-		ifname=eth1
-		;;
-	esac
-}
-
-boot_hook_add preinit_main set_preinit_iface
diff --git a/target/linux/ipq40xx/config-5.10 b/target/linux/ipq40xx/config-5.10
index 6d325bcaa2..7a0d966aa0 100644
--- a/target/linux/ipq40xx/config-5.10
+++ b/target/linux/ipq40xx/config-5.10
@@ -1,7 +1,6 @@
 CONFIG_ALIGNMENT_TRAP=y
 # CONFIG_APQ_GCC_8084 is not set
 # CONFIG_APQ_MMCC_8084 is not set
-CONFIG_AR40XX_PHY=y
 CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_IPQ40XX=y
@@ -148,7 +147,6 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_EDAC_ATOMIC_SCRUB=y
 CONFIG_EDAC_SUPPORT=y
 CONFIG_EEPROM_AT24=y
-CONFIG_ESSEDMA=y
 CONFIG_EXTCON=y
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
@@ -182,6 +180,7 @@ CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_74X164=y
 CONFIG_GPIO_WATCHDOG=y
 CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
+CONFIG_GRO_CELLS=y
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDEN_BRANCH_PREDICTOR=y
 CONFIG_HARDIRQS_SW_RESEND=y
@@ -289,8 +288,13 @@ CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEON=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_QCA8K_IPQ4019=y
+CONFIG_NET_DSA_TAG_IPQ4019=y
 CONFIG_NET_FLOW_LIMIT=y
 CONFIG_NET_PTP_CLASSIFY=y
+CONFIG_NET_SWITCHDEV=y
 CONFIG_NLS=y
 CONFIG_NO_HZ=y
 CONFIG_NO_HZ_COMMON=y
@@ -328,6 +332,7 @@ CONFIG_PCI_MSI_IRQ_DOMAIN=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
 # CONFIG_PHY_QCOM_APQ8064_SATA is not set
 CONFIG_PHY_QCOM_IPQ4019_USB=y
 # CONFIG_PHY_QCOM_IPQ806X_SATA is not set
@@ -381,6 +386,7 @@ CONFIG_QCOM_BAM_DMA=y
 # CONFIG_QCOM_GSBI is not set
 # CONFIG_QCOM_HFPLL is not set
 # CONFIG_QCOM_IOMMU is not set
+CONFIG_QCOM_IPQ4019_ESS_EDMA=y
 # CONFIG_QCOM_LLCC is not set
 # CONFIG_QCOM_OCMEM is not set
 # CONFIG_QCOM_PDC is not set
@@ -457,8 +463,6 @@ CONFIG_SPMI=y
 CONFIG_SPMI_MSM_PMIC_ARB=y
 # CONFIG_SPMI_PMIC_CLKDIV is not set
 CONFIG_SRCU=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_LEDS=y
 CONFIG_SWPHY=y
 CONFIG_SWP_EMULATE=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
diff --git a/target/linux/ipq40xx/config-5.15 b/target/linux/ipq40xx/config-5.15
index 82a3f9f8a3..22b2d03d80 100644
--- a/target/linux/ipq40xx/config-5.15
+++ b/target/linux/ipq40xx/config-5.15
@@ -1,7 +1,6 @@
 CONFIG_ALIGNMENT_TRAP=y
 # CONFIG_APQ_GCC_8084 is not set
 # CONFIG_APQ_MMCC_8084 is not set
-CONFIG_AR40XX_PHY=y
 CONFIG_ARCH_32BIT_OFF_T=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_IPQ40XX=y
@@ -149,7 +148,6 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_EDAC_ATOMIC_SCRUB=y
 CONFIG_EDAC_SUPPORT=y
 CONFIG_EEPROM_AT24=y
-CONFIG_ESSEDMA=y
 CONFIG_EXTCON=y
 CONFIG_FIXED_PHY=y
 CONFIG_FIX_EARLYCON_MEM=y
@@ -187,6 +185,7 @@ CONFIG_GPIO_74X164=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_WATCHDOG=y
 CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
+CONFIG_GRO_CELLS=y
 CONFIG_HANDLE_DOMAIN_IRQ=y
 CONFIG_HARDEN_BRANCH_PREDICTOR=y
 CONFIG_HARDIRQS_SW_RESEND=y
@@ -296,9 +295,14 @@ CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MUTEX_SPIN_ON_OWNER=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEON=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_DSA_QCA8K_IPQ4019=y
+CONFIG_NET_DSA_TAG_IPQ4019=y
 CONFIG_NET_FLOW_LIMIT=y
 CONFIG_NET_PTP_CLASSIFY=y
 CONFIG_NET_SELFTESTS=y
+CONFIG_NET_SWITCHDEV=y
 CONFIG_NLS=y
 CONFIG_NO_HZ=y
 CONFIG_NO_HZ_COMMON=y
@@ -335,6 +339,7 @@ CONFIG_PCI_MSI_IRQ_DOMAIN=y
 CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
 # CONFIG_PHY_QCOM_APQ8064_SATA is not set
 CONFIG_PHY_QCOM_IPQ4019_USB=y
 # CONFIG_PHY_QCOM_IPQ806X_SATA is not set
@@ -389,6 +394,7 @@ CONFIG_QCOM_BAM_DMA=y
 # CONFIG_QCOM_GSBI is not set
 # CONFIG_QCOM_HFPLL is not set
 # CONFIG_QCOM_IOMMU is not set
+CONFIG_QCOM_IPQ4019_ESS_EDMA=y
 # CONFIG_QCOM_LLCC is not set
 # CONFIG_QCOM_OCMEM is not set
 # CONFIG_QCOM_PDC is not set
@@ -466,8 +472,6 @@ CONFIG_SPMI=y
 CONFIG_SPMI_MSM_PMIC_ARB=y
 # CONFIG_SPMI_PMIC_CLKDIV is not set
 CONFIG_SRCU=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_LEDS=y
 CONFIG_SWPHY=y
 CONFIG_SWP_EMULATE=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
index f571da510e..2236edf80b 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-a42.dts
@@ -21,10 +21,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@194b000 {
 			/* select hostmode */
 			compatible = "qcom,tcsr";
@@ -62,14 +58,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -174,22 +162,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &usb2_hs_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
index b2d8aa4999..def0401ac5 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts
@@ -14,6 +14,7 @@
 		led-failsafe = &status;
 		led-running = &status;
 		led-upgrade = &status;
+		ethernet1 = &swport5;
 	};
 
 	keys {
@@ -65,10 +66,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -118,17 +115,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x10>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -277,22 +263,6 @@
 	#gpio-cells = <2>;
 };
 
-&gmac0 {
-	qcom,forced_duplex = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	vlan_tag = <1 0x10>;
-};
-
-&gmac1 {
-	qcom,forced_duplex = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	vlan_tag = <2 0x20>;
-};
-
 &tlmm {
 	i2c0_pins: i2c0_pinmux {
 		mux_i2c {
@@ -351,6 +321,24 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
index b18ba4d46a..0609324310 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts
@@ -61,16 +61,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,poll_required = <0>;
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	keys {
@@ -222,10 +212,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	vlan_tag = <0 0x3f>;
-};
-
 &ethphy3 {
 	gpio-controller;
 	#gpio-cells = <2>;
@@ -236,6 +222,24 @@
 	#gpio-cells = <2>;
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
index 52311755b7..dea5c2dc36 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts
@@ -29,10 +29,6 @@
 			reset-delay-us = <5000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -64,14 +60,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	leds {
@@ -264,13 +252,3 @@
 	nvmem-cell-names = "pre-calibration";
 	nvmem-cells = <&precal_art_5000>;
 };
-
-&gmac0 {
-	nvmem-cell-names = "mac-address";
-	nvmem-cells = <&macaddr_art_6>;
-};
-
-&gmac1 {
-	nvmem-cell-names = "mac-address";
-	nvmem-cells = <&macaddr_art_0>;
-};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
index e3afddb376..ff8053c42b 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts
@@ -17,11 +17,6 @@
 	};
 
 	soc {
-		edma@c080000 {
-			qcom,num_gmac = <1>;
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -51,16 +46,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x20>;
-			switch_wan_bmp = <0x00>;
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
 	};
 
 	leds {
@@ -192,14 +177,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x20>;
-};
-
 &mdio {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
index a99aa90b61..75b556a7f9 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts
@@ -25,10 +25,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -68,14 +64,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -114,6 +102,34 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
index 6a7f4e5b0f..a8f24aa00e 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts
@@ -18,10 +18,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -47,14 +43,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -227,14 +215,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	vlan_tag = <1 0x10>;
-};
-
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
index 6f4d7b5f32..3060b7bd1c 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts
@@ -14,7 +14,8 @@
 		led-failsafe = &led_power;
 		led-running = &led_power;
 		led-upgrade = &led_power;
-		label-mac-device = &gmac0;
+		ethernet0 = &swport5;
+		ethernet1 = &gmac;
 	};
 
 	chosen {
@@ -57,10 +58,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -110,17 +107,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x10>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -303,16 +289,22 @@
 	pinctrl-names = "default";
 };
 
-&gmac0 {
-	qcom,poll_required = <1>;
-	qcom,phy_mdio_addr = <4>;
-	vlan_tag = <2 0x20>;
+&gmac {
+	status = "okay";
 };
 
-&gmac1 {
-	qcom,poll_required = <1>;
-	qcom,phy_mdio_addr = <3>;
-	vlan_tag = <1 0x10>;
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan";
+};
+
+&swport5 {
+	status = "okay";
 };
 
 &wifi0 {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
index b405867134..396595ba51 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emd1.dts
@@ -25,10 +25,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -54,17 +50,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x20>;
-			switch_wan_bmp = <0x00>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	keys {
@@ -210,14 +195,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x20>;
-};
-
 &cryptobam {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
index 848e5c2363..3616149451 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts
@@ -18,10 +18,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -51,14 +47,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -212,14 +200,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	vlan_tag = <1 0x10>;
-};
-
-&gmac1 {
-	vlan_tag = <2 0x20>;
-};
-
 &usb2_hs_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
index b765d68b51..69275e24b8 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts
@@ -26,14 +26,6 @@
 			status = "okay";
 		};
 
-		mdio@90000 {
-			status = "okay";
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -60,14 +52,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		/*
 		 * Disable the broken restart as a workaround for the buggy
 		 * 3.0.0/3.0.1 U-boots that ship with the device.
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
index eb97130c27..ddb2c9bd03 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
@@ -33,10 +33,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -62,15 +58,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	aliases {
@@ -78,7 +65,6 @@
 		led-failsafe = &power_amber;
 		led-running = &power_green;
 		led-upgrade = &power_amber;
-		label-mac-device = &gmac0;
 	};
 
 	keys {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
index 77b1810f09..e448206c36 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts
@@ -14,7 +14,6 @@
 		led-failsafe = &flash;
 		led-running = &power;
 		led-upgrade = &flash;
-		label-mac-device = &gmac0;
 	};
 
 	soc {
@@ -26,10 +25,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -69,14 +64,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -286,6 +273,34 @@
 	#gpio-cells = <2>;
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &usb3_ss_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
index b96f014dd2..41ed66e595 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts
@@ -35,10 +35,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -80,16 +76,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x18>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
index b5818cef39..c8868d8b30 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts
@@ -78,14 +78,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -259,6 +251,38 @@
 	qcom,single-led-10;
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+	label = "lan4";
+};
+
+&swport2 {
+	status = "okay";
+	label = "lan3";
+};
+
+&swport3 {
+	status = "okay";
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+	label = "lan1";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
index da09e53cc3..4d09e86dd6 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi
@@ -7,6 +7,10 @@
 #include <dt-bindings/soc/qcom,tcsr.h>
 
 / {
+	aliases {
+		ethernet1 = &swport5;
+	};
+
 	soc {
 		rng@22000 {
 			status = "okay";
@@ -19,10 +23,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -69,16 +69,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x10>; /* lan port bitmap */
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -241,18 +231,22 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,poll_required = <1>;
-	qcom,poll_required_dynamic = <1>;
-	qcom,phy_mdio_addr = <3>;
-	vlan_tag = <1 0x10>;
+&gmac {
+	status = "okay";
 };
 
-&gmac1 {
-	qcom,poll_required = <1>;
-	qcom,poll_required_dynamic = <1>;
-	qcom,phy_mdio_addr = <4>;
-	vlan_tag = <2 0x20>;
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan";
+};
+
+&swport5 {
+	status = "okay";
 };
 
 &wifi0 {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
index 2709aef502..29d51aa9e1 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts
@@ -24,13 +24,6 @@
 			pinctrl-names = "default";
 			reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
 			reset-delay-us = <2000>;
-
-			/delete-node/ ethernet-phy@0;
-			/delete-node/ ethernet-phy@1;
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
 		};
 
 		crypto@8e3a000 {
@@ -41,42 +34,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x3e>;
-			switch_wan_bmp = <0x0>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <3>;
-
-			gmac0 {
-				qcom,phy_mdio_addr = <3>;
-				qcom,poll_required = <1>;
-				/delete-property/ qcom,forced_speed;
-				/delete-property/ qcom,forced_duplex;
-				vlan_tag = <1 0x10>;
-			};
-
-			gmac1 {
-				qcom,phy_mdio_addr = <2>;
-				qcom,poll_required = <1>;
-				/delete-property/ qcom,forced_speed;
-				/delete-property/ qcom,forced_duplex;
-				vlan_tag = <1 0x08>;
-			};
-
-			gmac2 {
-				local-mac-address = [00 00 00 00 00 00];
-				qcom,phy_mdio_addr = <4>;
-				qcom,poll_required = <1>;
-				/delete-property/ qcom,forced_speed;
-				/delete-property/ qcom,forced_duplex;
-				vlan_tag = <1 0x20>;
-			};
-		};
-
 		gpio_export {
 			compatible = "gpio-export";
 			#size-cells = <0>;
@@ -192,6 +149,14 @@
 	status = "okay";
 };
 
+&ethphy0 {
+	status = "disabled";
+};
+
+&ethphy1 {
+	status = "disabled";
+};
+
 &wifi0 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "devolo,magic-2-wifi-next";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
index caafc1beb4..ff7252d696 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
@@ -35,10 +35,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -103,14 +99,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -314,6 +302,42 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+
+	label = "lan4";
+};
+
+&swport2 {
+	status = "okay";
+
+	label = "lan3";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan1";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "ZyXEL-NBG6617";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
index bcb9552ce7..4e08dd39d0 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts
@@ -21,10 +21,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@194b000 {
 			/* select hostmode */
 			compatible = "qcom,tcsr";
@@ -62,14 +58,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -166,22 +154,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &usb2_hs_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
index ac4d4a139c..87705e5f60 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
@@ -30,10 +30,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -84,14 +80,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -289,6 +277,34 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "RT-AC58U";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
index 3673a13430..230b62a94e 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
@@ -6,10 +6,6 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	aliases {
-		label-mac-device = &gmac0;
-	};
-
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
index 87bceecbba..07fa80742e 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts
@@ -49,7 +49,7 @@
 		ess_tcsr@1953000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1953000 0x1000>;
-			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+			qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII4>;
 		};
 
 		tcsr@1957000 {
@@ -65,17 +65,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-			phy-mode = "rgmii";
-			qcom,num_gmac = <1>;
-			qcom,single-phy;
-		};
 	};
 
 	keys {
@@ -228,14 +217,23 @@
 	qcom,ath10k-calibration-variant = "MikroTik-SXTsq-5-ac";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x20>;
-};
-
 &mdio {
 	status = "okay";
 };
+
+&gmac {
+       status = "okay";
+};
+
+&switch {
+       status = "okay";
+
+       /delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+       status = "okay";
+
+       label = "lan";
+       phy-mode = "rgmii";
+};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
index d6c0ff0938..2dbfaa086e 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts
@@ -16,7 +16,7 @@
 		led-failsafe = &led_power_amber;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_amber;
-		label-mac-device = &gmac0;
+		ethernet1 = &swport5;
 	};
 
 	chosen {
@@ -28,10 +28,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -62,14 +58,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -349,6 +337,24 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &mdio {
 	status = "okay";
 
@@ -358,14 +364,6 @@
 	reset-delay-us = <2000>;
 };
 
-&gmac0 {
-	qcom,forced_duplex = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration", "mac-address";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
index a77b85aa54..e6a6202216 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts
@@ -49,14 +49,6 @@
 			reg = <0x1957000 0x100>;
 			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -195,19 +187,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	vlan_tag = <1 0x10>;
-};
-
 &wifi0 {
 	status = "okay";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
index be2f619b39..16951da47f 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts
@@ -11,7 +11,7 @@
 	compatible = "pakedge,wr-1";
 
 	aliases {
-		label-mac-device = &gmac0;
+		label-mac-device = &gmac;
 		led-boot = &led_power;
 		led-failsafe = &led_power;
 		led-running = &led_power;
@@ -60,10 +60,6 @@
 	};
 
 	soc {
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -87,14 +83,6 @@
 			reg = <0x1957000 0x100>;
 			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -190,6 +178,10 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
 &mdio {
 	status = "okay";
 };
@@ -198,6 +190,38 @@
 	status = "okay";
 };
 
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+
+	label = "lan4";
+};
+
+&swport2 {
+	status = "okay";
+
+	label = "lan3";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan1";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &tlmm {
 	key_pins: key_pinmux {
 		mux {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
index 8fa5a31908..efb267ae36 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
@@ -44,10 +44,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -73,15 +69,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	leds {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
index 2af4296342..4694c56819 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts
@@ -45,18 +45,6 @@
 			status = "okay";
 		};
 
-		mdio@90000 {
-			status = "okay";
-
-			/delete-node/ ethernet-phy@0;
-			/delete-node/ ethernet-phy@1;
-			/delete-node/ ethernet-phy@3;
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -96,17 +84,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x1e>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -232,16 +209,41 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <2>;
-	qcom,poll_required = <1>;
+&gmac {
+	status = "okay";
+};
+
+&ethphy0 {
+	status = "disabled";
+};
+
+&ethphy1 {
+	status = "disabled";
+};
+
+&ethphy3 {
+	status = "disabled";
+};
+
+&mdio {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan";
 	nvmem-cell-names = "mac-address";
 	nvmem-cells = <&macaddr_art_6>;
 };
 
-&gmac1 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
+&swport5 {
+	status = "okay";
+
 	nvmem-cell-names = "mac-address";
 	nvmem-cells = <&macaddr_art_0>;
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
index 279050fa15..799e3cb415 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-a62.dts
@@ -21,10 +21,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@194b000 {
 			/* select hostmode */
 			compatible = "qcom,tcsr";
@@ -62,17 +58,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_lan_bmp = <0x10>;
-			switch_wan_bmp = <0x20>;
-
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -184,14 +169,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &usb2_hs_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
index 15698065d4..93dc8b656a 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts
@@ -33,10 +33,6 @@
 			reset-delay-us = <1000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -101,14 +97,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	led_spi {
@@ -200,16 +188,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	nvmem-cells = <&macaddr_art_1006>;
-	nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
-	nvmem-cells = <&macaddr_art_5006>;
-	nvmem-cell-names = "mac-address";
-};
-
 &nand {
 	pinctrl-0 = <&nand_pins>;
 	pinctrl-names = "default";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
index 5bfb758e50..9689bc566f 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi
@@ -30,10 +30,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -120,14 +116,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		leds {
 			compatible = "gpio-leds";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
index c8112c04fe..dc144a1584 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts
@@ -76,10 +76,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		crypto@8e3a000 {
 			status = "okay";
 		};
@@ -87,15 +83,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x10>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -189,10 +176,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	vlan_tag = <1 0x10>;
-};
-
 &nand {
 	pinctrl-0 = <&nand_pins>;
 	pinctrl-names = "default";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
index 27c7d071dc..a0ceb299b4 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
@@ -25,10 +25,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -64,15 +60,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	keys {
@@ -275,6 +262,30 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
index 2d20d5928a..723f2161c6 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts
@@ -27,11 +27,9 @@
 			pinctrl-0 = <&mdio_pins>;
 			pinctrl-names = "default";
 
-			/delete-node/ ethernet-phy@1;
-			/delete-node/ ethernet-phy@2;
-			/delete-node/ ethernet-phy@3;
-			/delete-node/ ethernet-phy@4;
-			/delete-node/ psgmii-phy@5;
+			ethphy: ethernet-phy@0 {
+				reg = <0x0>;
+			};
 		};
 
 		tcsr@1949000 {
@@ -59,19 +57,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
-			switch_lan_bmp = <0x0>; /* lan port bitmap */
-			switch_wan_bmp = <0x10>; /* wan port bitmap */
-		};
-
-		edma@c080000 {
-			status = "okay";
-			phy-mode = "rgmii-id";
-			qcom,num_gmac = <1>;
-			qcom,single-phy;
-		};
 	};
 
 	key {
@@ -266,8 +251,40 @@
 	qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <0>;
-	qcom,poll_required = <1>;
-	vlan_tag = <0 0x20>;
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+
+	/delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+	phy-handle = <&ethphy>;
+	phy-mode = "rgmii-id";
+};
+
+&ethphy1 {
+	status = "disabled";
+};
+
+&ethphy2 {
+	status = "disabled";
+};
+
+&ethphy3 {
+	status = "disabled";
+};
+
+&ethphy4 {
+	status = "disabled";
+};
+
+&psgmiiphy {
+	status = "disabled";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
index 2e4bfd69ba..babf07727a 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts
@@ -25,10 +25,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -54,18 +50,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x30>;
-			switch_wan_bmp = <0x02>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	key {
@@ -210,10 +194,6 @@
 	};
 };
 
-&gmac0 {
-	vlan_tag = <1 0x30>;
-};
-
 &cryptobam {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
index 9d7259c354..e17609ff6f 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts
@@ -18,6 +18,10 @@
 		bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
 	};
 
+	aliases {
+		ethernet1 = &swport4;
+	};
+
 	soc {
 		rng@22000 {
 			status = "okay";
@@ -27,10 +31,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -60,16 +60,6 @@
 		crypto@8e3a000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x2e>;
-			switch_wan_bmp = <0x10>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -113,18 +103,6 @@
 	};
 };
 
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x10>;
-};
-
-&gmac0 {
-	vlan_tag = <1 0x2e>;
-};
-
 &vqmmc {
 	status = "okay";
 };
@@ -372,6 +350,26 @@
 	};
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "wan";
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
index 2a2cfb9ac2..23a654dcff 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts
@@ -15,6 +15,7 @@
 		led-failsafe = &led_status;
 		led-running = &led_status;
 		led-upgrade = &led_upgrade;
+		ethernet1 = &swport5;
 	};
 
 	soc {
@@ -29,10 +30,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -79,14 +76,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -343,6 +332,34 @@
 	};
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
index c8b7e202fd..35c4c26a2c 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts
@@ -73,14 +73,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -314,6 +306,38 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+	label = "lan4";
+};
+
+&swport2 {
+	status = "okay";
+	label = "lan3";
+};
+
+&swport3 {
+	status = "okay";
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+	label = "lan1";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &wifi0 {
 	status = "okay";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
index aecbb673bf..38bacfa2ba 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts
@@ -47,12 +47,6 @@
 
 		mdio@90000 {
 			status = "okay";
-
-			/delete-node/ ethernet-phy@1;
-			/delete-node/ ethernet-phy@2;
-			/delete-node/ ethernet-phy@3;
-			/delete-node/ ethernet-phy@4;
-			/delete-node/ psgmii-phy@5;
 		};
 
 		counter@4a1000 {
@@ -85,19 +79,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
-			switch_lan_bmp = <0x0>; /* lan port bitmap */
-			switch_wan_bmp = <0x10>; /* wan port bitmap */
-		};
-
-		edma@c080000 {
-			status = "okay";
-			phy-mode = "rgmii-id";
-			qcom,num_gmac = <1>;
-			qcom,single-phy;
-		};
 	};
 
 	keys {
@@ -261,8 +242,40 @@
 	};
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <0>;
-	qcom,poll_required = <1>;
-	vlan_tag = <0 0x20>;
+&ethphy1 {
+	status = "disabled";
+};
+
+&ethphy2 {
+	status = "disabled";
+};
+
+&ethphy3 {
+	status = "disabled";
+};
+
+&ethphy4 {
+	status = "disabled";
+};
+
+&psgmiiphy {
+	status = "disabled";
+};
+
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+
+	/delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+	phy-handle = <&ethphy0>;
+	phy-mode = "rgmii-id";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
index 433048dd4b..32f0473fb1 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts
@@ -15,6 +15,7 @@
 		led-failsafe = &led_red0;
 		led-running = &led_blue0;
 		led-upgrade = &led_red0;
+		ethernet1 = &swport4;
 	};
 
 	soc {
@@ -26,10 +27,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -59,14 +56,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -352,3 +341,23 @@
 	pinctrl-names = "default";
 	status = "okay";
 };
+
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "wan";
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
index 8d1505cfe9..a832e2392a 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts
@@ -130,14 +130,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -225,17 +217,12 @@
 	status = "okay";
 };
 
-&gmac0 {
+&gmac {
+	status = "okay";
 	nvmem-cell-names = "mac-address";
 	nvmem-cells = <&macaddr_config_0>;
 };
 
-&gmac1 {
-	nvmem-cell-names = "mac-address";
-	nvmem-cells = <&macaddr_config_0>;
-	mac-address-increment = <1>;
-};
-
 &nand {
 	pinctrl-0 = <&nand_pins>;
 	pinctrl-names = "default";
@@ -338,6 +325,36 @@
 	status = "okay";
 };
 
+&switch {
+	status = "okay";
+};
+
+&swport2 {
+	status = "okay";
+
+	label = "lan4";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan3";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan2";
+};
+
+&swport5 {
+	status = "okay";
+
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&macaddr_config_0>;
+	mac-address-increment = <1>;
+};
+
 &tlmm {
 	i2c_0_pins: i2c_0_pinmux {
 		mux {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
index bdcc31fef7..beb168eb49 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts
@@ -27,10 +27,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -97,17 +93,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_mac_mode = <0x0>; /* mac mode for RGMII RMII */
-			switch_initvlas = <0x0007c 0x54>; /* port0 status */
-			switch_lan_bmp = <0x10>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	key {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
index bdbee7f837..4a575b60ee 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi
@@ -25,10 +25,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		counter@4a1000 {
 			compatible = "qcom,qca-gcnt";
 			reg = <0x4a1000 0x4>;
@@ -67,17 +63,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-
-			switch_lan_bmp = <0x1c>;
-			switch_wan_bmp = <0x02>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -281,15 +266,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	vlan_tag = <1 0x1c>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <0>;
-	vlan_tag = <2 0x02>;
-};
-
 &pcie0 {
 	status = "okay";
 
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
index 2d0655114b..461f05bc73 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts
@@ -21,10 +21,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -50,17 +46,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_lan_bmp = <0x10>;
-			switch_wan_bmp = <0x20>;
-
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -169,14 +154,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &pcie0 {
 	status = "okay";
 	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
index 87e0d103b7..d7a987f98d 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi
@@ -16,7 +16,6 @@
 		led-failsafe = &led_sys;
 		led-running = &led_sys;
 		led-upgrade = &led_sys;
-		label-mac-device = &gmac0;
 	};
 
 	soc {
@@ -30,10 +29,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -73,14 +68,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	leds {
@@ -333,6 +320,42 @@
 	qcom,single-led-10;
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport1 {
+	status = "okay";
+
+	label = "lan4";
+};
+
+&swport2 {
+	status = "okay";
+
+	label = "lan3";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan1";
+};
+
+&swport5 {
+	status = "okay";
+};
+
 &usb3_ss_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
index 0caa0255d0..3205b7d564 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts
@@ -142,10 +142,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -187,14 +183,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -383,3 +371,23 @@
 	status = "okay";
 	qcom,ath10k-calibration-variant = "cellc,rtl30vw";
 };
+
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan2";
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan1";
+};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
index ece80571bd..c7439b87ec 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi
@@ -21,10 +21,6 @@
 			reset-delay-us = <2000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -87,14 +83,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		aliases {
 			led-boot = &led_status;
 			led-failsafe = &led_status;
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
index 9448e5145e..643449f8e4 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wifi.dts
@@ -25,20 +25,6 @@
 		device_type = "memory";
 		reg = <0x80000000 0x20000000>; /* 512MB */
 	};
-
-	soc {
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-	};
 };
 
 &tlmm {
@@ -339,20 +325,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &mdio {
 	status = "okay";
 	pinctrl-0 = <&mdio_pins>;
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
index 4a4c18322f..ca37884db2 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
@@ -253,10 +253,6 @@
 			reset-delay-us = <5000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@194b000 {
 			/* select hostmode */
 			compatible = "qcom,tcsr";
@@ -333,16 +329,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			switch_lan_bmp = <0x1e>;
-			switch_wan_bmp = <0x20>;
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		qpic_bam: dma@7984000 {
 			status = "okay";
 		};
@@ -371,22 +357,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
-};
-
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
index 1f8c830d90..f1d58ccba9 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts
@@ -32,7 +32,6 @@
 		led-failsafe = &led_power_orange;
 		led-running = &led_power_white;
 		led-upgrade = &led_power_blue;
-		label-mac-device = &gmac0;
 	};
 
 	soc {
@@ -73,19 +72,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x1c>;
-		};
-
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		usb3@8af8800 {
 			status = "okay";
 		};
@@ -438,16 +424,6 @@
 	reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
 };
 
-&gmac0 {
-	nvmem-cells = <&macaddr_orgdata_20>;
-	nvmem-cell-names = "mac-address";
-};
-
-&gmac1 {
-	nvmem-cells = <&macaddr_orgdata_20>;
-	nvmem-cell-names = "mac-address";
-};
-
 &usb3_ss_phy {
 	status = "okay";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
index 95a0ded6d9..681300c502 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts
@@ -87,17 +87,3 @@
 		};
 	};
 };
-
-&gmac0 {
-	status = "okay";
-
-	mtd-mac-address = <&art 0x5006>;
-	mtd-mac-address-increment = <2>;
-};
-
-&gmac1 {
-	status = "okay";
-
-	mtd-mac-address = <&art 0x5006>;
-	mtd-mac-address-increment = <3>;
-};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
index 4edd88cde0..742bd5b570 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi
@@ -30,10 +30,6 @@
 			reset-delay-us = <2000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -96,14 +92,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		leds {
 			compatible = "gpio-leds";
 			pinctrl-0 = <&led_pins>;
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
index 8f971e505c..4f2cf1f516 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi
@@ -3,7 +3,7 @@
 /*
  * Device Tree Source for Linksys xx8300 (Dallas)
  *
- * Copyright (C) 2019 Jeff Kletsky
+ * Copyright (C) 2019, 2022 Jeff Kletsky
  * Updated 2020 Hans Geiblinger
  *
  */
@@ -35,10 +35,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -103,14 +99,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 };
 
@@ -298,3 +286,31 @@
 &usb3_ss_phy {
 	status = "okay";
 };
+
+&gmac {
+      status = "okay";
+};
+
+&switch {
+      status = "okay";
+};
+
+&swport1 {
+      status = "okay";
+};
+
+&swport2 {
+      status = "okay";
+};
+
+&swport3 {
+      status = "okay";
+};
+
+&swport4 {
+      status = "okay";
+};
+
+&swport5 {
+      status = "okay";
+};
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
index 3892c9bd81..48b5cd53d8 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
@@ -38,10 +38,6 @@
 			reset-delay-us = <2000>;
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@194b000 {
 			/* select hostmode */
 			compatible = "qcom,tcsr";
@@ -83,17 +79,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_lan_bmp = <0x10>;
-			switch_wan_bmp = <0x20>;
-
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -242,6 +227,14 @@
 				precal_art_5000: precal@5000 {
 					reg = <0x5000 0x2f20>;
 				};
+
+				macaddr_art_e010: mac-address@e010 {
+					reg = <0xe010 0x6>;
+				};
+
+				macaddr_art_e018: mac-address@e018 {
+					reg = <0xe018 0x6>;
+				};
 			};
 			partition6@180000 {
 				compatible = "denx,fit";
@@ -262,20 +255,28 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
+&gmac {
+	status = "okay";
 };
 
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
+&switch {
+	status = "okay";
+};
+
+&swport4 {
+	status = "okay";
+	label = "lan1";
+
+	nvmem-cells = <&macaddr_art_e018>;
+	nvmem-cell-names = "mac-address";
+};
+
+&swport5 {
+	status = "okay";
+	label = "lan2";
+
+	nvmem-cells = <&macaddr_art_e010>;
+	nvmem-cell-names = "mac-address";
 };
 
 &usb3_ss_phy {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
index 201ce97cd9..7978f90eb4 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts
@@ -76,14 +76,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			status = "okay";
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
-
 		i2c_0: i2c@78b7000 {
 			pinctrl-0 = <&i2c_0_pins>;
 			pinctrl-names = "default";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
index 0b94aafc83..41de6bb218 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi
@@ -21,14 +21,7 @@
 			pinctrl-0 = <&mdio_pins>;
 			pinctrl-names = "default";
 
-			/delete-node/ ethernet-phy@0;
-			/delete-node/ ethernet-phy@1;
-			/delete-node/ ethernet-phy@2;
-			/delete-node/ ethernet-phy@3;
-			/delete-node/ ethernet-phy@4;
-			/delete-node/ psgmii-phy@5;
-
-			ethernet-phy@5 {
+			ethphy: ethernet-phy@5 {
 				reg = <0x5>;
 			};
 		};
@@ -64,19 +57,6 @@
 			status = "okay";
 		};
 
-		ess-switch@c000000 {
-			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
-			switch_lan_bmp = <0x0>; /* lan port bitmap */
-			switch_wan_bmp = <0x10>; /* wan port bitmap */
-		};
-
-		edma@c080000 {
-			qcom,single-phy;
-			qcom,num_gmac = <1>;
-			phy-mode = "rgmii-id";
-			status = "okay";
-		};
-
 		i2c_0: i2c@78b7000 {
 			pinctrl-0 = <&i2c_0_pins>;
 			pinctrl-names = "default";
@@ -123,12 +103,6 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <5>;
-	qcom,poll_required = <1>;
-	vlan_tag = <0 0x20>;
-};
-
 &qpic_bam {
 	status = "okay";
 };
@@ -240,6 +214,48 @@
 	};
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+
+	/delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+	phy-handle = <&ethphy>;
+	phy-mode = "rgmii-id";
+};
+
+&ethphy0 {
+	status = "disabled";
+};
+
+&ethphy1 {
+	status = "disabled";
+};
+
+&ethphy2 {
+	status = "disabled";
+};
+
+&ethphy3 {
+	status = "disabled";
+};
+
+&ethphy4 {
+	status = "disabled";
+};
+
+&psgmiiphy {
+	status = "disabled";
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration", "mac-address";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
index 6e087ba024..7e4519a746 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
@@ -28,6 +28,7 @@
 		led-failsafe = &power;
 		led-running = &power;
 		led-upgrade = &power;
+		label-mac-device = &swport4;
 	};
 
 	memory {
@@ -44,10 +45,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -89,16 +86,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x18>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -219,6 +206,14 @@
 				precal_art_5000: precal@5000 {
 					reg = <0x5000 0x2f20>;
 				};
+
+				macaddr_gmac0: macaddr@0 {
+					reg = <0x0 0x6>;
+				};
+
+				macaddr_gmac1: macaddr@6 {
+					reg = <0x6 0x6>;
+				};
 			};
 
 			firmware@180000 {
@@ -280,6 +275,38 @@
 	status = "okay";
 };
 
+&gmac {
+	status = "okay";
+};
+
+&switch {
+	status = "okay";
+};
+
+&swport3 {
+	status = "okay";
+
+	label = "lan2";
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&macaddr_gmac0>;
+	mac-address-increment = <2>;
+};
+
+&swport4 {
+	status = "okay";
+
+	label = "lan1";
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&macaddr_gmac0>;
+};
+
+&swport5 {
+	status = "okay";
+
+	nvmem-cell-names = "mac-address";
+	nvmem-cells = <&macaddr_gmac1>;
+};
+
 &wifi0 {
 	status = "okay";
 	nvmem-cell-names = "pre-calibration";
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
index e9490c2690..8ae8658a7e 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts
@@ -30,10 +30,6 @@
 			status = "okay";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -75,16 +71,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x18>;
-			switch_wan_bmp = <0x20>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-		};
 	};
 
 	keys {
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
index 47646e4b3c..ebfab171f5 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi
@@ -86,19 +86,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
-			switch_lan_bmp = <0x0>; /* lan port bitmap */
-			switch_wan_bmp = <0x10>; /* wan port bitmap */
-		};
-
-		edma@c080000 {
-			qcom,single-phy;
-			qcom,num_gmac = <1>;
-			phy-mode = "rgmii-rxid";
-			status = "okay";
-		};
 	};
 
 	keys {
@@ -136,21 +123,22 @@
 	status = "okay";
 };
 
-&gmac0 {
-	qcom,phy_mdio_addr = <1>;
-	qcom,poll_required = <1>;
-	vlan_tag = <0 0x20>;
-};
-
 &blsp1_i2c3 {
 	pinctrl-0 = <&i2c_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
-	at24@50 {
+
+	eeprom@50 {
 		compatible = "atmel,24c64";
 		pagesize = <32>;
 		reg = <0x50>;
 		read-only; /* This holds our MAC & Meraki board-data */
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		mac_address: mac-address@66 {
+			reg = <0x66 0x6>;
+		};
 	};
 };
 
@@ -296,6 +284,9 @@
 			compatible = "qcom,ath10k";
 			status = "okay";
 			reg = <0x00010000 0 0 0 0>;
+			nvmem-cells = <&mac_address>;
+			nvmem-cell-names = "mac-address";
+			mac-address-increment = <1>;
 		};
 	};
 };
@@ -399,9 +390,55 @@
 &wifi0 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "Meraki-MR33";
+	nvmem-cells = <&mac_address>;
+	nvmem-cell-names = "mac-address";
+	mac-address-increment = <2>;
 };
 
 &wifi1 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "Meraki-MR33";
+	nvmem-cells = <&mac_address>;
+	nvmem-cell-names = "mac-address";
+	mac-address-increment = <3>;
+};
+
+&gmac {
+	status = "okay";
+	nvmem-cells = <&mac_address>;
+	nvmem-cell-names = "mac-address";
+};
+
+&switch {
+	status = "okay";
+
+	/delete-property/ psgmii-ethphy;
+};
+
+&swport5 {
+	status = "okay";
+
+	label = "lan";
+	phy-handle = <&ethphy1>;
+	phy-mode = "rgmii-rxid";
+};
+
+&ethphy0 {
+	status = "disabled";
+};
+
+&ethphy2 {
+	status = "disabled";
+};
+
+&ethphy3 {
+	status = "disabled";
+};
+
+&ethphy4 {
+	status = "disabled";
+};
+
+&psgmiiphy {
+	status = "disabled";
 };
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
index c14023559b..423c24b89a 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts
@@ -14,7 +14,6 @@
 		led-failsafe = &led_system_amber;
 		led-running = &led_system_green;
 		led-upgrade = &led_system_amber;
-		label-mac-device = &gmac0;
 	};
 
 	soc {
@@ -28,10 +27,6 @@
 			pinctrl-names = "default";
 		};
 
-		ess-psgmii@98000 {
-			status = "okay";
-		};
-
 		tcsr@1949000 {
 			compatible = "qcom,tcsr";
 			reg = <0x1949000 0x100>;
@@ -57,17 +52,6 @@
 		watchdog@b017000 {
 			status = "okay";
 		};
-
-		ess-switch@c000000 {
-			status = "okay";
-			switch_lan_bmp = <0x20>;
-			switch_wan_bmp = <0x00>;
-		};
-
-		edma@c080000 {
-			status = "okay";
-			qcom,num_gmac = <1>;
-		};
 	};
 
 	leds {
@@ -262,11 +246,3 @@
 		};
 	};
 };
-
-&gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x20>;
-};
diff --git a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c
new file mode 100644
index 0000000000..a8c3a20406
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.c
@@ -0,0 +1,1713 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2011-2012, 2020-2021 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016 John Crispin <john@phrozen.org>
+ * Copyright (c) 2021 Robert Marko <robert.marko@sartura.hr>
+ */
+
+#include <linux/version.h>
+#include <linux/etherdevice.h>
+#include <linux/if_bridge.h>
+#include <linux/mdio.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/of_mdio.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/phylink.h>
+#include <linux/reset.h>
+#include <net/dsa.h>
+
+#include "qca8k-ipq4019.h"
+
+#define MIB_DESC(_s, _o, _n)	\
+	{			\
+		.size = (_s),	\
+		.offset = (_o),	\
+		.name = (_n),	\
+	}
+
+static const struct qca8k_mib_desc ar8327_mib[] = {
+	MIB_DESC(1, 0x00, "RxBroad"),
+	MIB_DESC(1, 0x04, "RxPause"),
+	MIB_DESC(1, 0x08, "RxMulti"),
+	MIB_DESC(1, 0x0c, "RxFcsErr"),
+	MIB_DESC(1, 0x10, "RxAlignErr"),
+	MIB_DESC(1, 0x14, "RxRunt"),
+	MIB_DESC(1, 0x18, "RxFragment"),
+	MIB_DESC(1, 0x1c, "Rx64Byte"),
+	MIB_DESC(1, 0x20, "Rx128Byte"),
+	MIB_DESC(1, 0x24, "Rx256Byte"),
+	MIB_DESC(1, 0x28, "Rx512Byte"),
+	MIB_DESC(1, 0x2c, "Rx1024Byte"),
+	MIB_DESC(1, 0x30, "Rx1518Byte"),
+	MIB_DESC(1, 0x34, "RxMaxByte"),
+	MIB_DESC(1, 0x38, "RxTooLong"),
+	MIB_DESC(2, 0x3c, "RxGoodByte"),
+	MIB_DESC(2, 0x44, "RxBadByte"),
+	MIB_DESC(1, 0x4c, "RxOverFlow"),
+	MIB_DESC(1, 0x50, "Filtered"),
+	MIB_DESC(1, 0x54, "TxBroad"),
+	MIB_DESC(1, 0x58, "TxPause"),
+	MIB_DESC(1, 0x5c, "TxMulti"),
+	MIB_DESC(1, 0x60, "TxUnderRun"),
+	MIB_DESC(1, 0x64, "Tx64Byte"),
+	MIB_DESC(1, 0x68, "Tx128Byte"),
+	MIB_DESC(1, 0x6c, "Tx256Byte"),
+	MIB_DESC(1, 0x70, "Tx512Byte"),
+	MIB_DESC(1, 0x74, "Tx1024Byte"),
+	MIB_DESC(1, 0x78, "Tx1518Byte"),
+	MIB_DESC(1, 0x7c, "TxMaxByte"),
+	MIB_DESC(1, 0x80, "TxOverSize"),
+	MIB_DESC(2, 0x84, "TxByte"),
+	MIB_DESC(1, 0x8c, "TxCollision"),
+	MIB_DESC(1, 0x90, "TxAbortCol"),
+	MIB_DESC(1, 0x94, "TxMultiCol"),
+	MIB_DESC(1, 0x98, "TxSingleCol"),
+	MIB_DESC(1, 0x9c, "TxExcDefer"),
+	MIB_DESC(1, 0xa0, "TxDefer"),
+	MIB_DESC(1, 0xa4, "TxLateCol"),
+	MIB_DESC(1, 0xa8, "RXUnicast"),
+	MIB_DESC(1, 0xac, "TXunicast"),
+};
+
+static int
+qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val)
+{
+	return regmap_read(priv->regmap, reg, val);
+}
+
+static int
+qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val)
+{
+	return regmap_write(priv->regmap, reg, val);
+}
+
+static int
+qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val)
+{
+	return regmap_update_bits(priv->regmap, reg, mask, write_val);
+}
+
+static int
+qca8k_reg_set(struct qca8k_priv *priv, u32 reg, u32 val)
+{
+	return regmap_set_bits(priv->regmap, reg, val);
+}
+
+static int
+qca8k_reg_clear(struct qca8k_priv *priv, u32 reg, u32 val)
+{
+	return regmap_clear_bits(priv->regmap, reg, val);
+}
+
+static const struct regmap_range qca8k_readable_ranges[] = {
+	regmap_reg_range(0x0000, 0x00e4), /* Global control */
+	regmap_reg_range(0x0100, 0x0168), /* EEE control */
+	regmap_reg_range(0x0200, 0x0270), /* Parser control */
+	regmap_reg_range(0x0400, 0x0454), /* ACL */
+	regmap_reg_range(0x0600, 0x0718), /* Lookup */
+	regmap_reg_range(0x0800, 0x0b70), /* QM */
+	regmap_reg_range(0x0c00, 0x0c80), /* PKT */
+	regmap_reg_range(0x0e00, 0x0e98), /* L3 */
+	regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */
+	regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */
+	regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */
+	regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */
+	regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */
+	regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */
+	regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */
+
+};
+
+static const struct regmap_access_table qca8k_readable_table = {
+	.yes_ranges = qca8k_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
+};
+
+static struct regmap_config qca8k_ipq4019_regmap_config = {
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+	.max_register = 0x16ac, /* end MIB - Port6 range */
+	.rd_table = &qca8k_readable_table,
+};
+
+static struct regmap_config qca8k_ipq4019_psgmii_phy_regmap_config = {
+	.name = "psgmii-phy",
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+	.max_register = 0x7fc,
+};
+
+static int
+qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)
+{
+	u32 val;
+
+	return regmap_read_poll_timeout(priv->regmap, reg, val,
+					!(val & mask),
+					0,
+					QCA8K_BUSY_WAIT_TIMEOUT);
+}
+
+static int
+qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb)
+{
+	u32 reg[4], val;
+	int i, ret;
+
+	/* load the ARL table into an array */
+	for (i = 0; i < 4; i++) {
+		ret = qca8k_read(priv, QCA8K_REG_ATU_DATA0 + (i * 4), &val);
+		if (ret < 0)
+			return ret;
+
+		reg[i] = val;
+	}
+
+	/* vid - 83:72 */
+	fdb->vid = (reg[2] >> QCA8K_ATU_VID_S) & QCA8K_ATU_VID_M;
+	/* aging - 67:64 */
+	fdb->aging = reg[2] & QCA8K_ATU_STATUS_M;
+	/* portmask - 54:48 */
+	fdb->port_mask = (reg[1] >> QCA8K_ATU_PORT_S) & QCA8K_ATU_PORT_M;
+	/* mac - 47:0 */
+	fdb->mac[0] = (reg[1] >> QCA8K_ATU_ADDR0_S) & 0xff;
+	fdb->mac[1] = reg[1] & 0xff;
+	fdb->mac[2] = (reg[0] >> QCA8K_ATU_ADDR2_S) & 0xff;
+	fdb->mac[3] = (reg[0] >> QCA8K_ATU_ADDR3_S) & 0xff;
+	fdb->mac[4] = (reg[0] >> QCA8K_ATU_ADDR4_S) & 0xff;
+	fdb->mac[5] = reg[0] & 0xff;
+
+	return 0;
+}
+
+static void
+qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac,
+		u8 aging)
+{
+	u32 reg[3] = { 0 };
+	int i;
+
+	/* vid - 83:72 */
+	reg[2] = (vid & QCA8K_ATU_VID_M) << QCA8K_ATU_VID_S;
+	/* aging - 67:64 */
+	reg[2] |= aging & QCA8K_ATU_STATUS_M;
+	/* portmask - 54:48 */
+	reg[1] = (port_mask & QCA8K_ATU_PORT_M) << QCA8K_ATU_PORT_S;
+	/* mac - 47:0 */
+	reg[1] |= mac[0] << QCA8K_ATU_ADDR0_S;
+	reg[1] |= mac[1];
+	reg[0] |= mac[2] << QCA8K_ATU_ADDR2_S;
+	reg[0] |= mac[3] << QCA8K_ATU_ADDR3_S;
+	reg[0] |= mac[4] << QCA8K_ATU_ADDR4_S;
+	reg[0] |= mac[5];
+
+	/* load the array into the ARL table */
+	for (i = 0; i < 3; i++)
+		qca8k_write(priv, QCA8K_REG_ATU_DATA0 + (i * 4), reg[i]);
+}
+
+static int
+qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port)
+{
+	u32 reg;
+	int ret;
+
+	/* Set the command and FDB index */
+	reg = QCA8K_ATU_FUNC_BUSY;
+	reg |= cmd;
+	if (port >= 0) {
+		reg |= QCA8K_ATU_FUNC_PORT_EN;
+		reg |= (port & QCA8K_ATU_FUNC_PORT_M) << QCA8K_ATU_FUNC_PORT_S;
+	}
+
+	/* Write the function register triggering the table access */
+	ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg);
+	if (ret)
+		return ret;
+
+	/* wait for completion */
+	ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY);
+	if (ret)
+		return ret;
+
+	/* Check for table full violation when adding an entry */
+	if (cmd == QCA8K_FDB_LOAD) {
+		ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, &reg);
+		if (ret < 0)
+			return ret;
+		if (reg & QCA8K_ATU_FUNC_FULL)
+			return -1;
+	}
+
+	return 0;
+}
+
+static int
+qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port)
+{
+	int ret;
+
+	qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging);
+	ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port);
+	if (ret < 0)
+		return ret;
+
+	return qca8k_fdb_read(priv, fdb);
+}
+
+static int
+qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask,
+	      u16 vid, u8 aging)
+{
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	qca8k_fdb_write(priv, vid, port_mask, mac, aging);
+	ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid)
+{
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	qca8k_fdb_write(priv, vid, port_mask, mac, 0);
+	ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1);
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static void
+qca8k_fdb_flush(struct qca8k_priv *priv)
+{
+	mutex_lock(&priv->reg_mutex);
+	qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1);
+	mutex_unlock(&priv->reg_mutex);
+}
+
+static int
+qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid)
+{
+	u32 reg;
+	int ret;
+
+	/* Set the command and VLAN index */
+	reg = QCA8K_VTU_FUNC1_BUSY;
+	reg |= cmd;
+	reg |= vid << QCA8K_VTU_FUNC1_VID_S;
+
+	/* Write the function register triggering the table access */
+	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg);
+	if (ret)
+		return ret;
+
+	/* wait for completion */
+	ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY);
+	if (ret)
+		return ret;
+
+	/* Check for table full violation when adding an entry */
+	if (cmd == QCA8K_VLAN_LOAD) {
+		ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, &reg);
+		if (ret < 0)
+			return ret;
+		if (reg & QCA8K_VTU_FUNC1_FULL)
+			return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int
+qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged)
+{
+	u32 reg;
+	int ret;
+
+	/*
+	   We do the right thing with VLAN 0 and treat it as untagged while
+	   preserving the tag on egress.
+	 */
+	if (vid == 0)
+		return 0;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);
+	if (ret < 0)
+		goto out;
+
+	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &reg);
+	if (ret < 0)
+		goto out;
+	reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN;
+	reg &= ~(QCA8K_VTU_FUNC0_EG_MODE_MASK << QCA8K_VTU_FUNC0_EG_MODE_S(port));
+	if (untagged)
+		reg |= QCA8K_VTU_FUNC0_EG_MODE_UNTAG <<
+				QCA8K_VTU_FUNC0_EG_MODE_S(port);
+	else
+		reg |= QCA8K_VTU_FUNC0_EG_MODE_TAG <<
+				QCA8K_VTU_FUNC0_EG_MODE_S(port);
+
+	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+	if (ret)
+		goto out;
+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
+
+out:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid)
+{
+	u32 reg, mask;
+	int ret, i;
+	bool del;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);
+	if (ret < 0)
+		goto out;
+
+	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &reg);
+	if (ret < 0)
+		goto out;
+	reg &= ~(3 << QCA8K_VTU_FUNC0_EG_MODE_S(port));
+	reg |= QCA8K_VTU_FUNC0_EG_MODE_NOT <<
+			QCA8K_VTU_FUNC0_EG_MODE_S(port);
+
+	/* Check if we're the last member to be removed */
+	del = true;
+	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+		mask = QCA8K_VTU_FUNC0_EG_MODE_NOT;
+		mask <<= QCA8K_VTU_FUNC0_EG_MODE_S(i);
+
+		if ((reg & mask) != mask) {
+			del = false;
+			break;
+		}
+	}
+
+	if (del) {
+		ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid);
+	} else {
+		ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);
+		if (ret)
+			goto out;
+		ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);
+	}
+
+out:
+	mutex_unlock(&priv->reg_mutex);
+
+	return ret;
+}
+
+static int
+qca8k_mib_init(struct qca8k_priv *priv)
+{
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QCA8K_MIB_BUSY);
+	if (ret)
+		goto exit;
+
+	ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY);
+	if (ret)
+		goto exit;
+
+	ret = qca8k_reg_set(priv, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);
+	if (ret)
+		goto exit;
+
+	ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+	return ret;
+}
+
+static void
+qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable)
+{
+	u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;
+
+	/* Port 0 is internally connected to the CPU
+	 * TODO: Probably check for RGMII as well if it doesnt work
+	 * in RGMII mode.
+	 */
+	if (port > QCA8K_CPU_PORT)
+		mask |= QCA8K_PORT_STATUS_LINK_AUTO;
+
+	if (enable)
+		qca8k_reg_set(priv, QCA8K_REG_PORT_STATUS(port), mask);
+	else
+		qca8k_reg_clear(priv, QCA8K_REG_PORT_STATUS(port), mask);
+}
+
+static int
+qca8k_setup_port(struct dsa_switch *ds, int port)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	int ret;
+
+	/* CPU port gets connected to all user ports of the switch */
+	if (dsa_is_cpu_port(ds, port)) {
+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
+				QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));
+		if (ret)
+			return ret;
+
+		/* Disable CPU ARP Auto-learning by default */
+		ret = qca8k_reg_clear(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT),
+				      QCA8K_PORT_LOOKUP_LEARN);
+		if (ret)
+			return ret;
+	}
+
+	/* Individual user ports get connected to CPU port only */
+	if (dsa_is_user_port(ds, port)) {
+		int shift = 16 * (port % 2);
+
+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+				QCA8K_PORT_LOOKUP_MEMBER,
+				BIT(QCA8K_CPU_PORT));
+		if (ret)
+			return ret;
+
+		/* Enable ARP Auto-learning by default */
+		ret = qca8k_reg_set(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+				    QCA8K_PORT_LOOKUP_LEARN);
+		if (ret)
+			return ret;
+
+		/* For port based vlans to work we need to set the
+		 * default egress vid
+		 */
+		ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),
+				0xfff << shift,
+				QCA8K_PORT_VID_DEF << shift);
+		if (ret)
+			return ret;
+
+		ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
+				  QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |
+				  QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int
+qca8k_setup(struct dsa_switch *ds)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	int ret, i;
+
+	/* Make sure that port 0 is the cpu port */
+	if (!dsa_is_cpu_port(ds, 0)) {
+		dev_err(priv->dev, "port 0 is not the CPU port");
+		return -EINVAL;
+	}
+
+	/* Enable CPU Port */
+	ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
+			    QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
+	if (ret) {
+		dev_err(priv->dev, "failed enabling CPU port");
+		return ret;
+	}
+
+	/* Enable MIB counters */
+	ret = qca8k_mib_init(priv);
+	if (ret)
+		dev_warn(priv->dev, "MIB init failed");
+
+	/* Enable QCA header mode on the cpu port */
+	ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_CPU_PORT),
+			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_TX_S |
+			  QCA8K_PORT_HDR_CTRL_ALL << QCA8K_PORT_HDR_CTRL_RX_S);
+	if (ret) {
+		dev_err(priv->dev, "failed enabling QCA header mode");
+		return ret;
+	}
+
+	/* Disable forwarding by default on all ports */
+	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i),
+				QCA8K_PORT_LOOKUP_MEMBER, 0);
+		if (ret)
+			return ret;
+	}
+
+	/* Disable MAC by default on all ports */
+	for (i = 1; i < QCA8K_NUM_PORTS; i++)
+		qca8k_port_set_status(priv, i, 0);
+
+	/* Forward all unknown frames to CPU port for Linux processing */
+	ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,
+			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S |
+			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_BC_DP_S |
+			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_MC_DP_S |
+			  BIT(QCA8K_CPU_PORT) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S);
+	if (ret)
+		return ret;
+
+	/* Setup connection between CPU port & user ports */
+	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+		ret = qca8k_setup_port(ds, i);
+		if (ret)
+			return ret;
+	}
+
+	/* Setup our port MTUs to match power on defaults */
+	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+		/* Set per port MTU to 1500 as the MTU change function
+		 * will add the overhead and if its set to 1518 then it
+		 * will apply the overhead again and we will end up with
+		 * MTU of 1536 instead of 1518
+		 */
+		priv->port_mtu[i] = ETH_DATA_LEN;
+	ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);
+	if (ret)
+		dev_warn(priv->dev, "failed setting MTU settings");
+
+	/* Flush the FDB table */
+	qca8k_fdb_flush(priv);
+
+	/* We don't have interrupts for link changes, so we need to poll */
+	ds->pcs_poll = true;
+
+	/* CPU port HW learning doesnt work correctly, so let DSA handle it */
+	ds->assisted_learning_on_cpu_port = true;
+
+	return 0;
+}
+
+static int psgmii_vco_calibrate(struct qca8k_priv *priv)
+{
+	int val, ret;
+
+	if (!priv->psgmii_ethphy) {
+		dev_err(priv->dev, "PSGMII eth PHY missing, calibration failed!\n");
+		return -ENODEV;
+	}
+
+	/* Fix PSGMII RX 20bit */
+	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b);
+	/* Reset PHY PSGMII */
+	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x1b);
+	/* Release PHY PSGMII reset */
+	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b);
+
+	/* Poll for VCO PLL calibration finish - Malibu(QCA8075) */
+	ret = phy_read_mmd_poll_timeout(priv->psgmii_ethphy,
+					MDIO_MMD_PMAPMD,
+					0x28, val,
+					(val & BIT(0)),
+					10000, 1000000,
+					false);
+	if (ret) {
+		dev_err(priv->dev, "QCA807x PSGMII VCO calibration PLL not ready\n");
+		return ret;
+	}
+	mdelay(50);
+
+	/* Freeze PSGMII RX CDR */
+	ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x2230);
+
+	/* Start PSGMIIPHY VCO PLL calibration */
+	ret = regmap_set_bits(priv->psgmii,
+			PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1,
+			PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART);
+
+	/* Poll for PSGMIIPHY PLL calibration finish - Dakota(IPQ40xx) */
+	ret = regmap_read_poll_timeout(priv->psgmii,
+				       PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2,
+				       val, val & PSGMIIPHY_REG_PLL_VCO_CALIB_READY,
+				       10000, 1000000);
+	if (ret) {
+		dev_err(priv->dev, "IPQ PSGMIIPHY VCO calibration PLL not ready\n");
+		return ret;
+	}
+	mdelay(50);
+
+	/* Release PSGMII RX CDR */
+	ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x3230);
+	/* Release PSGMII RX 20bit */
+	ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5f);
+	mdelay(200);
+
+	return ret;
+}
+
+static void
+qca8k_switch_port_loopback_on_off(struct qca8k_priv *priv, int port, int on)
+{
+	u32 val = QCA8K_PORT_LOOKUP_LOOPBACK;
+
+	if (on == 0)
+		val = 0;
+
+	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+		  QCA8K_PORT_LOOKUP_LOOPBACK, val);
+}
+
+static int
+qca8k_wait_for_phy_link_state(struct phy_device *phy, int need_status)
+{
+	int a;
+	u16 status;
+
+	for (a = 0; a < 100; a++) {
+		status = phy_read(phy, MII_QCA8075_SSTATUS);
+		status &= QCA8075_PHY_SPEC_STATUS_LINK;
+		status = !!status;
+		if (status == need_status)
+			return 0;
+		mdelay(8);
+	}
+
+	return -1;
+}
+
+static void
+qca8k_phy_loopback_on_off(struct qca8k_priv *priv, struct phy_device *phy,
+			  int sw_port, int on)
+{
+	if (on) {
+		phy_write(phy, MII_BMCR, BMCR_ANENABLE | BMCR_RESET);
+		phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN);
+		qca8k_wait_for_phy_link_state(phy, 0);
+		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0);
+		phy_write(phy, MII_BMCR,
+			BMCR_SPEED1000 |
+			BMCR_FULLDPLX |
+			BMCR_LOOPBACK);
+		qca8k_wait_for_phy_link_state(phy, 1);
+		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port),
+			QCA8K_PORT_STATUS_SPEED_1000 |
+			QCA8K_PORT_STATUS_TXMAC |
+			QCA8K_PORT_STATUS_RXMAC |
+			QCA8K_PORT_STATUS_DUPLEX);
+		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port),
+			QCA8K_PORT_LOOKUP_STATE_FORWARD,
+			QCA8K_PORT_LOOKUP_STATE_FORWARD);
+	} else { /* off */
+		qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0);
+		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port),
+			QCA8K_PORT_LOOKUP_STATE_DISABLED,
+			QCA8K_PORT_LOOKUP_STATE_DISABLED);
+		phy_write(phy, MII_BMCR, BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_RESET);
+		/* turn off the power of the phys - so that unused
+			 ports do not raise links */
+		phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN);
+	}
+}
+
+static void
+qca8k_phy_pkt_gen_prep(struct qca8k_priv *priv, struct phy_device *phy,
+		       int pkts_num, int on)
+{
+	if (on) {
+		/* enable CRC checker and packets counters */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0);
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT,
+			QCA8075_MMD7_CNT_FRAME_CHK_EN | QCA8075_MMD7_CNT_SELFCLR);
+		qca8k_wait_for_phy_link_state(phy, 1);
+		/* packet number */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, pkts_num);
+		/* pkt size - 1504 bytes + 20 bytes */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_SIZE, 1504);
+	} else { /* off */
+		/* packet number */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, 0);
+		/* disable CRC checker and packet counter */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0);
+		/* disable traffic gen */
+		phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL, 0);
+	}
+}
+
+static void
+qca8k_wait_for_phy_pkt_gen_fin(struct qca8k_priv *priv, struct phy_device *phy)
+{
+	int val;
+	/* wait for all traffic end: 4096(pkt num)*1524(size)*8ns(125MHz)=49938us */
+	phy_read_mmd_poll_timeout(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL,
+				  val, !(val & QCA8075_MMD7_PKT_GEN_INPROGR),
+				  50000, 1000000, true);
+}
+
+static void
+qca8k_start_phy_pkt_gen(struct phy_device *phy)
+{
+	/* start traffic gen */
+	phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL,
+		      QCA8075_MMD7_PKT_GEN_START | QCA8075_MMD7_PKT_GEN_INPROGR);
+}
+
+static int
+qca8k_start_all_phys_pkt_gens(struct qca8k_priv *priv)
+{
+	struct phy_device *phy;
+	phy = phy_device_create(priv->bus, QCA8075_MDIO_BRDCST_PHY_ADDR,
+		0, 0, NULL);
+	if (!phy) {
+		dev_err(priv->dev, "unable to create mdio broadcast PHY(0x%x)\n",
+			QCA8075_MDIO_BRDCST_PHY_ADDR);
+		return -ENODEV;
+	}
+
+	qca8k_start_phy_pkt_gen(phy);
+
+	phy_device_free(phy);
+	return 0;
+}
+
+static int
+qca8k_get_phy_pkt_gen_test_result(struct phy_device *phy, int pkts_num)
+{
+	u32 tx_ok, tx_error;
+	u32 rx_ok, rx_error;
+	u32 tx_ok_high16;
+	u32 rx_ok_high16;
+	u32 tx_all_ok, rx_all_ok;
+
+	/* check counters */
+	tx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_LO);
+	tx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_HI);
+	tx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_ERR_CNT);
+	rx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_LO);
+	rx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_HI);
+	rx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_ERR_CNT);
+	tx_all_ok = tx_ok + (tx_ok_high16 << 16);
+	rx_all_ok = rx_ok + (rx_ok_high16 << 16);
+
+	if (tx_all_ok < pkts_num)
+		return -1;
+	if(rx_all_ok < pkts_num)
+		return -2;
+	if(tx_error)
+		return -3;
+	if(rx_error)
+		return -4;
+	return 0; /* test is ok */
+}
+
+static
+void qca8k_phy_broadcast_write_on_off(struct qca8k_priv *priv,
+				      struct phy_device *phy, int on)
+{
+	u32 val;
+
+	val = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE);
+
+	if (on == 0)
+		val &= ~QCA8075_MMD7_MDIO_BRDCST_WRITE_EN;
+	else
+		val |= QCA8075_MMD7_MDIO_BRDCST_WRITE_EN;
+
+	phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE, val);
+}
+
+static int
+qca8k_test_dsa_port_for_errors(struct qca8k_priv *priv, struct phy_device *phy,
+			       int port, int test_phase)
+{
+	int res = 0;
+	const int test_pkts_num = QCA8075_PKT_GEN_PKTS_COUNT;
+
+	if (test_phase == 1) { /* start test preps */
+		qca8k_phy_loopback_on_off(priv, phy, port, 1);
+		qca8k_switch_port_loopback_on_off(priv, port, 1);
+		qca8k_phy_broadcast_write_on_off(priv, phy, 1);
+		qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 1);
+	} else if (test_phase == 2) {
+		/* wait for test results, collect it and cleanup */
+		qca8k_wait_for_phy_pkt_gen_fin(priv, phy);
+		res = qca8k_get_phy_pkt_gen_test_result(phy, test_pkts_num);
+		qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 0);
+		qca8k_phy_broadcast_write_on_off(priv, phy, 0);
+		qca8k_switch_port_loopback_on_off(priv, port, 0);
+		qca8k_phy_loopback_on_off(priv, phy, port, 0);
+	}
+
+	return res;
+}
+
+static int
+qca8k_do_dsa_sw_ports_self_test(struct qca8k_priv *priv, int parallel_test)
+{
+	struct device_node *dn = priv->dev->of_node;
+	struct device_node *ports, *port;
+	struct device_node *phy_dn;
+	struct phy_device *phy;
+	int reg, err = 0, test_phase;
+	u32 tests_result = 0;
+
+	ports = of_get_child_by_name(dn, "ports");
+	if (!ports) {
+		dev_err(priv->dev, "no ports child node found\n");
+			return -EINVAL;
+	}
+
+	for (test_phase = 1; test_phase <= 2; test_phase++) {
+		if (parallel_test && test_phase == 2) {
+			err = qca8k_start_all_phys_pkt_gens(priv);
+			if (err)
+				goto error;
+		}
+		for_each_available_child_of_node(ports, port) {
+			err = of_property_read_u32(port, "reg", &reg);
+			if (err)
+				goto error;
+			if (reg >= QCA8K_NUM_PORTS) {
+				err = -EINVAL;
+				goto error;
+			}
+			phy_dn = of_parse_phandle(port, "phy-handle", 0);
+			if (phy_dn) {
+				phy = of_phy_find_device(phy_dn);
+				of_node_put(phy_dn);
+				if (phy) {
+					int result;
+					result = qca8k_test_dsa_port_for_errors(priv,
+						phy, reg, test_phase);
+					if (!parallel_test && test_phase == 1)
+						qca8k_start_phy_pkt_gen(phy);
+					put_device(&phy->mdio.dev);
+					if (test_phase == 2) {
+						tests_result <<= 1;
+						if (result)
+							tests_result |= 1;
+					}
+				}
+			}
+		}
+	}
+
+end:
+	of_node_put(ports);
+	qca8k_fdb_flush(priv);
+	return tests_result;
+error:
+	tests_result |= 0xf000;
+	goto end;
+}
+
+static int
+psgmii_vco_calibrate_and_test(struct dsa_switch *ds)
+{
+	int ret, a, test_result;
+	struct qca8k_priv *priv = ds->priv;
+
+	for (a = 0; a <= QCA8K_PSGMII_CALB_NUM; a++) {
+		ret = psgmii_vco_calibrate(priv);
+		if (ret)
+			return ret;
+		/* first we run serial test */
+		test_result = qca8k_do_dsa_sw_ports_self_test(priv, 0);
+		/* and if it is ok then we run the test in parallel */
+		if (!test_result)
+			test_result = qca8k_do_dsa_sw_ports_self_test(priv, 1);
+		if (!test_result) {
+			if (a > 0) {
+				dev_warn(priv->dev, "PSGMII work was stabilized after %d "
+					"calibration retries !\n", a);
+			}
+			return 0;
+		} else {
+			schedule();
+			if (a > 0 && a % 10 == 0) {
+				dev_err(priv->dev, "PSGMII work is unstable !!! "
+					"Let's try to wait a bit ... %d\n", a);
+				set_current_state(TASK_INTERRUPTIBLE);
+				schedule_timeout(msecs_to_jiffies(a * 100));
+			}
+		}
+	}
+
+	panic("PSGMII work is unstable !!! "
+		"Repeated recalibration attempts did not help(0x%x) !\n",
+		test_result);
+
+	return -EFAULT;
+}
+
+static int
+ipq4019_psgmii_configure(struct dsa_switch *ds)
+{
+	struct qca8k_priv *priv = ds->priv;
+	int ret;
+
+	if (!priv->psgmii_calibrated) {
+		ret = psgmii_vco_calibrate_and_test(ds);
+
+		ret = regmap_clear_bits(priv->psgmii, PSGMIIPHY_MODE_CONTROL,
+					PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M);
+		ret = regmap_write(priv->psgmii, PSGMIIPHY_TX_CONTROL,
+				   PSGMIIPHY_TX_CONTROL_MAGIC_VALUE);
+
+		priv->psgmii_calibrated = true;
+
+		return ret;
+	}
+
+	return 0;
+}
+
+static void
+qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
+			 const struct phylink_link_state *state)
+{
+	struct qca8k_priv *priv = ds->priv;
+
+	switch (port) {
+	case 0:
+		/* CPU port, no configuration needed */
+		return;
+	case 1:
+	case 2:
+	case 3:
+		if (state->interface == PHY_INTERFACE_MODE_PSGMII)
+			if (ipq4019_psgmii_configure(ds))
+				dev_err(ds->dev, "PSGMII configuration failed!\n");
+		return;
+	case 4:
+	case 5:
+		if (state->interface == PHY_INTERFACE_MODE_RGMII ||
+		    state->interface == PHY_INTERFACE_MODE_RGMII_ID ||
+		    state->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
+		    state->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+			qca8k_reg_set(priv, QCA8K_REG_RGMII_CTRL, QCA8K_RGMII_CTRL_CLK);
+		}
+
+		if (state->interface == PHY_INTERFACE_MODE_PSGMII)
+			if (ipq4019_psgmii_configure(ds))
+				dev_err(ds->dev, "PSGMII configuration failed!\n");
+		return;
+	default:
+		dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
+		return;
+	}
+}
+
+static void
+qca8k_phylink_validate(struct dsa_switch *ds, int port,
+		       unsigned long *supported,
+		       struct phylink_link_state *state)
+{
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+
+	switch (port) {
+	case 0: /* CPU port */
+		if (state->interface != PHY_INTERFACE_MODE_INTERNAL)
+			goto unsupported;
+		break;
+	case 1:
+	case 2:
+	case 3:
+		/* Only PSGMII mode is supported */
+		if (state->interface != PHY_INTERFACE_MODE_PSGMII)
+			goto unsupported;
+		break;
+	case 4:
+	case 5:
+		/* PSGMII and RGMII modes are supported */
+		if (state->interface != PHY_INTERFACE_MODE_PSGMII &&
+		    state->interface != PHY_INTERFACE_MODE_RGMII &&
+		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&
+		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&
+		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID)
+			goto unsupported;
+		break;
+	default:
+unsupported:
+		dev_warn(ds->dev, "interface '%s' (%d) on port %d is not supported\n",
+			 phy_modes(state->interface), state->interface, port);
+		linkmode_zero(supported);
+		return;
+	}
+
+	if (port == 0) {
+		phylink_set_port_modes(mask);
+
+		phylink_set(mask, 1000baseT_Full);
+
+		phylink_set(mask, Pause);
+		phylink_set(mask, Asym_Pause);
+
+		linkmode_and(supported, supported, mask);
+		linkmode_and(state->advertising, state->advertising, mask);
+	} else {
+		/* Simply copy what PHYs tell us */
+		linkmode_copy(state->advertising, supported);
+	}
+}
+
+static int
+qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port,
+			     struct phylink_link_state *state)
+{
+	struct qca8k_priv *priv = ds->priv;
+	u32 reg;
+	int ret;
+
+	ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), &reg);
+	if (ret < 0)
+		return ret;
+
+	state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP);
+	state->an_complete = state->link;
+	state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO);
+	state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL :
+							   DUPLEX_HALF;
+
+	switch (reg & QCA8K_PORT_STATUS_SPEED) {
+	case QCA8K_PORT_STATUS_SPEED_10:
+		state->speed = SPEED_10;
+		break;
+	case QCA8K_PORT_STATUS_SPEED_100:
+		state->speed = SPEED_100;
+		break;
+	case QCA8K_PORT_STATUS_SPEED_1000:
+		state->speed = SPEED_1000;
+		break;
+	default:
+		state->speed = SPEED_UNKNOWN;
+		break;
+	}
+
+	state->pause = MLO_PAUSE_NONE;
+	if (reg & QCA8K_PORT_STATUS_RXFLOW)
+		state->pause |= MLO_PAUSE_RX;
+	if (reg & QCA8K_PORT_STATUS_TXFLOW)
+		state->pause |= MLO_PAUSE_TX;
+
+	return 1;
+}
+
+static void
+qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
+			    phy_interface_t interface)
+{
+	struct qca8k_priv *priv = ds->priv;
+
+	qca8k_port_set_status(priv, port, 0);
+}
+
+static void
+qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode,
+			  phy_interface_t interface, struct phy_device *phydev,
+			  int speed, int duplex, bool tx_pause, bool rx_pause)
+{
+	struct qca8k_priv *priv = ds->priv;
+	u32 reg;
+
+	if (phylink_autoneg_inband(mode)) {
+		reg = QCA8K_PORT_STATUS_LINK_AUTO;
+	} else {
+		switch (speed) {
+		case SPEED_10:
+			reg = QCA8K_PORT_STATUS_SPEED_10;
+			break;
+		case SPEED_100:
+			reg = QCA8K_PORT_STATUS_SPEED_100;
+			break;
+		case SPEED_1000:
+			reg = QCA8K_PORT_STATUS_SPEED_1000;
+			break;
+		default:
+			reg = QCA8K_PORT_STATUS_LINK_AUTO;
+			break;
+		}
+
+		if (duplex == DUPLEX_FULL)
+			reg |= QCA8K_PORT_STATUS_DUPLEX;
+
+		if (rx_pause || dsa_is_cpu_port(ds, port))
+			reg |= QCA8K_PORT_STATUS_RXFLOW;
+
+		if (tx_pause || dsa_is_cpu_port(ds, port))
+			reg |= QCA8K_PORT_STATUS_TXFLOW;
+	}
+
+	reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;
+
+	qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg);
+}
+
+static void
+qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data)
+{
+	int i;
+
+	if (stringset != ETH_SS_STATS)
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++)
+		strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
+			ETH_GSTRING_LEN);
+}
+
+static void
+qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,
+			uint64_t *data)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	const struct qca8k_mib_desc *mib;
+	u32 reg, i, val;
+	u32 hi = 0;
+	int ret;
+
+	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
+		mib = &ar8327_mib[i];
+		reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset;
+
+		ret = qca8k_read(priv, reg, &val);
+		if (ret < 0)
+			continue;
+
+		if (mib->size == 2) {
+			ret = qca8k_read(priv, reg + 4, &hi);
+			if (ret < 0)
+				continue;
+		}
+
+		data[i] = val;
+		if (mib->size == 2)
+			data[i] |= (u64)hi << 32;
+	}
+}
+
+static int
+qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset)
+{
+	if (sset != ETH_SS_STATS)
+		return 0;
+
+	return ARRAY_SIZE(ar8327_mib);
+}
+
+static int
+qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port);
+	u32 reg;
+	int ret;
+
+	mutex_lock(&priv->reg_mutex);
+	ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, &reg);
+	if (ret < 0)
+		goto exit;
+
+	if (eee->eee_enabled)
+		reg |= lpi_en;
+	else
+		reg &= ~lpi_en;
+	ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg);
+
+exit:
+	mutex_unlock(&priv->reg_mutex);
+	return ret;
+}
+
+static int
+qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e)
+{
+	/* Nothing to do on the port's MAC */
+	return 0;
+}
+
+static void
+qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	u32 stp_state;
+
+	switch (state) {
+	case BR_STATE_DISABLED:
+		stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED;
+		break;
+	case BR_STATE_BLOCKING:
+		stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING;
+		break;
+	case BR_STATE_LISTENING:
+		stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING;
+		break;
+	case BR_STATE_LEARNING:
+		stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING;
+		break;
+	case BR_STATE_FORWARDING:
+	default:
+		stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD;
+		break;
+	}
+
+	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+		  QCA8K_PORT_LOOKUP_STATE_MASK, stp_state);
+}
+
+static int
+qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	int port_mask, cpu_port;
+	int i, ret;
+
+	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
+	port_mask = BIT(cpu_port);
+
+	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+		if (dsa_is_cpu_port(ds, i))
+			continue;
+		if (dsa_to_port(ds, i)->bridge_dev != br)
+			continue;
+		/* Add this port to the portvlan mask of the other ports
+		 * in the bridge
+		 */
+		ret = qca8k_reg_set(priv,
+				    QCA8K_PORT_LOOKUP_CTRL(i),
+				    BIT(port));
+		if (ret)
+			return ret;
+		if (i != port)
+			port_mask |= BIT(i);
+	}
+
+	/* Add all other ports to this ports portvlan mask */
+	ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+			QCA8K_PORT_LOOKUP_MEMBER, port_mask);
+
+	return ret;
+}
+
+static void
+qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	int cpu_port, i;
+
+	cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
+
+	for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+		if (dsa_is_cpu_port(ds, i))
+			continue;
+		if (dsa_to_port(ds, i)->bridge_dev != br)
+			continue;
+		/* Remove this port to the portvlan mask of the other ports
+		 * in the bridge
+		 */
+		qca8k_reg_clear(priv,
+				QCA8K_PORT_LOOKUP_CTRL(i),
+				BIT(port));
+	}
+
+	/* Set the cpu port to be the only one in the portvlan mask of
+	 * this port
+	 */
+	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+		  QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port));
+}
+
+static int
+qca8k_port_enable(struct dsa_switch *ds, int port,
+		  struct phy_device *phy)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+
+	qca8k_port_set_status(priv, port, 1);
+	priv->port_sts[port].enabled = 1;
+
+	if (dsa_is_user_port(ds, port))
+		phy_support_asym_pause(phy);
+
+	return 0;
+}
+
+static void
+qca8k_port_disable(struct dsa_switch *ds, int port)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+
+	qca8k_port_set_status(priv, port, 0);
+	priv->port_sts[port].enabled = 0;
+}
+
+static int
+qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
+{
+	struct qca8k_priv *priv = ds->priv;
+	int i, mtu = 0;
+
+	priv->port_mtu[port] = new_mtu;
+
+	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+		if (priv->port_mtu[i] > mtu)
+			mtu = priv->port_mtu[i];
+
+	/* Include L2 header / FCS length */
+	return qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, mtu + ETH_HLEN + ETH_FCS_LEN);
+}
+
+static int
+qca8k_port_max_mtu(struct dsa_switch *ds, int port)
+{
+	return QCA8K_MAX_MTU;
+}
+
+static int
+qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr,
+		      u16 port_mask, u16 vid)
+{
+	/* Set the vid to the port vlan id if no vid is set */
+	if (!vid)
+		vid = QCA8K_PORT_VID_DEF;
+
+	return qca8k_fdb_add(priv, addr, port_mask, vid,
+			     QCA8K_ATU_STATUS_STATIC);
+}
+
+static int
+qca8k_port_fdb_add(struct dsa_switch *ds, int port,
+		   const unsigned char *addr, u16 vid)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	u16 port_mask = BIT(port);
+
+	return qca8k_port_fdb_insert(priv, addr, port_mask, vid);
+}
+
+static int
+qca8k_port_fdb_del(struct dsa_switch *ds, int port,
+		   const unsigned char *addr, u16 vid)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	u16 port_mask = BIT(port);
+
+	if (!vid)
+		vid = QCA8K_PORT_VID_DEF;
+
+	return qca8k_fdb_del(priv, addr, port_mask, vid);
+}
+
+static int
+qca8k_port_fdb_dump(struct dsa_switch *ds, int port,
+		    dsa_fdb_dump_cb_t *cb, void *data)
+{
+	struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+	struct qca8k_fdb _fdb = { 0 };
+	int cnt = QCA8K_NUM_FDB_RECORDS;
+	bool is_static;
+	int ret = 0;
+
+	mutex_lock(&priv->reg_mutex);
+	while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) {
+		if (!_fdb.aging)
+			break;
+		is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC);
+		ret = cb(_fdb.mac, _fdb.vid, is_static, data);
+		if (ret)
+			break;
+	}
+	mutex_unlock(&priv->reg_mutex);
+
+	return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+static int
+qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
+			  struct switchdev_trans *trans)
+#else
+static int
+qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
+                          struct netlink_ext_ack *extack)
+#endif
+{
+	struct qca8k_priv *priv = ds->priv;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+	if (switchdev_trans_ph_prepare(trans))
+		return 0;
+#endif
+
+	if (vlan_filtering) {
+		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+			  QCA8K_PORT_LOOKUP_VLAN_MODE,
+			  QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE);
+	} else {
+		qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+			  QCA8K_PORT_LOOKUP_VLAN_MODE,
+			  QCA8K_PORT_LOOKUP_VLAN_MODE_NONE);
+	}
+
+	return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+static int
+qca8k_port_vlan_prepare(struct dsa_switch *ds, int port,
+			const struct switchdev_obj_port_vlan *vlan)
+{
+	return 0;
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+static void
+qca8k_port_vlan_add(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_vlan *vlan)
+#else
+static int
+qca8k_port_vlan_add(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_vlan *vlan,
+		    struct netlink_ext_ack *extack)
+#endif
+{
+	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+	bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
+	struct qca8k_priv *priv = ds->priv;
+	int ret = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+	u16 vid;
+
+	for (vid = vlan->vid_begin; vid <= vlan->vid_end && !ret; ++vid)
+		ret = qca8k_vlan_add(priv, port, vid, untagged);
+#else
+	ret = qca8k_vlan_add(priv, port, vlan->vid, untagged);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+	if (ret)
+		dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret);
+#else
+	if (ret) {
+		dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret);
+		return ret;
+	}
+#endif
+
+	if (pvid) {
+		int shift = 16 * (port % 2);
+
+		qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+			  0xfff << shift,
+			  vlan->vid_end << shift);
+#else
+			  0xfff << shift, vlan->vid << shift);
+#endif
+		qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+			    QCA8K_PORT_VLAN_CVID(vlan->vid_end) |
+			    QCA8K_PORT_VLAN_SVID(vlan->vid_end));
+#else
+			    QCA8K_PORT_VLAN_CVID(vlan->vid) |
+			    QCA8K_PORT_VLAN_SVID(vlan->vid));
+#endif
+	}
+#if LINUX_VERSION_CODE > KERNEL_VERSION(5,12,0)
+	return 0;
+#endif
+}
+
+static int
+qca8k_port_vlan_del(struct dsa_switch *ds, int port,
+		    const struct switchdev_obj_port_vlan *vlan)
+{
+	struct qca8k_priv *priv = ds->priv;
+	int ret = 0;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+	u16 vid;
+
+	for (vid = vlan->vid_begin; vid <= vlan->vid_end && !ret; ++vid)
+		ret = qca8k_vlan_del(priv, port, vid);
+#else
+	ret = qca8k_vlan_del(priv, port, vlan->vid);
+#endif
+	if (ret)
+		dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret);
+
+	return ret;
+}
+
+static enum dsa_tag_protocol
+qca8k_get_tag_protocol(struct dsa_switch *ds, int port,
+		       enum dsa_tag_protocol mp)
+{
+	return DSA_TAG_PROTO_IPQ4019;
+}
+
+static const struct dsa_switch_ops qca8k_switch_ops = {
+	.get_tag_protocol	= qca8k_get_tag_protocol,
+	.setup			= qca8k_setup,
+	.get_strings		= qca8k_get_strings,
+	.get_ethtool_stats	= qca8k_get_ethtool_stats,
+	.get_sset_count		= qca8k_get_sset_count,
+	.get_mac_eee		= qca8k_get_mac_eee,
+	.set_mac_eee		= qca8k_set_mac_eee,
+	.port_enable		= qca8k_port_enable,
+	.port_disable		= qca8k_port_disable,
+	.port_change_mtu	= qca8k_port_change_mtu,
+	.port_max_mtu		= qca8k_port_max_mtu,
+	.port_stp_state_set	= qca8k_port_stp_state_set,
+	.port_bridge_join	= qca8k_port_bridge_join,
+	.port_bridge_leave	= qca8k_port_bridge_leave,
+	.port_fdb_add		= qca8k_port_fdb_add,
+	.port_fdb_del		= qca8k_port_fdb_del,
+	.port_fdb_dump		= qca8k_port_fdb_dump,
+	.port_vlan_filtering	= qca8k_port_vlan_filtering,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
+	.port_vlan_prepare	= qca8k_port_vlan_prepare,
+#endif
+	.port_vlan_add		= qca8k_port_vlan_add,
+	.port_vlan_del		= qca8k_port_vlan_del,
+	.phylink_validate	= qca8k_phylink_validate,
+	.phylink_mac_link_state	= qca8k_phylink_mac_link_state,
+	.phylink_mac_config	= qca8k_phylink_mac_config,
+	.phylink_mac_link_down	= qca8k_phylink_mac_link_down,
+	.phylink_mac_link_up	= qca8k_phylink_mac_link_up,
+};
+
+static int
+qca8k_ipq4019_probe(struct platform_device *pdev)
+{
+	struct qca8k_priv *priv;
+	void __iomem *base, *psgmii;
+	struct device_node *np = pdev->dev.of_node, *mdio_np, *psgmii_ethphy_np;
+	int ret;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = &pdev->dev;
+
+	base = devm_platform_ioremap_resource_byname(pdev, "base");
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	priv->regmap = devm_regmap_init_mmio(priv->dev, base,
+					     &qca8k_ipq4019_regmap_config);
+	if (IS_ERR(priv->regmap)) {
+		ret = PTR_ERR(priv->regmap);
+		dev_err(priv->dev, "base regmap initialization failed, %d\n", ret);
+		return ret;
+	}
+
+	psgmii = devm_platform_ioremap_resource_byname(pdev, "psgmii_phy");
+	if (IS_ERR(psgmii))
+		return PTR_ERR(psgmii);
+
+	priv->psgmii = devm_regmap_init_mmio(priv->dev, psgmii,
+					     &qca8k_ipq4019_psgmii_phy_regmap_config);
+	if (IS_ERR(priv->psgmii)) {
+		ret = PTR_ERR(priv->psgmii);
+		dev_err(priv->dev, "PSGMII regmap initialization failed, %d\n", ret);
+		return ret;
+	}
+
+	mdio_np = of_parse_phandle(np, "mdio", 0);
+	if (!mdio_np) {
+		dev_err(&pdev->dev, "unable to get MDIO bus phandle\n");
+		of_node_put(mdio_np);
+		return -EINVAL;
+	}
+
+	priv->bus = of_mdio_find_bus(mdio_np);
+	of_node_put(mdio_np);
+	if (!priv->bus) {
+		dev_err(&pdev->dev, "unable to find MDIO bus\n");
+		return -EPROBE_DEFER;
+	}
+
+	psgmii_ethphy_np = of_parse_phandle(np, "psgmii-ethphy", 0);
+	if (!psgmii_ethphy_np) {
+		dev_dbg(&pdev->dev, "unable to get PSGMII eth PHY phandle\n");
+		of_node_put(psgmii_ethphy_np);
+	}
+
+	if (psgmii_ethphy_np) {
+		priv->psgmii_ethphy = of_phy_find_device(psgmii_ethphy_np);
+		of_node_put(psgmii_ethphy_np);
+		if (!priv->psgmii_ethphy) {
+			dev_err(&pdev->dev, "unable to get PSGMII eth PHY\n");
+			return -ENODEV;
+		}
+	}
+
+	priv->ds = devm_kzalloc(priv->dev, sizeof(*priv->ds), GFP_KERNEL);
+	if (!priv->ds)
+		return -ENOMEM;
+
+	priv->ds->dev = priv->dev;
+	priv->ds->num_ports = QCA8K_NUM_PORTS;
+	priv->ds->priv = priv;
+	priv->ops = qca8k_switch_ops;
+	priv->ds->ops = &priv->ops;
+
+	mutex_init(&priv->reg_mutex);
+	platform_set_drvdata(pdev, priv);
+
+	return dsa_register_switch(priv->ds);
+}
+
+static int
+qca8k_ipq4019_remove(struct platform_device *pdev)
+{
+	struct qca8k_priv *priv = dev_get_drvdata(&pdev->dev);
+	int i;
+
+	if (!priv)
+		return 0;
+
+	for (i = 0; i < QCA8K_NUM_PORTS; i++)
+		qca8k_port_set_status(priv, i, 0);
+
+	dsa_unregister_switch(priv->ds);
+
+	dev_set_drvdata(&pdev->dev, NULL);
+
+	return 0;
+}
+
+static const struct of_device_id qca8k_ipq4019_of_match[] = {
+	{ .compatible = "qca,ipq4019-qca8337n" },
+	{ /* sentinel */ },
+};
+
+static struct platform_driver qca8k_ipq4019_driver = {
+	.probe = qca8k_ipq4019_probe,
+	.remove = qca8k_ipq4019_remove,
+	.driver = {
+		.name = "qca8k-ipq4019",
+		.of_match_table = qca8k_ipq4019_of_match,
+	},
+};
+
+module_platform_driver(qca8k_ipq4019_driver);
+
+MODULE_AUTHOR("Mathieu Olivari, John Crispin <john@phrozen.org>");
+MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>, Robert Marko <robert.marko@sartura.hr>");
+MODULE_DESCRIPTION("Qualcomm IPQ4019 built-in switch driver");
+MODULE_LICENSE("GPL v2");
diff --git a/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h
new file mode 100644
index 0000000000..1133501335
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/dsa/qca/qca8k-ipq4019.h
@@ -0,0 +1,289 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __QCA8K_H
+#define __QCA8K_H
+
+#include <linux/regmap.h>
+
+#define QCA8K_NUM_PORTS					6
+#define QCA8K_CPU_PORT					0
+#define QCA8K_MAX_MTU					9000
+
+#define QCA8K_BUSY_WAIT_TIMEOUT				2000
+
+#define QCA8K_NUM_FDB_RECORDS				2048
+
+#define QCA8K_PORT_VID_DEF				1
+
+/* Global control registers */
+#define QCA8K_REG_MASK_CTRL				0x000
+#define   QCA8K_MASK_CTRL_REV_ID_MASK			GENMASK(7, 0)
+#define   QCA8K_MASK_CTRL_REV_ID(x)			((x) >> 0)
+#define   QCA8K_MASK_CTRL_DEVICE_ID_MASK		GENMASK(15, 8)
+#define   QCA8K_MASK_CTRL_DEVICE_ID(x)			((x) >> 8)
+#define QCA8K_REG_RGMII_CTRL				0x004
+#define   QCA8K_RGMII_CTRL_RGMII_RXC			GENMASK(1, 0)
+#define   QCA8K_RGMII_CTRL_RGMII_TXC			GENMASK(9, 8)
+/* Some kind of CLK selection
+ * 0: gcc_ess_dly2ns
+ * 1: gcc_ess_clk
+ */
+#define   QCA8K_RGMII_CTRL_CLK				BIT(10)
+#define   QCA8K_RGMII_CTRL_DELAY_RMII0			GENMASK(17, 16)
+#define   QCA8K_RGMII_CTRL_INVERT_RMII0_REF_CLK		BIT(18)
+#define   QCA8K_RGMII_CTRL_DELAY_RMII1			GENMASK(20, 19)
+#define   QCA8K_RGMII_CTRL_INVERT_RMII1_REF_CLK		BIT(21)
+#define   QCA8K_RGMII_CTRL_INVERT_RMII0_MASTER_EN	BIT(24)
+#define   QCA8K_RGMII_CTRL_INVERT_RMII1_MASTER_EN	BIT(25)
+#define QCA8K_REG_MODULE_EN				0x030
+#define   QCA8K_MODULE_EN_MIB				BIT(0)
+#define QCA8K_REG_MIB					0x034
+#define   QCA8K_MIB_FLUSH				BIT(24)
+#define   QCA8K_MIB_CPU_KEEP				BIT(20)
+#define   QCA8K_MIB_BUSY				BIT(17)
+#define QCA8K_GOL_MAC_ADDR0				0x60
+#define QCA8K_GOL_MAC_ADDR1				0x64
+#define QCA8K_MAX_FRAME_SIZE				0x78
+#define QCA8K_REG_PORT_STATUS(_i)			(0x07c + (_i) * 4)
+#define   QCA8K_PORT_STATUS_SPEED			GENMASK(1, 0)
+#define   QCA8K_PORT_STATUS_SPEED_10			0
+#define   QCA8K_PORT_STATUS_SPEED_100			0x1
+#define   QCA8K_PORT_STATUS_SPEED_1000			0x2
+#define   QCA8K_PORT_STATUS_TXMAC			BIT(2)
+#define   QCA8K_PORT_STATUS_RXMAC			BIT(3)
+#define   QCA8K_PORT_STATUS_TXFLOW			BIT(4)
+#define   QCA8K_PORT_STATUS_RXFLOW			BIT(5)
+#define   QCA8K_PORT_STATUS_DUPLEX			BIT(6)
+#define   QCA8K_PORT_STATUS_LINK_UP			BIT(8)
+#define   QCA8K_PORT_STATUS_LINK_AUTO			BIT(9)
+#define   QCA8K_PORT_STATUS_LINK_PAUSE			BIT(10)
+#define   QCA8K_PORT_STATUS_FLOW_AUTO			BIT(12)
+#define QCA8K_REG_PORT_HDR_CTRL(_i)			(0x9c + (_i * 4))
+#define   QCA8K_PORT_HDR_CTRL_RX_MASK			GENMASK(3, 2)
+#define   QCA8K_PORT_HDR_CTRL_RX_S			2
+#define   QCA8K_PORT_HDR_CTRL_TX_MASK			GENMASK(1, 0)
+#define   QCA8K_PORT_HDR_CTRL_TX_S			0
+#define   QCA8K_PORT_HDR_CTRL_ALL			2
+#define   QCA8K_PORT_HDR_CTRL_MGMT			1
+#define   QCA8K_PORT_HDR_CTRL_NONE			0
+#define QCA8K_REG_SGMII_CTRL				0x0e0
+#define   QCA8K_SGMII_EN_PLL				BIT(1)
+#define   QCA8K_SGMII_EN_RX				BIT(2)
+#define   QCA8K_SGMII_EN_TX				BIT(3)
+#define   QCA8K_SGMII_EN_SD				BIT(4)
+#define   QCA8K_SGMII_CLK125M_DELAY			BIT(7)
+#define   QCA8K_SGMII_MODE_CTRL_MASK			(BIT(22) | BIT(23))
+#define   QCA8K_SGMII_MODE_CTRL_BASEX			(0 << 22)
+#define   QCA8K_SGMII_MODE_CTRL_PHY			(1 << 22)
+#define   QCA8K_SGMII_MODE_CTRL_MAC			(2 << 22)
+
+/* EEE control registers */
+#define QCA8K_REG_EEE_CTRL				0x100
+#define  QCA8K_REG_EEE_CTRL_LPI_EN(_i)			((_i + 1) * 2)
+
+/* ACL registers */
+#define QCA8K_REG_PORT_VLAN_CTRL0(_i)			(0x420 + (_i * 8))
+#define   QCA8K_PORT_VLAN_CVID(x)			(x << 16)
+#define   QCA8K_PORT_VLAN_SVID(x)			x
+#define QCA8K_REG_PORT_VLAN_CTRL1(_i)			(0x424 + (_i * 8))
+#define QCA8K_REG_IPV4_PRI_BASE_ADDR			0x470
+#define QCA8K_REG_IPV4_PRI_ADDR_MASK			0x474
+
+/* Lookup registers */
+#define QCA8K_REG_ATU_DATA0				0x600
+#define   QCA8K_ATU_ADDR2_S				24
+#define   QCA8K_ATU_ADDR3_S				16
+#define   QCA8K_ATU_ADDR4_S				8
+#define QCA8K_REG_ATU_DATA1				0x604
+#define   QCA8K_ATU_PORT_M				0x7f
+#define   QCA8K_ATU_PORT_S				16
+#define   QCA8K_ATU_ADDR0_S				8
+#define QCA8K_REG_ATU_DATA2				0x608
+#define   QCA8K_ATU_VID_M				0xfff
+#define   QCA8K_ATU_VID_S				8
+#define   QCA8K_ATU_STATUS_M				0xf
+#define   QCA8K_ATU_STATUS_STATIC			0xf
+#define QCA8K_REG_ATU_FUNC				0x60c
+#define   QCA8K_ATU_FUNC_BUSY				BIT(31)
+#define   QCA8K_ATU_FUNC_PORT_EN			BIT(14)
+#define   QCA8K_ATU_FUNC_MULTI_EN			BIT(13)
+#define   QCA8K_ATU_FUNC_FULL				BIT(12)
+#define   QCA8K_ATU_FUNC_PORT_M				0xf
+#define   QCA8K_ATU_FUNC_PORT_S				8
+#define QCA8K_REG_VTU_FUNC0				0x610
+#define   QCA8K_VTU_FUNC0_VALID				BIT(20)
+#define   QCA8K_VTU_FUNC0_IVL_EN			BIT(19)
+#define   QCA8K_VTU_FUNC0_EG_MODE_S(_i)			(4 + (_i) * 2)
+#define   QCA8K_VTU_FUNC0_EG_MODE_MASK			3
+#define   QCA8K_VTU_FUNC0_EG_MODE_UNMOD			0
+#define   QCA8K_VTU_FUNC0_EG_MODE_UNTAG			1
+#define   QCA8K_VTU_FUNC0_EG_MODE_TAG			2
+#define   QCA8K_VTU_FUNC0_EG_MODE_NOT			3
+#define QCA8K_REG_VTU_FUNC1				0x614
+#define   QCA8K_VTU_FUNC1_BUSY				BIT(31)
+#define   QCA8K_VTU_FUNC1_VID_S				16
+#define   QCA8K_VTU_FUNC1_FULL				BIT(4)
+#define QCA8K_REG_GLOBAL_FW_CTRL0			0x620
+#define   QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN		BIT(10)
+#define QCA8K_REG_GLOBAL_FW_CTRL1			0x624
+#define   QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_S		24
+#define   QCA8K_GLOBAL_FW_CTRL1_BC_DP_S			16
+#define   QCA8K_GLOBAL_FW_CTRL1_MC_DP_S			8
+#define   QCA8K_GLOBAL_FW_CTRL1_UC_DP_S			0
+#define QCA8K_PORT_LOOKUP_CTRL(_i)			(0x660 + (_i) * 0xc)
+#define   QCA8K_PORT_LOOKUP_MEMBER			GENMASK(6, 0)
+#define   QCA8K_PORT_LOOKUP_VLAN_MODE			GENMASK(9, 8)
+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_NONE		(0 << 8)
+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK		(1 << 8)
+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK		(2 << 8)
+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE		(3 << 8)
+#define   QCA8K_PORT_LOOKUP_STATE_MASK			GENMASK(18, 16)
+#define   QCA8K_PORT_LOOKUP_STATE_DISABLED		(0 << 16)
+#define   QCA8K_PORT_LOOKUP_STATE_BLOCKING		(1 << 16)
+#define   QCA8K_PORT_LOOKUP_STATE_LISTENING		(2 << 16)
+#define   QCA8K_PORT_LOOKUP_STATE_LEARNING		(3 << 16)
+#define   QCA8K_PORT_LOOKUP_STATE_FORWARD		(4 << 16)
+#define   QCA8K_PORT_LOOKUP_STATE			GENMASK(18, 16)
+#define   QCA8K_PORT_LOOKUP_LEARN			BIT(20)
+#define   QCA8K_PORT_LOOKUP_LOOPBACK	BIT(21)
+
+#define QCA8K_REG_GLOBAL_FC_THRESH			0x800
+#define   QCA8K_GLOBAL_FC_GOL_XON_THRES(x)		((x) << 16)
+#define   QCA8K_GLOBAL_FC_GOL_XON_THRES_S		GENMASK(24, 16)
+#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x)		((x) << 0)
+#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S		GENMASK(8, 0)
+
+#define QCA8K_REG_PORT_HOL_CTRL0(_i)			(0x970 + (_i) * 0x8)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF		GENMASK(3, 0)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0(x)		((x) << 0)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF		GENMASK(7, 4)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1(x)		((x) << 4)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF		GENMASK(11, 8)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2(x)		((x) << 8)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF		GENMASK(15, 12)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3(x)		((x) << 12)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF		GENMASK(19, 16)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4(x)		((x) << 16)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF		GENMASK(23, 20)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5(x)		((x) << 20)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF		GENMASK(29, 24)
+#define   QCA8K_PORT_HOL_CTRL0_EG_PORT(x)		((x) << 24)
+
+#define QCA8K_REG_PORT_HOL_CTRL1(_i)			(0x974 + (_i) * 0x8)
+#define   QCA8K_PORT_HOL_CTRL1_ING_BUF			GENMASK(3, 0)
+#define   QCA8K_PORT_HOL_CTRL1_ING(x)			((x) << 0)
+#define   QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN		BIT(6)
+#define   QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN		BIT(7)
+#define   QCA8K_PORT_HOL_CTRL1_WRED_EN			BIT(8)
+#define   QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN		BIT(16)
+
+/* Pkt edit registers */
+#define QCA8K_EGRESS_VLAN(x)				(0x0c70 + (4 * (x / 2)))
+
+/* L3 registers */
+#define QCA8K_HROUTER_CONTROL				0xe00
+#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_M		GENMASK(17, 16)
+#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_S		16
+#define   QCA8K_HROUTER_CONTROL_ARP_AGE_MODE		1
+#define QCA8K_HROUTER_PBASED_CONTROL1			0xe08
+#define QCA8K_HROUTER_PBASED_CONTROL2			0xe0c
+#define QCA8K_HNAT_CONTROL				0xe38
+
+/* MIB registers */
+#define QCA8K_PORT_MIB_COUNTER(_i)			(0x1000 + (_i) * 0x100)
+
+/* IPQ4019 PSGMII PHY registers */
+#define PSGMIIPHY_MODE_CONTROL				0x1b4
+#define   PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M		BIT(0)
+#define PSGMIIPHY_TX_CONTROL				0x288
+#define   PSGMIIPHY_TX_CONTROL_MAGIC_VALUE		0x8380
+#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1	0x9c
+#define   PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART		BIT(14)
+#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2	0xa0
+#define   PSGMIIPHY_REG_PLL_VCO_CALIB_READY		BIT(0)
+
+#define   QCA8K_PSGMII_CALB_NUM				100
+#define   MII_QCA8075_SSTATUS				0x11
+#define   QCA8075_PHY_SPEC_STATUS_LINK			BIT(10)
+#define   QCA8075_MMD7_CRC_AND_PKTS_COUNT		0x8029
+#define   QCA8075_MMD7_PKT_GEN_PKT_NUMB			0x8021
+#define   QCA8075_MMD7_PKT_GEN_PKT_SIZE			0x8062
+#define   QCA8075_MMD7_PKT_GEN_CTRL			0x8020
+#define   QCA8075_MMD7_CNT_SELFCLR			BIT(1)
+#define   QCA8075_MMD7_CNT_FRAME_CHK_EN			BIT(0)
+#define   QCA8075_MMD7_PKT_GEN_START			BIT(13)
+#define   QCA8075_MMD7_PKT_GEN_INPROGR			BIT(15)
+#define   QCA8075_MMD7_IG_FRAME_RECV_CNT_HI		0x802a
+#define   QCA8075_MMD7_IG_FRAME_RECV_CNT_LO		0x802b
+#define   QCA8075_MMD7_IG_FRAME_ERR_CNT			0x802c
+#define   QCA8075_MMD7_EG_FRAME_RECV_CNT_HI		0x802d
+#define   QCA8075_MMD7_EG_FRAME_RECV_CNT_LO		0x802e
+#define   QCA8075_MMD7_EG_FRAME_ERR_CNT			0x802f
+#define   QCA8075_MMD7_MDIO_BRDCST_WRITE		0x8028
+#define   QCA8075_MMD7_MDIO_BRDCST_WRITE_EN 		BIT(15)
+#define   QCA8075_MDIO_BRDCST_PHY_ADDR			0x1f
+#define   QCA8075_PKT_GEN_PKTS_COUNT			4096
+
+enum {
+	QCA8K_PORT_SPEED_10M = 0,
+	QCA8K_PORT_SPEED_100M = 1,
+	QCA8K_PORT_SPEED_1000M = 2,
+	QCA8K_PORT_SPEED_ERR = 3,
+};
+
+enum qca8k_fdb_cmd {
+	QCA8K_FDB_FLUSH	= 1,
+	QCA8K_FDB_LOAD = 2,
+	QCA8K_FDB_PURGE = 3,
+	QCA8K_FDB_NEXT = 6,
+	QCA8K_FDB_SEARCH = 7,
+};
+
+enum qca8k_vlan_cmd {
+	QCA8K_VLAN_FLUSH = 1,
+	QCA8K_VLAN_LOAD = 2,
+	QCA8K_VLAN_PURGE = 3,
+	QCA8K_VLAN_REMOVE_PORT = 4,
+	QCA8K_VLAN_NEXT = 5,
+	QCA8K_VLAN_READ = 6,
+};
+
+struct ar8xxx_port_status {
+	int enabled;
+};
+
+struct qca8k_priv {
+	struct regmap *regmap;
+	struct mii_bus *bus;
+	struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];
+	struct dsa_switch *ds;
+	struct mutex reg_mutex;
+	struct device *dev;
+	struct dsa_switch_ops ops;
+	unsigned int port_mtu[QCA8K_NUM_PORTS];
+
+	/* IPQ4019 specific */
+	struct regmap *psgmii;
+	bool psgmii_calibrated;
+	struct phy_device *psgmii_ethphy;
+};
+
+struct qca8k_mib_desc {
+	unsigned int size;
+	unsigned int offset;
+	const char *name;
+};
+
+struct qca8k_fdb {
+	u16 vid;
+	u8 port_mask;
+	u8 aging;
+	u8 mac[6];
+};
+
+#endif /* __QCA8K_H */
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/Makefile b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/Makefile
deleted file mode 100644
index 4e6cd6505e..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-## Makefile for the Qualcomm Atheros ethernet edma driver
-#
-
-
-obj-$(CONFIG_ESSEDMA) += essedma.o
-
-essedma-objs := edma_axi.o edma.o edma_ethtool.o
-
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.c
deleted file mode 100644
index 80db1f0acb..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ /dev/null
@@ -1,2177 +0,0 @@
-/*
- * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/platform_device.h>
-#include <linux/if_vlan.h>
-#include "ess_edma.h"
-#include "edma.h"
-
-extern struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED];
-bool edma_stp_rstp;
-u16 edma_ath_eth_type;
-
-/* edma_skb_priority_offset()
- * 	get edma skb priority
- */
-static unsigned int edma_skb_priority_offset(struct sk_buff *skb)
-{
-	return (skb->priority >> 2) & 1;
-}
-
-/* edma_alloc_tx_ring()
- *	Allocate Tx descriptors ring
- */
-static int edma_alloc_tx_ring(struct edma_common_info *edma_cinfo,
-			      struct edma_tx_desc_ring *etdr)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-
-	/* Initialize ring */
-	etdr->size = sizeof(struct edma_sw_desc) * etdr->count;
-	etdr->sw_next_to_fill = 0;
-	etdr->sw_next_to_clean = 0;
-
-	/* Allocate SW descriptors */
-	etdr->sw_desc = vzalloc(etdr->size);
-	if (!etdr->sw_desc) {
-		dev_err(&pdev->dev, "buffer alloc of tx ring failed=%p", etdr);
-		return -ENOMEM;
-	}
-
-	/* Allocate HW descriptors */
-	etdr->hw_desc = dma_alloc_coherent(&pdev->dev, etdr->size, &etdr->dma,
-					  GFP_KERNEL);
-	if (!etdr->hw_desc) {
-		dev_err(&pdev->dev, "descriptor allocation for tx ring failed");
-		vfree(etdr->sw_desc);
-		return -ENOMEM;
-	}
-
-	return 0;
-}
-
-/* edma_free_tx_ring()
- *	Free tx rings allocated by edma_alloc_tx_rings
- */
-static void edma_free_tx_ring(struct edma_common_info *edma_cinfo,
-			      struct edma_tx_desc_ring *etdr)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-
-	if (likely(etdr->dma))
-		dma_free_coherent(&pdev->dev, etdr->size, etdr->hw_desc,
-				 etdr->dma);
-
-	vfree(etdr->sw_desc);
-	etdr->sw_desc = NULL;
-}
-
-/* edma_alloc_rx_ring()
- *	allocate rx descriptor ring
- */
-static int edma_alloc_rx_ring(struct edma_common_info *edma_cinfo,
-			     struct edma_rfd_desc_ring *erxd)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-
-	erxd->size = sizeof(struct edma_sw_desc) * erxd->count;
-	erxd->sw_next_to_fill = 0;
-	erxd->sw_next_to_clean = 0;
-
-	/* Allocate SW descriptors */
-	erxd->sw_desc = vzalloc(erxd->size);
-	if (!erxd->sw_desc)
-		return -ENOMEM;
-
-	/* Alloc HW descriptors */
-	erxd->hw_desc = dma_alloc_coherent(&pdev->dev, erxd->size, &erxd->dma,
-			GFP_KERNEL);
-	if (!erxd->hw_desc) {
-		vfree(erxd->sw_desc);
-		return -ENOMEM;
-	}
-
-	/* Initialize pending_fill */
-	erxd->pending_fill = 0;
-
-	return 0;
-}
-
-/* edma_free_rx_ring()
- *	Free rx ring allocated by alloc_rx_ring
- */
-static void edma_free_rx_ring(struct edma_common_info *edma_cinfo,
-			     struct edma_rfd_desc_ring *rxdr)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-
-	if (likely(rxdr->dma))
-		dma_free_coherent(&pdev->dev, rxdr->size, rxdr->hw_desc,
-				 rxdr->dma);
-
-	vfree(rxdr->sw_desc);
-	rxdr->sw_desc = NULL;
-}
-
-/* edma_configure_tx()
- *	Configure transmission control data
- */
-static void edma_configure_tx(struct edma_common_info *edma_cinfo)
-{
-	u32 txq_ctrl_data;
-
-	txq_ctrl_data = (EDMA_TPD_BURST << EDMA_TXQ_NUM_TPD_BURST_SHIFT);
-	txq_ctrl_data |= EDMA_TXQ_CTRL_TPD_BURST_EN;
-	txq_ctrl_data |= (EDMA_TXF_BURST << EDMA_TXQ_TXF_BURST_NUM_SHIFT);
-	edma_write_reg(EDMA_REG_TXQ_CTRL, txq_ctrl_data);
-}
-
-
-/* edma_configure_rx()
- *	configure reception control data
- */
-static void edma_configure_rx(struct edma_common_info *edma_cinfo)
-{
-	struct edma_hw *hw = &edma_cinfo->hw;
-	u32 rss_type, rx_desc1, rxq_ctrl_data;
-
-	/* Set RSS type */
-	rss_type = hw->rss_type;
-	edma_write_reg(EDMA_REG_RSS_TYPE, rss_type);
-
-	/* Set RFD burst number */
-	rx_desc1 = (EDMA_RFD_BURST << EDMA_RXQ_RFD_BURST_NUM_SHIFT);
-
-	/* Set RFD prefetch threshold */
-	rx_desc1 |= (EDMA_RFD_THR << EDMA_RXQ_RFD_PF_THRESH_SHIFT);
-
-	/* Set RFD in host ring low threshold to generte interrupt */
-	rx_desc1 |= (EDMA_RFD_LTHR << EDMA_RXQ_RFD_LOW_THRESH_SHIFT);
-	edma_write_reg(EDMA_REG_RX_DESC1, rx_desc1);
-
-	/* Set Rx FIFO threshold to start to DMA data to host */
-	rxq_ctrl_data = EDMA_FIFO_THRESH_128_BYTE;
-
-	/* Set RX remove vlan bit */
-	rxq_ctrl_data |= EDMA_RXQ_CTRL_RMV_VLAN;
-
-	edma_write_reg(EDMA_REG_RXQ_CTRL, rxq_ctrl_data);
-}
-
-/* edma_alloc_rx_buf()
- *	does skb allocation for the received packets.
- */
-static int edma_alloc_rx_buf(struct edma_common_info
-			     *edma_cinfo,
-			     struct edma_rfd_desc_ring *erdr,
-			     int cleaned_count, int queue_id)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	struct edma_rx_free_desc *rx_desc;
-	struct edma_sw_desc *sw_desc;
-	struct sk_buff *skb;
-	unsigned int i;
-	u16 prod_idx, length;
-	u32 reg_data;
-
-	if (cleaned_count > erdr->count)
-		cleaned_count = erdr->count - 1;
-
-	i = erdr->sw_next_to_fill;
-
-	while (cleaned_count) {
-		sw_desc = &erdr->sw_desc[i];
-		length = edma_cinfo->rx_head_buffer_len;
-
-		if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_REUSE) {
-			skb = sw_desc->skb;
-
-			/* Clear REUSE Flag */
-			sw_desc->flags &= ~EDMA_SW_DESC_FLAG_SKB_REUSE;
-		} else {
-			/* alloc skb */
-			skb = netdev_alloc_skb_ip_align(edma_netdev[0], length);
-			if (!skb) {
-				/* Better luck next round */
-				break;
-			}
-		}
-
-		if (edma_cinfo->page_mode) {
-			struct page *pg = alloc_page(GFP_ATOMIC);
-
-			if (!pg) {
-				dev_kfree_skb_any(skb);
-				break;
-			}
-
-			sw_desc->dma = dma_map_page(&pdev->dev, pg, 0,
-						   edma_cinfo->rx_page_buffer_len,
-						   DMA_FROM_DEVICE);
-			if (dma_mapping_error(&pdev->dev,
-				    sw_desc->dma)) {
-				__free_page(pg);
-				dev_kfree_skb_any(skb);
-				break;
-			}
-
-			skb_fill_page_desc(skb, 0, pg, 0,
-					   edma_cinfo->rx_page_buffer_len);
-			sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_FRAG;
-			sw_desc->length = edma_cinfo->rx_page_buffer_len;
-		} else {
-			sw_desc->dma = dma_map_single(&pdev->dev, skb->data,
-						     length, DMA_FROM_DEVICE);
-			if (dma_mapping_error(&pdev->dev,
-			   sw_desc->dma)) {
-				dev_kfree_skb_any(skb);
-				break;
-			}
-
-			sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_HEAD;
-			sw_desc->length = length;
-		}
-
-		/* Update the buffer info */
-		sw_desc->skb = skb;
-		rx_desc = (&((struct edma_rx_free_desc *)(erdr->hw_desc))[i]);
-		rx_desc->buffer_addr = cpu_to_le64(sw_desc->dma);
-		if (++i == erdr->count)
-			i = 0;
-		cleaned_count--;
-	}
-
-	erdr->sw_next_to_fill = i;
-
-	if (i == 0)
-		prod_idx = erdr->count - 1;
-	else
-		prod_idx = i - 1;
-
-	/* Update the producer index */
-	edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &reg_data);
-	reg_data &= ~EDMA_RFD_PROD_IDX_BITS;
-	reg_data |= prod_idx;
-	edma_write_reg(EDMA_REG_RFD_IDX_Q(queue_id), reg_data);
-
-	/* If we couldn't allocate all the buffers
-	 * we increment the alloc failure counters
-	 */
-	if (cleaned_count)
-		edma_cinfo->edma_ethstats.rx_alloc_fail_ctr++;
-
-	return cleaned_count;
-}
-
-/* edma_init_desc()
- *	update descriptor ring size, buffer and producer/consumer index
- */
-static void edma_init_desc(struct edma_common_info *edma_cinfo)
-{
-	struct edma_rfd_desc_ring *rfd_ring;
-	struct edma_tx_desc_ring *etdr;
-	int i = 0, j = 0;
-	u32 data = 0;
-	u16 hw_cons_idx = 0;
-
-	/* Set the base address of every TPD ring. */
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		etdr = edma_cinfo->tpd_ring[i];
-
-		/* Update descriptor ring base address */
-		edma_write_reg(EDMA_REG_TPD_BASE_ADDR_Q(i), (u32)etdr->dma);
-		edma_read_reg(EDMA_REG_TPD_IDX_Q(i), &data);
-
-		/* Calculate hardware consumer index */
-		hw_cons_idx = (data >> EDMA_TPD_CONS_IDX_SHIFT) & 0xffff;
-		etdr->sw_next_to_fill = hw_cons_idx;
-		etdr->sw_next_to_clean = hw_cons_idx;
-		data &= ~(EDMA_TPD_PROD_IDX_MASK << EDMA_TPD_PROD_IDX_SHIFT);
-		data |= hw_cons_idx;
-
-		/* update producer index */
-		edma_write_reg(EDMA_REG_TPD_IDX_Q(i), data);
-
-		/* update SW consumer index register */
-		edma_write_reg(EDMA_REG_TX_SW_CONS_IDX_Q(i), hw_cons_idx);
-
-		/* Set TPD ring size */
-		edma_write_reg(EDMA_REG_TPD_RING_SIZE,
-			       edma_cinfo->tx_ring_count &
-				    EDMA_TPD_RING_SIZE_MASK);
-	}
-
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		rfd_ring = edma_cinfo->rfd_ring[j];
-		/* Update Receive Free descriptor ring base address */
-		edma_write_reg(EDMA_REG_RFD_BASE_ADDR_Q(j),
-			(u32)(rfd_ring->dma));
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-
-	data = edma_cinfo->rx_head_buffer_len;
-	if (edma_cinfo->page_mode)
-		data = edma_cinfo->rx_page_buffer_len;
-
-	data &= EDMA_RX_BUF_SIZE_MASK;
-	data <<= EDMA_RX_BUF_SIZE_SHIFT;
-
-	/* Update RFD ring size and RX buffer size */
-	data |= (edma_cinfo->rx_ring_count & EDMA_RFD_RING_SIZE_MASK)
-		<< EDMA_RFD_RING_SIZE_SHIFT;
-
-	edma_write_reg(EDMA_REG_RX_DESC0, data);
-
-	/* Disable TX FIFO low watermark and high watermark */
-	edma_write_reg(EDMA_REG_TXF_WATER_MARK, 0);
-
-	/* Load all of base address above */
-	edma_read_reg(EDMA_REG_TX_SRAM_PART, &data);
-	data |= 1 << EDMA_LOAD_PTR_SHIFT;
-	edma_write_reg(EDMA_REG_TX_SRAM_PART, data);
-}
-
-/* edma_receive_checksum
- *	Api to check checksum on receive packets
- */
-static void edma_receive_checksum(struct edma_rx_return_desc *rd,
-						 struct sk_buff *skb)
-{
-	skb_checksum_none_assert(skb);
-
-	/* check the RRD IP/L4 checksum bit to see if
-	 * its set, which in turn indicates checksum
-	 * failure.
-	 */
-	if (rd->rrd6 & EDMA_RRD_CSUM_FAIL_MASK)
-		return;
-
-	skb->ip_summed = CHECKSUM_UNNECESSARY;
-}
-
-/* edma_clean_rfd()
- *	clean up rx resourcers on error
- */
-static void edma_clean_rfd(struct edma_rfd_desc_ring *erdr, u16 index)
-{
-	struct edma_rx_free_desc *rx_desc;
-	struct edma_sw_desc *sw_desc;
-
-	rx_desc = (&((struct edma_rx_free_desc *)(erdr->hw_desc))[index]);
-	sw_desc = &erdr->sw_desc[index];
-	if (sw_desc->skb) {
-		dev_kfree_skb_any(sw_desc->skb);
-		sw_desc->skb = NULL;
-	}
-
-	memset(rx_desc, 0, sizeof(struct edma_rx_free_desc));
-}
-
-/* edma_rx_complete_fraglist()
- *	Complete Rx processing for fraglist skbs
- */
-static void edma_rx_complete_stp_rstp(struct sk_buff *skb, int port_id, struct edma_rx_return_desc *rd)
-{
-	int i;
-	u32 priority;
-	u16 port_type;
-	u8 mac_addr[EDMA_ETH_HDR_LEN];
-
-	port_type = (rd->rrd1 >> EDMA_RRD_PORT_TYPE_SHIFT)
-		                & EDMA_RRD_PORT_TYPE_MASK;
-	/* if port type is 0x4, then only proceed with
-	 * other stp/rstp calculation
-	 */
-	if (port_type == EDMA_RX_ATH_HDR_RSTP_PORT_TYPE) {
-		u8 bpdu_mac[6] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x00};
-
-		/* calculate the frame priority */
-		priority = (rd->rrd1 >> EDMA_RRD_PRIORITY_SHIFT)
-			& EDMA_RRD_PRIORITY_MASK;
-
-		for (i = 0; i < EDMA_ETH_HDR_LEN; i++)
-			mac_addr[i] = skb->data[i];
-
-		/* Check if destination mac addr is bpdu addr */
-		if (!memcmp(mac_addr, bpdu_mac, 6)) {
-			/* destination mac address is BPDU
-			 * destination mac address, then add
-			 * atheros header to the packet.
-			 */
-			u16 athr_hdr = (EDMA_RX_ATH_HDR_VERSION << EDMA_RX_ATH_HDR_VERSION_SHIFT) |
-				(priority << EDMA_RX_ATH_HDR_PRIORITY_SHIFT) |
-				(EDMA_RX_ATH_HDR_RSTP_PORT_TYPE << EDMA_RX_ATH_PORT_TYPE_SHIFT) | port_id;
-			skb_push(skb, 4);
-			memcpy(skb->data, mac_addr, EDMA_ETH_HDR_LEN);
-			*(uint16_t *)&skb->data[12] = htons(edma_ath_eth_type);
-			*(uint16_t *)&skb->data[14] = htons(athr_hdr);
-		}
-	}
-}
-
-/*
- * edma_rx_complete_fraglist()
- *	Complete Rx processing for fraglist skbs
- */
-static int edma_rx_complete_fraglist(struct sk_buff *skb, u16 num_rfds, u16 length, u32 sw_next_to_clean,
-					u16 *cleaned_count, struct edma_rfd_desc_ring *erdr, struct edma_common_info *edma_cinfo)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	struct edma_hw *hw = &edma_cinfo->hw;
-	struct sk_buff *skb_temp;
-	struct edma_sw_desc *sw_desc;
-	int i;
-	u16 size_remaining;
-
-	skb->data_len = 0;
-	skb->tail += (hw->rx_head_buff_size - 16);
-	skb->len = skb->truesize = length;
-	size_remaining = length - (hw->rx_head_buff_size - 16);
-
-	/* clean-up all related sw_descs */
-	for (i = 1; i < num_rfds; i++) {
-		struct sk_buff *skb_prev;
-		sw_desc = &erdr->sw_desc[sw_next_to_clean];
-		skb_temp = sw_desc->skb;
-
-		dma_unmap_single(&pdev->dev, sw_desc->dma,
-			sw_desc->length, DMA_FROM_DEVICE);
-
-		if (size_remaining < hw->rx_head_buff_size)
-			skb_put(skb_temp, size_remaining);
-		else
-			skb_put(skb_temp, hw->rx_head_buff_size);
-
-		/*
-		 * If we are processing the first rfd, we link
-		 * skb->frag_list to the skb corresponding to the
-		 * first RFD
-		 */
-		if (i == 1)
-			skb_shinfo(skb)->frag_list = skb_temp;
-		else
-			skb_prev->next = skb_temp;
-		skb_prev = skb_temp;
-		skb_temp->next = NULL;
-
-		skb->data_len += skb_temp->len;
-		size_remaining -= skb_temp->len;
-
-		/* Increment SW index */
-		sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1);
-		(*cleaned_count)++;
-	}
-
-	return sw_next_to_clean;
-}
-
-/* edma_rx_complete_paged()
- *	Complete Rx processing for paged skbs
- */
-static int edma_rx_complete_paged(struct sk_buff *skb, u16 num_rfds, u16 length, u32 sw_next_to_clean,
-					u16 *cleaned_count, struct edma_rfd_desc_ring *erdr, struct edma_common_info *edma_cinfo)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	struct sk_buff *skb_temp;
-	struct edma_sw_desc *sw_desc;
-	int i;
-	u16 size_remaining;
-
-	skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
-
-	/* Setup skbuff fields */
-	skb->len = length;
-
-	if (likely(num_rfds <= 1)) {
-		skb->data_len = length;
-		skb->truesize += edma_cinfo->rx_page_buffer_len;
-		skb_fill_page_desc(skb, 0, skb_frag_page(frag),
-				16, length);
-	} else {
-		skb_frag_size_sub(frag, 16);
-		skb->data_len = skb_frag_size(frag);
-		skb->truesize += edma_cinfo->rx_page_buffer_len;
-		size_remaining = length - skb_frag_size(frag);
-
-		skb_fill_page_desc(skb, 0, skb_frag_page(frag),
-				16, skb_frag_size(frag));
-
-		/* clean-up all related sw_descs */
-		for (i = 1; i < num_rfds; i++) {
-			sw_desc = &erdr->sw_desc[sw_next_to_clean];
-			skb_temp = sw_desc->skb;
-			frag = &skb_shinfo(skb_temp)->frags[0];
-			dma_unmap_page(&pdev->dev, sw_desc->dma,
-				sw_desc->length, DMA_FROM_DEVICE);
-
-			if (size_remaining < edma_cinfo->rx_page_buffer_len)
-				skb_frag_size_set(frag, size_remaining);
-
-			skb_fill_page_desc(skb, i, skb_frag_page(frag),
-					0, skb_frag_size(frag));
-
-			skb_shinfo(skb_temp)->nr_frags = 0;
-			dev_kfree_skb_any(skb_temp);
-
-			skb->data_len += skb_frag_size(frag);
-			skb->truesize += edma_cinfo->rx_page_buffer_len;
-			size_remaining -= skb_frag_size(frag);
-
-			/* Increment SW index */
-			sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1);
-			(*cleaned_count)++;
-		}
-	}
-
-	return sw_next_to_clean;
-}
-
-/*
- * edma_rx_complete()
- *	Main api called from the poll function to process rx packets.
- */
-static u16 edma_rx_complete(struct edma_common_info *edma_cinfo,
-			    int *work_done, int work_to_do, int queue_id,
-			    struct napi_struct *napi)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	struct edma_rfd_desc_ring *erdr = edma_cinfo->rfd_ring[queue_id];
-	struct net_device *netdev;
-	struct edma_adapter *adapter;
-	struct edma_sw_desc *sw_desc;
-	struct sk_buff *skb;
-	struct edma_rx_return_desc *rd;
-	u16 hash_type, rrd[8], cleaned_count = 0, length = 0, num_rfds = 1,
-	    sw_next_to_clean, hw_next_to_clean = 0, vlan = 0, ret_count = 0;
-	u32 data = 0;
-	u8 *vaddr;
-	int port_id, i, drop_count = 0;
-	u32 priority;
-	u16 count = erdr->count, rfd_avail;
-	u8 queue_to_rxid[8] = {0, 0, 1, 1, 2, 2, 3, 3};
-
-	cleaned_count = erdr->pending_fill;
-	sw_next_to_clean = erdr->sw_next_to_clean;
-
-	edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data);
-	hw_next_to_clean = (data >> EDMA_RFD_CONS_IDX_SHIFT) &
-			   EDMA_RFD_CONS_IDX_MASK;
-
-	do {
-		while (sw_next_to_clean != hw_next_to_clean) {
-			if (!work_to_do)
-				break;
-
-			sw_desc = &erdr->sw_desc[sw_next_to_clean];
-			skb = sw_desc->skb;
-
-			/* Unmap the allocated buffer */
-			if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD))
-				dma_unmap_single(&pdev->dev, sw_desc->dma,
-					        sw_desc->length, DMA_FROM_DEVICE);
-			else
-				dma_unmap_page(&pdev->dev, sw_desc->dma,
-					      sw_desc->length, DMA_FROM_DEVICE);
-
-			/* Get RRD */
-			if (edma_cinfo->page_mode) {
-				vaddr = kmap_atomic(skb_frag_page(&skb_shinfo(skb)->frags[0]));
-				memcpy((uint8_t *)&rrd[0], vaddr, 16);
-				rd = (struct edma_rx_return_desc *)rrd;
-				kunmap_atomic(vaddr);
-			} else {
-				rd = (struct edma_rx_return_desc *)skb->data;
-			}
-
-			/* Check if RRD is valid */
-			if (!(rd->rrd7 & EDMA_RRD_DESC_VALID)) {
-				edma_clean_rfd(erdr, sw_next_to_clean);
-				sw_next_to_clean = (sw_next_to_clean + 1) &
-						   (erdr->count - 1);
-				cleaned_count++;
-				continue;
-			}
-
-			/* Get the number of RFDs from RRD */
-			num_rfds = rd->rrd1 & EDMA_RRD_NUM_RFD_MASK;
-
-			/* Get Rx port ID from switch */
-			port_id = (rd->rrd1 >> EDMA_PORT_ID_SHIFT) & EDMA_PORT_ID_MASK;
-			if ((!port_id) || (port_id > EDMA_MAX_PORTID_SUPPORTED)) {
-				dev_err(&pdev->dev, "Invalid RRD source port bit set");
-				for (i = 0; i < num_rfds; i++) {
-					edma_clean_rfd(erdr, sw_next_to_clean);
-					sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1);
-					cleaned_count++;
-				}
-				continue;
-			}
-
-			/* check if we have a sink for the data we receive.
-			 * If the interface isn't setup, we have to drop the
-			 * incoming data for now.
-			 */
-			netdev = edma_cinfo->portid_netdev_lookup_tbl[port_id];
-			if (!netdev) {
-				edma_clean_rfd(erdr, sw_next_to_clean);
-				sw_next_to_clean = (sw_next_to_clean + 1) &
-						   (erdr->count - 1);
-				cleaned_count++;
-				continue;
-			}
-			adapter = netdev_priv(netdev);
-
-			/* This code is added to handle a usecase where high
-			 * priority stream and a low priority stream are
-			 * received simultaneously on DUT. The problem occurs
-			 * if one of the  Rx rings is full and the corresponding
-			 * core is busy with other stuff. This causes ESS CPU
-			 * port to backpressure all incoming traffic including
-			 * high priority one. We monitor free descriptor count
-			 * on each CPU and whenever it reaches threshold (< 80),
-			 * we drop all low priority traffic and let only high
-			 * priotiy traffic pass through. We can hence avoid
-			 * ESS CPU port to send backpressure on high priroity
-			 * stream.
-			 */
-			priority = (rd->rrd1 >> EDMA_RRD_PRIORITY_SHIFT)
-				& EDMA_RRD_PRIORITY_MASK;
-			if (likely(!priority && !edma_cinfo->page_mode && (num_rfds <= 1))) {
-				rfd_avail = (count + sw_next_to_clean - hw_next_to_clean - 1) & (count - 1);
-				if (rfd_avail < EDMA_RFD_AVAIL_THR) {
-					sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_REUSE;
-					sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1);
-					adapter->stats.rx_dropped++;
-					cleaned_count++;
-					drop_count++;
-					if (drop_count == 3) {
-						work_to_do--;
-						(*work_done)++;
-						drop_count = 0;
-					}
-					if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
-						/* If buffer clean count reaches 16, we replenish HW buffers. */
-						ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
-						edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
-							      sw_next_to_clean);
-						cleaned_count = ret_count;
-						erdr->pending_fill = ret_count;
-					}
-					continue;
-				}
-			}
-
-			work_to_do--;
-			(*work_done)++;
-
-			/* Increment SW index */
-			sw_next_to_clean = (sw_next_to_clean + 1) &
-					   (erdr->count - 1);
-
-			cleaned_count++;
-
-			/* Get the packet size and allocate buffer */
-			length = rd->rrd6 & EDMA_RRD_PKT_SIZE_MASK;
-
-			if (edma_cinfo->page_mode) {
-				/* paged skb */
-				sw_next_to_clean = edma_rx_complete_paged(skb, num_rfds, length, sw_next_to_clean, &cleaned_count, erdr, edma_cinfo);
-				if (!pskb_may_pull(skb, ETH_HLEN)) {
-					dev_kfree_skb_any(skb);
-					continue;
-				}
-			} else {
-				/* single or fraglist skb */
-
-				/* Addition of 16 bytes is required, as in the packet
-				 * first 16 bytes are rrd descriptors, so actual data
-				 * starts from an offset of 16.
-				 */
-				skb_reserve(skb, 16);
-				if (likely((num_rfds <= 1) || !edma_cinfo->fraglist_mode)) {
-					skb_put(skb, length);
-				} else {
-					sw_next_to_clean = edma_rx_complete_fraglist(skb, num_rfds, length, sw_next_to_clean, &cleaned_count, erdr, edma_cinfo);
-				}
-			}
-
-			if (edma_stp_rstp) {
-				edma_rx_complete_stp_rstp(skb, port_id, rd);
-			}
-
-			skb->protocol = eth_type_trans(skb, netdev);
-
-			/* Record Rx queue for RFS/RPS and fill flow hash from HW */
-			skb_record_rx_queue(skb, queue_to_rxid[queue_id]);
-			if (netdev->features & NETIF_F_RXHASH) {
-				hash_type = (rd->rrd5 >> EDMA_HASH_TYPE_SHIFT);
-				if ((hash_type > EDMA_HASH_TYPE_START) && (hash_type < EDMA_HASH_TYPE_END))
-					skb_set_hash(skb, rd->rrd2, PKT_HASH_TYPE_L4);
-			}
-
-#ifdef CONFIG_NF_FLOW_COOKIE
-			skb->flow_cookie = rd->rrd3 & EDMA_RRD_FLOW_COOKIE_MASK;
-#endif
-			edma_receive_checksum(rd, skb);
-
-			/* Process VLAN HW acceleration indication provided by HW */
-			if (unlikely(adapter->default_vlan_tag != rd->rrd4)) {
-				vlan = rd->rrd4;
-				if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
-					__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
-				else if (rd->rrd1 & EDMA_RRD_SVLAN)
-					__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
-			}
-
-			/* Update rx statistics */
-			adapter->stats.rx_packets++;
-			adapter->stats.rx_bytes += length;
-
-			/* Check if we reached refill threshold */
-			if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
-				ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
-				edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
-					      sw_next_to_clean);
-				cleaned_count = ret_count;
-				erdr->pending_fill = ret_count;
-			}
-
-			/* At this point skb should go to stack */
-			napi_gro_receive(napi, skb);
-		}
-
-		/* Check if we still have NAPI budget */
-		if (!work_to_do)
-			break;
-
-		/* Read index once again since we still have NAPI budget */
-		edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data);
-		hw_next_to_clean = (data >> EDMA_RFD_CONS_IDX_SHIFT) &
-			EDMA_RFD_CONS_IDX_MASK;
-	} while (hw_next_to_clean != sw_next_to_clean);
-
-	erdr->sw_next_to_clean = sw_next_to_clean;
-
-	/* Refill here in case refill threshold wasn't reached */
-	if (likely(cleaned_count)) {
-		ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
-		erdr->pending_fill = ret_count;
-		if (ret_count) {
-			if (net_ratelimit())
-				dev_dbg(&pdev->dev, "Not all buffers was reallocated");
-		}
-
-		edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
-			      erdr->sw_next_to_clean);
-	}
-
-	return erdr->pending_fill;
-}
-
-/* edma_delete_rfs_filter()
- *	Remove RFS filter from switch
- */
-static int edma_delete_rfs_filter(struct edma_adapter *adapter,
-				 struct edma_rfs_filter_node *filter_node)
-{
-	int res = -1;
-
-	struct flow_keys *keys = &filter_node->keys;
-
-	if (likely(adapter->set_rfs_rule))
-		res = (*adapter->set_rfs_rule)(adapter->netdev,
-			flow_get_u32_src(keys), flow_get_u32_dst(keys),
-			keys->ports.src, keys->ports.dst,
-			keys->basic.ip_proto, filter_node->rq_id, 0);
-
-	return res;
-}
-
-/* edma_add_rfs_filter()
- *	Add RFS filter to switch
- */
-static int edma_add_rfs_filter(struct edma_adapter *adapter,
-			       struct flow_keys *keys, u16 rq,
-			       struct edma_rfs_filter_node *filter_node)
-{
-	int res = -1;
-
-	struct flow_keys *dest_keys = &filter_node->keys;
-
-	memcpy(dest_keys, &filter_node->keys, sizeof(*dest_keys));
-/*
-	dest_keys->control = keys->control;
-	dest_keys->basic = keys->basic;
-	dest_keys->addrs = keys->addrs;
-	dest_keys->ports = keys->ports;
-	dest_keys.ip_proto = keys->ip_proto;
-*/
-	/* Call callback registered by ESS driver */
-	if (likely(adapter->set_rfs_rule))
-		res = (*adapter->set_rfs_rule)(adapter->netdev, flow_get_u32_src(keys),
-		      flow_get_u32_dst(keys), keys->ports.src, keys->ports.dst,
-		      keys->basic.ip_proto, rq, 1);
-
-	return res;
-}
-
-/* edma_rfs_key_search()
- *	Look for existing RFS entry
- */
-static struct edma_rfs_filter_node *edma_rfs_key_search(struct hlist_head *h,
-						       struct flow_keys *key)
-{
-	struct edma_rfs_filter_node *p;
-
-	hlist_for_each_entry(p, h, node)
-		if (flow_get_u32_src(&p->keys) == flow_get_u32_src(key) &&
-		    flow_get_u32_dst(&p->keys) == flow_get_u32_dst(key) &&
-		    p->keys.ports.src == key->ports.src &&
-		    p->keys.ports.dst == key->ports.dst &&
-		    p->keys.basic.ip_proto == key->basic.ip_proto)
-			return p;
-	return NULL;
-}
-
-/* edma_initialise_rfs_flow_table()
- * 	Initialise EDMA RFS flow table
- */
-static void edma_initialise_rfs_flow_table(struct edma_adapter *adapter)
-{
-	int i;
-
-	spin_lock_init(&adapter->rfs.rfs_ftab_lock);
-
-	/* Initialize EDMA flow hash table */
-	for (i = 0; i < EDMA_RFS_FLOW_ENTRIES; i++)
-		INIT_HLIST_HEAD(&adapter->rfs.hlist_head[i]);
-
-	adapter->rfs.max_num_filter = EDMA_RFS_FLOW_ENTRIES;
-	adapter->rfs.filter_available = adapter->rfs.max_num_filter;
-	adapter->rfs.hashtoclean = 0;
-
-	/* Add timer to get periodic RFS updates from OS */
-	timer_setup(&adapter->rfs.expire_rfs, edma_flow_may_expire, 0);
-	mod_timer(&adapter->rfs.expire_rfs, jiffies + HZ / 4);
-}
-
-/* edma_free_rfs_flow_table()
- * 	Free EDMA RFS flow table
- */
-static void edma_free_rfs_flow_table(struct edma_adapter *adapter)
-{
-	int i;
-
-	/* Remove sync timer */
-	del_timer_sync(&adapter->rfs.expire_rfs);
-	spin_lock_bh(&adapter->rfs.rfs_ftab_lock);
-
-	/* Free EDMA RFS table entries */
-	adapter->rfs.filter_available = 0;
-
-	/* Clean-up EDMA flow hash table */
-	for (i = 0; i < EDMA_RFS_FLOW_ENTRIES; i++) {
-		struct hlist_head *hhead;
-		struct hlist_node *tmp;
-		struct edma_rfs_filter_node *filter_node;
-		int res;
-
-		hhead = &adapter->rfs.hlist_head[i];
-		hlist_for_each_entry_safe(filter_node, tmp, hhead, node) {
-			res  = edma_delete_rfs_filter(adapter, filter_node);
-			if (res < 0)
-				dev_warn(&adapter->netdev->dev,
-					"EDMA going down but RFS entry %d not allowed to be flushed by Switch",
-				        filter_node->flow_id);
-			hlist_del(&filter_node->node);
-			kfree(filter_node);
-		}
-	}
-	spin_unlock_bh(&adapter->rfs.rfs_ftab_lock);
-}
-
-/* edma_tx_unmap_and_free()
- *	clean TX buffer
- */
-static inline void edma_tx_unmap_and_free(struct platform_device *pdev,
-					 struct edma_sw_desc *sw_desc)
-{
-	struct sk_buff *skb = sw_desc->skb;
-
-	if (likely((sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD) ||
-			(sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAGLIST)))
-		/* unmap_single for skb head area */
-		dma_unmap_single(&pdev->dev, sw_desc->dma,
-				sw_desc->length, DMA_TO_DEVICE);
-	else if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAG)
-		/* unmap page for paged fragments */
-		dma_unmap_page(&pdev->dev, sw_desc->dma,
-		  	      sw_desc->length, DMA_TO_DEVICE);
-
-	if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_LAST))
-		dev_kfree_skb_any(skb);
-
-	sw_desc->flags = 0;
-}
-
-/* edma_tx_complete()
- *	Used to clean tx queues and update hardware and consumer index
- */
-static void edma_tx_complete(struct edma_common_info *edma_cinfo, int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id];
-	struct edma_sw_desc *sw_desc;
-	struct platform_device *pdev = edma_cinfo->pdev;
-	int i;
-
-	u16 sw_next_to_clean = etdr->sw_next_to_clean;
-	u16 hw_next_to_clean;
-	u32 data = 0;
-
-	edma_read_reg(EDMA_REG_TPD_IDX_Q(queue_id), &data);
-	hw_next_to_clean = (data >> EDMA_TPD_CONS_IDX_SHIFT) & EDMA_TPD_CONS_IDX_MASK;
-
-	/* clean the buffer here */
-	while (sw_next_to_clean != hw_next_to_clean) {
-		sw_desc = &etdr->sw_desc[sw_next_to_clean];
-		edma_tx_unmap_and_free(pdev, sw_desc);
-		sw_next_to_clean = (sw_next_to_clean + 1) & (etdr->count - 1);
-	}
-
-	etdr->sw_next_to_clean = sw_next_to_clean;
-
-	/* update the TPD consumer index register */
-	edma_write_reg(EDMA_REG_TX_SW_CONS_IDX_Q(queue_id), sw_next_to_clean);
-
-	/* Wake the queue if queue is stopped and netdev link is up */
-	for (i = 0; i < EDMA_MAX_NETDEV_PER_QUEUE && etdr->nq[i] ; i++) {
-		if (netif_tx_queue_stopped(etdr->nq[i])) {
-			if ((etdr->netdev[i]) && netif_carrier_ok(etdr->netdev[i]))
-				netif_tx_wake_queue(etdr->nq[i]);
-		}
-	}
-}
-
-/* edma_get_tx_buffer()
- *	Get sw_desc corresponding to the TPD
- */
-static struct edma_sw_desc *edma_get_tx_buffer(struct edma_common_info *edma_cinfo,
-					       struct edma_tx_desc *tpd, int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id];
-	return &etdr->sw_desc[tpd - (struct edma_tx_desc *)etdr->hw_desc];
-}
-
-/* edma_get_next_tpd()
- *	Return a TPD descriptor for transfer
- */
-static struct edma_tx_desc *edma_get_next_tpd(struct edma_common_info *edma_cinfo,
-					     int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id];
-	u16 sw_next_to_fill = etdr->sw_next_to_fill;
-	struct edma_tx_desc *tpd_desc =
-		(&((struct edma_tx_desc *)(etdr->hw_desc))[sw_next_to_fill]);
-
-	etdr->sw_next_to_fill = (etdr->sw_next_to_fill + 1) & (etdr->count - 1);
-
-	return tpd_desc;
-}
-
-/* edma_tpd_available()
- *	Check number of free TPDs
- */
-static inline u16 edma_tpd_available(struct edma_common_info *edma_cinfo,
-				    int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id];
-
-	u16 sw_next_to_fill;
-	u16 sw_next_to_clean;
-	u16 count = 0;
-
-	sw_next_to_clean = etdr->sw_next_to_clean;
-	sw_next_to_fill = etdr->sw_next_to_fill;
-
-	if (likely(sw_next_to_clean <= sw_next_to_fill))
-		count = etdr->count;
-
-	return count + sw_next_to_clean - sw_next_to_fill - 1;
-}
-
-/* edma_tx_queue_get()
- *	Get the starting number of  the queue
- */
-static inline int edma_tx_queue_get(struct edma_adapter *adapter,
-				   struct sk_buff *skb, int txq_id)
-{
-	/* skb->priority is used as an index to skb priority table
-	 * and based on packet priority, correspong queue is assigned.
-	 */
-	return adapter->tx_start_offset[txq_id] + edma_skb_priority_offset(skb);
-}
-
-/* edma_tx_update_hw_idx()
- *	update the producer index for the ring transmitted
- */
-static void edma_tx_update_hw_idx(struct edma_common_info *edma_cinfo,
-			         struct sk_buff *skb, int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id];
-	u32 tpd_idx_data;
-
-	/* Read and update the producer index */
-	edma_read_reg(EDMA_REG_TPD_IDX_Q(queue_id), &tpd_idx_data);
-	tpd_idx_data &= ~EDMA_TPD_PROD_IDX_BITS;
-	tpd_idx_data |= (etdr->sw_next_to_fill & EDMA_TPD_PROD_IDX_MASK)
-		<< EDMA_TPD_PROD_IDX_SHIFT;
-
-	edma_write_reg(EDMA_REG_TPD_IDX_Q(queue_id), tpd_idx_data);
-}
-
-/* edma_rollback_tx()
- *	Function to retrieve tx resources in case of error
- */
-static void edma_rollback_tx(struct edma_adapter *adapter,
-			    struct edma_tx_desc *start_tpd, int queue_id)
-{
-	struct edma_tx_desc_ring *etdr = adapter->edma_cinfo->tpd_ring[queue_id];
-	struct edma_sw_desc *sw_desc;
-	struct edma_tx_desc *tpd = NULL;
-	u16 start_index, index;
-
-	start_index = start_tpd - (struct edma_tx_desc *)(etdr->hw_desc);
-
-	index = start_index;
-	while (index != etdr->sw_next_to_fill) {
-		tpd = (&((struct edma_tx_desc *)(etdr->hw_desc))[index]);
-		sw_desc = &etdr->sw_desc[index];
-		edma_tx_unmap_and_free(adapter->pdev, sw_desc);
-		memset(tpd, 0, sizeof(struct edma_tx_desc));
-		if (++index == etdr->count)
-			index = 0;
-	}
-	etdr->sw_next_to_fill = start_index;
-}
-
-/* edma_tx_map_and_fill()
- *	gets called from edma_xmit_frame
- *
- * This is where the dma of the buffer to be transmitted
- * gets mapped
- */
-static int edma_tx_map_and_fill(struct edma_common_info *edma_cinfo,
-			       struct edma_adapter *adapter, struct sk_buff *skb, int queue_id,
-			       unsigned int flags_transmit, u16 from_cpu, u16 dp_bitmap,
-			       bool packet_is_rstp, int nr_frags)
-{
-	struct edma_sw_desc *sw_desc = NULL;
-	struct platform_device *pdev = edma_cinfo->pdev;
-	struct edma_tx_desc *tpd = NULL, *start_tpd = NULL;
-	struct sk_buff *iter_skb;
-	int i = 0;
-	u32 word1 = 0, word3 = 0, lso_word1 = 0, svlan_tag = 0;
-	u16 buf_len, lso_desc_len = 0;
-
-	/* It should either be a nr_frags skb or fraglist skb but not both */
-	BUG_ON(nr_frags && skb_has_frag_list(skb));
-
-	if (skb_is_gso(skb)) {
-		/* TODO: What additional checks need to be performed here */
-		if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) {
-			lso_word1 |= EDMA_TPD_IPV4_EN;
-			ip_hdr(skb)->check = 0;
-			tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
-				ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
-		} else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) {
-			lso_word1 |= EDMA_TPD_LSO_V2_EN;
-			ipv6_hdr(skb)->payload_len = 0;
-			tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
-				&ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
-		} else
-			return -EINVAL;
-
-		lso_word1 |= EDMA_TPD_LSO_EN | ((skb_shinfo(skb)->gso_size & EDMA_TPD_MSS_MASK) << EDMA_TPD_MSS_SHIFT) |
-				(skb_transport_offset(skb) << EDMA_TPD_HDR_SHIFT);
-	} else if (flags_transmit & EDMA_HW_CHECKSUM) {
-			u8 css, cso;
-			cso = skb_checksum_start_offset(skb);
-			css = cso  + skb->csum_offset;
-
-			word1 |= (EDMA_TPD_CUSTOM_CSUM_EN);
-			word1 |= (cso >> 1) << EDMA_TPD_HDR_SHIFT;
-			word1 |= ((css >> 1) << EDMA_TPD_CUSTOM_CSUM_SHIFT);
-	}
-
-	if (skb->protocol == htons(ETH_P_PPP_SES))
-		word1 |= EDMA_TPD_PPPOE_EN;
-
-	if (flags_transmit & EDMA_VLAN_TX_TAG_INSERT_FLAG) {
-		switch(skb->vlan_proto) {
-		case htons(ETH_P_8021Q):
-			word3 |= (1 << EDMA_TX_INS_CVLAN);
-			word3 |= skb_vlan_tag_get(skb) << EDMA_TX_CVLAN_TAG_SHIFT;
-			break;
-		case htons(ETH_P_8021AD):
-			word1 |= (1 << EDMA_TX_INS_SVLAN);
-			svlan_tag = skb_vlan_tag_get(skb) << EDMA_TX_SVLAN_TAG_SHIFT;
-			break;
-		default:
-			dev_err(&pdev->dev, "no ctag or stag present\n");
-			goto vlan_tag_error;
-		}
-	} else if (flags_transmit & EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG) {
-		word3 |= (1 << EDMA_TX_INS_CVLAN);
-		word3 |= (adapter->default_vlan_tag) << EDMA_TX_CVLAN_TAG_SHIFT;
-	}
-
-	if (packet_is_rstp) {
-		word3 |= dp_bitmap << EDMA_TPD_PORT_BITMAP_SHIFT;
-		word3 |= from_cpu << EDMA_TPD_FROM_CPU_SHIFT;
-	} else {
-		word3 |= adapter->dp_bitmap << EDMA_TPD_PORT_BITMAP_SHIFT;
-	}
-
-	buf_len = skb_headlen(skb);
-
-	if (lso_word1) {
-		if (lso_word1 & EDMA_TPD_LSO_V2_EN) {
-
-			/* IPv6 LSOv2 descriptor */
-			start_tpd = tpd = edma_get_next_tpd(edma_cinfo, queue_id);
-			sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id);
-			sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_NONE;
-
-			/* LSOv2 descriptor overrides addr field to pass length */
-			tpd->addr = cpu_to_le16(skb->len);
-			tpd->svlan_tag = svlan_tag;
-			tpd->word1 = word1 | lso_word1;
-			tpd->word3 = word3;
-		}
-
-		tpd = edma_get_next_tpd(edma_cinfo, queue_id);
-		if (!start_tpd)
-			start_tpd = tpd;
-		sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id);
-
-		/* The last buffer info contain the skb address,
-		 * so skb will be freed after unmap
-		 */
-		sw_desc->length = lso_desc_len;
-		sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD;
-
-		sw_desc->dma = dma_map_single(&adapter->pdev->dev,
-					skb->data, buf_len, DMA_TO_DEVICE);
-		if (dma_mapping_error(&pdev->dev, sw_desc->dma))
-			goto dma_error;
-
-		tpd->addr = cpu_to_le32(sw_desc->dma);
-		tpd->len  = cpu_to_le16(buf_len);
-
-		tpd->svlan_tag = svlan_tag;
-		tpd->word1 = word1 | lso_word1;
-		tpd->word3 = word3;
-
-		/* The last buffer info contain the skb address,
-		 * so it will be freed after unmap
-		 */
-		sw_desc->length = lso_desc_len;
-		sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD;
-
-		buf_len = 0;
-	}
-
-	if (likely(buf_len)) {
-
-		/* TODO Do not dequeue descriptor if there is a potential error */
-		tpd = edma_get_next_tpd(edma_cinfo, queue_id);
-
-		if (!start_tpd)
-			start_tpd = tpd;
-
-		sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id);
-
-		/* The last buffer info contain the skb address,
-		 * so it will be free after unmap
-		 */
-		sw_desc->length = buf_len;
-		sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD;
-		sw_desc->dma = dma_map_single(&adapter->pdev->dev,
-			skb->data, buf_len, DMA_TO_DEVICE);
-		if (dma_mapping_error(&pdev->dev, sw_desc->dma))
-			goto dma_error;
-
-		tpd->addr = cpu_to_le32(sw_desc->dma);
-		tpd->len  = cpu_to_le16(buf_len);
-
-		tpd->svlan_tag = svlan_tag;
-		tpd->word1 = word1 | lso_word1;
-		tpd->word3 = word3;
-	}
-
-	/* Walk through all paged fragments */
-	while (nr_frags--) {
-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-		buf_len = skb_frag_size(frag);
-		tpd = edma_get_next_tpd(edma_cinfo, queue_id);
-		sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id);
-		sw_desc->length = buf_len;
-		sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_FRAG;
-
-		sw_desc->dma = skb_frag_dma_map(&pdev->dev, frag, 0, buf_len, DMA_TO_DEVICE);
-
-		if (dma_mapping_error(NULL, sw_desc->dma))
-			goto dma_error;
-
-		tpd->addr = cpu_to_le32(sw_desc->dma);
-		tpd->len  = cpu_to_le16(buf_len);
-
-		tpd->svlan_tag = svlan_tag;
-		tpd->word1 = word1 | lso_word1;
-		tpd->word3 = word3;
-		i++;
-	}
-
-	/* Walk through all fraglist skbs */
-	skb_walk_frags(skb, iter_skb) {
-		buf_len = iter_skb->len;
-		tpd = edma_get_next_tpd(edma_cinfo, queue_id);
-		sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id);
-		sw_desc->length = buf_len;
-		sw_desc->dma =  dma_map_single(&adapter->pdev->dev,
-				iter_skb->data, buf_len, DMA_TO_DEVICE);
-
-		if (dma_mapping_error(NULL, sw_desc->dma))
-			goto dma_error;
-
-		tpd->addr = cpu_to_le32(sw_desc->dma);
-		tpd->len  = cpu_to_le16(buf_len);
-		tpd->svlan_tag = svlan_tag;
-		tpd->word1 = word1 | lso_word1;
-		tpd->word3 = word3;
-		sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_FRAGLIST;
-	}
-
-	if (tpd)
-		tpd->word1 |= 1 << EDMA_TPD_EOP_SHIFT;
-
-	sw_desc->skb = skb;
-	sw_desc->flags |= EDMA_SW_DESC_FLAG_LAST;
-
-	return 0;
-
-dma_error:
-	edma_rollback_tx(adapter, start_tpd, queue_id);
-	dev_err(&pdev->dev, "TX DMA map failed\n");
-vlan_tag_error:
-	return -ENOMEM;
-}
-
-/* edma_check_link()
- *	check Link status
- */
-static int edma_check_link(struct edma_adapter *adapter)
-{
-	struct phy_device *phydev = adapter->phydev;
-
-	if (!(adapter->poll_required))
-		return __EDMA_LINKUP;
-
-	if (phydev->link)
-		return __EDMA_LINKUP;
-
-	return __EDMA_LINKDOWN;
-}
-
-/* edma_adjust_link()
- *	check for edma link status
- */
-void edma_adjust_link(struct net_device *netdev)
-{
-	int status;
-	struct edma_adapter *adapter = netdev_priv(netdev);
-	struct phy_device *phydev = adapter->phydev;
-
-	if (!test_bit(__EDMA_UP, &adapter->state_flags))
-		return;
-
-	status = edma_check_link(adapter);
-
-	if (status == __EDMA_LINKUP && adapter->link_state == __EDMA_LINKDOWN) {
-		phy_print_status(phydev);
-		adapter->link_state = __EDMA_LINKUP;
-		if (adapter->edma_cinfo->is_single_phy) {
-			ess_set_port_status_speed(adapter->edma_cinfo, phydev,
-						  ffs(adapter->dp_bitmap) - 1);
-		}
-		netif_carrier_on(netdev);
-		if (netif_running(netdev))
-			netif_tx_wake_all_queues(netdev);
-	} else if (status == __EDMA_LINKDOWN && adapter->link_state == __EDMA_LINKUP) {
-		phy_print_status(phydev);
-		adapter->link_state = __EDMA_LINKDOWN;
-		netif_carrier_off(netdev);
-		netif_tx_stop_all_queues(netdev);
-	}
-}
-
-/* edma_get_stats()
- *	Statistics api used to retreive the tx/rx statistics
- */
-struct net_device_stats *edma_get_stats(struct net_device *netdev)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	return &adapter->stats;
-}
-
-/* edma_xmit()
- *	Main api to be called by the core for packet transmission
- */
-netdev_tx_t edma_xmit(struct sk_buff *skb,
-		     struct net_device *net_dev)
-{
-	struct edma_adapter *adapter = netdev_priv(net_dev);
-	struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
-	struct edma_tx_desc_ring *etdr;
-	u16 from_cpu, dp_bitmap, txq_id;
-	int ret, nr_frags = 0, num_tpds_needed = 1, queue_id;
-	unsigned int flags_transmit = 0;
-	bool packet_is_rstp = false;
-	struct netdev_queue *nq = NULL;
-
-	if (skb_shinfo(skb)->nr_frags) {
-		nr_frags = skb_shinfo(skb)->nr_frags;
-		num_tpds_needed += nr_frags;
-	} else if (skb_has_frag_list(skb)) {
-		struct sk_buff *iter_skb;
-
-		skb_walk_frags(skb, iter_skb)
-			num_tpds_needed++;
-	}
-
-	if (num_tpds_needed > EDMA_MAX_SKB_FRAGS) {
-		dev_err(&net_dev->dev,
-			"skb received with fragments %d which is more than %lu",
-			num_tpds_needed, EDMA_MAX_SKB_FRAGS);
-		dev_kfree_skb_any(skb);
-		adapter->stats.tx_errors++;
-		return NETDEV_TX_OK;
-	}
-
-	if (edma_stp_rstp) {
-		u16 ath_hdr, ath_eth_type;
-		u8 mac_addr[EDMA_ETH_HDR_LEN];
-		ath_eth_type = ntohs(*(uint16_t *)&skb->data[12]);
-		if (ath_eth_type == edma_ath_eth_type) {
-			packet_is_rstp = true;
-			ath_hdr = htons(*(uint16_t *)&skb->data[14]);
-			dp_bitmap = ath_hdr & EDMA_TX_ATH_HDR_PORT_BITMAP_MASK;
-			from_cpu = (ath_hdr & EDMA_TX_ATH_HDR_FROM_CPU_MASK) >> EDMA_TX_ATH_HDR_FROM_CPU_SHIFT;
-			memcpy(mac_addr, skb->data, EDMA_ETH_HDR_LEN);
-
-			skb_pull(skb, 4);
-
-			memcpy(skb->data, mac_addr, EDMA_ETH_HDR_LEN);
-		}
-	}
-
-	/* this will be one of the 4 TX queues exposed to linux kernel */
-	txq_id = skb_get_queue_mapping(skb);
-	queue_id = edma_tx_queue_get(adapter, skb, txq_id);
-	etdr = edma_cinfo->tpd_ring[queue_id];
-	nq = netdev_get_tx_queue(net_dev, txq_id);
-
-	local_bh_disable();
-	/* Tx is not handled in bottom half context. Hence, we need to protect
-	 * Tx from tasks and bottom half
-	 */
-
-	if (num_tpds_needed > edma_tpd_available(edma_cinfo, queue_id)) {
-		/* not enough descriptor, just stop queue */
-		netif_tx_stop_queue(nq);
-		local_bh_enable();
-		dev_dbg(&net_dev->dev, "Not enough descriptors available");
-		edma_cinfo->edma_ethstats.tx_desc_error++;
-		return NETDEV_TX_BUSY;
-	}
-
-	/* Check and mark VLAN tag offload */
-	if (unlikely(skb_vlan_tag_present(skb)))
-		flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
-	else if (!adapter->edma_cinfo->is_single_phy && adapter->default_vlan_tag)
-		flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
-
-	/* Check and mark checksum offload */
-	if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
-		flags_transmit |= EDMA_HW_CHECKSUM;
-
-	/* Map and fill descriptor for Tx */
-	ret = edma_tx_map_and_fill(edma_cinfo, adapter, skb, queue_id,
-		flags_transmit, from_cpu, dp_bitmap, packet_is_rstp, nr_frags);
-	if (ret) {
-		dev_kfree_skb_any(skb);
-		adapter->stats.tx_errors++;
-		goto netdev_okay;
-	}
-
-	/* Update SW producer index */
-	edma_tx_update_hw_idx(edma_cinfo, skb, queue_id);
-
-	/* update tx statistics */
-	adapter->stats.tx_packets++;
-	adapter->stats.tx_bytes += skb->len;
-
-netdev_okay:
-	local_bh_enable();
-	return NETDEV_TX_OK;
-}
-
-/*
- * edma_flow_may_expire()
- * 	Timer function called periodically to delete the node
- */
-void edma_flow_may_expire(struct timer_list *t)
-{
-	struct edma_rfs_flow_table *table = from_timer(table, t, expire_rfs);
-	struct edma_adapter *adapter =
-		container_of(table, typeof(*adapter), rfs);
-	int j;
-
-	spin_lock_bh(&adapter->rfs.rfs_ftab_lock);
-	for (j = 0; j < EDMA_RFS_EXPIRE_COUNT_PER_CALL; j++) {
-		struct hlist_head *hhead;
-		struct hlist_node *tmp;
-		struct edma_rfs_filter_node *n;
-		bool res;
-
-		hhead = &adapter->rfs.hlist_head[adapter->rfs.hashtoclean++];
-		hlist_for_each_entry_safe(n, tmp, hhead, node) {
-			res = rps_may_expire_flow(adapter->netdev, n->rq_id,
-					n->flow_id, n->filter_id);
-			if (res) {
-				int ret;
-				ret = edma_delete_rfs_filter(adapter, n);
-				if (ret < 0)
-					dev_dbg(&adapter->netdev->dev,
-							"RFS entry %d not allowed to be flushed by Switch",
-							n->flow_id);
-				else {
-					hlist_del(&n->node);
-					kfree(n);
-					adapter->rfs.filter_available++;
-				}
-			}
-		}
-	}
-
-	adapter->rfs.hashtoclean = adapter->rfs.hashtoclean & (EDMA_RFS_FLOW_ENTRIES - 1);
-	spin_unlock_bh(&adapter->rfs.rfs_ftab_lock);
-	mod_timer(&adapter->rfs.expire_rfs, jiffies + HZ / 4);
-}
-
-/* edma_rx_flow_steer()
- *	Called by core to to steer the flow to CPU
- */
-int edma_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
-		       u16 rxq, u32 flow_id)
-{
-	struct flow_keys keys;
-	struct edma_rfs_filter_node *filter_node;
-	struct edma_adapter *adapter = netdev_priv(dev);
-	u16 hash_tblid;
-	int res;
-
-	if (skb->protocol == htons(ETH_P_IPV6)) {
-		dev_err(&adapter->pdev->dev, "IPv6 not supported\n");
-		res = -EINVAL;
-		goto no_protocol_err;
-	}
-
-	/* Dissect flow parameters
-	 * We only support IPv4 + TCP/UDP
-	 */
-	res = skb_flow_dissect_flow_keys(skb, &keys, 0);
-	if (!((keys.basic.ip_proto == IPPROTO_TCP) || (keys.basic.ip_proto == IPPROTO_UDP))) {
-		res = -EPROTONOSUPPORT;
-		goto no_protocol_err;
-	}
-
-	/* Check if table entry exists */
-	hash_tblid = skb_get_hash_raw(skb) & EDMA_RFS_FLOW_ENTRIES_MASK;
-
-	spin_lock_bh(&adapter->rfs.rfs_ftab_lock);
-	filter_node = edma_rfs_key_search(&adapter->rfs.hlist_head[hash_tblid], &keys);
-
-	if (filter_node) {
-		if (rxq == filter_node->rq_id) {
-			res = -EEXIST;
-			goto out;
-		} else {
-			res = edma_delete_rfs_filter(adapter, filter_node);
-			if (res < 0)
-				dev_warn(&adapter->netdev->dev,
-						"Cannot steer flow %d to different queue",
-						filter_node->flow_id);
-			else {
-				adapter->rfs.filter_available++;
-				res = edma_add_rfs_filter(adapter, &keys, rxq, filter_node);
-				if (res < 0) {
-					dev_warn(&adapter->netdev->dev,
-							"Cannot steer flow %d to different queue",
-							filter_node->flow_id);
-				} else {
-					adapter->rfs.filter_available--;
-					filter_node->rq_id = rxq;
-					filter_node->filter_id = res;
-				}
-			}
-		}
-	} else {
-		if (adapter->rfs.filter_available == 0) {
-			res = -EBUSY;
-			goto out;
-		}
-
-		filter_node = kmalloc(sizeof(*filter_node), GFP_ATOMIC);
-		if (!filter_node) {
-			res = -ENOMEM;
-			goto out;
-		}
-
-		res = edma_add_rfs_filter(adapter, &keys, rxq, filter_node);
-		if (res < 0) {
-			kfree(filter_node);
-			goto out;
-		}
-
-		adapter->rfs.filter_available--;
-		filter_node->rq_id = rxq;
-		filter_node->filter_id = res;
-		filter_node->flow_id = flow_id;
-		filter_node->keys = keys;
-		INIT_HLIST_NODE(&filter_node->node);
-		hlist_add_head(&filter_node->node, &adapter->rfs.hlist_head[hash_tblid]);
-	}
-
-out:
-	spin_unlock_bh(&adapter->rfs.rfs_ftab_lock);
-no_protocol_err:
-	return res;
-}
-
-/* edma_register_rfs_filter()
- *	Add RFS filter callback
- */
-int edma_register_rfs_filter(struct net_device *netdev,
-			    set_rfs_filter_callback_t set_filter)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	spin_lock_bh(&adapter->rfs.rfs_ftab_lock);
-
-	if (adapter->set_rfs_rule) {
-		spin_unlock_bh(&adapter->rfs.rfs_ftab_lock);
-		return -1;
-	}
-
-	adapter->set_rfs_rule = set_filter;
-	spin_unlock_bh(&adapter->rfs.rfs_ftab_lock);
-
-	return 0;
-}
-
-/* edma_alloc_tx_rings()
- *	Allocate rx rings
- */
-int edma_alloc_tx_rings(struct edma_common_info *edma_cinfo)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	int i, err = 0;
-
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		err = edma_alloc_tx_ring(edma_cinfo, edma_cinfo->tpd_ring[i]);
-		if (err) {
-			dev_err(&pdev->dev, "Tx Queue alloc %u failed\n", i);
-			return err;
-		}
-	}
-
-	return 0;
-}
-
-/* edma_free_tx_rings()
- *	Free tx rings
- */
-void edma_free_tx_rings(struct edma_common_info *edma_cinfo)
-{
-	int i;
-
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++)
-		edma_free_tx_ring(edma_cinfo, edma_cinfo->tpd_ring[i]);
-}
-
-/* edma_free_tx_resources()
- *	Free buffers associated with tx rings
- */
-void edma_free_tx_resources(struct edma_common_info *edma_cinfo)
-{
-	struct edma_tx_desc_ring *etdr;
-	struct edma_sw_desc *sw_desc;
-	struct platform_device *pdev = edma_cinfo->pdev;
-	int i, j;
-
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		etdr = edma_cinfo->tpd_ring[i];
-		for (j = 0; j < EDMA_TX_RING_SIZE; j++) {
-			sw_desc = &etdr->sw_desc[j];
-			if (sw_desc->flags & (EDMA_SW_DESC_FLAG_SKB_HEAD |
-				EDMA_SW_DESC_FLAG_SKB_FRAG | EDMA_SW_DESC_FLAG_SKB_FRAGLIST))
-				edma_tx_unmap_and_free(pdev, sw_desc);
-		}
-	}
-}
-
-/* edma_alloc_rx_rings()
- *	Allocate rx rings
- */
-int edma_alloc_rx_rings(struct edma_common_info *edma_cinfo)
-{
-	struct platform_device *pdev = edma_cinfo->pdev;
-	int i, j, err = 0;
-
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		err = edma_alloc_rx_ring(edma_cinfo, edma_cinfo->rfd_ring[j]);
-		if (err) {
-			dev_err(&pdev->dev, "Rx Queue alloc%u failed\n", i);
-			return err;
-		}
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-
-	return 0;
-}
-
-/* edma_free_rx_rings()
- *	free rx rings
- */
-void edma_free_rx_rings(struct edma_common_info *edma_cinfo)
-{
-	int i, j;
-
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		edma_free_rx_ring(edma_cinfo, edma_cinfo->rfd_ring[j]);
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-}
-
-/* edma_free_queues()
- *	Free the queues allocaated
- */
-void edma_free_queues(struct edma_common_info *edma_cinfo)
-{
-	int i , j;
-
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		if (edma_cinfo->tpd_ring[i])
-			kfree(edma_cinfo->tpd_ring[i]);
-		edma_cinfo->tpd_ring[i] = NULL;
-	}
-
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		if (edma_cinfo->rfd_ring[j])
-			kfree(edma_cinfo->rfd_ring[j]);
-		edma_cinfo->rfd_ring[j] = NULL;
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-
-	edma_cinfo->num_rx_queues = 0;
-	edma_cinfo->num_tx_queues = 0;
-
-	return;
-}
-
-/* edma_free_rx_resources()
- *	Free buffers associated with tx rings
- */
-void edma_free_rx_resources(struct edma_common_info *edma_cinfo)
-{
-        struct edma_rfd_desc_ring *erdr;
-	struct edma_sw_desc *sw_desc;
-	struct platform_device *pdev = edma_cinfo->pdev;
-	int i, j, k;
-
-	for (i = 0, k = 0; i < edma_cinfo->num_rx_queues; i++) {
-		erdr = edma_cinfo->rfd_ring[k];
-		for (j = 0; j < EDMA_RX_RING_SIZE; j++) {
-			sw_desc = &erdr->sw_desc[j];
-			if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD)) {
-				dma_unmap_single(&pdev->dev, sw_desc->dma,
-					sw_desc->length, DMA_FROM_DEVICE);
-				edma_clean_rfd(erdr, j);
-			} else if ((sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAG)) {
-				dma_unmap_page(&pdev->dev, sw_desc->dma,
-					sw_desc->length, DMA_FROM_DEVICE);
-				edma_clean_rfd(erdr, j);
-			}
-		}
-		k += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-
-	}
-}
-
-/* edma_alloc_queues_tx()
- *	Allocate memory for all rings
- */
-int edma_alloc_queues_tx(struct edma_common_info *edma_cinfo)
-{
-	int i;
-
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		struct edma_tx_desc_ring *etdr;
-		etdr = kzalloc(sizeof(struct edma_tx_desc_ring), GFP_KERNEL);
-		if (!etdr)
-			goto err;
-		etdr->count = edma_cinfo->tx_ring_count;
-		edma_cinfo->tpd_ring[i] = etdr;
-	}
-
-	return 0;
-err:
-	edma_free_queues(edma_cinfo);
-	return -1;
-}
-
-/* edma_alloc_queues_rx()
- *	Allocate memory for all rings
- */
-int edma_alloc_queues_rx(struct edma_common_info *edma_cinfo)
-{
-	int i, j;
-
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		struct edma_rfd_desc_ring *rfd_ring;
-		rfd_ring = kzalloc(sizeof(struct edma_rfd_desc_ring),
-				GFP_KERNEL);
-		if (!rfd_ring)
-			goto err;
-		rfd_ring->count = edma_cinfo->rx_ring_count;
-		edma_cinfo->rfd_ring[j] = rfd_ring;
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-	return 0;
-err:
-	edma_free_queues(edma_cinfo);
-	return -1;
-}
-
-/* edma_clear_irq_status()
- *	Clear interrupt status
- */
-void edma_clear_irq_status()
-{
-	edma_write_reg(EDMA_REG_RX_ISR, 0xff);
-	edma_write_reg(EDMA_REG_TX_ISR, 0xffff);
-	edma_write_reg(EDMA_REG_MISC_ISR, 0x1fff);
-	edma_write_reg(EDMA_REG_WOL_ISR, 0x1);
-};
-
-/* edma_configure()
- *	Configure skb, edma interrupts and control register.
- */
-int edma_configure(struct edma_common_info *edma_cinfo)
-{
-	struct edma_hw *hw = &edma_cinfo->hw;
-	u32 intr_modrt_data;
-	u32 intr_ctrl_data = 0;
-	int i, j, ret_count;
-
-	edma_read_reg(EDMA_REG_INTR_CTRL, &intr_ctrl_data);
-	intr_ctrl_data &= ~(1 << EDMA_INTR_SW_IDX_W_TYP_SHIFT);
-	intr_ctrl_data |= hw->intr_sw_idx_w << EDMA_INTR_SW_IDX_W_TYP_SHIFT;
-	edma_write_reg(EDMA_REG_INTR_CTRL, intr_ctrl_data);
-
-	edma_clear_irq_status();
-
-	/* Clear any WOL status */
-	edma_write_reg(EDMA_REG_WOL_CTRL, 0);
-	intr_modrt_data = (EDMA_TX_IMT << EDMA_IRQ_MODRT_TX_TIMER_SHIFT);
-	intr_modrt_data |= (EDMA_RX_IMT << EDMA_IRQ_MODRT_RX_TIMER_SHIFT);
-	edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
-	edma_configure_tx(edma_cinfo);
-	edma_configure_rx(edma_cinfo);
-
-	/* Allocate the RX buffer */
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		struct edma_rfd_desc_ring *ring = edma_cinfo->rfd_ring[j];
-		ret_count = edma_alloc_rx_buf(edma_cinfo, ring, ring->count, j);
-		if (ret_count) {
-			dev_dbg(&edma_cinfo->pdev->dev, "not all rx buffers allocated\n");
-		}
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-
-	/* Configure descriptor Ring */
-	edma_init_desc(edma_cinfo);
-	return 0;
-}
-
-/* edma_irq_enable()
- *	Enable default interrupt generation settings
- */
-void edma_irq_enable(struct edma_common_info *edma_cinfo)
-{
-	struct edma_hw *hw = &edma_cinfo->hw;
-	int i, j;
-
-	edma_write_reg(EDMA_REG_RX_ISR, 0xff);
-	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
-		edma_write_reg(EDMA_REG_RX_INT_MASK_Q(j), hw->rx_intr_mask);
-		j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1);
-	}
-	edma_write_reg(EDMA_REG_TX_ISR, 0xffff);
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++)
-		edma_write_reg(EDMA_REG_TX_INT_MASK_Q(i), hw->tx_intr_mask);
-}
-
-/* edma_irq_disable()
- *	Disable Interrupt
- */
-void edma_irq_disable(struct edma_common_info *edma_cinfo)
-{
-	int i;
-
-	for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++)
-		edma_write_reg(EDMA_REG_RX_INT_MASK_Q(i), 0x0);
-
-	for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++)
-		edma_write_reg(EDMA_REG_TX_INT_MASK_Q(i), 0x0);
-	edma_write_reg(EDMA_REG_MISC_IMR, 0);
-	edma_write_reg(EDMA_REG_WOL_IMR, 0);
-}
-
-/* edma_free_irqs()
- *	Free All IRQs
- */
-void edma_free_irqs(struct edma_adapter *adapter)
-{
-	struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
-	int i, j;
-	int k = ((edma_cinfo->num_rx_queues == 4) ? 1 : 2);
-
-	for (i = 0; i < CONFIG_NR_CPUS; i++) {
-		for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + 4); j++)
-			free_irq(edma_cinfo->tx_irq[j], &edma_cinfo->edma_percpu_info[i]);
-
-		for (j = edma_cinfo->edma_percpu_info[i].rx_start; j < (edma_cinfo->edma_percpu_info[i].rx_start + k); j++)
-			free_irq(edma_cinfo->rx_irq[j], &edma_cinfo->edma_percpu_info[i]);
-	}
-}
-
-/* edma_enable_rx_ctrl()
- *	Enable RX queue control
- */
-void edma_enable_rx_ctrl(struct edma_hw *hw)
-{
-	u32 data;
-
-	edma_read_reg(EDMA_REG_RXQ_CTRL, &data);
-	data |= EDMA_RXQ_CTRL_EN;
-	edma_write_reg(EDMA_REG_RXQ_CTRL, data);
-}
-
-
-/* edma_enable_tx_ctrl()
- *	Enable TX queue control
- */
-void edma_enable_tx_ctrl(struct edma_hw *hw)
-{
-	u32 data;
-
-	edma_read_reg(EDMA_REG_TXQ_CTRL, &data);
-	data |= EDMA_TXQ_CTRL_TXQ_EN;
-	edma_write_reg(EDMA_REG_TXQ_CTRL, data);
-}
-
-/* edma_stop_rx_tx()
- *	Disable RX/TQ Queue control
- */
-void edma_stop_rx_tx(struct edma_hw *hw)
-{
-	u32 data;
-
-	edma_read_reg(EDMA_REG_RXQ_CTRL, &data);
-	data &= ~EDMA_RXQ_CTRL_EN;
-	edma_write_reg(EDMA_REG_RXQ_CTRL, data);
-	edma_read_reg(EDMA_REG_TXQ_CTRL, &data);
-	data &= ~EDMA_TXQ_CTRL_TXQ_EN;
-	edma_write_reg(EDMA_REG_TXQ_CTRL, data);
-}
-
-/* edma_reset()
- *	Reset the EDMA
- */
-int edma_reset(struct edma_common_info *edma_cinfo)
-{
-	struct edma_hw *hw = &edma_cinfo->hw;
-
-	edma_irq_disable(edma_cinfo);
-
-	edma_clear_irq_status();
-
-	edma_stop_rx_tx(hw);
-
-	return 0;
-}
-
-/* edma_fill_netdev()
- * 	Fill netdev for each etdr
- */
-int edma_fill_netdev(struct edma_common_info *edma_cinfo, int queue_id,
-		    int dev, int txq_id)
-{
-	struct edma_tx_desc_ring *etdr;
-	int i = 0;
-
-	etdr = edma_cinfo->tpd_ring[queue_id];
-
-	while (etdr->netdev[i])
-		i++;
-
-	if (i >= EDMA_MAX_NETDEV_PER_QUEUE)
-		return -1;
-
-	/* Populate the netdev associated with the tpd ring */
-	etdr->netdev[i] = edma_netdev[dev];
-	etdr->nq[i] = netdev_get_tx_queue(edma_netdev[dev], txq_id);
-
-	return 0;
-}
-
-/* edma_set_mac()
- *	Change the Ethernet Address of the NIC
- */
-int edma_set_mac_addr(struct net_device *netdev, void *p)
-{
-	struct sockaddr *addr = p;
-
-	if (!is_valid_ether_addr(addr->sa_data))
-		return -EINVAL;
-
-	if (netif_running(netdev))
-		return -EBUSY;
-
-	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-	return 0;
-}
-
-/* edma_set_stp_rstp()
- *	set stp/rstp
- */
-void edma_set_stp_rstp(bool rstp)
-{
-	edma_stp_rstp = rstp;
-}
-
-/* edma_assign_ath_hdr_type()
- *	assign atheros header eth type
- */
-void edma_assign_ath_hdr_type(int eth_type)
-{
-	edma_ath_eth_type = eth_type & EDMA_ETH_TYPE_MASK;
-}
-
-/* edma_get_default_vlan_tag()
- *	Used by other modules to get the default vlan tag
- */
-int edma_get_default_vlan_tag(struct net_device *netdev)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	if (adapter->default_vlan_tag)
-		return adapter->default_vlan_tag;
-
-	return 0;
-}
-
-/* edma_open()
- *	gets called when netdevice is up, start the queue.
- */
-int edma_open(struct net_device *netdev)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-	struct platform_device *pdev = adapter->edma_cinfo->pdev;
-
-	netif_tx_start_all_queues(netdev);
-	edma_initialise_rfs_flow_table(adapter);
-	set_bit(__EDMA_UP, &adapter->state_flags);
-
-	/* if Link polling is enabled, in our case enabled for WAN, then
-	 * do a phy start, else always set link as UP
-	 */
-	if (adapter->poll_required) {
-		if (!IS_ERR(adapter->phydev)) {
-			/* AR40xx calibration will leave the PHY in unwanted state,
-			 * so a soft reset is required before phy_start()
-			 */
-			genphy_soft_reset(adapter->phydev);
-			phy_start(adapter->phydev);
-			phy_start_aneg(adapter->phydev);
-			adapter->link_state = __EDMA_LINKDOWN;
-		} else {
-			dev_dbg(&pdev->dev, "Invalid PHY device for a link polled interface\n");
-		}
-	} else {
-		adapter->link_state = __EDMA_LINKUP;
-		netif_carrier_on(netdev);
-	}
-
-	return 0;
-}
-
-
-/* edma_close()
- *	gets called when netdevice is down, stops the queue.
- */
-int edma_close(struct net_device *netdev)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	edma_free_rfs_flow_table(adapter);
-	netif_carrier_off(netdev);
-	netif_tx_stop_all_queues(netdev);
-
-	if (adapter->poll_required) {
-		if (!IS_ERR(adapter->phydev))
-			phy_stop(adapter->phydev);
-	}
-
-	adapter->link_state = __EDMA_LINKDOWN;
-
-	/* Set GMAC state to UP before link state is checked
-	 */
-	clear_bit(__EDMA_UP, &adapter->state_flags);
-
-	return 0;
-}
-
-/* edma_poll
- *	polling function that gets called when the napi gets scheduled.
- *
- * Main sequence of task performed in this api
- * is clear irq status -> clear_tx_irq -> clean_rx_irq->
- * enable interrupts.
- */
-int edma_poll(struct napi_struct *napi, int budget)
-{
-	struct edma_per_cpu_queues_info *edma_percpu_info = container_of(napi,
-		struct edma_per_cpu_queues_info, napi);
-	struct edma_common_info *edma_cinfo = edma_percpu_info->edma_cinfo;
-	u32 reg_data;
-	u32 shadow_rx_status, shadow_tx_status;
-	int queue_id;
-	int i, work_done = 0;
-	u16 rx_pending_fill;
-
-	/* Store the Rx/Tx status by ANDing it with
-	 * appropriate CPU RX?TX mask
-	 */
-	edma_read_reg(EDMA_REG_RX_ISR, &reg_data);
-	edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask;
-	shadow_rx_status = edma_percpu_info->rx_status;
-	edma_read_reg(EDMA_REG_TX_ISR, &reg_data);
-	edma_percpu_info->tx_status |= reg_data & edma_percpu_info->tx_mask;
-	shadow_tx_status = edma_percpu_info->tx_status;
-
-	/* Every core will have a start, which will be computed
-	 * in probe and stored in edma_percpu_info->tx_start variable.
-	 * We will shift the status bit by tx_start to obtain
-	 * status bits for the core on which the current processing
-	 * is happening. Since, there are 4 tx queues per core,
-	 * we will run the loop till we get the correct queue to clear.
-	 */
-	while (edma_percpu_info->tx_status) {
-		queue_id = ffs(edma_percpu_info->tx_status) - 1;
-		edma_tx_complete(edma_cinfo, queue_id);
-		edma_percpu_info->tx_status &= ~(1 << queue_id);
-	}
-
-	/* Every core will have a start, which will be computed
-	 * in probe and stored in edma_percpu_info->tx_start variable.
-	 * We will shift the status bit by tx_start to obtain
-	 * status bits for the core on which the current processing
-	 * is happening. Since, there are 4 tx queues per core, we
-	 * will run the loop till we get the correct queue to clear.
-	 */
-	while (edma_percpu_info->rx_status) {
-		queue_id = ffs(edma_percpu_info->rx_status) - 1;
-		rx_pending_fill = edma_rx_complete(edma_cinfo, &work_done,
-						   budget, queue_id, napi);
-
-		if (likely(work_done < budget)) {
-			if (rx_pending_fill) {
-                          	/* reschedule poll() to refill rx buffer deficit */
-				work_done = budget;
-				break;
-			}
-			edma_percpu_info->rx_status &= ~(1 << queue_id);
-		} else {
-			break;
-		}
-	}
-
-	/* Clear the status register, to avoid the interrupts to
-	 * reoccur.This clearing of interrupt status register is
-	 * done here as writing to status register only takes place
-	 * once the  producer/consumer index has been updated to
-	 * reflect that the packet transmission/reception went fine.
-	 */
-	edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status);
-	edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status);
-
-	/* If budget not fully consumed, exit the polling mode */
-	if (likely(work_done < budget)) {
-		napi_complete(napi);
-
-		/* re-enable the interrupts */
-		for (i = 0; i < edma_cinfo->num_rxq_per_core; i++)
-			edma_write_reg(EDMA_REG_RX_INT_MASK_Q(edma_percpu_info->rx_start + i), 0x1);
-		for (i = 0; i < edma_cinfo->num_txq_per_core; i++)
-			edma_write_reg(EDMA_REG_TX_INT_MASK_Q(edma_percpu_info->tx_start + i), 0x1);
-	}
-
-	return work_done;
-}
-
-/* edma interrupt()
- *	interrupt handler
- */
-irqreturn_t edma_interrupt(int irq, void *dev)
-{
-	struct edma_per_cpu_queues_info *edma_percpu_info = (struct edma_per_cpu_queues_info *) dev;
-	struct edma_common_info *edma_cinfo = edma_percpu_info->edma_cinfo;
-	int i;
-
-	/* Unmask the TX/RX interrupt register */
-	for (i = 0; i < edma_cinfo->num_rxq_per_core; i++)
-		edma_write_reg(EDMA_REG_RX_INT_MASK_Q(edma_percpu_info->rx_start + i), 0x0);
-
-	for (i = 0; i < edma_cinfo->num_txq_per_core; i++)
-		edma_write_reg(EDMA_REG_TX_INT_MASK_Q(edma_percpu_info->tx_start + i), 0x0);
-
-	napi_schedule(&edma_percpu_info->napi);
-
-	return IRQ_HANDLED;
-}
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.h b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.h
deleted file mode 100644
index 015e5f5026..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _EDMA_H_
-#define _EDMA_H_
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/io.h>
-#include <linux/vmalloc.h>
-#include <linux/pagemap.h>
-#include <linux/smp.h>
-#include <linux/platform_device.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/clk.h>
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/sysctl.h>
-#include <linux/phy.h>
-#include <linux/of_net.h>
-#include <net/checksum.h>
-#include <net/ip6_checksum.h>
-#include <asm-generic/bug.h>
-#include "ess_edma.h"
-
-#define EDMA_CPU_CORES_SUPPORTED 4
-#define EDMA_MAX_PORTID_SUPPORTED 5
-#define EDMA_MAX_VLAN_SUPPORTED  EDMA_MAX_PORTID_SUPPORTED
-#define EDMA_MAX_PORTID_BITMAP_INDEX (EDMA_MAX_PORTID_SUPPORTED + 1)
-#define EDMA_MAX_PORTID_BITMAP_SUPPORTED 0x1f	/* 0001_1111 = 0x1f */
-#define EDMA_MAX_NETDEV_PER_QUEUE 4 /* 3 Netdev per queue, 1 space for indexing */
-
-#define EDMA_MAX_RECEIVE_QUEUE 8
-#define EDMA_MAX_TRANSMIT_QUEUE 16
-
-/* WAN/LAN adapter number */
-#define EDMA_WAN 0
-#define EDMA_LAN 1
-
-/* VLAN tag */
-#define EDMA_LAN_DEFAULT_VLAN 1
-#define EDMA_WAN_DEFAULT_VLAN 2
-
-#define EDMA_DEFAULT_GROUP1_VLAN 1
-#define EDMA_DEFAULT_GROUP2_VLAN 2
-#define EDMA_DEFAULT_GROUP3_VLAN 3
-#define EDMA_DEFAULT_GROUP4_VLAN 4
-#define EDMA_DEFAULT_GROUP5_VLAN 5
-
-/* Queues exposed to linux kernel */
-#define EDMA_NETDEV_TX_QUEUE 4
-#define EDMA_NETDEV_RX_QUEUE 4
-
-/* Number of queues per core */
-#define EDMA_NUM_TXQ_PER_CORE 4
-#define EDMA_NUM_RXQ_PER_CORE 2
-
-#define EDMA_TPD_EOP_SHIFT 31
-
-#define EDMA_PORT_ID_SHIFT 12
-#define EDMA_PORT_ID_MASK 0x7
-
-/* tpd word 3 bit 18-28 */
-#define EDMA_TPD_PORT_BITMAP_SHIFT 18
-
-#define EDMA_TPD_FROM_CPU_SHIFT 25
-
-#define EDMA_FROM_CPU_MASK 0x80
-#define EDMA_SKB_PRIORITY_MASK 0x38
-
-/* TX/RX descriptor ring count */
-/* should be a power of 2 */
-#define EDMA_RX_RING_SIZE 128
-#define EDMA_TX_RING_SIZE 128
-
-/* Flags used in paged/non paged mode */
-#define EDMA_RX_HEAD_BUFF_SIZE_JUMBO 256
-#define EDMA_RX_HEAD_BUFF_SIZE 1540
-
-/* MAX frame size supported by switch */
-#define EDMA_MAX_JUMBO_FRAME_SIZE 9216
-
-/* Configurations */
-#define EDMA_INTR_CLEAR_TYPE 0
-#define EDMA_INTR_SW_IDX_W_TYPE 0
-#define EDMA_FIFO_THRESH_TYPE 0
-#define EDMA_RSS_TYPE 0
-#define EDMA_RX_IMT 0x0020
-#define EDMA_TX_IMT 0x0050
-#define EDMA_TPD_BURST 5
-#define EDMA_TXF_BURST 0x100
-#define EDMA_RFD_BURST 8
-#define EDMA_RFD_THR 16
-#define EDMA_RFD_LTHR 0
-
-/* RX/TX per CPU based mask/shift */
-#define EDMA_TX_PER_CPU_MASK 0xF
-#define EDMA_RX_PER_CPU_MASK 0x3
-#define EDMA_TX_PER_CPU_MASK_SHIFT 0x2
-#define EDMA_RX_PER_CPU_MASK_SHIFT 0x1
-#define EDMA_TX_CPU_START_SHIFT 0x2
-#define EDMA_RX_CPU_START_SHIFT 0x1
-
-/* FLags used in transmit direction */
-#define EDMA_HW_CHECKSUM 0x00000001
-#define EDMA_VLAN_TX_TAG_INSERT_FLAG 0x00000002
-#define EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG 0x00000004
-
-#define EDMA_SW_DESC_FLAG_LAST 0x1
-#define EDMA_SW_DESC_FLAG_SKB_HEAD 0x2
-#define EDMA_SW_DESC_FLAG_SKB_FRAG 0x4
-#define EDMA_SW_DESC_FLAG_SKB_FRAGLIST 0x8
-#define EDMA_SW_DESC_FLAG_SKB_NONE 0x10
-#define EDMA_SW_DESC_FLAG_SKB_REUSE 0x20
-
-
-#define EDMA_MAX_SKB_FRAGS (MAX_SKB_FRAGS + 1)
-
-/* Ethtool specific list of EDMA supported features */
-#define EDMA_SUPPORTED_FEATURES (SUPPORTED_10baseT_Half \
-					| SUPPORTED_10baseT_Full \
-					| SUPPORTED_100baseT_Half \
-					| SUPPORTED_100baseT_Full \
-					| SUPPORTED_1000baseT_Full)
-
-/* Recevie side atheros Header */
-#define EDMA_RX_ATH_HDR_VERSION 0x2
-#define EDMA_RX_ATH_HDR_VERSION_SHIFT 14
-#define EDMA_RX_ATH_HDR_PRIORITY_SHIFT 11
-#define EDMA_RX_ATH_PORT_TYPE_SHIFT 6
-#define EDMA_RX_ATH_HDR_RSTP_PORT_TYPE 0x4
-
-/* Transmit side atheros Header */
-#define EDMA_TX_ATH_HDR_PORT_BITMAP_MASK 0x7F
-#define EDMA_TX_ATH_HDR_FROM_CPU_MASK 0x80
-#define EDMA_TX_ATH_HDR_FROM_CPU_SHIFT 7
-
-#define EDMA_TXQ_START_CORE0 8
-#define EDMA_TXQ_START_CORE1 12
-#define EDMA_TXQ_START_CORE2 0
-#define EDMA_TXQ_START_CORE3 4
-
-#define EDMA_TXQ_IRQ_MASK_CORE0 0x0F00
-#define EDMA_TXQ_IRQ_MASK_CORE1 0xF000
-#define EDMA_TXQ_IRQ_MASK_CORE2 0x000F
-#define EDMA_TXQ_IRQ_MASK_CORE3 0x00F0
-
-#define EDMA_ETH_HDR_LEN 12
-#define EDMA_ETH_TYPE_MASK 0xFFFF
-
-#define EDMA_RX_BUFFER_WRITE 16
-#define EDMA_RFD_AVAIL_THR 80
-
-#define EDMA_GMAC_NO_MDIO_PHY	PHY_MAX_ADDR
-
-extern int ssdk_rfs_ipct_rule_set(__be32 ip_src, __be32 ip_dst,
-				  __be16 sport, __be16 dport,
-				  uint8_t proto, u16 loadbalance, bool action);
-struct edma_ethtool_statistics {
-	u32 tx_q0_pkt;
-	u32 tx_q1_pkt;
-	u32 tx_q2_pkt;
-	u32 tx_q3_pkt;
-	u32 tx_q4_pkt;
-	u32 tx_q5_pkt;
-	u32 tx_q6_pkt;
-	u32 tx_q7_pkt;
-	u32 tx_q8_pkt;
-	u32 tx_q9_pkt;
-	u32 tx_q10_pkt;
-	u32 tx_q11_pkt;
-	u32 tx_q12_pkt;
-	u32 tx_q13_pkt;
-	u32 tx_q14_pkt;
-	u32 tx_q15_pkt;
-	u32 tx_q0_byte;
-	u32 tx_q1_byte;
-	u32 tx_q2_byte;
-	u32 tx_q3_byte;
-	u32 tx_q4_byte;
-	u32 tx_q5_byte;
-	u32 tx_q6_byte;
-	u32 tx_q7_byte;
-	u32 tx_q8_byte;
-	u32 tx_q9_byte;
-	u32 tx_q10_byte;
-	u32 tx_q11_byte;
-	u32 tx_q12_byte;
-	u32 tx_q13_byte;
-	u32 tx_q14_byte;
-	u32 tx_q15_byte;
-	u32 rx_q0_pkt;
-	u32 rx_q1_pkt;
-	u32 rx_q2_pkt;
-	u32 rx_q3_pkt;
-	u32 rx_q4_pkt;
-	u32 rx_q5_pkt;
-	u32 rx_q6_pkt;
-	u32 rx_q7_pkt;
-	u32 rx_q0_byte;
-	u32 rx_q1_byte;
-	u32 rx_q2_byte;
-	u32 rx_q3_byte;
-	u32 rx_q4_byte;
-	u32 rx_q5_byte;
-	u32 rx_q6_byte;
-	u32 rx_q7_byte;
-	u32 tx_desc_error;
-	u32 rx_alloc_fail_ctr;
-};
-
-struct edma_mdio_data {
-	struct mii_bus	*mii_bus;
-	void __iomem	*membase;
-	int phy_irq[PHY_MAX_ADDR];
-};
-
-/* EDMA LINK state */
-enum edma_link_state {
-	__EDMA_LINKUP, /* Indicate link is UP */
-	__EDMA_LINKDOWN /* Indicate link is down */
-};
-
-/* EDMA GMAC state */
-enum edma_gmac_state {
-	__EDMA_UP /* use to indicate GMAC is up */
-};
-
-/* edma transmit descriptor */
-struct edma_tx_desc {
-	__le16  len; /* full packet including CRC */
-	__le16  svlan_tag; /* vlan tag */
-	__le32  word1; /* byte 4-7 */
-	__le32  addr; /* address of buffer */
-	__le32  word3; /* byte 12 */
-};
-
-/* edma receive return descriptor */
-struct edma_rx_return_desc {
-	u16 rrd0;
-	u16 rrd1;
-	u16 rrd2;
-	u16 rrd3;
-	u16 rrd4;
-	u16 rrd5;
-	u16 rrd6;
-	u16 rrd7;
-};
-
-/* RFD descriptor */
-struct edma_rx_free_desc {
-	__le32  buffer_addr; /* buffer address */
-};
-
-/* edma hw specific data */
-struct edma_hw {
-	u32  __iomem *hw_addr; /* inner register address */
-	struct edma_adapter *adapter; /* netdevice adapter */
-	u32 rx_intr_mask; /*rx interrupt mask */
-	u32 tx_intr_mask; /* tx interrupt nask */
-	u32 misc_intr_mask; /* misc interrupt mask */
-	u32 wol_intr_mask; /* wake on lan interrupt mask */
-	bool intr_clear_type; /* interrupt clear */
-	bool intr_sw_idx_w; /* interrupt software index */
-	u32 rx_head_buff_size; /* Rx buffer size */
-	u8 rss_type; /* rss protocol type */
-};
-
-/* edma_sw_desc stores software descriptor
- * SW descriptor has 1:1 map with HW descriptor
- */
-struct edma_sw_desc {
-	struct sk_buff *skb;
-	dma_addr_t dma; /* dma address */
-	u16 length; /* Tx/Rx buffer length */
-	u32 flags;
-};
-
-/* per core related information */
-struct edma_per_cpu_queues_info {
-	struct napi_struct napi; /* napi associated with the core */
-	u32 tx_mask; /* tx interrupt mask */
-	u32 rx_mask; /* rx interrupt mask */
-	u32 tx_status; /* tx interrupt status */
-	u32 rx_status; /* rx interrupt status */
-	u32 tx_start; /* tx queue start */
-	u32 rx_start; /* rx queue start */
-	struct edma_common_info *edma_cinfo; /* edma common info */
-};
-
-/* edma specific common info */
-struct edma_common_info {
-	struct edma_tx_desc_ring *tpd_ring[16]; /* 16 Tx queues */
-	struct edma_rfd_desc_ring *rfd_ring[8]; /* 8 Rx queues */
-	struct platform_device *pdev; /* device structure */
-	struct net_device *netdev[EDMA_MAX_PORTID_SUPPORTED];
-	struct net_device *portid_netdev_lookup_tbl[EDMA_MAX_PORTID_BITMAP_INDEX];
-	struct ctl_table_header *edma_ctl_table_hdr;
-	int num_gmac;
-	struct edma_ethtool_statistics edma_ethstats; /* ethtool stats */
-	int num_rx_queues; /* number of rx queue */
-	u32 num_tx_queues; /* number of tx queue */
-	u32 tx_irq[16]; /* number of tx irq */
-	u32 rx_irq[8]; /* number of rx irq */
-	u32 from_cpu; /* from CPU TPD field */
-	u32 num_rxq_per_core; /* Rx queues per core */
-	u32 num_txq_per_core; /* Tx queues per core */
-	u16 tx_ring_count; /* Tx ring count */
-	u16 rx_ring_count; /* Rx ring*/
-	u16 rx_head_buffer_len; /* rx buffer length */
-	u16 rx_page_buffer_len; /* rx buffer length */
-	u32 page_mode; /* Jumbo frame supported flag */
-	u32 fraglist_mode; /* fraglist supported flag */
-	struct edma_hw hw; /* edma hw specific structure */
-	struct edma_per_cpu_queues_info edma_percpu_info[CONFIG_NR_CPUS]; /* per cpu information */
-	spinlock_t stats_lock; /* protect edma stats area for updation */
-	struct timer_list edma_stats_timer;
-	bool is_single_phy;
-	void __iomem *ess_hw_addr;
-	struct clk *ess_clk;
-};
-
-/* transimit packet descriptor (tpd) ring */
-struct edma_tx_desc_ring {
-	struct netdev_queue *nq[EDMA_MAX_NETDEV_PER_QUEUE]; /* Linux queue index */
-	struct net_device *netdev[EDMA_MAX_NETDEV_PER_QUEUE];
-			/* Array of netdevs associated with the tpd ring */
-	void *hw_desc; /* descriptor ring virtual address */
-	struct edma_sw_desc *sw_desc; /* buffer associated with ring */
-	int netdev_bmp; /* Bitmap for per-ring netdevs */
-	u32 size; /* descriptor ring length in bytes */
-	u16 count; /* number of descriptors in the ring */
-	dma_addr_t dma; /* descriptor ring physical address */
-	u16 sw_next_to_fill; /* next Tx descriptor to fill */
-	u16 sw_next_to_clean; /* next Tx descriptor to clean */
-};
-
-/* receive free descriptor (rfd) ring */
-struct edma_rfd_desc_ring {
-	void *hw_desc; /* descriptor ring virtual address */
-	struct edma_sw_desc *sw_desc; /* buffer associated with ring */
-	u16 size; /* bytes allocated to sw_desc */
-	u16 count; /* number of descriptors in the ring */
-	dma_addr_t dma; /* descriptor ring physical address */
-	u16 sw_next_to_fill; /* next descriptor to fill */
-	u16 sw_next_to_clean; /* next descriptor to clean */
-	u16 pending_fill; /* fill pending from previous iteration */
-};
-
-/* edma_rfs_flter_node - rfs filter node in hash table */
-struct edma_rfs_filter_node {
-	struct flow_keys keys;
-	u32 flow_id; /* flow_id of filter provided by kernel */
-	u16 filter_id; /* filter id of filter returned by adaptor */
-	u16 rq_id; /* desired rq index */
-	struct hlist_node node; /* edma rfs list node */
-};
-
-/* edma_rfs_flow_tbl - rfs flow table */
-struct edma_rfs_flow_table {
-	u16 max_num_filter; /* Maximum number of filters edma supports */
-	u16 hashtoclean; /* hash table index to clean next */
-	int filter_available; /* Number of free filters available */
-	struct hlist_head hlist_head[EDMA_RFS_FLOW_ENTRIES];
-	spinlock_t rfs_ftab_lock;
-	struct timer_list expire_rfs; /* timer function for edma_rps_may_expire_flow */
-};
-
-/* EDMA net device structure */
-struct edma_adapter {
-	struct net_device *netdev; /* netdevice */
-	struct platform_device *pdev; /* platform device */
-	struct edma_common_info *edma_cinfo; /* edma common info */
-	struct phy_device *phydev; /* Phy device */
-	struct edma_rfs_flow_table rfs; /* edma rfs flow table */
-	struct net_device_stats stats; /* netdev statistics */
-	set_rfs_filter_callback_t set_rfs_rule;
-	u32 flags;/* status flags */
-	unsigned long state_flags; /* GMAC up/down flags */
-	u32 forced_speed; /* link force speed */
-	u32 forced_duplex; /* link force duplex */
-	u32 link_state; /* phy link state */
-	u32 phy_mdio_addr; /* PHY device address on MII interface */
-	u32 poll_required; /* check if link polling is required */
-	u32 tx_start_offset[CONFIG_NR_CPUS]; /* tx queue start */
-	u32 default_vlan_tag; /* vlan tag */
-	u32 dp_bitmap;
-	uint8_t phy_id[MII_BUS_ID_SIZE + 3];
-};
-
-int edma_alloc_queues_tx(struct edma_common_info *edma_cinfo);
-int edma_alloc_queues_rx(struct edma_common_info *edma_cinfo);
-int edma_open(struct net_device *netdev);
-int edma_close(struct net_device *netdev);
-void edma_free_tx_resources(struct edma_common_info *edma_c_info);
-void edma_free_rx_resources(struct edma_common_info *edma_c_info);
-int edma_alloc_tx_rings(struct edma_common_info *edma_cinfo);
-int edma_alloc_rx_rings(struct edma_common_info *edma_cinfo);
-void edma_free_tx_rings(struct edma_common_info *edma_cinfo);
-void edma_free_rx_rings(struct edma_common_info *edma_cinfo);
-void edma_free_queues(struct edma_common_info *edma_cinfo);
-void edma_irq_disable(struct edma_common_info *edma_cinfo);
-int edma_reset(struct edma_common_info *edma_cinfo);
-int edma_poll(struct napi_struct *napi, int budget);
-netdev_tx_t edma_xmit(struct sk_buff *skb,
-		struct net_device *netdev);
-int edma_configure(struct edma_common_info *edma_cinfo);
-void edma_irq_enable(struct edma_common_info *edma_cinfo);
-void edma_enable_tx_ctrl(struct edma_hw *hw);
-void edma_enable_rx_ctrl(struct edma_hw *hw);
-void edma_stop_rx_tx(struct edma_hw *hw);
-void edma_free_irqs(struct edma_adapter *adapter);
-irqreturn_t edma_interrupt(int irq, void *dev);
-void edma_write_reg(u16 reg_addr, u32 reg_value);
-void edma_read_reg(u16 reg_addr, volatile u32 *reg_value);
-struct net_device_stats *edma_get_stats(struct net_device *netdev);
-int edma_set_mac_addr(struct net_device *netdev, void *p);
-int edma_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
-		u16 rxq, u32 flow_id);
-int edma_register_rfs_filter(struct net_device *netdev,
-		set_rfs_filter_callback_t set_filter);
-void edma_flow_may_expire(struct timer_list *t);
-void edma_set_ethtool_ops(struct net_device *netdev);
-void edma_set_stp_rstp(bool tag);
-void edma_assign_ath_hdr_type(int tag);
-int edma_get_default_vlan_tag(struct net_device *netdev);
-void edma_adjust_link(struct net_device *netdev);
-int edma_fill_netdev(struct edma_common_info *edma_cinfo, int qid, int num, int txq_id);
-void edma_read_append_stats(struct edma_common_info *edma_cinfo);
-void edma_change_tx_coalesce(int usecs);
-void edma_change_rx_coalesce(int usecs);
-void edma_get_tx_rx_coalesce(u32 *reg_val);
-void edma_clear_irq_status(void);
-void ess_set_port_status_speed(struct edma_common_info *edma_cinfo,
-                               struct phy_device *phydev, uint8_t port_id);
-#endif /* _EDMA_H_ */
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
deleted file mode 100644
index e6739261c3..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+++ /dev/null
@@ -1,1346 +0,0 @@
-/*
- * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/cpu_rmap.h>
-#include <linux/of.h>
-#include <linux/of_net.h>
-#include <linux/timer.h>
-#include <linux/of_platform.h>
-#include <linux/of_address.h>
-#include <linux/of_mdio.h>
-#include <linux/clk.h>
-#include <linux/string.h>
-#include <linux/reset.h>
-#include <linux/version.h>
-#include "edma.h"
-#include "ess_edma.h"
-
-/* Weight round robin and virtual QID mask */
-#define EDMA_WRR_VID_SCTL_MASK 0xffff
-
-/* Weight round robin and virtual QID shift */
-#define EDMA_WRR_VID_SCTL_SHIFT 16
-
-char edma_axi_driver_name[] = "ess_edma";
-static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
-	NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
-
-static u32 edma_hw_addr;
-
-char edma_tx_irq[16][64];
-char edma_rx_irq[8][64];
-struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED];
-static u16 tx_start[4] = {EDMA_TXQ_START_CORE0, EDMA_TXQ_START_CORE1,
-			EDMA_TXQ_START_CORE2, EDMA_TXQ_START_CORE3};
-static u32 tx_mask[4] = {EDMA_TXQ_IRQ_MASK_CORE0, EDMA_TXQ_IRQ_MASK_CORE1,
-			EDMA_TXQ_IRQ_MASK_CORE2, EDMA_TXQ_IRQ_MASK_CORE3};
-
-static u32 edma_default_ltag  __read_mostly = EDMA_LAN_DEFAULT_VLAN;
-static u32 edma_default_wtag  __read_mostly = EDMA_WAN_DEFAULT_VLAN;
-static u32 edma_default_group1_vtag  __read_mostly = EDMA_DEFAULT_GROUP1_VLAN;
-static u32 edma_default_group2_vtag  __read_mostly = EDMA_DEFAULT_GROUP2_VLAN;
-static u32 edma_default_group3_vtag  __read_mostly = EDMA_DEFAULT_GROUP3_VLAN;
-static u32 edma_default_group4_vtag  __read_mostly = EDMA_DEFAULT_GROUP4_VLAN;
-static u32 edma_default_group5_vtag  __read_mostly = EDMA_DEFAULT_GROUP5_VLAN;
-static u32 edma_rss_idt_val = EDMA_RSS_IDT_VALUE;
-static u32 edma_rss_idt_idx;
-
-static int edma_weight_assigned_to_q __read_mostly;
-static int edma_queue_to_virtual_q __read_mostly;
-static bool edma_enable_rstp  __read_mostly;
-static int edma_athr_hdr_eth_type __read_mostly;
-
-static int page_mode;
-module_param(page_mode, int, 0);
-MODULE_PARM_DESC(page_mode, "enable page mode");
-
-static int overwrite_mode;
-module_param(overwrite_mode, int, 0);
-MODULE_PARM_DESC(overwrite_mode, "overwrite default page_mode setting");
-
-static int jumbo_mru = EDMA_RX_HEAD_BUFF_SIZE;
-module_param(jumbo_mru, int, 0);
-MODULE_PARM_DESC(jumbo_mru, "enable fraglist support");
-
-static int num_rxq = 4;
-module_param(num_rxq, int, 0);
-MODULE_PARM_DESC(num_rxq, "change the number of rx queues");
-
-void edma_write_reg(u16 reg_addr, u32 reg_value)
-{
-	writel(reg_value, ((void __iomem *)(edma_hw_addr + reg_addr)));
-}
-
-void edma_read_reg(u16 reg_addr, volatile u32 *reg_value)
-{
-	*reg_value = readl((void __iomem *)(edma_hw_addr + reg_addr));
-}
-
-static void ess_write_reg(struct edma_common_info *edma, u16 reg_addr, u32 reg_value)
-{
-	writel(reg_value, ((void __iomem *)
-		((unsigned long)edma->ess_hw_addr + reg_addr)));
-}
-
-static void ess_read_reg(struct edma_common_info *edma, u16 reg_addr,
-		  volatile u32 *reg_value)
-{
-	*reg_value = readl((void __iomem *)
-		((unsigned long)edma->ess_hw_addr + reg_addr));
-}
-
-static int ess_reset(struct edma_common_info *edma)
-{
-	struct device_node *switch_node = NULL;
-	struct reset_control *ess_rst;
-	u32 regval;
-
-	switch_node = of_find_node_by_name(NULL, "ess-switch");
-	if (!switch_node) {
-		pr_err("switch-node not found\n");
-		return -EINVAL;
-	}
-
-	ess_rst = of_reset_control_get(switch_node, "ess_rst");
-	of_node_put(switch_node);
-
-	if (IS_ERR(ess_rst)) {
-		pr_err("failed to find ess_rst!\n");
-		return -ENOENT;
-	}
-
-	reset_control_assert(ess_rst);
-	msleep(10);
-	reset_control_deassert(ess_rst);
-	msleep(100);
-	reset_control_put(ess_rst);
-
-	/* Enable only port 5 <--> port 0
-	 * bits 0:6 bitmap of ports it can fwd to */
-#define SET_PORT_BMP(r,v) \
-		ess_read_reg(edma, r, &regval); \
-		ess_write_reg(edma, r, ((regval & ~0x3F) | v));
-
-	SET_PORT_BMP(ESS_PORT0_LOOKUP_CTRL,0x20);
-	SET_PORT_BMP(ESS_PORT1_LOOKUP_CTRL,0x00);
-	SET_PORT_BMP(ESS_PORT2_LOOKUP_CTRL,0x00);
-	SET_PORT_BMP(ESS_PORT3_LOOKUP_CTRL,0x00);
-	SET_PORT_BMP(ESS_PORT4_LOOKUP_CTRL,0x00);
-	SET_PORT_BMP(ESS_PORT5_LOOKUP_CTRL,0x01);
-	ess_write_reg(edma, ESS_RGMII_CTRL, 0x400);
-	ess_write_reg(edma, ESS_PORT0_STATUS, ESS_PORT_1G_FDX);
-	ess_write_reg(edma, ESS_PORT5_STATUS, ESS_PORT_1G_FDX);
-	ess_write_reg(edma, ESS_PORT0_HEADER_CTRL, 0);
-#undef SET_PORT_BMP
-
-	/* forward multicast and broadcast frames to CPU */
-	ess_write_reg(edma, ESS_FWD_CTRL1,
-		(ESS_PORTS_ALL << ESS_FWD_CTRL1_UC_FLOOD_S) |
-		(ESS_PORTS_ALL << ESS_FWD_CTRL1_MC_FLOOD_S) |
-		(ESS_PORTS_ALL << ESS_FWD_CTRL1_BC_FLOOD_S));
-
-	return 0;
-}
-
-void ess_set_port_status_speed(struct edma_common_info *edma,
-			       struct phy_device *phydev, uint8_t port_id)
-{
-	uint16_t reg_off = ESS_PORT0_STATUS + (4 * port_id);
-	uint32_t reg_val = 0;
-
-	ess_read_reg(edma, reg_off, &reg_val);
-
-	/* reset the speed bits [0:1] */
-	reg_val &= ~ESS_PORT_STATUS_SPEED_INV;
-
-	/* set the new speed */
-	switch(phydev->speed) {
-		case SPEED_1000:  reg_val |= ESS_PORT_STATUS_SPEED_1000; break;
-		case SPEED_100:   reg_val |= ESS_PORT_STATUS_SPEED_100;  break;
-		case SPEED_10:    reg_val |= ESS_PORT_STATUS_SPEED_10;   break;
-		default:          reg_val |= ESS_PORT_STATUS_SPEED_INV;  break;
-	}
-
-	/* check full/half duplex */
-	if (phydev->duplex) {
-		reg_val |= ESS_PORT_STATUS_DUPLEX_MODE;
-	} else {
-		reg_val &= ~ESS_PORT_STATUS_DUPLEX_MODE;
-	}
-
-	ess_write_reg(edma, reg_off, reg_val);
-}
-
-/* edma_change_tx_coalesce()
- *	change tx interrupt moderation timer
- */
-void edma_change_tx_coalesce(int usecs)
-{
-	u32 reg_value;
-
-	/* Here, we right shift the value from the user by 1, this is
-	 * done because IMT resolution timer is 2usecs. 1 count
-	 * of this register corresponds to 2 usecs.
-	 */
-	edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, &reg_value);
-	reg_value = ((reg_value & 0xffff) | ((usecs >> 1) << 16));
-	edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_value);
-}
-
-/* edma_change_rx_coalesce()
- *	change rx interrupt moderation timer
- */
-void edma_change_rx_coalesce(int usecs)
-{
-	u32 reg_value;
-
-	/* Here, we right shift the value from the user by 1, this is
-	 * done because IMT resolution timer is 2usecs. 1 count
-	 * of this register corresponds to 2 usecs.
-	 */
-	edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, &reg_value);
-	reg_value = ((reg_value & 0xffff0000) | (usecs >> 1));
-	edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_value);
-}
-
-/* edma_get_tx_rx_coalesce()
- *	Get tx/rx interrupt moderation value
- */
-void edma_get_tx_rx_coalesce(u32 *reg_val)
-{
-	edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_val);
-}
-
-void edma_read_append_stats(struct edma_common_info *edma_cinfo)
-{
-	uint32_t *p;
-	int i;
-	u32 stat;
-
-	spin_lock_bh(&edma_cinfo->stats_lock);
-	p = (uint32_t *)&(edma_cinfo->edma_ethstats);
-
-	for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++) {
-		edma_read_reg(EDMA_REG_TX_STAT_PKT_Q(i), &stat);
-		*p += stat;
-		p++;
-	}
-
-	for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++) {
-		edma_read_reg(EDMA_REG_TX_STAT_BYTE_Q(i), &stat);
-		*p += stat;
-		p++;
-	}
-
-	for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++) {
-		edma_read_reg(EDMA_REG_RX_STAT_PKT_Q(i), &stat);
-		*p += stat;
-		p++;
-	}
-
-	for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++) {
-		edma_read_reg(EDMA_REG_RX_STAT_BYTE_Q(i), &stat);
-		*p += stat;
-		p++;
-	}
-
-	spin_unlock_bh(&edma_cinfo->stats_lock);
-}
-
-static void edma_statistics_timer(struct timer_list *t)
-{
-	struct edma_common_info *edma_cinfo =
-		from_timer(edma_cinfo, t, edma_stats_timer);
-
-	edma_read_append_stats(edma_cinfo);
-
-	mod_timer(&edma_cinfo->edma_stats_timer, jiffies + 1*HZ);
-}
-
-static int edma_enable_stp_rstp(struct ctl_table *table, int write,
-				void __user *buffer, size_t *lenp,
-				loff_t *ppos)
-{
-	int ret;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (write)
-		edma_set_stp_rstp(edma_enable_rstp);
-
-	return ret;
-}
-
-static int edma_ath_hdr_eth_type(struct ctl_table *table, int write,
-				 void __user *buffer, size_t *lenp,
-				 loff_t *ppos)
-{
-	int ret;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (write)
-		edma_assign_ath_hdr_type(edma_athr_hdr_eth_type);
-
-	return ret;
-}
-
-static int edma_change_default_lan_vlan(struct ctl_table *table, int write,
-					void __user *buffer, size_t *lenp,
-					loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	int ret;
-
-	if (!edma_netdev[1]) {
-		pr_err("Netdevice for default_lan does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[1]);
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_ltag;
-
-	return ret;
-}
-
-static int edma_change_default_wan_vlan(struct ctl_table *table, int write,
-					void __user *buffer, size_t *lenp,
-					loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	int ret;
-
-	if (!edma_netdev[0]) {
-		pr_err("Netdevice for default_wan does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[0]);
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_wtag;
-
-	return ret;
-}
-
-static int edma_change_group1_vtag(struct ctl_table *table, int write,
-				   void __user *buffer, size_t *lenp,
-				   loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	struct edma_common_info *edma_cinfo;
-	int ret;
-
-	if (!edma_netdev[0]) {
-		pr_err("Netdevice for Group 1 does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[0]);
-	edma_cinfo = adapter->edma_cinfo;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_group1_vtag;
-
-	return ret;
-}
-
-static int edma_change_group2_vtag(struct ctl_table *table, int write,
-				   void __user *buffer, size_t *lenp,
-				   loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	struct edma_common_info *edma_cinfo;
-	int ret;
-
-	if (!edma_netdev[1]) {
-		pr_err("Netdevice for Group 2 does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[1]);
-	edma_cinfo = adapter->edma_cinfo;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_group2_vtag;
-
-	return ret;
-}
-
-static int edma_change_group3_vtag(struct ctl_table *table, int write,
-				   void __user *buffer, size_t *lenp,
-				   loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	struct edma_common_info *edma_cinfo;
-	int ret;
-
-	if (!edma_netdev[2]) {
-		pr_err("Netdevice for Group 3 does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[2]);
-	edma_cinfo = adapter->edma_cinfo;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_group3_vtag;
-
-	return ret;
-}
-
-static int edma_change_group4_vtag(struct ctl_table *table, int write,
-				   void __user *buffer, size_t *lenp,
-				   loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	struct edma_common_info *edma_cinfo;
-	int ret;
-
-	if (!edma_netdev[3]) {
-		pr_err("Netdevice for Group 4 does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[3]);
-	edma_cinfo = adapter->edma_cinfo;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_group4_vtag;
-
-	return ret;
-}
-
-static int edma_change_group5_vtag(struct ctl_table *table, int write,
-				   void __user *buffer, size_t *lenp,
-				   loff_t *ppos)
-{
-	struct edma_adapter *adapter;
-	struct edma_common_info *edma_cinfo;
-	int ret;
-
-	if (!edma_netdev[4]) {
-		pr_err("Netdevice for Group 5 does not exist\n");
-		return -1;
-	}
-
-	adapter = netdev_priv(edma_netdev[4]);
-	edma_cinfo = adapter->edma_cinfo;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-
-	if (write)
-		adapter->default_vlan_tag = edma_default_group5_vtag;
-
-	return ret;
-}
-
-static int edma_set_rss_idt_value(struct ctl_table *table, int write,
-				  void __user *buffer, size_t *lenp,
-				  loff_t *ppos)
-{
-	int ret;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (write && !ret)
-		edma_write_reg(EDMA_REG_RSS_IDT(edma_rss_idt_idx),
-			       edma_rss_idt_val);
-	return ret;
-}
-
-static int edma_set_rss_idt_idx(struct ctl_table *table, int write,
-				void __user *buffer, size_t *lenp,
-				loff_t *ppos)
-{
-	int ret;
-	u32 old_value = edma_rss_idt_idx;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (!write || ret)
-		return ret;
-
-	if (edma_rss_idt_idx >= EDMA_NUM_IDT) {
-		pr_err("Invalid RSS indirection table index %d\n",
-		       edma_rss_idt_idx);
-		edma_rss_idt_idx = old_value;
-		return -EINVAL;
-	}
-	return ret;
-}
-
-static int edma_weight_assigned_to_queues(struct ctl_table *table, int write,
-					  void __user *buffer, size_t *lenp,
-					  loff_t *ppos)
-{
-	int ret, queue_id, weight;
-	u32 reg_data, data, reg_addr;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (write) {
-		queue_id = edma_weight_assigned_to_q & EDMA_WRR_VID_SCTL_MASK;
-		if (queue_id < 0 || queue_id > 15) {
-			pr_err("queue_id not within desired range\n");
-			return -EINVAL;
-		}
-
-		weight = edma_weight_assigned_to_q >> EDMA_WRR_VID_SCTL_SHIFT;
-		if (weight < 0 || weight > 0xF) {
-			pr_err("queue_id not within desired range\n");
-			return -EINVAL;
-		}
-
-		data = weight << EDMA_WRR_SHIFT(queue_id);
-
-		reg_addr = EDMA_REG_WRR_CTRL_Q0_Q3 + (queue_id & ~0x3);
-		edma_read_reg(reg_addr, &reg_data);
-		reg_data &= ~(1 << EDMA_WRR_SHIFT(queue_id));
-		edma_write_reg(reg_addr, data | reg_data);
-	}
-
-	return ret;
-}
-
-static int edma_queue_to_virtual_queue_map(struct ctl_table *table, int write,
-					   void __user *buffer, size_t *lenp,
-					   loff_t *ppos)
-{
-	int ret, queue_id, virtual_qid;
-	u32 reg_data, data, reg_addr;
-
-	ret = proc_dointvec(table, write, buffer, lenp, ppos);
-	if (write) {
-		queue_id = edma_queue_to_virtual_q & EDMA_WRR_VID_SCTL_MASK;
-		if (queue_id < 0 || queue_id > 15) {
-			pr_err("queue_id not within desired range\n");
-			return -EINVAL;
-		}
-
-		virtual_qid = edma_queue_to_virtual_q >>
-			EDMA_WRR_VID_SCTL_SHIFT;
-		if (virtual_qid < 0 || virtual_qid > 8) {
-			pr_err("queue_id not within desired range\n");
-			return -EINVAL;
-		}
-
-		data = virtual_qid << EDMA_VQ_ID_SHIFT(queue_id);
-
-		reg_addr = EDMA_REG_VQ_CTRL0 + (queue_id & ~0x3);
-		edma_read_reg(reg_addr, &reg_data);
-		reg_data &= ~(1 << EDMA_VQ_ID_SHIFT(queue_id));
-		edma_write_reg(reg_addr, data | reg_data);
-	}
-
-	return ret;
-}
-
-static struct ctl_table edma_table[] = {
-	{
-		.procname       = "default_lan_tag",
-		.data           = &edma_default_ltag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_default_lan_vlan
-	},
-	{
-		.procname       = "default_wan_tag",
-		.data           = &edma_default_wtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_default_wan_vlan
-	},
-	{
-		.procname       = "weight_assigned_to_queues",
-		.data           = &edma_weight_assigned_to_q,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_weight_assigned_to_queues
-	},
-	{
-		.procname       = "queue_to_virtual_queue_map",
-		.data           = &edma_queue_to_virtual_q,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_queue_to_virtual_queue_map
-	},
-	{
-		.procname       = "enable_stp_rstp",
-		.data           = &edma_enable_rstp,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_enable_stp_rstp
-	},
-	{
-		.procname       = "athr_hdr_eth_type",
-		.data           = &edma_athr_hdr_eth_type,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_ath_hdr_eth_type
-	},
-	{
-		.procname       = "default_group1_vlan_tag",
-		.data           = &edma_default_group1_vtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_group1_vtag
-	},
-	{
-		.procname       = "default_group2_vlan_tag",
-		.data           = &edma_default_group2_vtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_group2_vtag
-	},
-	{
-		.procname       = "default_group3_vlan_tag",
-		.data           = &edma_default_group3_vtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_group3_vtag
-	},
-	{
-		.procname       = "default_group4_vlan_tag",
-		.data           = &edma_default_group4_vtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_group4_vtag
-	},
-	{
-		.procname       = "default_group5_vlan_tag",
-		.data           = &edma_default_group5_vtag,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_change_group5_vtag
-	},
-	{
-		.procname       = "edma_rss_idt_value",
-		.data           = &edma_rss_idt_val,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_set_rss_idt_value
-	},
-	{
-		.procname       = "edma_rss_idt_idx",
-		.data           = &edma_rss_idt_idx,
-		.maxlen         = sizeof(int),
-		.mode           = 0644,
-		.proc_handler   = edma_set_rss_idt_idx
-	},
-	{}
-};
-
-static int ess_parse(struct edma_common_info *edma)
-{
-	struct device_node *switch_node;
-	int ret = -EINVAL;
-
-	switch_node = of_find_node_by_name(NULL, "ess-switch");
-	if (!switch_node) {
-		pr_err("cannot find ess-switch node\n");
-		goto out;
-	}
-
-	edma->ess_hw_addr = of_io_request_and_map(switch_node,
-						  0, KBUILD_MODNAME);
-	if (!edma->ess_hw_addr) {
-		pr_err("%s ioremap fail.", __func__);
-		goto out;
-	}
-
-	edma->ess_clk = of_clk_get_by_name(switch_node, "ess_clk");
-	ret = clk_prepare_enable(edma->ess_clk);
-out:
-	of_node_put(switch_node);
-	return ret;
-}
-
-/* edma_axi_netdev_ops
- *	Describe the operations supported by registered netdevices
- *
- * static const struct net_device_ops edma_axi_netdev_ops = {
- *	.ndo_open               = edma_open,
- *	.ndo_stop               = edma_close,
- *	.ndo_start_xmit         = edma_xmit_frame,
- *	.ndo_set_mac_address    = edma_set_mac_addr,
- * }
- */
-static const struct net_device_ops edma_axi_netdev_ops = {
-	.ndo_open               = edma_open,
-	.ndo_stop               = edma_close,
-	.ndo_start_xmit         = edma_xmit,
-	.ndo_set_mac_address    = edma_set_mac_addr,
-#ifdef CONFIG_RFS_ACCEL
-	.ndo_rx_flow_steer      = edma_rx_flow_steer,
-	.ndo_register_rfs_filter = edma_register_rfs_filter,
-	.ndo_get_default_vlan_tag = edma_get_default_vlan_tag,
-#endif
-	.ndo_get_stats          = edma_get_stats,
-};
-
-/* edma_axi_probe()
- *	Initialise an adapter identified by a platform_device structure.
- *
- * The OS initialization, configuring of the adapter private structure,
- * and a hardware reset occur in the probe.
- */
-static int edma_axi_probe(struct platform_device *pdev)
-{
-	struct edma_common_info *edma_cinfo;
-	struct edma_hw *hw;
-	struct edma_adapter *adapter[EDMA_MAX_PORTID_SUPPORTED];
-	struct resource *res;
-	struct device_node *np = pdev->dev.of_node;
-	struct device_node *pnp;
-	struct device_node *mdio_node = NULL;
-	struct mii_bus *miibus = NULL;
-	int i, j, k, err = 0;
-	int portid_bmp;
-	int idx = 0, idx_mac = 0;
-
-	if (CONFIG_NR_CPUS != EDMA_CPU_CORES_SUPPORTED) {
-		dev_err(&pdev->dev, "Invalid CPU Cores\n");
-		return -EINVAL;
-	}
-
-	if ((num_rxq != 4) && (num_rxq != 8)) {
-		dev_err(&pdev->dev, "Invalid RX queue, edma probe failed\n");
-		return -EINVAL;
-	}
-	edma_cinfo = kzalloc(sizeof(struct edma_common_info), GFP_KERNEL);
-	if (!edma_cinfo) {
-		err = -ENOMEM;
-		goto err_alloc;
-	}
-
-	edma_cinfo->pdev = pdev;
-
-	of_property_read_u32(np, "qcom,num_gmac", &edma_cinfo->num_gmac);
-	if (edma_cinfo->num_gmac > EDMA_MAX_PORTID_SUPPORTED) {
-		pr_err("Invalid DTSI Entry for qcom,num_gmac\n");
-		err = -EINVAL;
-		goto err_cinfo;
-	}
-
-	/* Initialize the netdev array before allocation
-	 * to avoid double free
-	 */
-	for (i = 0 ; i < edma_cinfo->num_gmac ; i++)
-		edma_netdev[i] = NULL;
-
-	for (i = 0 ; i < edma_cinfo->num_gmac ; i++) {
-		edma_netdev[i] = alloc_etherdev_mqs(sizeof(struct edma_adapter),
-			EDMA_NETDEV_TX_QUEUE, EDMA_NETDEV_RX_QUEUE);
-
-		if (!edma_netdev[i]) {
-			dev_err(&pdev->dev,
-				"net device alloc fails for index=%d\n", i);
-			err = -ENODEV;
-			goto err_ioremap;
-		}
-
-		SET_NETDEV_DEV(edma_netdev[i], &pdev->dev);
-		platform_set_drvdata(pdev, edma_netdev[i]);
-		edma_cinfo->netdev[i] = edma_netdev[i];
-	}
-
-	/* Fill ring details */
-	edma_cinfo->num_tx_queues = EDMA_MAX_TRANSMIT_QUEUE;
-	edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / 4);
-	edma_cinfo->tx_ring_count = EDMA_TX_RING_SIZE;
-
-	/* Update num rx queues based on module parameter */
-	edma_cinfo->num_rx_queues = num_rxq;
-	edma_cinfo->num_rxq_per_core = ((num_rxq == 4) ? 1 : 2);
-
-	edma_cinfo->rx_ring_count = EDMA_RX_RING_SIZE;
-
-	hw = &edma_cinfo->hw;
-
-	/* Fill HW defaults */
-	hw->tx_intr_mask = EDMA_TX_IMR_NORMAL_MASK;
-	hw->rx_intr_mask = EDMA_RX_IMR_NORMAL_MASK;
-
-	of_property_read_u32(np, "qcom,page-mode", &edma_cinfo->page_mode);
-	of_property_read_u32(np, "qcom,rx_head_buf_size",
-			     &hw->rx_head_buff_size);
-
-	if (overwrite_mode) {
-		dev_info(&pdev->dev, "page mode overwritten");
-		edma_cinfo->page_mode = page_mode;
-	}
-
-	if (jumbo_mru)
-		edma_cinfo->fraglist_mode = 1;
-
-	if (edma_cinfo->page_mode)
-		hw->rx_head_buff_size = EDMA_RX_HEAD_BUFF_SIZE_JUMBO;
-	else if (edma_cinfo->fraglist_mode)
-		hw->rx_head_buff_size = jumbo_mru;
-	else if (!hw->rx_head_buff_size)
-		hw->rx_head_buff_size = EDMA_RX_HEAD_BUFF_SIZE;
-
-	hw->misc_intr_mask = 0;
-	hw->wol_intr_mask = 0;
-
-	hw->intr_clear_type = EDMA_INTR_CLEAR_TYPE;
-	hw->intr_sw_idx_w = EDMA_INTR_SW_IDX_W_TYPE;
-
-	/* configure RSS type to the different protocol that can be
-	 * supported
-	 */
-	hw->rss_type = EDMA_RSS_TYPE_IPV4TCP | EDMA_RSS_TYPE_IPV6_TCP |
-		EDMA_RSS_TYPE_IPV4_UDP | EDMA_RSS_TYPE_IPV6UDP |
-		EDMA_RSS_TYPE_IPV4 | EDMA_RSS_TYPE_IPV6;
-
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-
-	edma_cinfo->hw.hw_addr = devm_ioremap_resource(&pdev->dev, res);
-	if (IS_ERR(edma_cinfo->hw.hw_addr)) {
-		err = PTR_ERR(edma_cinfo->hw.hw_addr);
-		goto err_ioremap;
-	}
-
-	edma_hw_addr = (u32)edma_cinfo->hw.hw_addr;
-
-	/* Parse tx queue interrupt number from device tree */
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++)
-		edma_cinfo->tx_irq[i] = platform_get_irq(pdev, i);
-
-	/* Parse rx queue interrupt number from device tree
-	 * Here we are setting j to point to the point where we
-	 * left tx interrupt parsing(i.e 16) and run run the loop
-	 * from 0 to 7 to parse rx interrupt number.
-	 */
-	for (i = 0, j = edma_cinfo->num_tx_queues, k = 0;
-			i < edma_cinfo->num_rx_queues; i++) {
-		edma_cinfo->rx_irq[k] = platform_get_irq(pdev, j);
-		k += ((num_rxq == 4) ?  2 : 1);
-		j += ((num_rxq == 4) ?  2 : 1);
-	}
-
-	edma_cinfo->rx_head_buffer_len = edma_cinfo->hw.rx_head_buff_size;
-	edma_cinfo->rx_page_buffer_len = PAGE_SIZE;
-
-	err = edma_alloc_queues_tx(edma_cinfo);
-	if (err) {
-		dev_err(&pdev->dev, "Allocation of TX queue failed\n");
-		goto err_tx_qinit;
-	}
-
-	err = edma_alloc_queues_rx(edma_cinfo);
-	if (err) {
-		dev_err(&pdev->dev, "Allocation of RX queue failed\n");
-		goto err_rx_qinit;
-	}
-
-	err = edma_alloc_tx_rings(edma_cinfo);
-	if (err) {
-		dev_err(&pdev->dev, "Allocation of TX resources failed\n");
-		goto err_tx_rinit;
-	}
-
-	err = edma_alloc_rx_rings(edma_cinfo);
-	if (err) {
-		dev_err(&pdev->dev, "Allocation of RX resources failed\n");
-		goto err_rx_rinit;
-	}
-
-	/* Initialize netdev and netdev bitmap for transmit descriptor rings */
-	for (i = 0; i < edma_cinfo->num_tx_queues; i++) {
-		struct edma_tx_desc_ring *etdr =  edma_cinfo->tpd_ring[i];
-		int j;
-
-		etdr->netdev_bmp = 0;
-		for (j = 0; j < EDMA_MAX_NETDEV_PER_QUEUE; j++) {
-			etdr->netdev[j] = NULL;
-			etdr->nq[j] = NULL;
-		}
-	}
-
-	if (of_property_read_bool(np, "qcom,mdio_supported")) {
-		mdio_node = of_find_compatible_node(NULL, NULL,
-						    "qcom,ipq4019-mdio");
-		if (!mdio_node) {
-			dev_err(&pdev->dev, "cannot find mdio node by phandle");
-			err = -EIO;
-			goto err_mdiobus_init_fail;
-		}
-
-		miibus = of_mdio_find_bus(mdio_node);
-		if (!miibus)
-			return -EINVAL;
-	}
-
-	if (of_property_read_bool(np, "qcom,single-phy") &&
-	    edma_cinfo->num_gmac == 1) {
-		err = ess_parse(edma_cinfo);
-		if (!err)
-			err = ess_reset(edma_cinfo);
-		if (err)
-			goto err_single_phy_init;
-		else
-			edma_cinfo->is_single_phy = true;
-	}
-
-	for_each_available_child_of_node(np, pnp) {
-		/* this check is needed if parent and daughter dts have
-		 * different number of gmac nodes
-		 */
-		if (idx_mac == edma_cinfo->num_gmac) {
-			of_node_put(np);
-			break;
-		}
-
-		of_get_mac_address(pnp, edma_netdev[idx_mac]->dev_addr);
-
-		idx_mac++;
-	}
-
-	/* Populate the adapter structure register the netdevice */
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		int k, m;
-
-		adapter[i] = netdev_priv(edma_netdev[i]);
-		adapter[i]->netdev = edma_netdev[i];
-		adapter[i]->pdev = pdev;
-		for (j = 0; j < CONFIG_NR_CPUS; j++) {
-			m = i % 2;
-			adapter[i]->tx_start_offset[j] =
-				((j << EDMA_TX_CPU_START_SHIFT) + (m << 1));
-			/* Share the queues with available net-devices.
-			 * For instance , with 5 net-devices
-			 * eth0/eth2/eth4 will share q0,q1,q4,q5,q8,q9,q12,q13
-			 * and eth1/eth3 will get the remaining.
-			 */
-			for (k = adapter[i]->tx_start_offset[j]; k <
-			     (adapter[i]->tx_start_offset[j] + 2); k++) {
-				if (edma_fill_netdev(edma_cinfo, k, i, j)) {
-					pr_err("Netdev overflow Error\n");
-					goto err_register;
-				}
-			}
-		}
-
-		adapter[i]->edma_cinfo = edma_cinfo;
-		edma_netdev[i]->netdev_ops = &edma_axi_netdev_ops;
-		edma_netdev[i]->max_mtu = 9000;
-		edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
-				      | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
-				      NETIF_F_TSO | NETIF_F_GRO | NETIF_F_HW_VLAN_CTAG_TX;
-		edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
-				NETIF_F_HW_VLAN_CTAG_RX
-				| NETIF_F_SG | NETIF_F_TSO | NETIF_F_GRO;
-		edma_netdev[i]->vlan_features = NETIF_F_HW_CSUM | NETIF_F_SG |
-					   NETIF_F_TSO | NETIF_F_GRO;
-		edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG |
-					     NETIF_F_TSO | NETIF_F_GRO;
-
-#ifdef CONFIG_RFS_ACCEL
-		edma_netdev[i]->features |=  NETIF_F_NTUPLE | NETIF_F_RXHASH;
-		edma_netdev[i]->hw_features |=  NETIF_F_NTUPLE | NETIF_F_RXHASH;
-		edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
-		edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
-#endif
-		edma_set_ethtool_ops(edma_netdev[i]);
-
-		/* This just fill in some default MAC address
-		 */
-		if (!is_valid_ether_addr(edma_netdev[i]->dev_addr)) {
-			random_ether_addr(edma_netdev[i]->dev_addr);
-			pr_info("EDMA using MAC@ - using");
-			pr_info("%02x:%02x:%02x:%02x:%02x:%02x\n",
-			*(edma_netdev[i]->dev_addr),
-			*(edma_netdev[i]->dev_addr + 1),
-			*(edma_netdev[i]->dev_addr + 2),
-			*(edma_netdev[i]->dev_addr + 3),
-			*(edma_netdev[i]->dev_addr + 4),
-			*(edma_netdev[i]->dev_addr + 5));
-		}
-
-		err = register_netdev(edma_netdev[i]);
-		if (err)
-			goto err_register;
-
-		/* carrier off reporting is important to
-		 * ethtool even BEFORE open
-		 */
-		netif_carrier_off(edma_netdev[i]);
-
-		/* Allocate reverse irq cpu mapping structure for
-		* receive queues
-		*/
-#ifdef CONFIG_RFS_ACCEL
-		edma_netdev[i]->rx_cpu_rmap =
-			alloc_irq_cpu_rmap(EDMA_NETDEV_RX_QUEUE);
-		if (!edma_netdev[i]->rx_cpu_rmap) {
-			err = -ENOMEM;
-			goto err_rmap_alloc_fail;
-		}
-#endif
-	}
-
-	for (i = 0; i < EDMA_MAX_PORTID_BITMAP_INDEX; i++)
-		edma_cinfo->portid_netdev_lookup_tbl[i] = NULL;
-
-	for_each_available_child_of_node(np, pnp) {
-		const uint32_t *vlan_tag = NULL;
-		int len;
-
-		/* this check is needed if parent and daughter dts have
-		 * different number of gmac nodes
-		 */
-		if (idx == edma_cinfo->num_gmac)
-			break;
-
-		/* Populate port-id to netdev lookup table */
-		vlan_tag = of_get_property(pnp, "vlan_tag", &len);
-		if (!vlan_tag) {
-			pr_err("Vlan tag parsing Failed.\n");
-			goto err_rmap_alloc_fail;
-		}
-
-		adapter[idx]->default_vlan_tag = of_read_number(vlan_tag, 1);
-		vlan_tag++;
-		portid_bmp = of_read_number(vlan_tag, 1);
-		adapter[idx]->dp_bitmap = portid_bmp;
-
-		portid_bmp = portid_bmp >> 1; /* We ignore CPU Port bit 0 */
-		while (portid_bmp) {
-			int port_bit = ffs(portid_bmp);
-
-			if (port_bit > EDMA_MAX_PORTID_SUPPORTED)
-				goto err_rmap_alloc_fail;
-			edma_cinfo->portid_netdev_lookup_tbl[port_bit] =
-				edma_netdev[idx];
-			portid_bmp &= ~(1 << (port_bit - 1));
-		}
-
-		if (!of_property_read_u32(pnp, "qcom,poll_required",
-					  &adapter[idx]->poll_required)) {
-			if (adapter[idx]->poll_required) {
-				of_property_read_u32(pnp, "qcom,phy_mdio_addr",
-						     &adapter[idx]->phy_mdio_addr);
-				of_property_read_u32(pnp, "qcom,forced_speed",
-						     &adapter[idx]->forced_speed);
-				of_property_read_u32(pnp, "qcom,forced_duplex",
-						     &adapter[idx]->forced_duplex);
-
-				/* create a phyid using MDIO bus id
-				 * and MDIO bus address
-				 */
-				snprintf(adapter[idx]->phy_id,
-					 MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
-					 miibus->id,
-					 adapter[idx]->phy_mdio_addr);
-			}
-		} else {
-			adapter[idx]->poll_required = 0;
-			adapter[idx]->forced_speed = SPEED_1000;
-			adapter[idx]->forced_duplex = DUPLEX_FULL;
-		}
-
-		idx++;
-	}
-
-	edma_cinfo->edma_ctl_table_hdr = register_net_sysctl(&init_net,
-							     "net/edma",
-							     edma_table);
-	if (!edma_cinfo->edma_ctl_table_hdr) {
-		dev_err(&pdev->dev, "edma sysctl table hdr not registered\n");
-		goto err_unregister_sysctl_tbl;
-	}
-
-	/* Disable all 16 Tx and 8 rx irqs */
-	edma_irq_disable(edma_cinfo);
-
-	err = edma_reset(edma_cinfo);
-	if (err) {
-		err = -EIO;
-		goto err_reset;
-	}
-
-	/* populate per_core_info, do a napi_Add, request 16 TX irqs,
-	 * 8 RX irqs, do a napi enable
-	 */
-	for (i = 0; i < CONFIG_NR_CPUS; i++) {
-		u8 rx_start;
-
-		edma_cinfo->edma_percpu_info[i].napi.state = 0;
-
-		netif_napi_add(edma_netdev[0],
-			       &edma_cinfo->edma_percpu_info[i].napi,
-			       edma_poll, 64);
-		napi_enable(&edma_cinfo->edma_percpu_info[i].napi);
-		edma_cinfo->edma_percpu_info[i].tx_mask = tx_mask[i];
-		edma_cinfo->edma_percpu_info[i].rx_mask = EDMA_RX_PER_CPU_MASK
-				<< (i << EDMA_RX_PER_CPU_MASK_SHIFT);
-		edma_cinfo->edma_percpu_info[i].tx_start = tx_start[i];
-		edma_cinfo->edma_percpu_info[i].rx_start =
-			i << EDMA_RX_CPU_START_SHIFT;
-		rx_start = i << EDMA_RX_CPU_START_SHIFT;
-		edma_cinfo->edma_percpu_info[i].tx_status = 0;
-		edma_cinfo->edma_percpu_info[i].rx_status = 0;
-		edma_cinfo->edma_percpu_info[i].edma_cinfo = edma_cinfo;
-
-		/* Request irq per core */
-		for (j = edma_cinfo->edma_percpu_info[i].tx_start;
-		     j < tx_start[i] + 4; j++) {
-			sprintf(&edma_tx_irq[j][0], "edma_eth_tx%d", j);
-			err = request_irq(edma_cinfo->tx_irq[j],
-					  edma_interrupt,
-					  0,
-					  &edma_tx_irq[j][0],
-					  &edma_cinfo->edma_percpu_info[i]);
-			if (err)
-				goto err_reset;
-		}
-
-		for (j = edma_cinfo->edma_percpu_info[i].rx_start;
-		     j < (rx_start +
-		     ((edma_cinfo->num_rx_queues == 4) ? 1 : 2));
-		     j++) {
-			sprintf(&edma_rx_irq[j][0], "edma_eth_rx%d", j);
-			err = request_irq(edma_cinfo->rx_irq[j],
-					  edma_interrupt,
-					  0,
-					  &edma_rx_irq[j][0],
-					  &edma_cinfo->edma_percpu_info[i]);
-			if (err)
-				goto err_reset;
-		}
-
-#ifdef CONFIG_RFS_ACCEL
-		for (j = edma_cinfo->edma_percpu_info[i].rx_start;
-		     j < rx_start + 2; j += 2) {
-			err = irq_cpu_rmap_add(edma_netdev[0]->rx_cpu_rmap,
-					       edma_cinfo->rx_irq[j]);
-			if (err)
-				goto err_rmap_add_fail;
-		}
-#endif
-	}
-
-	/* Used to clear interrupt status, allocate rx buffer,
-	 * configure edma descriptors registers
-	 */
-	err = edma_configure(edma_cinfo);
-	if (err) {
-		err = -EIO;
-		goto err_configure;
-	}
-
-	/* Configure RSS indirection table.
-	 * 128 hash will be configured in the following
-	 * pattern: hash{0,1,2,3} = {Q0,Q2,Q4,Q6} respectively
-	 * and so on
-	 */
-	for (i = 0; i < EDMA_NUM_IDT; i++)
-		edma_write_reg(EDMA_REG_RSS_IDT(i), EDMA_RSS_IDT_VALUE);
-
-	/* Configure load balance mapping table.
-	 * 4 table entry will be configured according to the
-	 * following pattern: load_balance{0,1,2,3} = {Q0,Q1,Q3,Q4}
-	 * respectively.
-	 */
-	edma_write_reg(EDMA_REG_LB_RING, EDMA_LB_REG_VALUE);
-
-	/* Configure Virtual queue for Tx rings
-	 * User can also change this value runtime through
-	 * a sysctl
-	 */
-	edma_write_reg(EDMA_REG_VQ_CTRL0, EDMA_VQ_REG_VALUE);
-	edma_write_reg(EDMA_REG_VQ_CTRL1, EDMA_VQ_REG_VALUE);
-
-	/* Configure Max AXI Burst write size to 128 bytes*/
-	edma_write_reg(EDMA_REG_AXIW_CTRL_MAXWRSIZE,
-		       EDMA_AXIW_MAXWRSIZE_VALUE);
-
-	/* Enable All 16 tx and 8 rx irq mask */
-	edma_irq_enable(edma_cinfo);
-	edma_enable_tx_ctrl(&edma_cinfo->hw);
-	edma_enable_rx_ctrl(&edma_cinfo->hw);
-
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		if (adapter[i]->poll_required) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0)
-			phy_interface_t phy_mode;
-
-			err = of_get_phy_mode(np, &phy_mode);
-			if (err)
-				phy_mode = PHY_INTERFACE_MODE_SGMII;
-#else
-			int phy_mode = of_get_phy_mode(np);
-			if (phy_mode < 0)
-				phy_mode = PHY_INTERFACE_MODE_SGMII;
-#endif
-			adapter[i]->phydev =
-				phy_connect(edma_netdev[i],
-					    (const char *)adapter[i]->phy_id,
-					    &edma_adjust_link,
-					    phy_mode);
-			if (IS_ERR(adapter[i]->phydev)) {
-				dev_dbg(&pdev->dev, "PHY attach FAIL");
-				err = -EIO;
-				goto edma_phy_attach_fail;
-			} else {
-				linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-						 adapter[i]->phydev->advertising);
-				linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-						 adapter[i]->phydev->advertising);
-				linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
-						 adapter[i]->phydev->supported);
-				linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
-						 adapter[i]->phydev->supported);
-			}
-		} else {
-			adapter[i]->phydev = NULL;
-		}
-	}
-
-	spin_lock_init(&edma_cinfo->stats_lock);
-
-	timer_setup(&edma_cinfo->edma_stats_timer, edma_statistics_timer, 0);
-	mod_timer(&edma_cinfo->edma_stats_timer, jiffies + 1*HZ);
-
-	return 0;
-
-edma_phy_attach_fail:
-	miibus = NULL;
-err_configure:
-#ifdef CONFIG_RFS_ACCEL
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		free_irq_cpu_rmap(adapter[i]->netdev->rx_cpu_rmap);
-		adapter[i]->netdev->rx_cpu_rmap = NULL;
-	}
-#endif
-err_rmap_add_fail:
-	edma_free_irqs(adapter[0]);
-	for (i = 0; i < CONFIG_NR_CPUS; i++)
-		napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
-err_reset:
-err_unregister_sysctl_tbl:
-err_rmap_alloc_fail:
-	for (i = 0; i < edma_cinfo->num_gmac; i++)
-		unregister_netdev(edma_netdev[i]);
-err_register:
-err_single_phy_init:
-	iounmap(edma_cinfo->ess_hw_addr);
-	clk_disable_unprepare(edma_cinfo->ess_clk);
-err_mdiobus_init_fail:
-	edma_free_rx_rings(edma_cinfo);
-err_rx_rinit:
-	edma_free_tx_rings(edma_cinfo);
-err_tx_rinit:
-	edma_free_queues(edma_cinfo);
-err_rx_qinit:
-err_tx_qinit:
-	iounmap(edma_cinfo->hw.hw_addr);
-err_ioremap:
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		if (edma_netdev[i])
-			free_netdev(edma_netdev[i]);
-	}
-err_cinfo:
-	kfree(edma_cinfo);
-err_alloc:
-	return err;
-}
-
-/* edma_axi_remove()
- *	Device Removal Routine
- *
- * edma_axi_remove is called by the platform subsystem to alert the driver
- * that it should release a platform device.
- */
-static int edma_axi_remove(struct platform_device *pdev)
-{
-	struct edma_adapter *adapter = netdev_priv(edma_netdev[0]);
-	struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
-	struct edma_hw *hw = &edma_cinfo->hw;
-	int i;
-
-	for (i = 0; i < edma_cinfo->num_gmac; i++)
-		unregister_netdev(edma_netdev[i]);
-
-	edma_stop_rx_tx(hw);
-	for (i = 0; i < CONFIG_NR_CPUS; i++)
-		napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
-
-	edma_irq_disable(edma_cinfo);
-	edma_write_reg(EDMA_REG_RX_ISR, 0xff);
-	edma_write_reg(EDMA_REG_TX_ISR, 0xffff);
-#ifdef CONFIG_RFS_ACCEL
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		free_irq_cpu_rmap(edma_netdev[i]->rx_cpu_rmap);
-		edma_netdev[i]->rx_cpu_rmap = NULL;
-	}
-#endif
-
-	for (i = 0; i < edma_cinfo->num_gmac; i++) {
-		struct edma_adapter *adapter = netdev_priv(edma_netdev[i]);
-
-		if (adapter->phydev)
-			phy_disconnect(adapter->phydev);
-	}
-
-	del_timer_sync(&edma_cinfo->edma_stats_timer);
-	edma_free_irqs(adapter);
-	unregister_net_sysctl_table(edma_cinfo->edma_ctl_table_hdr);
-	iounmap(edma_cinfo->ess_hw_addr);
-	clk_disable_unprepare(edma_cinfo->ess_clk);
-	edma_free_tx_resources(edma_cinfo);
-	edma_free_rx_resources(edma_cinfo);
-	edma_free_tx_rings(edma_cinfo);
-	edma_free_rx_rings(edma_cinfo);
-	edma_free_queues(edma_cinfo);
-	for (i = 0; i < edma_cinfo->num_gmac; i++)
-		free_netdev(edma_netdev[i]);
-
-	kfree(edma_cinfo);
-
-	return 0;
-}
-
-static const struct of_device_id edma_of_mtable[] = {
-	{.compatible = "qcom,ess-edma" },
-	{}
-};
-MODULE_DEVICE_TABLE(of, edma_of_mtable);
-
-static struct platform_driver edma_axi_driver = {
-	.driver = {
-		.name    = edma_axi_driver_name,
-		.of_match_table = edma_of_mtable,
-	},
-	.probe    = edma_axi_probe,
-	.remove   = edma_axi_remove,
-};
-
-module_platform_driver(edma_axi_driver);
-
-MODULE_AUTHOR("Qualcomm Atheros Inc");
-MODULE_DESCRIPTION("QCA ESS EDMA driver");
-MODULE_LICENSE("GPL");
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
deleted file mode 100644
index 65706cfae1..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/*
- * Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/ethtool.h>
-#include <linux/netdevice.h>
-#include <linux/string.h>
-#include <linux/version.h>
-#include "edma.h"
-
-struct edma_ethtool_stats {
-	uint8_t stat_string[ETH_GSTRING_LEN];
-	uint32_t stat_offset;
-};
-
-#define EDMA_STAT(m)    offsetof(struct edma_ethtool_statistics, m)
-#define DRVINFO_LEN	32
-
-/* Array of strings describing statistics
- */
-static const struct edma_ethtool_stats edma_gstrings_stats[] = {
-	{"tx_q0_pkt", EDMA_STAT(tx_q0_pkt)},
-	{"tx_q1_pkt", EDMA_STAT(tx_q1_pkt)},
-	{"tx_q2_pkt", EDMA_STAT(tx_q2_pkt)},
-	{"tx_q3_pkt", EDMA_STAT(tx_q3_pkt)},
-	{"tx_q4_pkt", EDMA_STAT(tx_q4_pkt)},
-	{"tx_q5_pkt", EDMA_STAT(tx_q5_pkt)},
-	{"tx_q6_pkt", EDMA_STAT(tx_q6_pkt)},
-	{"tx_q7_pkt", EDMA_STAT(tx_q7_pkt)},
-	{"tx_q8_pkt", EDMA_STAT(tx_q8_pkt)},
-	{"tx_q9_pkt", EDMA_STAT(tx_q9_pkt)},
-	{"tx_q10_pkt", EDMA_STAT(tx_q10_pkt)},
-	{"tx_q11_pkt", EDMA_STAT(tx_q11_pkt)},
-	{"tx_q12_pkt", EDMA_STAT(tx_q12_pkt)},
-	{"tx_q13_pkt", EDMA_STAT(tx_q13_pkt)},
-	{"tx_q14_pkt", EDMA_STAT(tx_q14_pkt)},
-	{"tx_q15_pkt", EDMA_STAT(tx_q15_pkt)},
-	{"tx_q0_byte", EDMA_STAT(tx_q0_byte)},
-	{"tx_q1_byte", EDMA_STAT(tx_q1_byte)},
-	{"tx_q2_byte", EDMA_STAT(tx_q2_byte)},
-	{"tx_q3_byte", EDMA_STAT(tx_q3_byte)},
-	{"tx_q4_byte", EDMA_STAT(tx_q4_byte)},
-	{"tx_q5_byte", EDMA_STAT(tx_q5_byte)},
-	{"tx_q6_byte", EDMA_STAT(tx_q6_byte)},
-	{"tx_q7_byte", EDMA_STAT(tx_q7_byte)},
-	{"tx_q8_byte", EDMA_STAT(tx_q8_byte)},
-	{"tx_q9_byte", EDMA_STAT(tx_q9_byte)},
-	{"tx_q10_byte", EDMA_STAT(tx_q10_byte)},
-	{"tx_q11_byte", EDMA_STAT(tx_q11_byte)},
-	{"tx_q12_byte", EDMA_STAT(tx_q12_byte)},
-	{"tx_q13_byte", EDMA_STAT(tx_q13_byte)},
-	{"tx_q14_byte", EDMA_STAT(tx_q14_byte)},
-	{"tx_q15_byte", EDMA_STAT(tx_q15_byte)},
-	{"rx_q0_pkt", EDMA_STAT(rx_q0_pkt)},
-	{"rx_q1_pkt", EDMA_STAT(rx_q1_pkt)},
-	{"rx_q2_pkt", EDMA_STAT(rx_q2_pkt)},
-	{"rx_q3_pkt", EDMA_STAT(rx_q3_pkt)},
-	{"rx_q4_pkt", EDMA_STAT(rx_q4_pkt)},
-	{"rx_q5_pkt", EDMA_STAT(rx_q5_pkt)},
-	{"rx_q6_pkt", EDMA_STAT(rx_q6_pkt)},
-	{"rx_q7_pkt", EDMA_STAT(rx_q7_pkt)},
-	{"rx_q0_byte", EDMA_STAT(rx_q0_byte)},
-	{"rx_q1_byte", EDMA_STAT(rx_q1_byte)},
-	{"rx_q2_byte", EDMA_STAT(rx_q2_byte)},
-	{"rx_q3_byte", EDMA_STAT(rx_q3_byte)},
-	{"rx_q4_byte", EDMA_STAT(rx_q4_byte)},
-	{"rx_q5_byte", EDMA_STAT(rx_q5_byte)},
-	{"rx_q6_byte", EDMA_STAT(rx_q6_byte)},
-	{"rx_q7_byte", EDMA_STAT(rx_q7_byte)},
-	{"tx_desc_error", EDMA_STAT(tx_desc_error)},
-	{"rx_alloc_fail_ctr", EDMA_STAT(rx_alloc_fail_ctr)},
-};
-
-#define EDMA_STATS_LEN ARRAY_SIZE(edma_gstrings_stats)
-
-/* edma_get_strset_count()
- *	Get strset count
- */
-static int edma_get_strset_count(struct net_device *netdev,
-				 int sset)
-{
-	switch (sset) {
-	case ETH_SS_STATS:
-		return EDMA_STATS_LEN;
-	default:
-		netdev_dbg(netdev, "%s: Invalid string set", __func__);
-		return -EOPNOTSUPP;
-	}
-}
-
-
-/* edma_get_strings()
- *	get stats string
- */
-static void edma_get_strings(struct net_device *netdev, uint32_t stringset,
-			     uint8_t *data)
-{
-	uint8_t *p = data;
-	uint32_t i;
-
-	switch (stringset) {
-	case ETH_SS_STATS:
-		for (i = 0; i < EDMA_STATS_LEN; i++) {
-			memcpy(p, edma_gstrings_stats[i].stat_string,
-				min((size_t)ETH_GSTRING_LEN,
-				    strlen(edma_gstrings_stats[i].stat_string)
-				    + 1));
-			p += ETH_GSTRING_LEN;
-		}
-		break;
-	}
-}
-
-/* edma_get_ethtool_stats()
- *	Get ethtool statistics
- */
-static void edma_get_ethtool_stats(struct net_device *netdev,
-				   struct ethtool_stats *stats, uint64_t *data)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-	struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
-	int i;
-	uint8_t *p = NULL;
-
-	edma_read_append_stats(edma_cinfo);
-
-	for(i = 0; i < EDMA_STATS_LEN; i++) {
-		p = (uint8_t *)&(edma_cinfo->edma_ethstats) +
-			edma_gstrings_stats[i].stat_offset;
-		data[i] = *(uint32_t *)p;
-	}
-}
-
-/* edma_get_drvinfo()
- *	get edma driver info
- */
-static void edma_get_drvinfo(struct net_device *dev,
-			     struct ethtool_drvinfo *info)
-{
-	strlcpy(info->driver, "ess_edma", DRVINFO_LEN);
-	strlcpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN);
-}
-
-/* edma_nway_reset()
- *	Reset the phy, if available.
- */
-static int edma_nway_reset(struct net_device *netdev)
-{
-	return -EINVAL;
-}
-
-/* edma_get_wol()
- *	get wake on lan info
- */
-static void edma_get_wol(struct net_device *netdev,
-			 struct ethtool_wolinfo *wol)
-{
-	wol->supported = 0;
-	wol->wolopts = 0;
-}
-
-/* edma_get_msglevel()
- *	get message level.
- */
-static uint32_t edma_get_msglevel(struct net_device *netdev)
-{
-	return 0;
-}
-
-/* edma_get_settings()
- *	Get edma settings
- */
-static int edma_get_settings(struct net_device *netdev,
-			     struct ethtool_link_ksettings *cmd)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	if (adapter->poll_required) {
-		if ((adapter->forced_speed != SPEED_UNKNOWN)
-			&& !(adapter->poll_required))
-			return -EPERM;
-
-		phy_ethtool_ksettings_get(adapter->phydev, cmd);
-		if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, adapter->phydev->advertising))
-			cmd->base.port = PORT_FIBRE;
-		else
-			cmd->base.port = PORT_TP;
-	} else {
-		/* If the speed/duplex for this GMAC is forced and we
-		 * are not polling for link state changes, return the
-		 * values as specified by platform. This will be true
-		 * for GMACs connected to switch, and interfaces that
-		 * do not use a PHY.
-		 */
-		if (!(adapter->poll_required)) {
-			if (adapter->forced_speed != SPEED_UNKNOWN) {
-				/* set speed and duplex */
-				cmd->base.speed = SPEED_1000;
-				cmd->base.duplex = DUPLEX_FULL;
-
-				/* Populate capabilities advertised by self */
-				linkmode_zero(cmd->link_modes.advertising);
-				cmd->base.autoneg = 0;
-				cmd->base.port = PORT_TP;
-				cmd->base.transceiver = XCVR_EXTERNAL;
-			} else {
-				/* non link polled and non
-				 * forced speed/duplex interface
-				 */
-				return -EIO;
-			}
-		}
-	}
-
-	return 0;
-}
-
-/* edma_set_settings()
- *	Set EDMA settings
- */
-static int edma_set_settings(struct net_device *netdev,
-			    const struct ethtool_link_ksettings *cmd)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-
-	if ((adapter->forced_speed != SPEED_UNKNOWN) &&
-	     !adapter->poll_required)
-		return -EPERM;
-
-	return phy_ethtool_ksettings_set(adapter->phydev, cmd);
-}
-
-/* edma_get_coalesce
- *	get interrupt mitigation
- */
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
-static int edma_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
-			     struct kernel_ethtool_coalesce *kernel_coal,
-			     struct netlink_ext_ack *extack)
-#else
-static int edma_get_coalesce(struct net_device *netdev,
-			     struct ethtool_coalesce *ec)
-#endif
-{
-	u32 reg_val;
-
-	edma_get_tx_rx_coalesce(&reg_val);
-
-	/* We read the Interrupt Moderation Timer(IMT) register value,
-	 * use lower 16 bit for rx and higher 16 bit for Tx. We do a
-	 * left shift by 1, because IMT resolution timer is 2usecs.
-	 * Hence the value given by the register is multiplied by 2 to
-	 * get the actual time in usecs.
-	 */
-	ec->tx_coalesce_usecs = (((reg_val >> 16) & 0xffff) << 1);
-	ec->rx_coalesce_usecs = ((reg_val & 0xffff) << 1);
-
-	return 0;
-}
-
-/* edma_set_coalesce
- *	set interrupt mitigation
- */
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
-static int edma_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
-			     struct kernel_ethtool_coalesce *kernel_coal,
-			     struct netlink_ext_ack *extack)
-#else
-static int edma_set_coalesce(struct net_device *netdev,
-			     struct ethtool_coalesce *ec)
-#endif
-{
-	if (ec->tx_coalesce_usecs)
-		edma_change_tx_coalesce(ec->tx_coalesce_usecs);
-	if (ec->rx_coalesce_usecs)
-		edma_change_rx_coalesce(ec->rx_coalesce_usecs);
-
-	return 0;
-}
-
-/* edma_set_priv_flags()
- *	Set EDMA private flags
- */
-static int edma_set_priv_flags(struct net_device *netdev, u32 flags)
-{
-	return 0;
-}
-
-/* edma_get_priv_flags()
- *	get edma driver flags
- */
-static u32 edma_get_priv_flags(struct net_device *netdev)
-{
-	return 0;
-}
-
-/* edma_get_ringparam()
- *	get ring size
- */
-static void edma_get_ringparam(struct net_device *netdev,
-			       struct ethtool_ringparam *ring)
-{
-	struct edma_adapter *adapter = netdev_priv(netdev);
-	struct edma_common_info *edma_cinfo = adapter->edma_cinfo;
-
-	ring->tx_max_pending = edma_cinfo->tx_ring_count;
-	ring->rx_max_pending = edma_cinfo->rx_ring_count;
-}
-
-/* Ethtool operations
- */
-static const struct ethtool_ops edma_ethtool_ops = {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,7,0)
-	.supported_coalesce_params = ETHTOOL_COALESCE_USECS,
-#endif
-	.get_drvinfo = &edma_get_drvinfo,
-	.get_link = &ethtool_op_get_link,
-	.get_msglevel = &edma_get_msglevel,
-	.nway_reset = &edma_nway_reset,
-	.get_wol = &edma_get_wol,
-	.get_link_ksettings = &edma_get_settings,
-	.set_link_ksettings = &edma_set_settings,
-	.get_strings = &edma_get_strings,
-	.get_sset_count = &edma_get_strset_count,
-	.get_ethtool_stats = &edma_get_ethtool_stats,
-	.get_coalesce = &edma_get_coalesce,
-	.set_coalesce = &edma_set_coalesce,
-	.get_priv_flags = edma_get_priv_flags,
-	.set_priv_flags = edma_set_priv_flags,
-	.get_ringparam = edma_get_ringparam,
-};
-
-/* edma_set_ethtool_ops
- *	Set ethtool operations
- */
-void edma_set_ethtool_ops(struct net_device *netdev)
-{
-	netdev->ethtool_ops = &edma_ethtool_ops;
-}
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/ess_edma.h b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/ess_edma.h
deleted file mode 100644
index 021be98a38..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/ess_edma.h
+++ /dev/null
@@ -1,389 +0,0 @@
-/*
- * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _ESS_EDMA_H_
-#define _ESS_EDMA_H_
-
-#include <linux/types.h>
-
-struct edma_adapter;
-struct edma_hw;
-
-/* register definition */
-#define EDMA_REG_MAS_CTRL 0x0
-#define EDMA_REG_TIMEOUT_CTRL 0x004
-#define EDMA_REG_DBG0 0x008
-#define EDMA_REG_DBG1 0x00C
-#define EDMA_REG_SW_CTRL0 0x100
-#define EDMA_REG_SW_CTRL1 0x104
-
-/* Interrupt Status Register */
-#define EDMA_REG_RX_ISR 0x200
-#define EDMA_REG_TX_ISR 0x208
-#define EDMA_REG_MISC_ISR 0x210
-#define EDMA_REG_WOL_ISR 0x218
-
-#define EDMA_MISC_ISR_RX_URG_Q(x) (1 << x)
-
-#define EDMA_MISC_ISR_AXIR_TIMEOUT 0x00000100
-#define EDMA_MISC_ISR_AXIR_ERR 0x00000200
-#define EDMA_MISC_ISR_TXF_DEAD 0x00000400
-#define EDMA_MISC_ISR_AXIW_ERR 0x00000800
-#define EDMA_MISC_ISR_AXIW_TIMEOUT 0x00001000
-
-#define EDMA_WOL_ISR 0x00000001
-
-/* Interrupt Mask Register */
-#define EDMA_REG_MISC_IMR 0x214
-#define EDMA_REG_WOL_IMR 0x218
-
-#define EDMA_RX_IMR_NORMAL_MASK 0x1
-#define EDMA_TX_IMR_NORMAL_MASK 0x1
-#define EDMA_MISC_IMR_NORMAL_MASK 0x80001FFF
-#define EDMA_WOL_IMR_NORMAL_MASK 0x1
-
-/* Edma receive consumer index */
-#define EDMA_REG_RX_SW_CONS_IDX_Q(x) (0x220 + ((x) << 2)) /* x is the queue id */
-/* Edma transmit consumer index */
-#define EDMA_REG_TX_SW_CONS_IDX_Q(x) (0x240 + ((x) << 2)) /* x is the queue id */
-
-/* IRQ Moderator Initial Timer Register */
-#define EDMA_REG_IRQ_MODRT_TIMER_INIT 0x280
-#define EDMA_IRQ_MODRT_TIMER_MASK 0xFFFF
-#define EDMA_IRQ_MODRT_RX_TIMER_SHIFT 0
-#define EDMA_IRQ_MODRT_TX_TIMER_SHIFT 16
-
-/* Interrupt Control Register */
-#define EDMA_REG_INTR_CTRL 0x284
-#define EDMA_INTR_CLR_TYP_SHIFT 0
-#define EDMA_INTR_SW_IDX_W_TYP_SHIFT 1
-#define EDMA_INTR_CLEAR_TYPE_W1 0
-#define EDMA_INTR_CLEAR_TYPE_R 1
-
-/* RX Interrupt Mask Register */
-#define EDMA_REG_RX_INT_MASK_Q(x) (0x300 + ((x) << 2)) /* x = queue id */
-
-/* TX Interrupt mask register */
-#define EDMA_REG_TX_INT_MASK_Q(x) (0x340 + ((x) << 2)) /* x = queue id */
-
-/* Load Ptr Register
- * Software sets this bit after the initialization of the head and tail
- */
-#define EDMA_REG_TX_SRAM_PART 0x400
-#define EDMA_LOAD_PTR_SHIFT 16
-
-/* TXQ Control Register */
-#define EDMA_REG_TXQ_CTRL 0x404
-#define EDMA_TXQ_CTRL_IP_OPTION_EN 0x10
-#define EDMA_TXQ_CTRL_TXQ_EN 0x20
-#define EDMA_TXQ_CTRL_ENH_MODE 0x40
-#define EDMA_TXQ_CTRL_LS_8023_EN 0x80
-#define EDMA_TXQ_CTRL_TPD_BURST_EN 0x100
-#define EDMA_TXQ_CTRL_LSO_BREAK_EN 0x200
-#define EDMA_TXQ_NUM_TPD_BURST_MASK 0xF
-#define EDMA_TXQ_TXF_BURST_NUM_MASK 0xFFFF
-#define EDMA_TXQ_NUM_TPD_BURST_SHIFT 0
-#define EDMA_TXQ_TXF_BURST_NUM_SHIFT 16
-
-#define	EDMA_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */
-#define EDMA_TXF_WATER_MARK_MASK 0x0FFF
-#define EDMA_TXF_LOW_WATER_MARK_SHIFT 0
-#define EDMA_TXF_HIGH_WATER_MARK_SHIFT 16
-#define EDMA_TXQ_CTRL_BURST_MODE_EN 0x80000000
-
-/* WRR Control Register */
-#define EDMA_REG_WRR_CTRL_Q0_Q3 0x40c
-#define EDMA_REG_WRR_CTRL_Q4_Q7 0x410
-#define EDMA_REG_WRR_CTRL_Q8_Q11 0x414
-#define EDMA_REG_WRR_CTRL_Q12_Q15 0x418
-
-/* Weight round robin(WRR), it takes queue as input, and computes
- * starting bits where we need to write the weight for a particular
- * queue
- */
-#define EDMA_WRR_SHIFT(x) (((x) * 5) % 20)
-
-/* Tx Descriptor Control Register */
-#define EDMA_REG_TPD_RING_SIZE 0x41C
-#define EDMA_TPD_RING_SIZE_SHIFT 0
-#define EDMA_TPD_RING_SIZE_MASK 0xFFFF
-
-/* Transmit descriptor base address */
-#define EDMA_REG_TPD_BASE_ADDR_Q(x) (0x420 + ((x) << 2)) /* x = queue id */
-
-/* TPD Index Register */
-#define EDMA_REG_TPD_IDX_Q(x) (0x460 + ((x) << 2)) /* x = queue id */
-
-#define EDMA_TPD_PROD_IDX_BITS 0x0000FFFF
-#define EDMA_TPD_CONS_IDX_BITS 0xFFFF0000
-#define EDMA_TPD_PROD_IDX_MASK 0xFFFF
-#define EDMA_TPD_CONS_IDX_MASK 0xFFFF
-#define EDMA_TPD_PROD_IDX_SHIFT 0
-#define EDMA_TPD_CONS_IDX_SHIFT 16
-
-/* TX Virtual Queue Mapping Control Register */
-#define EDMA_REG_VQ_CTRL0 0x4A0
-#define EDMA_REG_VQ_CTRL1 0x4A4
-
-/* Virtual QID shift, it takes queue as input, and computes
- * Virtual QID position in virtual qid control register
- */
-#define EDMA_VQ_ID_SHIFT(i) (((i) * 3) % 24)
-
-/* Virtual Queue Default Value */
-#define EDMA_VQ_REG_VALUE 0x240240
-
-/* Tx side Port Interface Control Register */
-#define EDMA_REG_PORT_CTRL 0x4A8
-#define EDMA_PAD_EN_SHIFT 15
-
-/* Tx side VLAN Configuration Register */
-#define EDMA_REG_VLAN_CFG 0x4AC
-
-#define EDMA_TX_CVLAN 16
-#define EDMA_TX_INS_CVLAN 17
-#define EDMA_TX_CVLAN_TAG_SHIFT 0
-
-#define EDMA_TX_SVLAN 14
-#define EDMA_TX_INS_SVLAN 15
-#define EDMA_TX_SVLAN_TAG_SHIFT 16
-
-/* Tx Queue Packet Statistic Register */
-#define EDMA_REG_TX_STAT_PKT_Q(x) (0x700 + ((x) << 3)) /* x = queue id */
-
-#define EDMA_TX_STAT_PKT_MASK 0xFFFFFF
-
-/* Tx Queue Byte Statistic Register */
-#define EDMA_REG_TX_STAT_BYTE_Q(x) (0x704 + ((x) << 3)) /* x = queue id */
-
-/* Load Balance Based Ring Offset Register */
-#define EDMA_REG_LB_RING 0x800
-#define EDMA_LB_RING_ENTRY_MASK 0xff
-#define EDMA_LB_RING_ID_MASK 0x7
-#define EDMA_LB_RING_PROFILE_ID_MASK 0x3
-#define EDMA_LB_RING_ENTRY_BIT_OFFSET 8
-#define EDMA_LB_RING_ID_OFFSET 0
-#define EDMA_LB_RING_PROFILE_ID_OFFSET 3
-#define EDMA_LB_REG_VALUE 0x6040200
-
-/* Load Balance Priority Mapping Register */
-#define EDMA_REG_LB_PRI_START 0x804
-#define EDMA_REG_LB_PRI_END 0x810
-#define EDMA_LB_PRI_REG_INC 4
-#define EDMA_LB_PRI_ENTRY_BIT_OFFSET 4
-#define EDMA_LB_PRI_ENTRY_MASK 0xf
-
-/* RSS Priority Mapping Register */
-#define EDMA_REG_RSS_PRI 0x820
-#define EDMA_RSS_PRI_ENTRY_MASK 0xf
-#define EDMA_RSS_RING_ID_MASK 0x7
-#define EDMA_RSS_PRI_ENTRY_BIT_OFFSET 4
-
-/* RSS Indirection Register */
-#define EDMA_REG_RSS_IDT(x) (0x840 + ((x) << 2)) /* x = No. of indirection table */
-#define EDMA_NUM_IDT 16
-#define EDMA_RSS_IDT_VALUE 0x64206420
-
-/* Default RSS Ring Register */
-#define EDMA_REG_DEF_RSS 0x890
-#define EDMA_DEF_RSS_MASK 0x7
-
-/* RSS Hash Function Type Register */
-#define EDMA_REG_RSS_TYPE 0x894
-#define EDMA_RSS_TYPE_NONE 0x01
-#define EDMA_RSS_TYPE_IPV4TCP 0x02
-#define EDMA_RSS_TYPE_IPV6_TCP 0x04
-#define EDMA_RSS_TYPE_IPV4_UDP 0x08
-#define EDMA_RSS_TYPE_IPV6UDP 0x10
-#define EDMA_RSS_TYPE_IPV4 0x20
-#define EDMA_RSS_TYPE_IPV6 0x40
-#define EDMA_RSS_HASH_MODE_MASK 0x7f
-
-#define EDMA_REG_RSS_HASH_VALUE 0x8C0
-
-#define EDMA_REG_RSS_TYPE_RESULT 0x8C4
-
-#define EDMA_HASH_TYPE_START 0
-#define EDMA_HASH_TYPE_END 5
-#define EDMA_HASH_TYPE_SHIFT 12
-
-#define EDMA_RFS_FLOW_ENTRIES 1024
-#define EDMA_RFS_FLOW_ENTRIES_MASK (EDMA_RFS_FLOW_ENTRIES - 1)
-#define EDMA_RFS_EXPIRE_COUNT_PER_CALL 128
-
-/* RFD Base Address Register */
-#define EDMA_REG_RFD_BASE_ADDR_Q(x) (0x950 + ((x) << 2)) /* x = queue id */
-
-/* RFD Index Register */
-#define EDMA_REG_RFD_IDX_Q(x) (0x9B0 + ((x) << 2))
-
-#define EDMA_RFD_PROD_IDX_BITS 0x00000FFF
-#define EDMA_RFD_CONS_IDX_BITS 0x0FFF0000
-#define EDMA_RFD_PROD_IDX_MASK 0xFFF
-#define EDMA_RFD_CONS_IDX_MASK 0xFFF
-#define EDMA_RFD_PROD_IDX_SHIFT 0
-#define EDMA_RFD_CONS_IDX_SHIFT 16
-
-/* Rx Descriptor Control Register */
-#define EDMA_REG_RX_DESC0 0xA10
-#define EDMA_RFD_RING_SIZE_MASK 0xFFF
-#define EDMA_RX_BUF_SIZE_MASK 0xFFFF
-#define EDMA_RFD_RING_SIZE_SHIFT 0
-#define EDMA_RX_BUF_SIZE_SHIFT 16
-
-#define EDMA_REG_RX_DESC1 0xA14
-#define EDMA_RXQ_RFD_BURST_NUM_MASK 0x3F
-#define EDMA_RXQ_RFD_PF_THRESH_MASK 0x1F
-#define EDMA_RXQ_RFD_LOW_THRESH_MASK 0xFFF
-#define EDMA_RXQ_RFD_BURST_NUM_SHIFT 0
-#define EDMA_RXQ_RFD_PF_THRESH_SHIFT 8
-#define EDMA_RXQ_RFD_LOW_THRESH_SHIFT 16
-
-/* RXQ Control Register */
-#define EDMA_REG_RXQ_CTRL 0xA18
-#define EDMA_FIFO_THRESH_TYPE_SHIF 0
-#define EDMA_FIFO_THRESH_128_BYTE 0x0
-#define EDMA_FIFO_THRESH_64_BYTE 0x1
-#define EDMA_RXQ_CTRL_RMV_VLAN 0x00000002
-#define EDMA_RXQ_CTRL_EN 0x0000FF00
-
-/* AXI Burst Size Config */
-#define EDMA_REG_AXIW_CTRL_MAXWRSIZE 0xA1C
-#define EDMA_AXIW_MAXWRSIZE_VALUE 0x0
-
-/* Rx Statistics Register */
-#define EDMA_REG_RX_STAT_BYTE_Q(x) (0xA30 + ((x) << 2)) /* x = queue id */
-#define EDMA_REG_RX_STAT_PKT_Q(x) (0xA50 + ((x) << 2)) /* x = queue id */
-
-/* WoL Pattern Length Register */
-#define EDMA_REG_WOL_PATTERN_LEN0 0xC00
-#define EDMA_WOL_PT_LEN_MASK 0xFF
-#define EDMA_WOL_PT0_LEN_SHIFT 0
-#define EDMA_WOL_PT1_LEN_SHIFT 8
-#define EDMA_WOL_PT2_LEN_SHIFT 16
-#define EDMA_WOL_PT3_LEN_SHIFT 24
-
-#define EDMA_REG_WOL_PATTERN_LEN1 0xC04
-#define EDMA_WOL_PT4_LEN_SHIFT 0
-#define EDMA_WOL_PT5_LEN_SHIFT 8
-#define EDMA_WOL_PT6_LEN_SHIFT 16
-
-/* WoL Control Register */
-#define EDMA_REG_WOL_CTRL 0xC08
-#define EDMA_WOL_WK_EN 0x00000001
-#define EDMA_WOL_MG_EN 0x00000002
-#define EDMA_WOL_PT0_EN 0x00000004
-#define EDMA_WOL_PT1_EN 0x00000008
-#define EDMA_WOL_PT2_EN 0x00000010
-#define EDMA_WOL_PT3_EN 0x00000020
-#define EDMA_WOL_PT4_EN 0x00000040
-#define EDMA_WOL_PT5_EN 0x00000080
-#define EDMA_WOL_PT6_EN 0x00000100
-
-/* MAC Control Register */
-#define EDMA_REG_MAC_CTRL0 0xC20
-#define EDMA_REG_MAC_CTRL1 0xC24
-
-/* WoL Pattern Register */
-#define EDMA_REG_WOL_PATTERN_START 0x5000
-#define EDMA_PATTERN_PART_REG_OFFSET 0x40
-
-
-/* TX descriptor fields */
-#define EDMA_TPD_HDR_SHIFT 0
-#define EDMA_TPD_PPPOE_EN 0x00000100
-#define EDMA_TPD_IP_CSUM_EN 0x00000200
-#define EDMA_TPD_TCP_CSUM_EN 0x0000400
-#define EDMA_TPD_UDP_CSUM_EN 0x00000800
-#define EDMA_TPD_CUSTOM_CSUM_EN 0x00000C00
-#define EDMA_TPD_LSO_EN 0x00001000
-#define EDMA_TPD_LSO_V2_EN 0x00002000
-#define EDMA_TPD_IPV4_EN 0x00010000
-#define EDMA_TPD_MSS_MASK 0x1FFF
-#define EDMA_TPD_MSS_SHIFT 18
-#define EDMA_TPD_CUSTOM_CSUM_SHIFT 18
-
-/* RRD descriptor fields */
-#define EDMA_RRD_NUM_RFD_MASK 0x000F
-#define EDMA_RRD_SVLAN 0x8000
-#define EDMA_RRD_FLOW_COOKIE_MASK 0x07FF;
-
-#define EDMA_RRD_PKT_SIZE_MASK 0x3FFF
-#define EDMA_RRD_CSUM_FAIL_MASK 0xC000
-#define EDMA_RRD_CVLAN 0x0001
-#define EDMA_RRD_DESC_VALID 0x8000
-
-#define EDMA_RRD_PRIORITY_SHIFT 4
-#define EDMA_RRD_PRIORITY_MASK 0x7
-#define EDMA_RRD_PORT_TYPE_SHIFT 7
-#define EDMA_RRD_PORT_TYPE_MASK 0x1F
-
-#define ESS_RGMII_CTRL		0x0004
-
-/* Port status registers */
-#define ESS_PORT0_STATUS	0x007C
-#define ESS_PORT1_STATUS	0x0080
-#define ESS_PORT2_STATUS	0x0084
-#define ESS_PORT3_STATUS	0x0088
-#define ESS_PORT4_STATUS	0x008C
-#define ESS_PORT5_STATUS	0x0090
-
-#define ESS_PORT_STATUS_HDX_FLOW_CTL	0x80
-#define ESS_PORT_STATUS_DUPLEX_MODE	0x40
-#define ESS_PORT_STATUS_RX_FLOW_EN	0x20
-#define ESS_PORT_STATUS_TX_FLOW_EN	0x10
-#define ESS_PORT_STATUS_RX_MAC_EN	0x08
-#define ESS_PORT_STATUS_TX_MAC_EN	0x04
-#define ESS_PORT_STATUS_SPEED_INV	0x03
-#define ESS_PORT_STATUS_SPEED_1000	0x02
-#define ESS_PORT_STATUS_SPEED_100	0x01
-#define ESS_PORT_STATUS_SPEED_10	0x00
-
-#define ESS_PORT_1G_FDX      (ESS_PORT_STATUS_DUPLEX_MODE | ESS_PORT_STATUS_RX_FLOW_EN | \
-			       ESS_PORT_STATUS_TX_FLOW_EN  | ESS_PORT_STATUS_RX_MAC_EN  | \
-			       ESS_PORT_STATUS_TX_MAC_EN   | ESS_PORT_STATUS_SPEED_1000)
-
-#define PHY_STATUS_REG			0x11
-#define PHY_STATUS_SPEED		0xC000
-#define PHY_STATUS_SPEED_SHIFT		14
-#define PHY_STATUS_DUPLEX		0x2000
-#define PHY_STATUS_DUPLEX_SHIFT	13
-#define PHY_STATUS_SPEED_DUPLEX_RESOLVED 0x0800
-#define PHY_STATUS_CARRIER		0x0400
-#define PHY_STATUS_CARRIER_SHIFT	10
-
-/* Port lookup control registers */
-#define ESS_PORT0_LOOKUP_CTRL	0x0660
-#define ESS_PORT1_LOOKUP_CTRL	0x066C
-#define ESS_PORT2_LOOKUP_CTRL	0x0678
-#define ESS_PORT3_LOOKUP_CTRL	0x0684
-#define ESS_PORT4_LOOKUP_CTRL	0x0690
-#define ESS_PORT5_LOOKUP_CTRL	0x069C
-
-#define ESS_PORT0_HEADER_CTRL	0x009C
-
-#define ESS_PORTS_ALL		0x3f
-
-#define ESS_FWD_CTRL1		0x0624
-#define   ESS_FWD_CTRL1_UC_FLOOD		BITS(0, 7)
-#define   ESS_FWD_CTRL1_UC_FLOOD_S		0
-#define   ESS_FWD_CTRL1_MC_FLOOD		BITS(8, 7)
-#define   ESS_FWD_CTRL1_MC_FLOOD_S		8
-#define   ESS_FWD_CTRL1_BC_FLOOD		BITS(16, 7)
-#define   ESS_FWD_CTRL1_BC_FLOOD_S		16
-#define   ESS_FWD_CTRL1_IGMP			BITS(24, 7)
-#define   ESS_FWD_CTRL1_IGMP_S			24
-
-#endif /* _ESS_EDMA_H_ */
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile
new file mode 100644
index 0000000000..4f2db7283e
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Makefile for the IPQ ESS driver
+#
+
+obj-$(CONFIG_QCOM_IPQ4019_ESS_EDMA) += ipq_ess.o
+
+ipq_ess-objs := ipqess.o ipqess_ethtool.o
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
new file mode 100644
index 0000000000..ee33bb0166
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
@@ -0,0 +1,1336 @@
+// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+/* Copyright (c) 2014 - 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+ * Copyright (c) 2018 - 2019, Christian Lamparter <chunkeey@gmail.com>
+ * Copyright (c) 2020 - 2021, Gabor Juhos <j4g8y7@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/clk.h>
+#include <linux/dsa/ipq4019.h>
+#include <linux/if_vlan.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_mdio.h>
+#include <linux/of_net.h>
+#include <linux/phylink.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/skbuff.h>
+#include <linux/vmalloc.h>
+#include <net/checksum.h>
+#include <net/dsa.h>
+#include <net/ip6_checksum.h>
+
+#include "ipqess.h"
+
+#define IPQESS_RRD_SIZE		16
+#define IPQESS_NEXT_IDX(X, Y)  (((X) + 1) & ((Y) - 1))
+#define IPQESS_TX_DMA_BUF_LEN	0x3fff
+
+static void ipqess_w32(struct ipqess *ess, u32 reg, u32 val)
+{
+	writel(val, ess->hw_addr + reg);
+}
+
+static u32 ipqess_r32(struct ipqess *ess, u16 reg)
+{
+	return readl(ess->hw_addr + reg);
+}
+
+static void ipqess_m32(struct ipqess *ess, u32 mask, u32 val, u16 reg)
+{
+	u32 _val = ipqess_r32(ess, reg);
+	_val &= ~mask;
+	_val |= val;
+	ipqess_w32(ess, reg, _val);
+}
+
+void ipqess_update_hw_stats(struct ipqess *ess)
+{
+	uint32_t *p;
+	u32 stat;
+	int i;
+
+	lockdep_assert_held(&ess->stats_lock);
+
+	p = (uint32_t *)&(ess->ipqessstats);
+	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+		stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_PKT_Q(i));
+		*p += stat;
+		p++;
+	}
+
+	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+		stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_BYTE_Q(i));
+		*p += stat;
+		p++;
+	}
+
+	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+		stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_PKT_Q(i));
+		*p += stat;
+		p++;
+	}
+
+	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+		stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_BYTE_Q(i));
+		*p += stat;
+		p++;
+	}
+}
+
+static int ipqess_tx_ring_alloc(struct ipqess *ess)
+{
+	struct device *dev = &ess->pdev->dev;
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		struct ipqess_tx_ring *tx_ring = &ess->tx_ring[i];
+		size_t size;
+		u32 idx;
+
+		tx_ring->ess = ess;
+		tx_ring->ring_id = i;
+		tx_ring->idx = i * 4;
+		tx_ring->count = IPQESS_TX_RING_SIZE;
+		tx_ring->nq = netdev_get_tx_queue(ess->netdev, i);
+
+		size = sizeof(struct ipqess_buf) * IPQESS_TX_RING_SIZE;
+		tx_ring->buf = devm_kzalloc(dev, size, GFP_KERNEL);
+		if (!tx_ring->buf) {
+			netdev_err(ess->netdev, "buffer alloc of tx ring failed");
+			return -ENOMEM;
+		}
+
+		size = sizeof(struct ipqess_tx_desc) * IPQESS_TX_RING_SIZE;
+		tx_ring->hw_desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
+						       GFP_KERNEL | __GFP_ZERO);
+		if (!tx_ring->hw_desc) {
+			netdev_err(ess->netdev, "descriptor allocation for tx ring failed");
+			return -ENOMEM;
+		}
+
+		ipqess_w32(ess, IPQESS_REG_TPD_BASE_ADDR_Q(tx_ring->idx),
+			 (u32)tx_ring->dma);
+
+		idx = ipqess_r32(ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+		idx >>= IPQESS_TPD_CONS_IDX_SHIFT; /* need u32 here */
+		idx &= 0xffff;
+		tx_ring->head = tx_ring->tail = idx;
+
+		ipqess_m32(ess, IPQESS_TPD_PROD_IDX_MASK << IPQESS_TPD_PROD_IDX_SHIFT,
+			 idx, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+		ipqess_w32(ess, IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx), idx);
+		ipqess_w32(ess, IPQESS_REG_TPD_RING_SIZE, IPQESS_TX_RING_SIZE);
+	}
+
+	return 0;
+}
+
+static int ipqess_tx_unmap_and_free(struct device *dev, struct ipqess_buf *buf)
+{
+	int len = 0;
+
+	if (buf->flags & IPQESS_DESC_SINGLE)
+		dma_unmap_single(dev, buf->dma,	buf->length, DMA_TO_DEVICE);
+	else if (buf->flags & IPQESS_DESC_PAGE)
+		dma_unmap_page(dev, buf->dma, buf->length, DMA_TO_DEVICE);
+
+	if (buf->flags & IPQESS_DESC_LAST) {
+		len = buf->skb->len;
+		dev_kfree_skb_any(buf->skb);
+	}
+
+	buf->flags = 0;
+
+	return len;
+}
+
+static void ipqess_tx_ring_free(struct ipqess *ess)
+{
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		int j;
+
+		if (ess->tx_ring[i].hw_desc)
+			continue;
+
+		for (j = 0; j < IPQESS_TX_RING_SIZE; j++) {
+			struct ipqess_buf *buf = &ess->tx_ring[i].buf[j];
+
+			ipqess_tx_unmap_and_free(&ess->pdev->dev, buf);
+		}
+
+		ess->tx_ring[i].buf = NULL;
+	}
+}
+
+static int ipqess_rx_buf_prepare(struct ipqess_buf *buf,
+	struct ipqess_rx_ring *rx_ring)
+{
+	/* Clean the HW DESC header, otherwise we might end up
+	 * with a spurious desc because of random garbage */
+	memset(buf->skb->data, 0, sizeof(struct ipqess_rx_desc));
+
+	buf->dma = dma_map_single(rx_ring->ppdev, buf->skb->data,
+				  IPQESS_RX_HEAD_BUFF_SIZE, DMA_FROM_DEVICE);
+	if (dma_mapping_error(rx_ring->ppdev, buf->dma)) {
+		dev_err_once(rx_ring->ppdev,
+			"IPQESS DMA mapping failed for linear address %x",
+			buf->dma);
+		dev_kfree_skb_any(buf->skb);
+		buf->skb = NULL;
+		return -EFAULT;
+	}
+
+	buf->length = IPQESS_RX_HEAD_BUFF_SIZE;
+	rx_ring->hw_desc[rx_ring->head] = (struct ipqess_rx_desc *)buf->dma;
+	rx_ring->head = (rx_ring->head + 1) % IPQESS_RX_RING_SIZE;
+
+	ipqess_m32(rx_ring->ess, IPQESS_RFD_PROD_IDX_BITS,
+		 (rx_ring->head + IPQESS_RX_RING_SIZE - 1) % IPQESS_RX_RING_SIZE,
+		 IPQESS_REG_RFD_IDX_Q(rx_ring->idx));
+
+	return 0;
+}
+
+/* locking is handled by the caller */
+static int ipqess_rx_buf_alloc_napi(struct ipqess_rx_ring *rx_ring)
+{
+	struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head];
+
+	buf->skb = napi_alloc_skb(&rx_ring->napi_rx,
+		IPQESS_RX_HEAD_BUFF_SIZE);
+	if (!buf->skb)
+		return -ENOMEM;
+
+	return ipqess_rx_buf_prepare(buf, rx_ring);
+}
+
+static int ipqess_rx_buf_alloc(struct ipqess_rx_ring *rx_ring)
+{
+	struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head];
+
+	buf->skb = netdev_alloc_skb_ip_align(rx_ring->ess->netdev,
+		IPQESS_RX_HEAD_BUFF_SIZE);
+	if (!buf->skb)
+		return -ENOMEM;
+
+	return ipqess_rx_buf_prepare(buf, rx_ring);
+}
+
+static void ipqess_refill_work(struct work_struct *work)
+{
+	struct ipqess_rx_ring_refill *rx_refill = container_of(work,
+		struct ipqess_rx_ring_refill, refill_work);
+	struct ipqess_rx_ring *rx_ring = rx_refill->rx_ring;
+	int refill = 0;
+
+	/* don't let this loop by accident. */
+	while (atomic_dec_and_test(&rx_ring->refill_count)) {
+		napi_disable(&rx_ring->napi_rx);
+		if (ipqess_rx_buf_alloc(rx_ring)) {
+			refill++;
+			dev_dbg(rx_ring->ppdev,
+				"Not all buffers were reallocated");
+		}
+		napi_enable(&rx_ring->napi_rx);
+	}
+
+	if (atomic_add_return(refill, &rx_ring->refill_count))
+		schedule_work(&rx_refill->refill_work);
+}
+
+
+static int ipqess_rx_ring_alloc(struct ipqess *ess)
+{
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		int j;
+
+		ess->rx_ring[i].ess = ess;
+		ess->rx_ring[i].ppdev = &ess->pdev->dev;
+		ess->rx_ring[i].ring_id = i;
+		ess->rx_ring[i].idx = i * 2;
+
+		ess->rx_ring[i].buf = devm_kzalloc(&ess->pdev->dev,
+			sizeof(struct ipqess_buf) * IPQESS_RX_RING_SIZE,
+			GFP_KERNEL);
+		if (!ess->rx_ring[i].buf)
+			return -ENOMEM;
+
+		ess->rx_ring[i].hw_desc = dmam_alloc_coherent(&ess->pdev->dev,
+			sizeof(struct ipqess_rx_desc) * IPQESS_RX_RING_SIZE,
+			&ess->rx_ring[i].dma, GFP_KERNEL);
+		if (!ess->rx_ring[i].hw_desc)
+			return -ENOMEM;
+
+		for (j = 0; j < IPQESS_RX_RING_SIZE; j++)
+			if (ipqess_rx_buf_alloc(&ess->rx_ring[i]) < 0)
+				return -ENOMEM;
+
+		ess->rx_refill[i].rx_ring = &ess->rx_ring[i];
+		INIT_WORK(&ess->rx_refill[i].refill_work, ipqess_refill_work);
+
+		ipqess_w32(ess, IPQESS_REG_RFD_BASE_ADDR_Q(ess->rx_ring[i].idx),
+			 (u32)(ess->rx_ring[i].dma));
+	}
+
+	ipqess_w32(ess, IPQESS_REG_RX_DESC0,
+		 (IPQESS_RX_HEAD_BUFF_SIZE << IPQESS_RX_BUF_SIZE_SHIFT) |
+		 (IPQESS_RX_RING_SIZE << IPQESS_RFD_RING_SIZE_SHIFT));
+
+	return 0;
+}
+
+static void ipqess_rx_ring_free(struct ipqess *ess)
+{
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		int j;
+
+		atomic_set(&ess->rx_ring[i].refill_count, 0);
+		cancel_work_sync(&ess->rx_refill[i].refill_work);
+
+		for (j = 0; j < IPQESS_RX_RING_SIZE; j++) {
+			dma_unmap_single(&ess->pdev->dev,
+					 ess->rx_ring[i].buf[j].dma,
+					 ess->rx_ring[i].buf[j].length,
+					 DMA_FROM_DEVICE);
+			dev_kfree_skb_any(ess->rx_ring[i].buf[j].skb);
+		}
+	}
+}
+
+static struct net_device_stats *ipqess_get_stats(struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+
+	spin_lock(&ess->stats_lock);
+	ipqess_update_hw_stats(ess);
+	spin_unlock(&ess->stats_lock);
+
+	return &ess->stats;
+}
+
+static int ipqess_rx_poll(struct ipqess_rx_ring *rx_ring, int budget)
+{
+	u32 length = 0, num_desc, tail, rx_ring_tail;
+	int done = 0;
+
+	rx_ring_tail = rx_ring->tail;
+
+	tail = ipqess_r32(rx_ring->ess, IPQESS_REG_RFD_IDX_Q(rx_ring->idx));
+	tail >>= IPQESS_RFD_CONS_IDX_SHIFT;
+	tail &= IPQESS_RFD_CONS_IDX_MASK;
+
+	while (done < budget) {
+		struct sk_buff *skb;
+		struct ipqess_rx_desc *rd;
+
+		if (rx_ring_tail == tail)
+			break;
+
+		dma_unmap_single(rx_ring->ppdev,
+				 rx_ring->buf[rx_ring_tail].dma,
+				 rx_ring->buf[rx_ring_tail].length,
+				 DMA_FROM_DEVICE);
+
+		skb = xchg(&rx_ring->buf[rx_ring_tail].skb, NULL);
+		rd = (struct ipqess_rx_desc *)skb->data;
+		rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE);
+
+		/* Check if RRD is valid */
+		if (!(rd->rrd7 & IPQESS_RRD_DESC_VALID)) {
+			num_desc = 1;
+			dev_kfree_skb_any(skb);
+			goto skip;
+		}
+
+		num_desc = rd->rrd1 & IPQESS_RRD_NUM_RFD_MASK;
+		length = rd->rrd6 & IPQESS_RRD_PKT_SIZE_MASK;
+
+		skb_reserve(skb, IPQESS_RRD_SIZE);
+		if (num_desc > 1) {
+			/* can we use build_skb here ? */
+			struct sk_buff *skb_prev = NULL;
+			int size_remaining;
+			int i;
+
+			skb->data_len = 0;
+			skb->tail += (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE);
+			skb->len = skb->truesize = length;
+			size_remaining = length - (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE);
+
+			for (i = 1; i < num_desc; i++) {
+				/* TODO: use build_skb ? */
+				struct sk_buff *skb_temp = rx_ring->buf[rx_ring_tail].skb;
+
+				dma_unmap_single(rx_ring->ppdev,
+						 rx_ring->buf[rx_ring_tail].dma,
+						 rx_ring->buf[rx_ring_tail].length,
+						 DMA_FROM_DEVICE);
+
+				skb_put(skb_temp, min(size_remaining, IPQESS_RX_HEAD_BUFF_SIZE));
+				if (skb_prev)
+					skb_prev->next = rx_ring->buf[rx_ring_tail].skb;
+				else
+					skb_shinfo(skb)->frag_list = rx_ring->buf[rx_ring_tail].skb;
+				skb_prev = rx_ring->buf[rx_ring_tail].skb;
+				rx_ring->buf[rx_ring_tail].skb->next = NULL;
+
+				skb->data_len += rx_ring->buf[rx_ring_tail].skb->len;
+				size_remaining -= rx_ring->buf[rx_ring_tail].skb->len;
+
+				rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE);
+			}
+
+		} else {
+			skb_put(skb, length);
+		}
+
+		skb->dev = rx_ring->ess->netdev;
+		skb->protocol = eth_type_trans(skb, rx_ring->ess->netdev);
+		skb_record_rx_queue(skb, rx_ring->ring_id);
+
+		if (rd->rrd6 & IPQESS_RRD_CSUM_FAIL_MASK)
+			skb_checksum_none_assert(skb);
+		else
+			skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+		if (rd->rrd7 & IPQESS_RRD_CVLAN) {
+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rd->rrd4);
+		} else if (rd->rrd1 & IPQESS_RRD_SVLAN) {
+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), rd->rrd4);
+		}
+		napi_gro_receive(&rx_ring->napi_rx, skb);
+
+		/* TODO: do we need to have these here ? */
+		rx_ring->ess->stats.rx_packets++;
+		rx_ring->ess->stats.rx_bytes += length;
+
+		done++;
+skip:
+
+		num_desc += atomic_xchg(&rx_ring->refill_count, 0);
+		while (num_desc) {
+			if (ipqess_rx_buf_alloc_napi(rx_ring)) {
+				num_desc = atomic_add_return(num_desc,
+					 &rx_ring->refill_count);
+				if (num_desc >= ((4 * IPQESS_RX_RING_SIZE + 6) / 7))
+					schedule_work(&rx_ring->ess->rx_refill[rx_ring->ring_id].refill_work);
+				break;
+			}
+			num_desc--;
+		}
+	}
+
+	ipqess_w32(rx_ring->ess, IPQESS_REG_RX_SW_CONS_IDX_Q(rx_ring->idx),
+		   rx_ring_tail);
+	rx_ring->tail = rx_ring_tail;
+
+	return done;
+}
+
+static int ipqess_tx_complete(struct ipqess_tx_ring *tx_ring, int budget)
+{
+	u32 tail;
+	int done = 0;
+	int total = 0, ret;
+
+	tail = ipqess_r32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx));
+	tail >>= IPQESS_TPD_CONS_IDX_SHIFT;
+	tail &= IPQESS_TPD_CONS_IDX_MASK;
+
+	while ((tx_ring->tail != tail) && (done < budget)) {
+		//pr_info("freeing txq:%d tail:%d tailbuf:%p\n", tx_ring->idx, tx_ring->tail, &tx_ring->buf[tx_ring->tail]);
+		ret = ipqess_tx_unmap_and_free(&tx_ring->ess->pdev->dev,
+				       &tx_ring->buf[tx_ring->tail]);
+		tx_ring->tail = IPQESS_NEXT_IDX(tx_ring->tail, tx_ring->count);
+		if (ret) {
+			total += ret;
+			done++;
+		}
+	}
+
+	ipqess_w32(tx_ring->ess,
+		 IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx),
+		 tx_ring->tail);
+
+	if (netif_tx_queue_stopped(tx_ring->nq)) {
+		netdev_dbg(tx_ring->ess->netdev, "waking up tx queue %d\n",
+			   tx_ring->idx);
+		netif_tx_wake_queue(tx_ring->nq);
+	}
+
+	netdev_tx_completed_queue(tx_ring->nq, done, total);
+
+	return done;
+}
+
+static int ipqess_tx_napi(struct napi_struct *napi, int budget)
+{
+	struct ipqess_tx_ring *tx_ring = container_of(napi, struct ipqess_tx_ring,
+						    napi_tx);
+	u32 tx_status;
+	int work_done = 0;
+
+	tx_status = ipqess_r32(tx_ring->ess, IPQESS_REG_TX_ISR);
+	tx_status &= BIT(tx_ring->idx);
+
+	work_done = ipqess_tx_complete(tx_ring, budget);
+
+	ipqess_w32(tx_ring->ess, IPQESS_REG_TX_ISR, tx_status);
+
+	if (likely(work_done < budget)) {
+		if (napi_complete_done(napi, work_done))
+			ipqess_w32(tx_ring->ess,
+				   IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1);
+	}
+
+	return work_done;
+}
+
+static int ipqess_rx_napi(struct napi_struct *napi, int budget)
+{
+	struct ipqess_rx_ring *rx_ring = container_of(napi, struct ipqess_rx_ring,
+						    napi_rx);
+	struct ipqess *ess = rx_ring->ess;
+	int remain_budget = budget;
+	int rx_done;
+	u32 rx_mask = BIT(rx_ring->idx);
+	u32 status;
+
+poll_again:
+	ipqess_w32(ess, IPQESS_REG_RX_ISR, rx_mask);
+	rx_done = ipqess_rx_poll(rx_ring, remain_budget);
+
+	if (rx_done == remain_budget)
+		return budget;
+
+	status = ipqess_r32(ess, IPQESS_REG_RX_ISR);
+	if (status & rx_mask) {
+		remain_budget -= rx_done;
+		goto poll_again;
+	}
+
+	if (napi_complete_done(napi, rx_done + budget - remain_budget))
+		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx), 0x1);
+
+	return rx_done + budget - remain_budget;
+}
+
+static irqreturn_t ipqess_interrupt_tx(int irq, void *priv)
+{
+	struct ipqess_tx_ring *tx_ring = (struct ipqess_tx_ring *) priv;
+
+	if (likely(napi_schedule_prep(&tx_ring->napi_tx))) {
+		ipqess_w32(tx_ring->ess,
+			 IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx),
+			 0x0);
+		__napi_schedule(&tx_ring->napi_tx);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ipqess_interrupt_rx(int irq, void *priv)
+{
+	struct ipqess_rx_ring *rx_ring = (struct ipqess_rx_ring *) priv;
+
+	if (likely(napi_schedule_prep(&rx_ring->napi_rx))) {
+		ipqess_w32(rx_ring->ess,
+			 IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx),
+			 0x0);
+		__napi_schedule(&rx_ring->napi_rx);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void ipqess_irq_enable(struct ipqess *ess)
+{
+	int i;
+
+	ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff);
+	ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff);
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 1);
+		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 1);
+	}
+}
+
+static void ipqess_irq_disable(struct ipqess *ess)
+{
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 0);
+		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 0);
+	}
+}
+
+static int __init ipqess_init(struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	struct device_node *of_node = ess->pdev->dev.of_node;
+	return phylink_of_phy_connect(ess->phylink, of_node, 0);
+}
+
+static void ipqess_uninit(struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+
+	phylink_disconnect_phy(ess->phylink);
+}
+
+static int ipqess_open(struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	int i;
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		napi_enable(&ess->tx_ring[i].napi_tx);
+		napi_enable(&ess->rx_ring[i].napi_rx);
+	}
+	ipqess_irq_enable(ess);
+	phylink_start(ess->phylink);
+	netif_tx_start_all_queues(netdev);
+
+	return 0;
+}
+
+static int ipqess_stop(struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	int i;
+
+	netif_tx_stop_all_queues(netdev);
+	phylink_stop(ess->phylink);
+	ipqess_irq_disable(ess);
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		napi_disable(&ess->tx_ring[i].napi_tx);
+		napi_disable(&ess->rx_ring[i].napi_rx);
+	}
+
+	return 0;
+}
+
+static int ipqess_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+
+	switch (cmd) {
+	case SIOCGMIIPHY:
+	case SIOCGMIIREG:
+	case SIOCSMIIREG:
+		return phylink_mii_ioctl(ess->phylink, ifr, cmd);
+	default:
+		break;
+	}
+
+	return -EOPNOTSUPP;
+}
+
+
+static inline u16 ipqess_tx_desc_available(struct ipqess_tx_ring *tx_ring)
+{
+	u16 count = 0;
+
+	if (tx_ring->tail <= tx_ring->head)
+		count = IPQESS_TX_RING_SIZE;
+
+	count += tx_ring->tail - tx_ring->head - 1;
+
+	return count;
+}
+
+static inline int ipqess_cal_txd_req(struct sk_buff *skb)
+{
+	int tpds;
+
+	/* one TPD for the header, and one for each fragments */
+	tpds = 1 + skb_shinfo(skb)->nr_frags;
+	if (skb_is_gso(skb) && skb_is_gso_v6(skb)) {
+		/* for LSOv2 one extra TPD is needed */
+		tpds++;
+	}
+
+	return tpds;
+}
+
+static struct ipqess_buf *ipqess_get_tx_buffer(struct ipqess_tx_ring *tx_ring,
+					       struct ipqess_tx_desc *desc)
+{
+	return &tx_ring->buf[desc - tx_ring->hw_desc];
+}
+
+static struct ipqess_tx_desc *ipqess_tx_desc_next(struct ipqess_tx_ring *tx_ring)
+{
+	struct ipqess_tx_desc *desc;
+
+	desc = &tx_ring->hw_desc[tx_ring->head];
+	tx_ring->head = IPQESS_NEXT_IDX(tx_ring->head, tx_ring->count);
+
+	return desc;
+}
+
+static void ipqess_rollback_tx(struct ipqess *eth,
+			    struct ipqess_tx_desc *first_desc, int ring_id)
+{
+	struct ipqess_tx_ring *tx_ring = &eth->tx_ring[ring_id];
+	struct ipqess_buf *buf;
+	struct ipqess_tx_desc *desc = NULL;
+	u16 start_index, index;
+
+	start_index = first_desc - tx_ring->hw_desc;
+
+	index = start_index;
+	while (index != tx_ring->head) {
+		desc = &tx_ring->hw_desc[index];
+		buf = &tx_ring->buf[index];
+		ipqess_tx_unmap_and_free(&eth->pdev->dev, buf);
+		memset(desc, 0, sizeof(struct ipqess_tx_desc));
+		if (++index == tx_ring->count)
+			index = 0;
+	}
+	tx_ring->head = start_index;
+}
+
+static bool ipqess_process_dsa_tag_sh(struct sk_buff *skb, u32 *word3)
+{
+	struct skb_shared_info *shinfo = skb_shinfo(skb);
+	struct ipq40xx_dsa_tag_data *tag_data;
+
+	if (shinfo->dsa_tag_proto != DSA_TAG_PROTO_IPQ4019)
+		return false;
+
+	tag_data = (struct ipq40xx_dsa_tag_data *)shinfo->dsa_tag_data;
+
+	pr_debug("SH tag @ %08x, dp:%02x from_cpu:%u\n",
+		 (u32)tag_data, tag_data->dp, tag_data->from_cpu);
+
+	*word3 |= tag_data->dp << IPQESS_TPD_PORT_BITMAP_SHIFT;
+	if (tag_data->from_cpu)
+		*word3 |= BIT(IPQESS_TPD_FROM_CPU_SHIFT);
+
+	return true;
+}
+
+static void ipqess_get_dp_info(struct ipqess *ess, struct sk_buff *skb,
+			       u32 *word3)
+{
+	if (netdev_uses_dsa(ess->netdev)) {
+
+		if (ipqess_process_dsa_tag_sh(skb, word3))
+			return;
+	}
+
+	*word3 |= 0x3e << IPQESS_TPD_PORT_BITMAP_SHIFT;
+}
+
+static int ipqess_tx_map_and_fill(struct ipqess_tx_ring *tx_ring, struct sk_buff *skb)
+{
+	struct ipqess_buf *buf = NULL;
+	struct platform_device *pdev = tx_ring->ess->pdev;
+	struct ipqess_tx_desc *desc = NULL, *first_desc = NULL;
+	u32 word1 = 0, word3 = 0, lso_word1 = 0, svlan_tag = 0;
+	u16 len;
+	int i;
+
+	ipqess_get_dp_info(tx_ring->ess, skb, &word3);
+
+	if (skb_is_gso(skb)) {
+		if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) {
+			lso_word1 |= IPQESS_TPD_IPV4_EN;
+			ip_hdr(skb)->check = 0;
+			tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
+				ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
+		} else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) {
+			lso_word1 |= IPQESS_TPD_LSO_V2_EN;
+			ipv6_hdr(skb)->payload_len = 0;
+			tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
+				&ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
+		}
+
+		lso_word1 |= IPQESS_TPD_LSO_EN |
+			     ((skb_shinfo(skb)->gso_size & IPQESS_TPD_MSS_MASK) << IPQESS_TPD_MSS_SHIFT) |
+			     (skb_transport_offset(skb) << IPQESS_TPD_HDR_SHIFT);
+	} else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
+			u8 css, cso;
+			cso = skb_checksum_start_offset(skb);
+			css = cso + skb->csum_offset;
+
+			word1 |= (IPQESS_TPD_CUSTOM_CSUM_EN);
+			word1 |= (cso >> 1) << IPQESS_TPD_HDR_SHIFT;
+			word1 |= ((css >> 1) << IPQESS_TPD_CUSTOM_CSUM_SHIFT);
+	}
+
+	if (skb_vlan_tag_present(skb)) {
+		switch (skb->vlan_proto) {
+		case htons(ETH_P_8021Q):
+			word3 |= BIT(IPQESS_TX_INS_CVLAN);
+			word3 |= skb_vlan_tag_get(skb) << IPQESS_TX_CVLAN_TAG_SHIFT;
+			break;
+		case htons(ETH_P_8021AD):
+			word1 |= BIT(IPQESS_TX_INS_SVLAN);
+			svlan_tag = skb_vlan_tag_get(skb);
+			break;
+		default:
+			dev_err(&pdev->dev, "no ctag or stag present\n");
+			goto vlan_tag_error;
+		}
+	}
+
+	if (eth_type_vlan(skb->protocol))
+		word1 |= IPQESS_TPD_VLAN_TAGGED;
+
+        if (skb->protocol == htons(ETH_P_PPP_SES))
+                word1 |= IPQESS_TPD_PPPOE_EN;
+
+	len = skb_headlen(skb);
+
+	first_desc = desc = ipqess_tx_desc_next(tx_ring);
+	if (lso_word1 & IPQESS_TPD_LSO_V2_EN) {
+		desc->addr = cpu_to_le16(skb->len);
+		desc->word1 = word1 | lso_word1;
+		desc->svlan_tag = svlan_tag;
+		desc->word3 = word3;
+		desc = ipqess_tx_desc_next(tx_ring);
+	}
+
+	buf = ipqess_get_tx_buffer(tx_ring, desc);
+	buf->length = len;
+	buf->dma = dma_map_single(&pdev->dev,
+				skb->data, len, DMA_TO_DEVICE);
+	if (dma_mapping_error(&pdev->dev, buf->dma))
+		goto dma_error;
+
+	desc->addr = cpu_to_le32(buf->dma);
+	desc->len  = cpu_to_le16(len);
+
+	buf->flags |= IPQESS_DESC_SINGLE;
+	desc->word1 = word1 | lso_word1;
+	desc->svlan_tag = svlan_tag;
+	desc->word3 = word3;
+
+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+		len = skb_frag_size(frag);
+		desc = ipqess_tx_desc_next(tx_ring);
+		buf = ipqess_get_tx_buffer(tx_ring, desc);
+		buf->length = len;
+		buf->flags |= IPQESS_DESC_PAGE;
+		buf->dma = skb_frag_dma_map(&pdev->dev, frag, 0, len, DMA_TO_DEVICE);
+		if (dma_mapping_error(&pdev->dev, buf->dma))
+			goto dma_error;
+
+		desc->addr = cpu_to_le32(buf->dma);
+		desc->len  = cpu_to_le16(len);
+		desc->svlan_tag = svlan_tag;
+		desc->word1 = word1 | lso_word1;
+		desc->word3 = word3;
+	}
+	desc->word1 |= 1 << IPQESS_TPD_EOP_SHIFT;
+	buf->skb = skb;
+	buf->flags |= IPQESS_DESC_LAST;
+
+	return 0;
+
+dma_error:
+	ipqess_rollback_tx(tx_ring->ess, first_desc, tx_ring->ring_id);
+	dev_err(&pdev->dev, "TX DMA map failed\n");
+
+vlan_tag_error:
+	return -ENOMEM;
+}
+
+static inline void ipqess_kick_tx(struct ipqess_tx_ring *tx_ring)
+{
+	/* Ensure that all TPDs has been written completely */
+	dma_wmb();
+
+	/* update software producer index */
+	ipqess_w32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx),
+		   tx_ring->head);
+}
+
+static netdev_tx_t ipqess_xmit(struct sk_buff *skb,
+			     struct net_device *netdev)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	struct ipqess_tx_ring *tx_ring;
+	int avail;
+	int tx_num;
+	int ret;
+
+	tx_ring = &ess->tx_ring[skb_get_queue_mapping(skb)];
+	tx_num = ipqess_cal_txd_req(skb);
+	avail = ipqess_tx_desc_available(tx_ring);
+	if (avail < tx_num) {
+		netdev_dbg(netdev,
+			   "stopping tx queue %d, avail=%d req=%d im=%x\n",
+			   tx_ring->idx, avail, tx_num,
+			   ipqess_r32(tx_ring->ess,
+				      IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx)));
+		netif_tx_stop_queue(tx_ring->nq);
+		ipqess_w32(tx_ring->ess, IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1);
+		ipqess_kick_tx(tx_ring);
+		return NETDEV_TX_BUSY;
+	}
+
+	ret = ipqess_tx_map_and_fill(tx_ring, skb);
+	if (ret) {
+		dev_kfree_skb_any(skb);
+		ess->stats.tx_errors++;
+		goto err_out;
+	}
+
+	ess->stats.tx_packets++;
+	ess->stats.tx_bytes += skb->len;
+	netdev_tx_sent_queue(tx_ring->nq, skb->len);
+
+	if (!netdev_xmit_more() || netif_xmit_stopped(tx_ring->nq))
+		ipqess_kick_tx(tx_ring);
+
+err_out:
+	return NETDEV_TX_OK;
+}
+
+static int ipqess_set_mac_address(struct net_device *netdev, void *p)
+{
+	int ret = eth_mac_addr(netdev, p);
+	struct ipqess *ess = netdev_priv(netdev);
+	const char *macaddr = netdev->dev_addr;
+
+	if (ret)
+		return ret;
+
+//	spin_lock_bh(&mac->hw->page_lock);
+	ipqess_w32(ess, IPQESS_REG_MAC_CTRL1,
+		 (macaddr[0] << 8) | macaddr[1]);
+	ipqess_w32(ess, IPQESS_REG_MAC_CTRL0,
+		 (macaddr[2] << 24) | (macaddr[3] << 16) |
+		 (macaddr[4] << 8) | macaddr[5]);
+//	spin_unlock_bh(&mac->hw->page_lock);
+
+	return 0;
+}
+
+static void ipqess_tx_timeout(struct net_device *netdev, unsigned int txq_id)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	struct ipqess_tx_ring *tr = &ess->tx_ring[txq_id];
+
+	netdev_warn(netdev, "hardware queue %d is in stuck?\n",
+		    tr->idx);
+
+	/* TODO: dump hardware queue */
+}
+
+static const struct net_device_ops ipqess_axi_netdev_ops = {
+	.ndo_init		= ipqess_init,
+	.ndo_uninit		= ipqess_uninit,
+	.ndo_open		= ipqess_open,
+	.ndo_stop		= ipqess_stop,
+	.ndo_do_ioctl		= ipqess_do_ioctl,
+	.ndo_start_xmit		= ipqess_xmit,
+	.ndo_get_stats		= ipqess_get_stats,
+	.ndo_set_mac_address	= ipqess_set_mac_address,
+	.ndo_tx_timeout		= ipqess_tx_timeout,
+};
+
+static void ipqess_hw_stop(struct ipqess *ess)
+{
+	int i;
+
+	/* disable all RX queue IRQs */
+	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++)
+		ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(i), 0);
+
+	/* disable all TX queue IRQs */
+	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++)
+		ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(i), 0);
+
+	/* disable all other IRQs */
+	ipqess_w32(ess, IPQESS_REG_MISC_IMR, 0);
+	ipqess_w32(ess, IPQESS_REG_WOL_IMR, 0);
+
+	/* clear the IRQ status registers */
+	ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff);
+	ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff);
+	ipqess_w32(ess, IPQESS_REG_MISC_ISR, 0x1fff);
+	ipqess_w32(ess, IPQESS_REG_WOL_ISR, 0x1);
+	ipqess_w32(ess, IPQESS_REG_WOL_CTRL, 0);
+
+	/* disable RX and TX queues */
+	ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, 0, IPQESS_REG_RXQ_CTRL);
+	ipqess_m32(ess, IPQESS_TXQ_CTRL_TXQ_EN, 0, IPQESS_REG_TXQ_CTRL);
+}
+
+static int ipqess_hw_init(struct ipqess *ess)
+{
+	u32 tmp;
+	int i, err;
+
+	ipqess_hw_stop(ess);
+
+	ipqess_m32(ess, BIT(IPQESS_INTR_SW_IDX_W_TYP_SHIFT),
+		 IPQESS_INTR_SW_IDX_W_TYPE << IPQESS_INTR_SW_IDX_W_TYP_SHIFT,
+		 IPQESS_REG_INTR_CTRL);
+
+	/* enable IRQ delay slot */
+	ipqess_w32(ess, IPQESS_REG_IRQ_MODRT_TIMER_INIT,
+		 (IPQESS_TX_IMT << IPQESS_IRQ_MODRT_TX_TIMER_SHIFT) |
+		 (IPQESS_RX_IMT << IPQESS_IRQ_MODRT_RX_TIMER_SHIFT));
+
+	/* Set Customer and Service VLAN TPIDs */
+	ipqess_w32(ess, IPQESS_REG_VLAN_CFG,
+		   (ETH_P_8021Q << IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT) |
+		   (ETH_P_8021AD << IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT));
+
+	/* Configure the TX Queue bursting */
+	ipqess_w32(ess, IPQESS_REG_TXQ_CTRL,
+		 (IPQESS_TPD_BURST << IPQESS_TXQ_NUM_TPD_BURST_SHIFT) |
+		 (IPQESS_TXF_BURST << IPQESS_TXQ_TXF_BURST_NUM_SHIFT) |
+		 IPQESS_TXQ_CTRL_TPD_BURST_EN);
+
+	/* Set RSS type */
+	ipqess_w32(ess, IPQESS_REG_RSS_TYPE,
+		 IPQESS_RSS_TYPE_IPV4TCP | IPQESS_RSS_TYPE_IPV6_TCP |
+		 IPQESS_RSS_TYPE_IPV4_UDP | IPQESS_RSS_TYPE_IPV6UDP |
+		 IPQESS_RSS_TYPE_IPV4 | IPQESS_RSS_TYPE_IPV6);
+
+	/* Set RFD ring burst and threshold */
+	ipqess_w32(ess, IPQESS_REG_RX_DESC1,
+		(IPQESS_RFD_BURST << IPQESS_RXQ_RFD_BURST_NUM_SHIFT) |
+		(IPQESS_RFD_THR << IPQESS_RXQ_RFD_PF_THRESH_SHIFT) |
+		(IPQESS_RFD_LTHR << IPQESS_RXQ_RFD_LOW_THRESH_SHIFT));
+
+	/* Set Rx FIFO
+	 * - threshold to start to DMA data to host
+	 */
+	ipqess_w32(ess, IPQESS_REG_RXQ_CTRL,
+		 IPQESS_FIFO_THRESH_128_BYTE | IPQESS_RXQ_CTRL_RMV_VLAN);
+
+	err = ipqess_rx_ring_alloc(ess);
+	if (err)
+		return err;
+
+	err = ipqess_tx_ring_alloc(ess);
+	if (err)
+		return err;
+
+	/* Load all of ring base addresses above into the dma engine */
+	ipqess_m32(ess, 0, BIT(IPQESS_LOAD_PTR_SHIFT),
+		 IPQESS_REG_TX_SRAM_PART);
+
+	/* Disable TX FIFO low watermark and high watermark */
+	ipqess_w32(ess, IPQESS_REG_TXF_WATER_MARK, 0);
+
+	/* Configure RSS indirection table.
+	 * 128 hash will be configured in the following
+	 * pattern: hash{0,1,2,3} = {Q0,Q2,Q4,Q6} respectively
+	 * and so on
+	 */
+	for (i = 0; i < IPQESS_NUM_IDT; i++)
+		ipqess_w32(ess, IPQESS_REG_RSS_IDT(i), IPQESS_RSS_IDT_VALUE);
+
+	/* Configure load balance mapping table.
+	 * 4 table entry will be configured according to the
+	 * following pattern: load_balance{0,1,2,3} = {Q0,Q1,Q3,Q4}
+	 * respectively.
+	 */
+	ipqess_w32(ess, IPQESS_REG_LB_RING, IPQESS_LB_REG_VALUE);
+
+	/* Configure Virtual queue for Tx rings */
+	ipqess_w32(ess, IPQESS_REG_VQ_CTRL0, IPQESS_VQ_REG_VALUE);
+	ipqess_w32(ess, IPQESS_REG_VQ_CTRL1, IPQESS_VQ_REG_VALUE);
+
+	/* Configure Max AXI Burst write size to 128 bytes*/
+	ipqess_w32(ess, IPQESS_REG_AXIW_CTRL_MAXWRSIZE,
+		 IPQESS_AXIW_MAXWRSIZE_VALUE);
+
+	/* Enable TX queues */
+	ipqess_m32(ess, 0, IPQESS_TXQ_CTRL_TXQ_EN, IPQESS_REG_TXQ_CTRL);
+
+	/* Enable RX queues */
+	tmp = 0;
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++)
+		tmp |= IPQESS_RXQ_CTRL_EN(ess->rx_ring[i].idx);
+
+	ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, tmp, IPQESS_REG_RXQ_CTRL);
+
+	return 0;
+}
+
+static void ipqess_validate(struct phylink_config *config,
+			    unsigned long *supported,
+			    struct phylink_link_state *state)
+{
+	struct ipqess *ess = container_of(config, struct ipqess, phylink_config);
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
+
+	if (state->interface != PHY_INTERFACE_MODE_INTERNAL) {
+		dev_err(&ess->pdev->dev, "unsupported interface mode: %d\n",
+			state->interface);
+		linkmode_zero(supported);
+		return;
+	}
+
+	phylink_set_port_modes(mask);
+	phylink_set(mask, 1000baseT_Full);
+	phylink_set(mask, Pause);
+	phylink_set(mask, Asym_Pause);
+
+	linkmode_and(supported, supported, mask);
+	linkmode_and(state->advertising, state->advertising, mask);
+}
+
+static void ipqess_mac_config(struct phylink_config *config, unsigned int mode,
+			      const struct phylink_link_state *state)
+{
+	/* TODO */
+}
+
+static void ipqess_mac_link_down(struct phylink_config *config,
+				 unsigned int mode,
+				 phy_interface_t interface)
+{
+	/* TODO */
+}
+
+static void ipqess_mac_link_up(struct phylink_config *config,
+			       struct phy_device *phy, unsigned int mode,
+			       phy_interface_t interface,
+			       int speed, int duplex,
+			       bool tx_pause, bool rx_pause)
+{
+	/* TODO */
+}
+
+static struct phylink_mac_ops ipqess_phylink_mac_ops = {
+	.validate		= ipqess_validate,
+	.mac_config		= ipqess_mac_config,
+	.mac_link_up		= ipqess_mac_link_up,
+	.mac_link_down		= ipqess_mac_link_down,
+};
+
+static void ipqess_cleanup(struct ipqess *ess)
+{
+	ipqess_hw_stop(ess);
+	unregister_netdev(ess->netdev);
+
+	ipqess_tx_ring_free(ess);
+	ipqess_rx_ring_free(ess);
+
+	if (!IS_ERR_OR_NULL(ess->phylink))
+		phylink_destroy(ess->phylink);
+}
+
+static void ess_reset(struct ipqess *ess)
+{
+	reset_control_assert(ess->ess_rst);
+
+	mdelay(10);
+
+	reset_control_deassert(ess->ess_rst);
+
+	/* Waiting for all inner tables to be flushed and reinitialized.
+	 * This takes between 5 and 10ms.
+	 */
+	mdelay(10);
+}
+
+static int ipqess_axi_probe(struct platform_device *pdev)
+{
+	struct device_node *np = pdev->dev.of_node;
+	struct ipqess *ess;
+	struct net_device *netdev;
+	struct resource *res;
+	int i, err = 0;
+
+	netdev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(struct ipqess),
+					 IPQESS_NETDEV_QUEUES,
+					 IPQESS_NETDEV_QUEUES);
+	if (!netdev)
+		return -ENOMEM;
+
+	ess = netdev_priv(netdev);
+	ess->netdev = netdev;
+	ess->pdev = pdev;
+	spin_lock_init(&ess->stats_lock);
+	SET_NETDEV_DEV(netdev, &pdev->dev);
+	platform_set_drvdata(pdev, netdev);
+
+	err = of_get_mac_address(np, netdev->dev_addr);
+	if (err == -EPROBE_DEFER)
+		return -EPROBE_DEFER;
+
+	if (err) {
+
+		random_ether_addr(netdev->dev_addr);
+		dev_info(&ess->pdev->dev, "generated random MAC address %pM\n",
+			netdev->dev_addr);
+		netdev->addr_assign_type = NET_ADDR_RANDOM;
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	ess->hw_addr = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(ess->hw_addr)) {
+		err = PTR_ERR(ess->hw_addr);
+		goto err_out;
+	}
+
+	ess->ess_clk = of_clk_get_by_name(np, "ess_clk");
+	if (IS_ERR(ess->ess_clk)) {
+		dev_err(&pdev->dev, "Failed to get ess_clk\n");
+		return PTR_ERR(ess->ess_clk);
+	}
+
+	ess->ess_rst = devm_reset_control_get(&pdev->dev, "ess_rst");
+	if (IS_ERR(ess->ess_rst)) {
+		dev_err(&pdev->dev, "Failed to get ess_rst control!\n");
+		return PTR_ERR(ess->ess_rst);
+	}
+
+	clk_prepare_enable(ess->ess_clk);
+
+	ess_reset(ess);
+
+	ess->phylink_config.dev = &netdev->dev;
+	ess->phylink_config.type = PHYLINK_NETDEV;
+	ess->phylink_config.pcs_poll = true;
+
+	ess->phylink = phylink_create(&ess->phylink_config,
+				      of_fwnode_handle(np),
+				      PHY_INTERFACE_MODE_INTERNAL,
+				      &ipqess_phylink_mac_ops);
+	if (IS_ERR(ess->phylink)) {
+		err = PTR_ERR(ess->phylink);
+		goto err_out;
+	}
+
+	for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) {
+		ess->tx_irq[i] = platform_get_irq(pdev, i);
+		scnprintf(ess->tx_irq_names[i], sizeof(ess->tx_irq_names[i]),
+			 "%s:txq%d", pdev->name, i);
+	}
+
+	for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) {
+		ess->rx_irq[i] = platform_get_irq(pdev, i + IPQESS_MAX_TX_QUEUE);
+		scnprintf(ess->rx_irq_names[i], sizeof(ess->rx_irq_names[i]),
+			 "%s:rxq%d", pdev->name, i);
+	}
+
+#undef NETIF_F_TSO6
+#define NETIF_F_TSO6 0
+
+	netdev->netdev_ops = &ipqess_axi_netdev_ops;
+	netdev->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
+			   NETIF_F_HW_VLAN_CTAG_RX |
+			   NETIF_F_HW_VLAN_CTAG_TX |
+			   NETIF_F_TSO | NETIF_F_TSO6 |
+			   NETIF_F_GRO | NETIF_F_SG;
+	/* feature change is not supported yet */
+	netdev->hw_features = 0;
+	netdev->vlan_features = NETIF_F_HW_CSUM | NETIF_F_SG | NETIF_F_RXCSUM |
+				NETIF_F_TSO | NETIF_F_TSO6 |
+				NETIF_F_GRO;
+	netdev->watchdog_timeo = 5 * HZ;
+	netdev->base_addr = (u32) ess->hw_addr;
+	netdev->max_mtu = 9000;
+	netdev->gso_max_segs = IPQESS_TX_RING_SIZE / 2;
+
+	ipqess_set_ethtool_ops(netdev);
+
+	err = register_netdev(netdev);
+	if (err)
+		goto err_out;
+
+	err = ipqess_hw_init(ess);
+	if (err)
+		goto err_out;
+
+	dev_set_threaded(netdev, true);
+
+	for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) {
+		int qid;
+
+		netif_tx_napi_add(netdev, &ess->tx_ring[i].napi_tx,
+				  ipqess_tx_napi, 64);
+		netif_napi_add(netdev,
+			       &ess->rx_ring[i].napi_rx,
+			       ipqess_rx_napi, 64);
+
+		qid = ess->tx_ring[i].idx;
+		err = devm_request_irq(&ess->netdev->dev, ess->tx_irq[qid],
+			ipqess_interrupt_tx, 0, ess->tx_irq_names[qid],
+			&ess->tx_ring[i]);
+		if (err)
+			goto err_out;
+
+		qid = ess->rx_ring[i].idx;
+		err = devm_request_irq(&ess->netdev->dev, ess->rx_irq[qid],
+			ipqess_interrupt_rx, 0, ess->rx_irq_names[qid],
+			&ess->rx_ring[i]);
+		if (err)
+			goto err_out;
+	}
+
+	return 0;
+
+err_out:
+	ipqess_cleanup(ess);
+	return err;
+}
+
+static int ipqess_axi_remove(struct platform_device *pdev)
+{
+	const struct net_device *netdev = platform_get_drvdata(pdev);
+	struct ipqess *ess = netdev_priv(netdev);
+
+	ipqess_cleanup(ess);
+
+	return 0;
+}
+
+static const struct of_device_id ipqess_of_mtable[] = {
+	{.compatible = "qcom,ipq4019-ess-edma" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, ipqess_of_mtable);
+
+static struct platform_driver ipqess_axi_driver = {
+	.driver = {
+		.name    = "ipqess-edma",
+		.of_match_table = ipqess_of_mtable,
+	},
+	.probe    = ipqess_axi_probe,
+	.remove   = ipqess_axi_remove,
+};
+
+module_platform_driver(ipqess_axi_driver);
+
+MODULE_AUTHOR("Qualcomm Atheros Inc");
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
+MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h
new file mode 100644
index 0000000000..ca4cb7b2d4
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess.h
@@ -0,0 +1,530 @@
+// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+/* Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+ * Copyright (c) 2018 - 2019, Christian Lamparter <chunkeey@gmail.com>
+ * Copyright (c) 2020 - 2021, Gabor Juhos <j4g8y7@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _IPQESS_H_
+#define _IPQESS_H_
+
+#define IPQESS_NETDEV_QUEUES	4
+
+#define IPQESS_TPD_EOP_SHIFT 31
+
+#define IPQESS_PORT_ID_SHIFT 12
+#define IPQESS_PORT_ID_MASK 0x7
+
+/* tpd word 3 bit 18-28 */
+#define IPQESS_TPD_PORT_BITMAP_SHIFT 18
+
+#define IPQESS_TPD_FROM_CPU_SHIFT 25
+
+#define IPQESS_RX_RING_SIZE 128
+#define IPQESS_RX_HEAD_BUFF_SIZE 1540
+#define IPQESS_TX_RING_SIZE 128
+#define IPQESS_MAX_RX_QUEUE 8
+#define IPQESS_MAX_TX_QUEUE 16
+
+
+/* Configurations */
+#define IPQESS_INTR_CLEAR_TYPE 0
+#define IPQESS_INTR_SW_IDX_W_TYPE 0
+#define IPQESS_FIFO_THRESH_TYPE 0
+#define IPQESS_RSS_TYPE 0
+#define IPQESS_RX_IMT 0x0020
+#define IPQESS_TX_IMT 0x0050
+#define IPQESS_TPD_BURST 5
+#define IPQESS_TXF_BURST 0x100
+#define IPQESS_RFD_BURST 8
+#define IPQESS_RFD_THR 16
+#define IPQESS_RFD_LTHR 0
+
+/* Flags used in transmit direction */
+#define IPQESS_DESC_LAST 0x1
+#define IPQESS_DESC_SINGLE 0x2
+#define IPQESS_DESC_PAGE 0x4
+
+struct ipqesstool_statistics {
+	u32 tx_q0_pkt;
+	u32 tx_q1_pkt;
+	u32 tx_q2_pkt;
+	u32 tx_q3_pkt;
+	u32 tx_q4_pkt;
+	u32 tx_q5_pkt;
+	u32 tx_q6_pkt;
+	u32 tx_q7_pkt;
+	u32 tx_q8_pkt;
+	u32 tx_q9_pkt;
+	u32 tx_q10_pkt;
+	u32 tx_q11_pkt;
+	u32 tx_q12_pkt;
+	u32 tx_q13_pkt;
+	u32 tx_q14_pkt;
+	u32 tx_q15_pkt;
+	u32 tx_q0_byte;
+	u32 tx_q1_byte;
+	u32 tx_q2_byte;
+	u32 tx_q3_byte;
+	u32 tx_q4_byte;
+	u32 tx_q5_byte;
+	u32 tx_q6_byte;
+	u32 tx_q7_byte;
+	u32 tx_q8_byte;
+	u32 tx_q9_byte;
+	u32 tx_q10_byte;
+	u32 tx_q11_byte;
+	u32 tx_q12_byte;
+	u32 tx_q13_byte;
+	u32 tx_q14_byte;
+	u32 tx_q15_byte;
+	u32 rx_q0_pkt;
+	u32 rx_q1_pkt;
+	u32 rx_q2_pkt;
+	u32 rx_q3_pkt;
+	u32 rx_q4_pkt;
+	u32 rx_q5_pkt;
+	u32 rx_q6_pkt;
+	u32 rx_q7_pkt;
+	u32 rx_q0_byte;
+	u32 rx_q1_byte;
+	u32 rx_q2_byte;
+	u32 rx_q3_byte;
+	u32 rx_q4_byte;
+	u32 rx_q5_byte;
+	u32 rx_q6_byte;
+	u32 rx_q7_byte;
+	u32 tx_desc_error;
+};
+
+struct ipqess_tx_desc {
+	__le16  len;
+	__le16  svlan_tag;
+	__le32  word1;
+	__le32  addr;
+	__le32  word3;
+} __aligned(16) __packed;
+
+struct ipqess_rx_desc {
+	u16 rrd0;
+	u16 rrd1;
+	u16 rrd2;
+	u16 rrd3;
+	u16 rrd4;
+	u16 rrd5;
+	u16 rrd6;
+	u16 rrd7;
+} __aligned(16) __packed;
+
+struct ipqess_buf {
+	struct sk_buff *skb;
+	dma_addr_t dma;
+	u32 flags;
+	u16 length;
+};
+
+struct ipqess_tx_ring {
+	struct napi_struct napi_tx;
+	u32 idx;
+	int ring_id;
+	struct ipqess *ess;
+	struct netdev_queue *nq;
+	struct ipqess_tx_desc *hw_desc;
+	struct ipqess_buf *buf;
+	dma_addr_t dma;
+	u16 count;
+	u16 head;
+	u16 tail;
+};
+
+struct ipqess_rx_ring {
+	struct napi_struct napi_rx;
+	u32 idx;
+	int ring_id;
+	struct ipqess *ess;
+	struct device *ppdev;
+	struct ipqess_rx_desc **hw_desc;
+	struct ipqess_buf *buf;
+	dma_addr_t dma;
+	u16 head;
+	u16 tail;
+	atomic_t refill_count;
+};
+
+struct ipqess_rx_ring_refill {
+	struct ipqess_rx_ring *rx_ring;
+	struct work_struct refill_work;
+};
+
+#define IPQESS_IRQ_NAME_LEN	32
+
+struct ipqess {
+	struct net_device *netdev;
+	void __iomem *hw_addr;
+	struct clk *ess_clk;
+	struct reset_control *ess_rst;
+
+	struct ipqess_rx_ring rx_ring[IPQESS_NETDEV_QUEUES];
+
+	struct platform_device *pdev;
+	struct phylink *phylink;
+	struct phylink_config phylink_config;
+	struct ipqess_tx_ring tx_ring[IPQESS_NETDEV_QUEUES];
+
+	struct ipqesstool_statistics ipqessstats;
+	spinlock_t stats_lock;
+	struct net_device_stats stats;
+
+	struct ipqess_rx_ring_refill rx_refill[IPQESS_NETDEV_QUEUES];
+	u32 tx_irq[IPQESS_MAX_TX_QUEUE];
+	char tx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN];
+	u32 rx_irq[IPQESS_MAX_RX_QUEUE];
+	char rx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN];
+};
+
+static inline void build_test(void)
+{
+	struct ipqess *ess;
+	BUILD_BUG_ON(ARRAY_SIZE(ess->rx_ring) != ARRAY_SIZE(ess->rx_refill));
+}
+
+void ipqess_set_ethtool_ops(struct net_device *netdev);
+void ipqess_update_hw_stats(struct ipqess *ess);
+
+/* register definition */
+#define IPQESS_REG_MAS_CTRL 0x0
+#define IPQESS_REG_TIMEOUT_CTRL 0x004
+#define IPQESS_REG_DBG0 0x008
+#define IPQESS_REG_DBG1 0x00C
+#define IPQESS_REG_SW_CTRL0 0x100
+#define IPQESS_REG_SW_CTRL1 0x104
+
+/* Interrupt Status Register */
+#define IPQESS_REG_RX_ISR 0x200
+#define IPQESS_REG_TX_ISR 0x208
+#define IPQESS_REG_MISC_ISR 0x210
+#define IPQESS_REG_WOL_ISR 0x218
+
+#define IPQESS_MISC_ISR_RX_URG_Q(x) (1 << x)
+
+#define IPQESS_MISC_ISR_AXIR_TIMEOUT 0x00000100
+#define IPQESS_MISC_ISR_AXIR_ERR 0x00000200
+#define IPQESS_MISC_ISR_TXF_DEAD 0x00000400
+#define IPQESS_MISC_ISR_AXIW_ERR 0x00000800
+#define IPQESS_MISC_ISR_AXIW_TIMEOUT 0x00001000
+
+#define IPQESS_WOL_ISR 0x00000001
+
+/* Interrupt Mask Register */
+#define IPQESS_REG_MISC_IMR 0x214
+#define IPQESS_REG_WOL_IMR 0x218
+
+#define IPQESS_RX_IMR_NORMAL_MASK 0x1
+#define IPQESS_TX_IMR_NORMAL_MASK 0x1
+#define IPQESS_MISC_IMR_NORMAL_MASK 0x80001FFF
+#define IPQESS_WOL_IMR_NORMAL_MASK 0x1
+
+/* Edma receive consumer index */
+#define IPQESS_REG_RX_SW_CONS_IDX_Q(x) (0x220 + ((x) << 2)) /* x is the queue id */
+
+/* Edma transmit consumer index */
+#define IPQESS_REG_TX_SW_CONS_IDX_Q(x) (0x240 + ((x) << 2)) /* x is the queue id */
+
+/* IRQ Moderator Initial Timer Register */
+#define IPQESS_REG_IRQ_MODRT_TIMER_INIT 0x280
+#define IPQESS_IRQ_MODRT_TIMER_MASK 0xFFFF
+#define IPQESS_IRQ_MODRT_RX_TIMER_SHIFT 0
+#define IPQESS_IRQ_MODRT_TX_TIMER_SHIFT 16
+
+/* Interrupt Control Register */
+#define IPQESS_REG_INTR_CTRL 0x284
+#define IPQESS_INTR_CLR_TYP_SHIFT 0
+#define IPQESS_INTR_SW_IDX_W_TYP_SHIFT 1
+#define IPQESS_INTR_CLEAR_TYPE_W1 0
+#define IPQESS_INTR_CLEAR_TYPE_R 1
+
+/* RX Interrupt Mask Register */
+#define IPQESS_REG_RX_INT_MASK_Q(x) (0x300 + ((x) << 2)) /* x = queue id */
+
+/* TX Interrupt mask register */
+#define IPQESS_REG_TX_INT_MASK_Q(x) (0x340 + ((x) << 2)) /* x = queue id */
+
+/* Load Ptr Register
+ * Software sets this bit after the initialization of the head and tail
+ */
+#define IPQESS_REG_TX_SRAM_PART 0x400
+#define IPQESS_LOAD_PTR_SHIFT 16
+
+/* TXQ Control Register */
+#define IPQESS_REG_TXQ_CTRL 0x404
+#define IPQESS_TXQ_CTRL_IP_OPTION_EN 0x10
+#define IPQESS_TXQ_CTRL_TXQ_EN 0x20
+#define IPQESS_TXQ_CTRL_ENH_MODE 0x40
+#define IPQESS_TXQ_CTRL_LS_8023_EN 0x80
+#define IPQESS_TXQ_CTRL_TPD_BURST_EN 0x100
+#define IPQESS_TXQ_CTRL_LSO_BREAK_EN 0x200
+#define IPQESS_TXQ_NUM_TPD_BURST_MASK 0xF
+#define IPQESS_TXQ_TXF_BURST_NUM_MASK 0xFFFF
+#define IPQESS_TXQ_NUM_TPD_BURST_SHIFT 0
+#define IPQESS_TXQ_TXF_BURST_NUM_SHIFT 16
+
+#define	IPQESS_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */
+#define IPQESS_TXF_WATER_MARK_MASK 0x0FFF
+#define IPQESS_TXF_LOW_WATER_MARK_SHIFT 0
+#define IPQESS_TXF_HIGH_WATER_MARK_SHIFT 16
+#define IPQESS_TXQ_CTRL_BURST_MODE_EN 0x80000000
+
+/* WRR Control Register */
+#define IPQESS_REG_WRR_CTRL_Q0_Q3 0x40c
+#define IPQESS_REG_WRR_CTRL_Q4_Q7 0x410
+#define IPQESS_REG_WRR_CTRL_Q8_Q11 0x414
+#define IPQESS_REG_WRR_CTRL_Q12_Q15 0x418
+
+/* Weight round robin(WRR), it takes queue as input, and computes
+ * starting bits where we need to write the weight for a particular
+ * queue
+ */
+#define IPQESS_WRR_SHIFT(x) (((x) * 5) % 20)
+
+/* Tx Descriptor Control Register */
+#define IPQESS_REG_TPD_RING_SIZE 0x41C
+#define IPQESS_TPD_RING_SIZE_SHIFT 0
+#define IPQESS_TPD_RING_SIZE_MASK 0xFFFF
+
+/* Transmit descriptor base address */
+#define IPQESS_REG_TPD_BASE_ADDR_Q(x) (0x420 + ((x) << 2)) /* x = queue id */
+
+/* TPD Index Register */
+#define IPQESS_REG_TPD_IDX_Q(x) (0x460 + ((x) << 2)) /* x = queue id */
+
+#define IPQESS_TPD_PROD_IDX_BITS 0x0000FFFF
+#define IPQESS_TPD_CONS_IDX_BITS 0xFFFF0000
+#define IPQESS_TPD_PROD_IDX_MASK 0xFFFF
+#define IPQESS_TPD_CONS_IDX_MASK 0xFFFF
+#define IPQESS_TPD_PROD_IDX_SHIFT 0
+#define IPQESS_TPD_CONS_IDX_SHIFT 16
+
+/* TX Virtual Queue Mapping Control Register */
+#define IPQESS_REG_VQ_CTRL0 0x4A0
+#define IPQESS_REG_VQ_CTRL1 0x4A4
+
+/* Virtual QID shift, it takes queue as input, and computes
+ * Virtual QID position in virtual qid control register
+ */
+#define IPQESS_VQ_ID_SHIFT(i) (((i) * 3) % 24)
+
+/* Virtual Queue Default Value */
+#define IPQESS_VQ_REG_VALUE 0x240240
+
+/* Tx side Port Interface Control Register */
+#define IPQESS_REG_PORT_CTRL 0x4A8
+#define IPQESS_PAD_EN_SHIFT 15
+
+/* Tx side VLAN Configuration Register */
+#define IPQESS_REG_VLAN_CFG 0x4AC
+
+#define IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT 0
+#define IPQESS_VLAN_CFG_SVLAN_TPID_MASK 0xffff
+#define IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT 16
+#define IPQESS_VLAN_CFG_CVLAN_TPID_MASK 0xffff
+
+#define IPQESS_TX_CVLAN 16
+#define IPQESS_TX_INS_CVLAN 17
+#define IPQESS_TX_CVLAN_TAG_SHIFT 0
+
+#define IPQESS_TX_SVLAN 14
+#define IPQESS_TX_INS_SVLAN 15
+#define IPQESS_TX_SVLAN_TAG_SHIFT 16
+
+/* Tx Queue Packet Statistic Register */
+#define IPQESS_REG_TX_STAT_PKT_Q(x) (0x700 + ((x) << 3)) /* x = queue id */
+
+#define IPQESS_TX_STAT_PKT_MASK 0xFFFFFF
+
+/* Tx Queue Byte Statistic Register */
+#define IPQESS_REG_TX_STAT_BYTE_Q(x) (0x704 + ((x) << 3)) /* x = queue id */
+
+/* Load Balance Based Ring Offset Register */
+#define IPQESS_REG_LB_RING 0x800
+#define IPQESS_LB_RING_ENTRY_MASK 0xff
+#define IPQESS_LB_RING_ID_MASK 0x7
+#define IPQESS_LB_RING_PROFILE_ID_MASK 0x3
+#define IPQESS_LB_RING_ENTRY_BIT_OFFSET 8
+#define IPQESS_LB_RING_ID_OFFSET 0
+#define IPQESS_LB_RING_PROFILE_ID_OFFSET 3
+#define IPQESS_LB_REG_VALUE 0x6040200
+
+/* Load Balance Priority Mapping Register */
+#define IPQESS_REG_LB_PRI_START 0x804
+#define IPQESS_REG_LB_PRI_END 0x810
+#define IPQESS_LB_PRI_REG_INC 4
+#define IPQESS_LB_PRI_ENTRY_BIT_OFFSET 4
+#define IPQESS_LB_PRI_ENTRY_MASK 0xf
+
+/* RSS Priority Mapping Register */
+#define IPQESS_REG_RSS_PRI 0x820
+#define IPQESS_RSS_PRI_ENTRY_MASK 0xf
+#define IPQESS_RSS_RING_ID_MASK 0x7
+#define IPQESS_RSS_PRI_ENTRY_BIT_OFFSET 4
+
+/* RSS Indirection Register */
+#define IPQESS_REG_RSS_IDT(x) (0x840 + ((x) << 2)) /* x = No. of indirection table */
+#define IPQESS_NUM_IDT 16
+#define IPQESS_RSS_IDT_VALUE 0x64206420
+
+/* Default RSS Ring Register */
+#define IPQESS_REG_DEF_RSS 0x890
+#define IPQESS_DEF_RSS_MASK 0x7
+
+/* RSS Hash Function Type Register */
+#define IPQESS_REG_RSS_TYPE 0x894
+#define IPQESS_RSS_TYPE_NONE 0x01
+#define IPQESS_RSS_TYPE_IPV4TCP 0x02
+#define IPQESS_RSS_TYPE_IPV6_TCP 0x04
+#define IPQESS_RSS_TYPE_IPV4_UDP 0x08
+#define IPQESS_RSS_TYPE_IPV6UDP 0x10
+#define IPQESS_RSS_TYPE_IPV4 0x20
+#define IPQESS_RSS_TYPE_IPV6 0x40
+#define IPQESS_RSS_HASH_MODE_MASK 0x7f
+
+#define IPQESS_REG_RSS_HASH_VALUE 0x8C0
+
+#define IPQESS_REG_RSS_TYPE_RESULT 0x8C4
+
+#define IPQESS_HASH_TYPE_START 0
+#define IPQESS_HASH_TYPE_END 5
+#define IPQESS_HASH_TYPE_SHIFT 12
+
+#define IPQESS_RFS_FLOW_ENTRIES 1024
+#define IPQESS_RFS_FLOW_ENTRIES_MASK (IPQESS_RFS_FLOW_ENTRIES - 1)
+#define IPQESS_RFS_EXPIRE_COUNT_PER_CALL 128
+
+/* RFD Base Address Register */
+#define IPQESS_REG_RFD_BASE_ADDR_Q(x) (0x950 + ((x) << 2)) /* x = queue id */
+
+/* RFD Index Register */
+#define IPQESS_REG_RFD_IDX_Q(x) (0x9B0 + ((x) << 2)) /* x = queue id */
+
+#define IPQESS_RFD_PROD_IDX_BITS 0x00000FFF
+#define IPQESS_RFD_CONS_IDX_BITS 0x0FFF0000
+#define IPQESS_RFD_PROD_IDX_MASK 0xFFF
+#define IPQESS_RFD_CONS_IDX_MASK 0xFFF
+#define IPQESS_RFD_PROD_IDX_SHIFT 0
+#define IPQESS_RFD_CONS_IDX_SHIFT 16
+
+/* Rx Descriptor Control Register */
+#define IPQESS_REG_RX_DESC0 0xA10
+#define IPQESS_RFD_RING_SIZE_MASK 0xFFF
+#define IPQESS_RX_BUF_SIZE_MASK 0xFFFF
+#define IPQESS_RFD_RING_SIZE_SHIFT 0
+#define IPQESS_RX_BUF_SIZE_SHIFT 16
+
+#define IPQESS_REG_RX_DESC1 0xA14
+#define IPQESS_RXQ_RFD_BURST_NUM_MASK 0x3F
+#define IPQESS_RXQ_RFD_PF_THRESH_MASK 0x1F
+#define IPQESS_RXQ_RFD_LOW_THRESH_MASK 0xFFF
+#define IPQESS_RXQ_RFD_BURST_NUM_SHIFT 0
+#define IPQESS_RXQ_RFD_PF_THRESH_SHIFT 8
+#define IPQESS_RXQ_RFD_LOW_THRESH_SHIFT 16
+
+/* RXQ Control Register */
+#define IPQESS_REG_RXQ_CTRL 0xA18
+#define IPQESS_FIFO_THRESH_TYPE_SHIF 0
+#define IPQESS_FIFO_THRESH_128_BYTE 0x0
+#define IPQESS_FIFO_THRESH_64_BYTE 0x1
+#define IPQESS_RXQ_CTRL_RMV_VLAN 0x00000002
+#define IPQESS_RXQ_CTRL_EN_MASK			GENMASK(15, 8)
+#define IPQESS_RXQ_CTRL_EN(__qid)		BIT(8 + (__qid))
+
+/* AXI Burst Size Config */
+#define IPQESS_REG_AXIW_CTRL_MAXWRSIZE 0xA1C
+#define IPQESS_AXIW_MAXWRSIZE_VALUE 0x0
+
+/* Rx Statistics Register */
+#define IPQESS_REG_RX_STAT_BYTE_Q(x) (0xA30 + ((x) << 2)) /* x = queue id */
+#define IPQESS_REG_RX_STAT_PKT_Q(x) (0xA50 + ((x) << 2)) /* x = queue id */
+
+/* WoL Pattern Length Register */
+#define IPQESS_REG_WOL_PATTERN_LEN0 0xC00
+#define IPQESS_WOL_PT_LEN_MASK 0xFF
+#define IPQESS_WOL_PT0_LEN_SHIFT 0
+#define IPQESS_WOL_PT1_LEN_SHIFT 8
+#define IPQESS_WOL_PT2_LEN_SHIFT 16
+#define IPQESS_WOL_PT3_LEN_SHIFT 24
+
+#define IPQESS_REG_WOL_PATTERN_LEN1 0xC04
+#define IPQESS_WOL_PT4_LEN_SHIFT 0
+#define IPQESS_WOL_PT5_LEN_SHIFT 8
+#define IPQESS_WOL_PT6_LEN_SHIFT 16
+
+/* WoL Control Register */
+#define IPQESS_REG_WOL_CTRL 0xC08
+#define IPQESS_WOL_WK_EN 0x00000001
+#define IPQESS_WOL_MG_EN 0x00000002
+#define IPQESS_WOL_PT0_EN 0x00000004
+#define IPQESS_WOL_PT1_EN 0x00000008
+#define IPQESS_WOL_PT2_EN 0x00000010
+#define IPQESS_WOL_PT3_EN 0x00000020
+#define IPQESS_WOL_PT4_EN 0x00000040
+#define IPQESS_WOL_PT5_EN 0x00000080
+#define IPQESS_WOL_PT6_EN 0x00000100
+
+/* MAC Control Register */
+#define IPQESS_REG_MAC_CTRL0 0xC20
+#define IPQESS_REG_MAC_CTRL1 0xC24
+
+/* WoL Pattern Register */
+#define IPQESS_REG_WOL_PATTERN_START 0x5000
+#define IPQESS_PATTERN_PART_REG_OFFSET 0x40
+
+
+/* TX descriptor fields */
+#define IPQESS_TPD_HDR_SHIFT 0
+#define IPQESS_TPD_PPPOE_EN 0x00000100
+#define IPQESS_TPD_IP_CSUM_EN 0x00000200
+#define IPQESS_TPD_TCP_CSUM_EN 0x0000400
+#define IPQESS_TPD_UDP_CSUM_EN 0x00000800
+#define IPQESS_TPD_CUSTOM_CSUM_EN 0x00000C00
+#define IPQESS_TPD_LSO_EN 0x00001000
+#define IPQESS_TPD_LSO_V2_EN 0x00002000
+/* The VLAN_TAGGED bit is not used in the publicly available
+ * drivers. The definition has been stolen from the Atheros
+ * 'alx' driver (drivers/net/ethernet/atheros/alx/hw.h). It
+ * seems that it has the same meaning in regard to the EDMA
+ * hardware.
+ */
+#define IPQESS_TPD_VLAN_TAGGED 0x00004000
+#define IPQESS_TPD_IPV4_EN 0x00010000
+#define IPQESS_TPD_MSS_MASK 0x1FFF
+#define IPQESS_TPD_MSS_SHIFT 18
+#define IPQESS_TPD_CUSTOM_CSUM_SHIFT 18
+
+/* RRD descriptor fields */
+#define IPQESS_RRD_NUM_RFD_MASK 0x000F
+#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF
+#define IPQESS_RRD_SRC_PORT_NUM_MASK 0x4000
+#define IPQESS_RRD_SVLAN 0x8000
+#define IPQESS_RRD_FLOW_COOKIE_MASK 0x07FF;
+
+#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF
+#define IPQESS_RRD_CSUM_FAIL_MASK 0xC000
+#define IPQESS_RRD_CVLAN 0x0001
+#define IPQESS_RRD_DESC_VALID 0x8000
+
+#define IPQESS_RRD_PRIORITY_SHIFT 4
+#define IPQESS_RRD_PRIORITY_MASK 0x7
+#define IPQESS_RRD_PORT_TYPE_SHIFT 7
+#define IPQESS_RRD_PORT_TYPE_MASK 0x1F
+
+#endif
diff --git a/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c
new file mode 100644
index 0000000000..da5fb4deed
--- /dev/null
+++ b/target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: (GPL-2.0 OR ISC)
+/* Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all copies.
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/ethtool.h>
+#include <linux/netdevice.h>
+#include <linux/string.h>
+#include <linux/phylink.h>
+
+#include "ipqess.h"
+
+struct ipqesstool_stats {
+	uint8_t string[ETH_GSTRING_LEN];
+	uint32_t offset;
+};
+
+#define IPQESS_STAT(m)    offsetof(struct ipqesstool_statistics, m)
+#define DRVINFO_LEN	32
+
+static const struct ipqesstool_stats ipqess_stats[] = {
+	{"tx_q0_pkt", IPQESS_STAT(tx_q0_pkt)},
+	{"tx_q1_pkt", IPQESS_STAT(tx_q1_pkt)},
+	{"tx_q2_pkt", IPQESS_STAT(tx_q2_pkt)},
+	{"tx_q3_pkt", IPQESS_STAT(tx_q3_pkt)},
+	{"tx_q4_pkt", IPQESS_STAT(tx_q4_pkt)},
+	{"tx_q5_pkt", IPQESS_STAT(tx_q5_pkt)},
+	{"tx_q6_pkt", IPQESS_STAT(tx_q6_pkt)},
+	{"tx_q7_pkt", IPQESS_STAT(tx_q7_pkt)},
+	{"tx_q8_pkt", IPQESS_STAT(tx_q8_pkt)},
+	{"tx_q9_pkt", IPQESS_STAT(tx_q9_pkt)},
+	{"tx_q10_pkt", IPQESS_STAT(tx_q10_pkt)},
+	{"tx_q11_pkt", IPQESS_STAT(tx_q11_pkt)},
+	{"tx_q12_pkt", IPQESS_STAT(tx_q12_pkt)},
+	{"tx_q13_pkt", IPQESS_STAT(tx_q13_pkt)},
+	{"tx_q14_pkt", IPQESS_STAT(tx_q14_pkt)},
+	{"tx_q15_pkt", IPQESS_STAT(tx_q15_pkt)},
+	{"tx_q0_byte", IPQESS_STAT(tx_q0_byte)},
+	{"tx_q1_byte", IPQESS_STAT(tx_q1_byte)},
+	{"tx_q2_byte", IPQESS_STAT(tx_q2_byte)},
+	{"tx_q3_byte", IPQESS_STAT(tx_q3_byte)},
+	{"tx_q4_byte", IPQESS_STAT(tx_q4_byte)},
+	{"tx_q5_byte", IPQESS_STAT(tx_q5_byte)},
+	{"tx_q6_byte", IPQESS_STAT(tx_q6_byte)},
+	{"tx_q7_byte", IPQESS_STAT(tx_q7_byte)},
+	{"tx_q8_byte", IPQESS_STAT(tx_q8_byte)},
+	{"tx_q9_byte", IPQESS_STAT(tx_q9_byte)},
+	{"tx_q10_byte", IPQESS_STAT(tx_q10_byte)},
+	{"tx_q11_byte", IPQESS_STAT(tx_q11_byte)},
+	{"tx_q12_byte", IPQESS_STAT(tx_q12_byte)},
+	{"tx_q13_byte", IPQESS_STAT(tx_q13_byte)},
+	{"tx_q14_byte", IPQESS_STAT(tx_q14_byte)},
+	{"tx_q15_byte", IPQESS_STAT(tx_q15_byte)},
+	{"rx_q0_pkt", IPQESS_STAT(rx_q0_pkt)},
+	{"rx_q1_pkt", IPQESS_STAT(rx_q1_pkt)},
+	{"rx_q2_pkt", IPQESS_STAT(rx_q2_pkt)},
+	{"rx_q3_pkt", IPQESS_STAT(rx_q3_pkt)},
+	{"rx_q4_pkt", IPQESS_STAT(rx_q4_pkt)},
+	{"rx_q5_pkt", IPQESS_STAT(rx_q5_pkt)},
+	{"rx_q6_pkt", IPQESS_STAT(rx_q6_pkt)},
+	{"rx_q7_pkt", IPQESS_STAT(rx_q7_pkt)},
+	{"rx_q0_byte", IPQESS_STAT(rx_q0_byte)},
+	{"rx_q1_byte", IPQESS_STAT(rx_q1_byte)},
+	{"rx_q2_byte", IPQESS_STAT(rx_q2_byte)},
+	{"rx_q3_byte", IPQESS_STAT(rx_q3_byte)},
+	{"rx_q4_byte", IPQESS_STAT(rx_q4_byte)},
+	{"rx_q5_byte", IPQESS_STAT(rx_q5_byte)},
+	{"rx_q6_byte", IPQESS_STAT(rx_q6_byte)},
+	{"rx_q7_byte", IPQESS_STAT(rx_q7_byte)},
+	{"tx_desc_error", IPQESS_STAT(tx_desc_error)},
+};
+
+static int ipqess_get_strset_count(struct net_device *netdev, int sset)
+{
+	switch (sset) {
+	case ETH_SS_STATS:
+		return ARRAY_SIZE(ipqess_stats);
+	default:
+		netdev_dbg(netdev, "%s: Invalid string set", __func__);
+		return -EOPNOTSUPP;
+	}
+}
+
+static void ipqess_get_strings(struct net_device *netdev, uint32_t stringset,
+			       uint8_t *data)
+{
+	uint8_t *p = data;
+	uint32_t i;
+
+	switch (stringset) {
+	case ETH_SS_STATS:
+		for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++) {
+			memcpy(p, ipqess_stats[i].string,
+			       min((size_t)ETH_GSTRING_LEN,
+			       strlen(ipqess_stats[i].string) + 1));
+			p += ETH_GSTRING_LEN;
+		}
+		break;
+	}
+}
+
+static void ipqess_get_ethtool_stats(struct net_device *netdev,
+				     struct ethtool_stats *stats,
+				     uint64_t *data)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+	u32 *essstats = (u32 *)&ess->ipqessstats;
+	int i;
+
+	spin_lock(&ess->stats_lock);
+
+	ipqess_update_hw_stats(ess);
+
+	for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++)
+		data[i] = *(u32 *)(essstats + (ipqess_stats[i].offset / sizeof(u32)));
+
+	spin_unlock(&ess->stats_lock);
+}
+
+static void ipqess_get_drvinfo(struct net_device *dev,
+			       struct ethtool_drvinfo *info)
+{
+	strlcpy(info->driver, "qca_ipqess", DRVINFO_LEN);
+	strlcpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN);
+}
+
+static int ipqess_get_settings(struct net_device *netdev,
+			       struct ethtool_link_ksettings *cmd)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+
+	return phylink_ethtool_ksettings_get(ess->phylink, cmd);
+}
+
+static int ipqess_set_settings(struct net_device *netdev,
+			    const struct ethtool_link_ksettings *cmd)
+{
+	struct ipqess *ess = netdev_priv(netdev);
+
+	return phylink_ethtool_ksettings_set(ess->phylink, cmd);
+}
+
+static void ipqess_get_ringparam(struct net_device *netdev,
+			       struct ethtool_ringparam *ring)
+{
+	ring->tx_max_pending = IPQESS_TX_RING_SIZE;
+	ring->rx_max_pending = IPQESS_RX_RING_SIZE;
+}
+
+static const struct ethtool_ops ipqesstool_ops = {
+	.get_drvinfo = &ipqess_get_drvinfo,
+	.get_link = &ethtool_op_get_link,
+	.get_link_ksettings = &ipqess_get_settings,
+	.set_link_ksettings = &ipqess_set_settings,
+	.get_strings = &ipqess_get_strings,
+	.get_sset_count = &ipqess_get_strset_count,
+	.get_ethtool_stats = &ipqess_get_ethtool_stats,
+	.get_ringparam = ipqess_get_ringparam,
+};
+
+void ipqess_set_ethtool_ops(struct net_device *netdev)
+{
+	netdev->ethtool_ops = &ipqesstool_ops;
+}
diff --git a/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.c b/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.c
deleted file mode 100644
index 360d956e57..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.c
+++ /dev/null
@@ -1,1956 +0,0 @@
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include <linux/bitfield.h>
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/bitops.h>
-#include <linux/switch.h>
-#include <linux/delay.h>
-#include <linux/phy.h>
-#include <linux/clk.h>
-#include <linux/reset.h>
-#include <linux/lockdep.h>
-#include <linux/workqueue.h>
-#include <linux/of_device.h>
-#include <linux/of_address.h>
-#include <linux/of_mdio.h>
-#include <linux/mdio.h>
-#include <linux/gpio.h>
-
-#include "ar40xx.h"
-
-static struct ar40xx_priv *ar40xx_priv;
-
-#define MIB_DESC(_s , _o, _n)	\
-	{			\
-		.size = (_s),	\
-		.offset = (_o),	\
-		.name = (_n),	\
-	}
-
-static const struct ar40xx_mib_desc ar40xx_mibs[] = {
-	MIB_DESC(1, AR40XX_STATS_RXBROAD, "RxBroad"),
-	MIB_DESC(1, AR40XX_STATS_RXPAUSE, "RxPause"),
-	MIB_DESC(1, AR40XX_STATS_RXMULTI, "RxMulti"),
-	MIB_DESC(1, AR40XX_STATS_RXFCSERR, "RxFcsErr"),
-	MIB_DESC(1, AR40XX_STATS_RXALIGNERR, "RxAlignErr"),
-	MIB_DESC(1, AR40XX_STATS_RXRUNT, "RxRunt"),
-	MIB_DESC(1, AR40XX_STATS_RXFRAGMENT, "RxFragment"),
-	MIB_DESC(1, AR40XX_STATS_RX64BYTE, "Rx64Byte"),
-	MIB_DESC(1, AR40XX_STATS_RX128BYTE, "Rx128Byte"),
-	MIB_DESC(1, AR40XX_STATS_RX256BYTE, "Rx256Byte"),
-	MIB_DESC(1, AR40XX_STATS_RX512BYTE, "Rx512Byte"),
-	MIB_DESC(1, AR40XX_STATS_RX1024BYTE, "Rx1024Byte"),
-	MIB_DESC(1, AR40XX_STATS_RX1518BYTE, "Rx1518Byte"),
-	MIB_DESC(1, AR40XX_STATS_RXMAXBYTE, "RxMaxByte"),
-	MIB_DESC(1, AR40XX_STATS_RXTOOLONG, "RxTooLong"),
-	MIB_DESC(2, AR40XX_STATS_RXGOODBYTE, "RxGoodByte"),
-	MIB_DESC(2, AR40XX_STATS_RXBADBYTE, "RxBadByte"),
-	MIB_DESC(1, AR40XX_STATS_RXOVERFLOW, "RxOverFlow"),
-	MIB_DESC(1, AR40XX_STATS_FILTERED, "Filtered"),
-	MIB_DESC(1, AR40XX_STATS_TXBROAD, "TxBroad"),
-	MIB_DESC(1, AR40XX_STATS_TXPAUSE, "TxPause"),
-	MIB_DESC(1, AR40XX_STATS_TXMULTI, "TxMulti"),
-	MIB_DESC(1, AR40XX_STATS_TXUNDERRUN, "TxUnderRun"),
-	MIB_DESC(1, AR40XX_STATS_TX64BYTE, "Tx64Byte"),
-	MIB_DESC(1, AR40XX_STATS_TX128BYTE, "Tx128Byte"),
-	MIB_DESC(1, AR40XX_STATS_TX256BYTE, "Tx256Byte"),
-	MIB_DESC(1, AR40XX_STATS_TX512BYTE, "Tx512Byte"),
-	MIB_DESC(1, AR40XX_STATS_TX1024BYTE, "Tx1024Byte"),
-	MIB_DESC(1, AR40XX_STATS_TX1518BYTE, "Tx1518Byte"),
-	MIB_DESC(1, AR40XX_STATS_TXMAXBYTE, "TxMaxByte"),
-	MIB_DESC(1, AR40XX_STATS_TXOVERSIZE, "TxOverSize"),
-	MIB_DESC(2, AR40XX_STATS_TXBYTE, "TxByte"),
-	MIB_DESC(1, AR40XX_STATS_TXCOLLISION, "TxCollision"),
-	MIB_DESC(1, AR40XX_STATS_TXABORTCOL, "TxAbortCol"),
-	MIB_DESC(1, AR40XX_STATS_TXMULTICOL, "TxMultiCol"),
-	MIB_DESC(1, AR40XX_STATS_TXSINGLECOL, "TxSingleCol"),
-	MIB_DESC(1, AR40XX_STATS_TXEXCDEFER, "TxExcDefer"),
-	MIB_DESC(1, AR40XX_STATS_TXDEFER, "TxDefer"),
-	MIB_DESC(1, AR40XX_STATS_TXLATECOL, "TxLateCol"),
-};
-
-static const int ar40xx_mibs_rx_tx[] = { 15, 31 };
-
-static u32
-ar40xx_read(struct ar40xx_priv *priv, int reg)
-{
-	return readl(priv->hw_addr + reg);
-}
-
-static u32
-ar40xx_psgmii_read(struct ar40xx_priv *priv, int reg)
-{
-	return readl(priv->psgmii_hw_addr + reg);
-}
-
-static void
-ar40xx_write(struct ar40xx_priv *priv, int reg, u32 val)
-{
-	writel(val, priv->hw_addr + reg);
-}
-
-static u32
-ar40xx_rmw(struct ar40xx_priv *priv, int reg, u32 mask, u32 val)
-{
-	u32 ret;
-
-	ret = ar40xx_read(priv, reg);
-	ret &= ~mask;
-	ret |= val;
-	ar40xx_write(priv, reg, ret);
-	return ret;
-}
-
-static void
-ar40xx_psgmii_write(struct ar40xx_priv *priv, int reg, u32 val)
-{
-	writel(val, priv->psgmii_hw_addr + reg);
-}
-
-static void
-ar40xx_phy_dbg_write(struct ar40xx_priv *priv, int phy_addr,
-		     u16 dbg_addr, u16 dbg_data)
-{
-	struct mii_bus *bus = priv->mii_bus;
-
-	mutex_lock(&bus->mdio_lock);
-	bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_ADDR, dbg_addr);
-	bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_DATA, dbg_data);
-	mutex_unlock(&bus->mdio_lock);
-}
-
-static void
-ar40xx_phy_dbg_read(struct ar40xx_priv *priv, int phy_addr,
-		    u16 dbg_addr, u16 *dbg_data)
-{
-	struct mii_bus *bus = priv->mii_bus;
-
-	mutex_lock(&bus->mdio_lock);
-	bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_ADDR, dbg_addr);
-	*dbg_data = bus->read(bus, phy_addr, AR40XX_MII_ATH_DBG_DATA);
-	mutex_unlock(&bus->mdio_lock);
-}
-
-static void
-ar40xx_phy_mmd_write(struct ar40xx_priv *priv, u32 phy_id,
-		     u16 mmd_num, u16 reg_id, u16 reg_val)
-{
-	struct mii_bus *bus = priv->mii_bus;
-
-	mutex_lock(&bus->mdio_lock);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_ADDR, mmd_num);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_DATA, reg_id);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_ADDR,
-			0x4000 | mmd_num);
-	bus->write(bus, phy_id,
-		AR40XX_MII_ATH_MMD_DATA, reg_val);
-	mutex_unlock(&bus->mdio_lock);
-}
-
-static u16
-ar40xx_phy_mmd_read(struct ar40xx_priv *priv, u32 phy_id,
-		    u16 mmd_num, u16 reg_id)
-{
-	u16 value;
-	struct mii_bus *bus = priv->mii_bus;
-
-	mutex_lock(&bus->mdio_lock);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_ADDR, mmd_num);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_DATA, reg_id);
-	bus->write(bus, phy_id,
-			AR40XX_MII_ATH_MMD_ADDR,
-			0x4000 | mmd_num);
-	value = bus->read(bus, phy_id, AR40XX_MII_ATH_MMD_DATA);
-	mutex_unlock(&bus->mdio_lock);
-	return value;
-}
-
-/* Start of swconfig support */
-
-static void
-ar40xx_phy_poll_reset(struct ar40xx_priv *priv)
-{
-	u32 i, in_reset, retries = 500;
-	struct mii_bus *bus = priv->mii_bus;
-
-	/* Assume RESET was recently issued to some or all of the phys */
-	in_reset = GENMASK(AR40XX_NUM_PHYS - 1, 0);
-
-	while (retries--) {
-		/* 1ms should be plenty of time.
-		 * 802.3 spec allows for a max wait time of 500ms
-		 */
-		usleep_range(1000, 2000);
-
-		for (i = 0; i < AR40XX_NUM_PHYS; i++) {
-			int val;
-
-			/* skip devices which have completed reset */
-			if (!(in_reset & BIT(i)))
-				continue;
-
-			val = mdiobus_read(bus, i, MII_BMCR);
-			if (val < 0)
-				continue;
-
-			/* mark when phy is no longer in reset state */
-			if (!(val & BMCR_RESET))
-				in_reset &= ~BIT(i);
-		}
-
-		if (!in_reset)
-			return;
-	}
-
-	dev_warn(&bus->dev, "Failed to reset all phys! (in_reset: 0x%x)\n",
-		 in_reset);
-}
-
-static void
-ar40xx_phy_init(struct ar40xx_priv *priv)
-{
-	int i;
-	struct mii_bus *bus;
-	u16 val;
-
-	bus = priv->mii_bus;
-	for (i = 0; i < AR40XX_NUM_PORTS - 1; i++) {
-		ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_0, &val);
-		val &= ~AR40XX_PHY_MANU_CTRL_EN;
-		ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_0, val);
-		mdiobus_write(bus, i,
-			      MII_ADVERTISE, ADVERTISE_ALL |
-			      ADVERTISE_PAUSE_CAP |
-			      ADVERTISE_PAUSE_ASYM);
-		mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
-		mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
-	}
-
-	ar40xx_phy_poll_reset(priv);
-}
-
-static void
-ar40xx_port_phy_linkdown(struct ar40xx_priv *priv)
-{
-	struct mii_bus *bus;
-	int i;
-	u16 val;
-
-	bus = priv->mii_bus;
-	for (i = 0; i < AR40XX_NUM_PORTS - 1; i++) {
-		mdiobus_write(bus, i, MII_CTRL1000, 0);
-		mdiobus_write(bus, i, MII_ADVERTISE, 0);
-		mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
-		ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_0, &val);
-		val |= AR40XX_PHY_MANU_CTRL_EN;
-		ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_0, val);
-		/* disable transmit */
-		ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_2, &val);
-		val &= 0xf00f;
-		ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_2, val);
-	}
-}
-
-static void
-ar40xx_set_mirror_regs(struct ar40xx_priv *priv)
-{
-	int port;
-
-	/* reset all mirror registers */
-	ar40xx_rmw(priv, AR40XX_REG_FWD_CTRL0,
-		   AR40XX_FWD_CTRL0_MIRROR_PORT,
-		   (0xF << AR40XX_FWD_CTRL0_MIRROR_PORT_S));
-	for (port = 0; port < AR40XX_NUM_PORTS; port++) {
-		ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(port),
-			   AR40XX_PORT_LOOKUP_ING_MIRROR_EN, 0);
-
-		ar40xx_rmw(priv, AR40XX_REG_PORT_HOL_CTRL1(port),
-			   AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN, 0);
-	}
-
-	/* now enable mirroring if necessary */
-	if (priv->source_port >= AR40XX_NUM_PORTS ||
-	    priv->monitor_port >= AR40XX_NUM_PORTS ||
-	    priv->source_port == priv->monitor_port) {
-		return;
-	}
-
-	ar40xx_rmw(priv, AR40XX_REG_FWD_CTRL0,
-		   AR40XX_FWD_CTRL0_MIRROR_PORT,
-		   (priv->monitor_port << AR40XX_FWD_CTRL0_MIRROR_PORT_S));
-
-	if (priv->mirror_rx)
-		ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(priv->source_port), 0,
-			   AR40XX_PORT_LOOKUP_ING_MIRROR_EN);
-
-	if (priv->mirror_tx)
-		ar40xx_rmw(priv, AR40XX_REG_PORT_HOL_CTRL1(priv->source_port),
-			   0, AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN);
-}
-
-static int
-ar40xx_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	u8 ports = priv->vlan_table[val->port_vlan];
-	int i;
-
-	val->len = 0;
-	for (i = 0; i < dev->ports; i++) {
-		struct switch_port *p;
-
-		if (!(ports & BIT(i)))
-			continue;
-
-		p = &val->value.ports[val->len++];
-		p->id = i;
-		if ((priv->vlan_tagged & BIT(i)) ||
-		    (priv->pvid[i] != val->port_vlan))
-			p->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
-		else
-			p->flags = 0;
-	}
-	return 0;
-}
-
-static int
-ar40xx_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	u8 *vt = &priv->vlan_table[val->port_vlan];
-	int i;
-
-	*vt = 0;
-	for (i = 0; i < val->len; i++) {
-		struct switch_port *p = &val->value.ports[i];
-
-		if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED)) {
-			if (val->port_vlan == priv->pvid[p->id])
-				priv->vlan_tagged |= BIT(p->id);
-		} else {
-			priv->vlan_tagged &= ~BIT(p->id);
-			priv->pvid[p->id] = val->port_vlan;
-		}
-
-		*vt |= BIT(p->id);
-	}
-	return 0;
-}
-
-static int
-ar40xx_reg_wait(struct ar40xx_priv *priv, u32 reg, u32 mask, u32 val,
-		unsigned timeout)
-{
-	int i;
-
-	for (i = 0; i < timeout; i++) {
-		u32 t;
-
-		t = ar40xx_read(priv, reg);
-		if ((t & mask) == val)
-			return 0;
-
-		usleep_range(1000, 2000);
-	}
-
-	return -ETIMEDOUT;
-}
-
-static int
-ar40xx_mib_op(struct ar40xx_priv *priv, u32 op)
-{
-	int ret;
-
-	lockdep_assert_held(&priv->mib_lock);
-
-	/* Capture the hardware statistics for all ports */
-	ar40xx_rmw(priv, AR40XX_REG_MIB_FUNC,
-		   AR40XX_MIB_FUNC, (op << AR40XX_MIB_FUNC_S));
-
-	/* Wait for the capturing to complete. */
-	ret = ar40xx_reg_wait(priv, AR40XX_REG_MIB_FUNC,
-			      AR40XX_MIB_BUSY, 0, 10);
-
-	return ret;
-}
-
-static void
-ar40xx_mib_fetch_port_stat(struct ar40xx_priv *priv, int port, bool flush)
-{
-	unsigned int base;
-	u64 *mib_stats;
-	int i;
-	u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
-
-	WARN_ON(port >= priv->dev.ports);
-
-	lockdep_assert_held(&priv->mib_lock);
-
-	base = AR40XX_REG_PORT_STATS_START +
-	       AR40XX_REG_PORT_STATS_LEN * port;
-
-	mib_stats = &priv->mib_stats[port * num_mibs];
-	if (flush) {
-		u32 len;
-
-		len = num_mibs * sizeof(*mib_stats);
-		memset(mib_stats, 0, len);
-		return;
-	}
-	for (i = 0; i < num_mibs; i++) {
-		const struct ar40xx_mib_desc *mib;
-		u64 t;
-
-		mib = &ar40xx_mibs[i];
-		t = ar40xx_read(priv, base + mib->offset);
-		if (mib->size == 2) {
-			u64 hi;
-
-			hi = ar40xx_read(priv, base + mib->offset + 4);
-			t |= hi << 32;
-		}
-
-		mib_stats[i] += t;
-	}
-}
-
-/* similar to ar40xx_mib_fetch_port_stat, but only fetch RXGOODBYTE and TXBYTE */
-static void
-ar40xx_mib_fetch_port_stat_rx_tx(struct ar40xx_priv *priv, int port)
-{
-	unsigned int base;
-	u64 *mib_stats;
-	int j;
-	u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
-
-	WARN_ON(port >= priv->dev.ports);
-
-	lockdep_assert_held(&priv->mib_lock);
-
-	base = AR40XX_REG_PORT_STATS_START +
-	       AR40XX_REG_PORT_STATS_LEN * port;
-
-	mib_stats = &priv->mib_stats[port * num_mibs];
-	for (j = 0; j < ARRAY_SIZE(ar40xx_mibs_rx_tx); j++) {
-		const int i = ar40xx_mibs_rx_tx[j];
-		const struct ar40xx_mib_desc *mib;
-		u64 t;
-
-		mib = &ar40xx_mibs[i];
-		t = ar40xx_read(priv, base + mib->offset);
-		t |= ar40xx_read(priv, base + mib->offset + 4) << 32;
-
-		mib_stats[i] += t;
-	}
-}
-
-static int
-ar40xx_mib_capture(struct ar40xx_priv *priv)
-{
-	return ar40xx_mib_op(priv, AR40XX_MIB_FUNC_CAPTURE);
-}
-
-static int
-ar40xx_mib_flush(struct ar40xx_priv *priv)
-{
-	return ar40xx_mib_op(priv, AR40XX_MIB_FUNC_FLUSH);
-}
-
-static int
-ar40xx_sw_set_reset_mibs(struct switch_dev *dev,
-			 const struct switch_attr *attr,
-			 struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	unsigned int len;
-	int ret;
-	u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
-
-	mutex_lock(&priv->mib_lock);
-
-	len = priv->dev.ports * num_mibs * sizeof(*priv->mib_stats);
-	memset(priv->mib_stats, 0, len);
-	ret = ar40xx_mib_flush(priv);
-
-	mutex_unlock(&priv->mib_lock);
-	return ret;
-}
-
-static int
-ar40xx_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
-		   struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	priv->vlan = !!val->value.i;
-	return 0;
-}
-
-static int
-ar40xx_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
-		   struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	val->value.i = priv->vlan;
-	return 0;
-}
-
-static int
-ar40xx_sw_set_mirror_rx_enable(struct switch_dev *dev,
-			       const struct switch_attr *attr,
-			       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	priv->mirror_rx = !!val->value.i;
-	ar40xx_set_mirror_regs(priv);
-	mutex_unlock(&priv->reg_mutex);
-
-	return 0;
-}
-
-static int
-ar40xx_sw_get_mirror_rx_enable(struct switch_dev *dev,
-			       const struct switch_attr *attr,
-			       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	val->value.i = priv->mirror_rx;
-	mutex_unlock(&priv->reg_mutex);
-	return 0;
-}
-
-static int
-ar40xx_sw_set_mirror_tx_enable(struct switch_dev *dev,
-			       const struct switch_attr *attr,
-			       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	priv->mirror_tx = !!val->value.i;
-	ar40xx_set_mirror_regs(priv);
-	mutex_unlock(&priv->reg_mutex);
-
-	return 0;
-}
-
-static int
-ar40xx_sw_get_mirror_tx_enable(struct switch_dev *dev,
-			       const struct switch_attr *attr,
-			       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	val->value.i = priv->mirror_tx;
-	mutex_unlock(&priv->reg_mutex);
-	return 0;
-}
-
-static int
-ar40xx_sw_set_mirror_monitor_port(struct switch_dev *dev,
-				  const struct switch_attr *attr,
-				  struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	priv->monitor_port = val->value.i;
-	ar40xx_set_mirror_regs(priv);
-	mutex_unlock(&priv->reg_mutex);
-
-	return 0;
-}
-
-static int
-ar40xx_sw_get_mirror_monitor_port(struct switch_dev *dev,
-				  const struct switch_attr *attr,
-				  struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	val->value.i = priv->monitor_port;
-	mutex_unlock(&priv->reg_mutex);
-	return 0;
-}
-
-static int
-ar40xx_sw_set_mirror_source_port(struct switch_dev *dev,
-				 const struct switch_attr *attr,
-				 struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	priv->source_port = val->value.i;
-	ar40xx_set_mirror_regs(priv);
-	mutex_unlock(&priv->reg_mutex);
-
-	return 0;
-}
-
-static int
-ar40xx_sw_get_mirror_source_port(struct switch_dev *dev,
-				 const struct switch_attr *attr,
-				 struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	mutex_lock(&priv->reg_mutex);
-	val->value.i = priv->source_port;
-	mutex_unlock(&priv->reg_mutex);
-	return 0;
-}
-
-static int
-ar40xx_sw_set_linkdown(struct switch_dev *dev,
-		       const struct switch_attr *attr,
-		       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	if (val->value.i == 1)
-		ar40xx_port_phy_linkdown(priv);
-	else
-		ar40xx_phy_init(priv);
-
-	return 0;
-}
-
-static int
-ar40xx_sw_set_port_reset_mib(struct switch_dev *dev,
-			     const struct switch_attr *attr,
-			     struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	int port;
-	int ret;
-
-	port = val->port_vlan;
-	if (port >= dev->ports)
-		return -EINVAL;
-
-	mutex_lock(&priv->mib_lock);
-	ret = ar40xx_mib_capture(priv);
-	if (ret)
-		goto unlock;
-
-	ar40xx_mib_fetch_port_stat(priv, port, true);
-
-unlock:
-	mutex_unlock(&priv->mib_lock);
-	return ret;
-}
-
-static int
-ar40xx_sw_get_port_mib(struct switch_dev *dev,
-		       const struct switch_attr *attr,
-		       struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	u64 *mib_stats;
-	int port;
-	int ret;
-	char *buf = priv->buf;
-	int i, len = 0;
-	u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
-
-	port = val->port_vlan;
-	if (port >= dev->ports)
-		return -EINVAL;
-
-	mutex_lock(&priv->mib_lock);
-	ret = ar40xx_mib_capture(priv);
-	if (ret)
-		goto unlock;
-
-	ar40xx_mib_fetch_port_stat(priv, port, false);
-
-	len += snprintf(buf + len, sizeof(priv->buf) - len,
-			"Port %d MIB counters\n",
-			port);
-
-	mib_stats = &priv->mib_stats[port * num_mibs];
-	for (i = 0; i < num_mibs; i++)
-		len += snprintf(buf + len, sizeof(priv->buf) - len,
-				"%-12s: %llu\n",
-				ar40xx_mibs[i].name,
-				mib_stats[i]);
-
-	val->value.s = buf;
-	val->len = len;
-
-unlock:
-	mutex_unlock(&priv->mib_lock);
-	return ret;
-}
-
-static int
-ar40xx_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
-		  struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	priv->vlan_id[val->port_vlan] = val->value.i;
-	return 0;
-}
-
-static int
-ar40xx_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
-		  struct switch_val *val)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	val->value.i = priv->vlan_id[val->port_vlan];
-	return 0;
-}
-
-static int
-ar40xx_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	*vlan = priv->pvid[port];
-	return 0;
-}
-
-static int
-ar40xx_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	/* make sure no invalid PVIDs get set */
-	if (vlan >= dev->vlans)
-		return -EINVAL;
-
-	priv->pvid[port] = vlan;
-	return 0;
-}
-
-static void
-ar40xx_read_port_link(struct ar40xx_priv *priv, int port,
-		      struct switch_port_link *link)
-{
-	u32 status;
-	u32 speed;
-
-	memset(link, 0, sizeof(*link));
-
-	status = ar40xx_read(priv, AR40XX_REG_PORT_STATUS(port));
-
-	link->aneg = !!(status & AR40XX_PORT_AUTO_LINK_EN);
-	if (link->aneg || (port != AR40XX_PORT_CPU))
-		link->link = !!(status & AR40XX_PORT_STATUS_LINK_UP);
-	else
-		link->link = true;
-
-	if (!link->link)
-		return;
-
-	link->duplex = !!(status & AR40XX_PORT_DUPLEX);
-	link->tx_flow = !!(status & AR40XX_PORT_STATUS_TXFLOW);
-	link->rx_flow = !!(status & AR40XX_PORT_STATUS_RXFLOW);
-
-	speed = (status & AR40XX_PORT_SPEED) >>
-		 AR40XX_PORT_STATUS_SPEED_S;
-
-	switch (speed) {
-	case AR40XX_PORT_SPEED_10M:
-		link->speed = SWITCH_PORT_SPEED_10;
-		break;
-	case AR40XX_PORT_SPEED_100M:
-		link->speed = SWITCH_PORT_SPEED_100;
-		break;
-	case AR40XX_PORT_SPEED_1000M:
-		link->speed = SWITCH_PORT_SPEED_1000;
-		break;
-	default:
-		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
-		break;
-	}
-}
-
-static int
-ar40xx_sw_get_port_link(struct switch_dev *dev, int port,
-			struct switch_port_link *link)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-
-	ar40xx_read_port_link(priv, port, link);
-	return 0;
-}
-
-static int
-ar40xx_sw_get_port_stats(struct switch_dev *dev, int port,
-			struct switch_port_stats *stats)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	u32 num_mibs = ARRAY_SIZE(ar40xx_mibs);
-	u64 *mib_stats;
-	int ret = 0;
-	static int last_port = AR40XX_NUM_PORTS - 1;
-
-	mutex_lock(&priv->mib_lock);
-
-	/* Avoid unnecessary capture */
-	if (last_port >= port) {
-		ret = ar40xx_mib_capture(priv);
-		if (ret)
-			goto unlock;
-	}
-	last_port = port;
-
-	ar40xx_mib_fetch_port_stat_rx_tx(priv, port);
-
-	mib_stats = &priv->mib_stats[port * num_mibs];
-	stats->rx_bytes = mib_stats[ar40xx_mibs_rx_tx[0]];
-	stats->tx_bytes = mib_stats[ar40xx_mibs_rx_tx[1]];
-unlock:
-	mutex_unlock(&priv->mib_lock);
-	return ret;
-}
-
-static const struct switch_attr ar40xx_sw_attr_globals[] = {
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "enable_vlan",
-		.description = "Enable VLAN mode",
-		.set = ar40xx_sw_set_vlan,
-		.get = ar40xx_sw_get_vlan,
-		.max = 1
-	},
-	{
-		.type = SWITCH_TYPE_NOVAL,
-		.name = "reset_mibs",
-		.description = "Reset all MIB counters",
-		.set = ar40xx_sw_set_reset_mibs,
-	},
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "enable_mirror_rx",
-		.description = "Enable mirroring of RX packets",
-		.set = ar40xx_sw_set_mirror_rx_enable,
-		.get = ar40xx_sw_get_mirror_rx_enable,
-		.max = 1
-	},
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "enable_mirror_tx",
-		.description = "Enable mirroring of TX packets",
-		.set = ar40xx_sw_set_mirror_tx_enable,
-		.get = ar40xx_sw_get_mirror_tx_enable,
-		.max = 1
-	},
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "mirror_monitor_port",
-		.description = "Mirror monitor port",
-		.set = ar40xx_sw_set_mirror_monitor_port,
-		.get = ar40xx_sw_get_mirror_monitor_port,
-		.max = AR40XX_NUM_PORTS - 1
-	},
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "mirror_source_port",
-		.description = "Mirror source port",
-		.set = ar40xx_sw_set_mirror_source_port,
-		.get = ar40xx_sw_get_mirror_source_port,
-		.max = AR40XX_NUM_PORTS - 1
-	},
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "linkdown",
-		.description = "Link down all the PHYs",
-		.set = ar40xx_sw_set_linkdown,
-		.max = 1
-	},
-};
-
-static const struct switch_attr ar40xx_sw_attr_port[] = {
-	{
-		.type = SWITCH_TYPE_NOVAL,
-		.name = "reset_mib",
-		.description = "Reset single port MIB counters",
-		.set = ar40xx_sw_set_port_reset_mib,
-	},
-	{
-		.type = SWITCH_TYPE_STRING,
-		.name = "mib",
-		.description = "Get port's MIB counters",
-		.set = NULL,
-		.get = ar40xx_sw_get_port_mib,
-	},
-};
-
-const struct switch_attr ar40xx_sw_attr_vlan[] = {
-	{
-		.type = SWITCH_TYPE_INT,
-		.name = "vid",
-		.description = "VLAN ID (0-4094)",
-		.set = ar40xx_sw_set_vid,
-		.get = ar40xx_sw_get_vid,
-		.max = 4094,
-	},
-};
-
-/* End of swconfig support */
-
-static int
-ar40xx_wait_bit(struct ar40xx_priv *priv, int reg, u32 mask, u32 val)
-{
-	int timeout = 20;
-	u32 t;
-
-	while (1) {
-		t = ar40xx_read(priv, reg);
-		if ((t & mask) == val)
-			return 0;
-
-		if (timeout-- <= 0)
-			break;
-
-		usleep_range(10, 20);
-	}
-
-	pr_err("ar40xx: timeout for reg %08x: %08x & %08x != %08x\n",
-	       (unsigned int)reg, t, mask, val);
-	return -ETIMEDOUT;
-}
-
-static int
-ar40xx_atu_flush(struct ar40xx_priv *priv)
-{
-	int ret;
-
-	ret = ar40xx_wait_bit(priv, AR40XX_REG_ATU_FUNC,
-			      AR40XX_ATU_FUNC_BUSY, 0);
-	if (!ret)
-		ar40xx_write(priv, AR40XX_REG_ATU_FUNC,
-			     AR40XX_ATU_FUNC_OP_FLUSH |
-			     AR40XX_ATU_FUNC_BUSY);
-
-	return ret;
-}
-
-static void
-ar40xx_ess_reset(struct ar40xx_priv *priv)
-{
-	reset_control_assert(priv->ess_rst);
-	mdelay(10);
-	reset_control_deassert(priv->ess_rst);
-	/* Waiting for all inner tables init done.
-	  * It cost 5~10ms.
-	  */
-	mdelay(10);
-
-	pr_info("ESS reset ok!\n");
-}
-
-/* Start of psgmii self test */
-
-static void
-ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
-{
-	u32 n;
-	struct mii_bus *bus = priv->mii_bus;
-	/* reset phy psgmii */
-	/* fix phy psgmii RX 20bit */
-	mdiobus_write(bus, 5, 0x0, 0x005b);
-	/* reset phy psgmii */
-	mdiobus_write(bus, 5, 0x0, 0x001b);
-	/* release reset phy psgmii */
-	mdiobus_write(bus, 5, 0x0, 0x005b);
-
-	for (n = 0; n < AR40XX_PSGMII_CALB_NUM; n++) {
-		u16 status;
-
-		status = ar40xx_phy_mmd_read(priv, 5, 1, 0x28);
-		if (status & BIT(0))
-			break;
-		/* Polling interval to check PSGMII PLL in malibu is ready
-		  * the worst time is 8.67ms
-		  * for 25MHz reference clock
-		  * [512+(128+2048)*49]*80ns+100us
-		  */
-		mdelay(2);
-	}
-	mdelay(50);
-
-	/*check malibu psgmii calibration done end..*/
-
-	/*freeze phy psgmii RX CDR*/
-	mdiobus_write(bus, 5, 0x1a, 0x2230);
-
-	ar40xx_ess_reset(priv);
-
-	/*check psgmii calibration done start*/
-	for (n = 0; n < AR40XX_PSGMII_CALB_NUM; n++) {
-		u32 status;
-
-		status = ar40xx_psgmii_read(priv, 0xa0);
-		if (status & BIT(0))
-			break;
-		/* Polling interval to check PSGMII PLL in ESS is ready */
-		mdelay(2);
-	}
-	mdelay(50);
-
-	/* check dakota psgmii calibration done end..*/
-
-	/* relesae phy psgmii RX CDR */
-	mdiobus_write(bus, 5, 0x1a, 0x3230);
-	/* release phy psgmii RX 20bit */
-	mdiobus_write(bus, 5, 0x0, 0x005f);
-	mdelay(200);
-}
-
-static void
-ar40xx_psgmii_single_phy_testing(struct ar40xx_priv *priv, int phy)
-{
-	int j;
-	u32 tx_ok, tx_error;
-	u32 rx_ok, rx_error;
-	u32 tx_ok_high16;
-	u32 rx_ok_high16;
-	u32 tx_all_ok, rx_all_ok;
-	struct mii_bus *bus = priv->mii_bus;
-
-	mdiobus_write(bus, phy, 0x0, 0x9000);
-	mdiobus_write(bus, phy, 0x0, 0x4140);
-
-	for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) {
-		u16 status;
-
-		status = mdiobus_read(bus, phy, 0x11);
-		if (status & AR40XX_PHY_SPEC_STATUS_LINK)
-			break;
-		/* the polling interval to check if the PHY link up or not
-		  * maxwait_timer: 750 ms +/-10 ms
-		  * minwait_timer : 1 us +/- 0.1us
-		  * time resides in minwait_timer ~ maxwait_timer
-		  * see IEEE 802.3 section 40.4.5.2
-		  */
-		mdelay(8);
-	}
-
-	/* enable check */
-	ar40xx_phy_mmd_write(priv, phy, 7, 0x8029, 0x0000);
-	ar40xx_phy_mmd_write(priv, phy, 7, 0x8029, 0x0003);
-
-	/* start traffic */
-	ar40xx_phy_mmd_write(priv, phy, 7, 0x8020, 0xa000);
-	/* wait for all traffic end
-	  * 4096(pkt num)*1524(size)*8ns(125MHz)=49.9ms
-	  */
-	mdelay(50);
-
-	/* check counter */
-	tx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802e);
-	tx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802d);
-	tx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802f);
-	rx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802b);
-	rx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802a);
-	rx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802c);
-	tx_all_ok = tx_ok + (tx_ok_high16 << 16);
-	rx_all_ok = rx_ok + (rx_ok_high16 << 16);
-	if (tx_all_ok == 0x1000 && tx_error == 0) {
-		/* success */
-		priv->phy_t_status &= (~BIT(phy));
-	} else {
-		pr_info("PHY %d single test PSGMII issue happen!\n", phy);
-		priv->phy_t_status |= BIT(phy);
-	}
-
-	mdiobus_write(bus, phy, 0x0, 0x1840);
-}
-
-static void
-ar40xx_psgmii_all_phy_testing(struct ar40xx_priv *priv)
-{
-	int phy, j;
-	struct mii_bus *bus = priv->mii_bus;
-
-	mdiobus_write(bus, 0x1f, 0x0, 0x9000);
-	mdiobus_write(bus, 0x1f, 0x0, 0x4140);
-
-	for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) {
-		for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
-			u16 status;
-
-			status = mdiobus_read(bus, phy, 0x11);
-			if (!(status & BIT(10)))
-				break;
-		}
-
-		if (phy >= (AR40XX_NUM_PORTS - 1))
-			break;
-		/* The polling interva to check if the PHY link up or not */
-		mdelay(8);
-	}
-	/* enable check */
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0000);
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0003);
-
-	/* start traffic */
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8020, 0xa000);
-	/* wait for all traffic end
-	  * 4096(pkt num)*1524(size)*8ns(125MHz)=49.9ms
-	  */
-	mdelay(50);
-
-	for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
-		u32 tx_ok, tx_error;
-		u32 rx_ok, rx_error;
-		u32 tx_ok_high16;
-		u32 rx_ok_high16;
-		u32 tx_all_ok, rx_all_ok;
-
-		/* check counter */
-		tx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802e);
-		tx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802d);
-		tx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802f);
-		rx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802b);
-		rx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802a);
-		rx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802c);
-		tx_all_ok = tx_ok + (tx_ok_high16<<16);
-		rx_all_ok = rx_ok + (rx_ok_high16<<16);
-		if (tx_all_ok == 0x1000 && tx_error == 0) {
-			/* success */
-			priv->phy_t_status &= ~BIT(phy + 8);
-		} else {
-			pr_info("PHY%d test see issue!\n", phy);
-			priv->phy_t_status |= BIT(phy + 8);
-		}
-	}
-
-	pr_debug("PHY all test 0x%x \r\n", priv->phy_t_status);
-}
-
-void
-ar40xx_psgmii_self_test(struct ar40xx_priv *priv)
-{
-	u32 i, phy;
-	struct mii_bus *bus = priv->mii_bus;
-
-	ar40xx_malibu_psgmii_ess_reset(priv);
-
-	/* switch to access MII reg for copper */
-	mdiobus_write(bus, 4, 0x1f, 0x8500);
-	for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
-		/*enable phy mdio broadcast write*/
-		ar40xx_phy_mmd_write(priv, phy, 7, 0x8028, 0x801f);
-	}
-	/* force no link by power down */
-	mdiobus_write(bus, 0x1f, 0x0, 0x1840);
-	/*packet number*/
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8021, 0x1000);
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8062, 0x05e0);
-
-	/*fix mdi status */
-	mdiobus_write(bus, 0x1f, 0x10, 0x6800);
-	for (i = 0; i < AR40XX_PSGMII_CALB_NUM; i++) {
-		priv->phy_t_status = 0;
-
-		for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
-			ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(phy + 1),
-				AR40XX_PORT_LOOKUP_LOOPBACK,
-				AR40XX_PORT_LOOKUP_LOOPBACK);
-		}
-
-		for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++)
-			ar40xx_psgmii_single_phy_testing(priv, phy);
-
-		ar40xx_psgmii_all_phy_testing(priv);
-
-		if (priv->phy_t_status)
-			ar40xx_malibu_psgmii_ess_reset(priv);
-		else
-			break;
-	}
-
-	if (i >= AR40XX_PSGMII_CALB_NUM)
-		pr_info("PSGMII cannot recover\n");
-	else
-		pr_debug("PSGMII recovered after %d times reset\n", i);
-
-	/* configuration recover */
-	/* packet number */
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8021, 0x0);
-	/* disable check */
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0);
-	/* disable traffic */
-	ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8020, 0x0);
-}
-
-void
-ar40xx_psgmii_self_test_clean(struct ar40xx_priv *priv)
-{
-	int phy;
-	struct mii_bus *bus = priv->mii_bus;
-
-	/* disable phy internal loopback */
-	mdiobus_write(bus, 0x1f, 0x10, 0x6860);
-	mdiobus_write(bus, 0x1f, 0x0, 0x9040);
-
-	for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) {
-		/* disable mac loop back */
-		ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(phy + 1),
-				AR40XX_PORT_LOOKUP_LOOPBACK, 0);
-		/* disable phy mdio broadcast write */
-		ar40xx_phy_mmd_write(priv, phy, 7, 0x8028, 0x001f);
-	}
-
-	/* clear fdb entry */
-	ar40xx_atu_flush(priv);
-}
-
-/* End of psgmii self test */
-
-static void
-ar40xx_mac_mode_init(struct ar40xx_priv *priv, u32 mode)
-{
-	if (mode == PORT_WRAPPER_PSGMII) {
-		ar40xx_psgmii_write(priv, AR40XX_PSGMII_MODE_CONTROL, 0x2200);
-		ar40xx_psgmii_write(priv, AR40XX_PSGMIIPHY_TX_CONTROL, 0x8380);
-	}
-}
-
-static
-int ar40xx_cpuport_setup(struct ar40xx_priv *priv)
-{
-	u32 t;
-
-	t = AR40XX_PORT_STATUS_TXFLOW |
-	     AR40XX_PORT_STATUS_RXFLOW |
-	     AR40XX_PORT_TXHALF_FLOW |
-	     AR40XX_PORT_DUPLEX |
-	     AR40XX_PORT_SPEED_1000M;
-	ar40xx_write(priv, AR40XX_REG_PORT_STATUS(0), t);
-	usleep_range(10, 20);
-
-	t |= AR40XX_PORT_TX_EN |
-	       AR40XX_PORT_RX_EN;
-	ar40xx_write(priv, AR40XX_REG_PORT_STATUS(0), t);
-
-	return 0;
-}
-
-static void
-ar40xx_init_port(struct ar40xx_priv *priv, int port)
-{
-	u32 t;
-
-	ar40xx_write(priv, AR40XX_REG_PORT_STATUS(port), 0);
-
-	ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
-
-	ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
-
-	t = AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH << AR40XX_PORT_VLAN1_OUT_MODE_S;
-	ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
-
-	t = AR40XX_PORT_LOOKUP_LEARN;
-	t |= AR40XX_PORT_STATE_FORWARD << AR40XX_PORT_LOOKUP_STATE_S;
-	ar40xx_write(priv, AR40XX_REG_PORT_LOOKUP(port), t);
-}
-
-void
-ar40xx_init_globals(struct ar40xx_priv *priv)
-{
-	u32 t;
-
-	/* enable CPU port and disable mirror port */
-	t = AR40XX_FWD_CTRL0_CPU_PORT_EN |
-	    AR40XX_FWD_CTRL0_MIRROR_PORT;
-	ar40xx_write(priv, AR40XX_REG_FWD_CTRL0, t);
-
-	/* forward multicast and broadcast frames to CPU */
-	t = (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_UC_FLOOD_S) |
-	    (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_MC_FLOOD_S) |
-	    (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_BC_FLOOD_S);
-	ar40xx_write(priv, AR40XX_REG_FWD_CTRL1, t);
-
-	/* enable jumbo frames */
-	ar40xx_rmw(priv, AR40XX_REG_MAX_FRAME_SIZE,
-		   AR40XX_MAX_FRAME_SIZE_MTU, 9018 + 8 + 2);
-
-	/* Enable MIB counters */
-	ar40xx_rmw(priv, AR40XX_REG_MODULE_EN, 0,
-		   AR40XX_MODULE_EN_MIB);
-
-	/* Disable AZ */
-	ar40xx_write(priv, AR40XX_REG_EEE_CTRL, 0);
-
-	/* set flowctrl thershold for cpu port */
-	t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
-	      AR40XX_PORT0_FC_THRESH_OFF_DFLT;
-	ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
-}
-
-static int
-ar40xx_hw_init(struct ar40xx_priv *priv)
-{
-	u32 i;
-
-	ar40xx_ess_reset(priv);
-
-	if (!priv->mii_bus)
-		return -1;
-
-	ar40xx_psgmii_self_test(priv);
-	ar40xx_psgmii_self_test_clean(priv);
-
-	ar40xx_mac_mode_init(priv, priv->mac_mode);
-
-	for (i = 0; i < priv->dev.ports; i++)
-		ar40xx_init_port(priv, i);
-
-	ar40xx_init_globals(priv);
-
-	return 0;
-}
-
-/* Start of qm error WAR */
-
-static
-int ar40xx_force_1g_full(struct ar40xx_priv *priv, u32 port_id)
-{
-	u32 reg;
-
-	if (port_id < 0 || port_id > 6)
-		return -1;
-
-	reg = AR40XX_REG_PORT_STATUS(port_id);
-	return ar40xx_rmw(priv, reg, AR40XX_PORT_SPEED,
-			(AR40XX_PORT_SPEED_1000M | AR40XX_PORT_DUPLEX));
-}
-
-static
-int ar40xx_get_qm_status(struct ar40xx_priv *priv,
-			 u32 port_id, u32 *qm_buffer_err)
-{
-	u32 reg;
-	u32 qm_val;
-
-	if (port_id < 1 || port_id > 5) {
-		*qm_buffer_err = 0;
-		return -1;
-	}
-
-	if (port_id < 4) {
-		reg = AR40XX_REG_QM_PORT0_3_QNUM;
-		ar40xx_write(priv, AR40XX_REG_QM_DEBUG_ADDR, reg);
-		qm_val = ar40xx_read(priv, AR40XX_REG_QM_DEBUG_VALUE);
-		/* every 8 bits for each port */
-		*qm_buffer_err = (qm_val >> (port_id * 8)) & 0xFF;
-	} else {
-		reg = AR40XX_REG_QM_PORT4_6_QNUM;
-		ar40xx_write(priv, AR40XX_REG_QM_DEBUG_ADDR, reg);
-		qm_val = ar40xx_read(priv, AR40XX_REG_QM_DEBUG_VALUE);
-		/* every 8 bits for each port */
-		*qm_buffer_err = (qm_val >> ((port_id-4) * 8)) & 0xFF;
-	}
-
-	return 0;
-}
-
-static void
-ar40xx_sw_mac_polling_task(struct ar40xx_priv *priv)
-{
-	static int task_count;
-	u32 i;
-	u32 reg, value;
-	u32 link, speed, duplex;
-	u32 qm_buffer_err;
-	u16 port_phy_status[AR40XX_NUM_PORTS];
-	static u32 qm_err_cnt[AR40XX_NUM_PORTS] = {0, 0, 0, 0, 0, 0};
-	static u32 link_cnt[AR40XX_NUM_PORTS] = {0, 0, 0, 0, 0, 0};
-	struct mii_bus *bus = NULL;
-
-	if (!priv || !priv->mii_bus)
-		return;
-
-	bus = priv->mii_bus;
-
-	++task_count;
-
-	for (i = 1; i < AR40XX_NUM_PORTS; ++i) {
-		port_phy_status[i] =
-			mdiobus_read(bus, i-1, AR40XX_PHY_SPEC_STATUS);
-
-		speed = FIELD_GET(AR40XX_PHY_SPEC_STATUS_SPEED,
-				  port_phy_status[i]);
-		link = FIELD_GET(AR40XX_PHY_SPEC_STATUS_LINK,
-				 port_phy_status[i]);
-		duplex = FIELD_GET(AR40XX_PHY_SPEC_STATUS_DUPLEX,
-				   port_phy_status[i]);
-
-		if (link != priv->ar40xx_port_old_link[i]) {
-			++link_cnt[i];
-			/* Up --> Down */
-			if ((priv->ar40xx_port_old_link[i] ==
-					AR40XX_PORT_LINK_UP) &&
-			    (link == AR40XX_PORT_LINK_DOWN)) {
-				/* LINK_EN disable(MAC force mode)*/
-				reg = AR40XX_REG_PORT_STATUS(i);
-				ar40xx_rmw(priv, reg,
-						AR40XX_PORT_AUTO_LINK_EN, 0);
-
-				/* Check queue buffer */
-				qm_err_cnt[i] = 0;
-				ar40xx_get_qm_status(priv, i, &qm_buffer_err);
-				if (qm_buffer_err) {
-					priv->ar40xx_port_qm_buf[i] =
-						AR40XX_QM_NOT_EMPTY;
-				} else {
-					u16 phy_val = 0;
-
-					priv->ar40xx_port_qm_buf[i] =
-						AR40XX_QM_EMPTY;
-					ar40xx_force_1g_full(priv, i);
-					/* Ref:QCA8337 Datasheet,Clearing
-					 * MENU_CTRL_EN prevents phy to
-					 * stuck in 100BT mode when
-					 * bringing up the link
-					 */
-					ar40xx_phy_dbg_read(priv, i-1,
-							    AR40XX_PHY_DEBUG_0,
-							    &phy_val);
-					phy_val &= (~AR40XX_PHY_MANU_CTRL_EN);
-					ar40xx_phy_dbg_write(priv, i-1,
-							     AR40XX_PHY_DEBUG_0,
-							     phy_val);
-				}
-				priv->ar40xx_port_old_link[i] = link;
-			} else if ((priv->ar40xx_port_old_link[i] ==
-						AR40XX_PORT_LINK_DOWN) &&
-					(link == AR40XX_PORT_LINK_UP)) {
-				/* Down --> Up */
-				if (priv->port_link_up[i] < 1) {
-					++priv->port_link_up[i];
-				} else {
-					/* Change port status */
-					reg = AR40XX_REG_PORT_STATUS(i);
-					value = ar40xx_read(priv, reg);
-					priv->port_link_up[i] = 0;
-
-					value &= ~(AR40XX_PORT_DUPLEX |
-						   AR40XX_PORT_SPEED);
-					value |= speed | (duplex ? BIT(6) : 0);
-					ar40xx_write(priv, reg, value);
-					/* clock switch need such time
-					 * to avoid glitch
-					 */
-					usleep_range(100, 200);
-
-					value |= AR40XX_PORT_AUTO_LINK_EN;
-					ar40xx_write(priv, reg, value);
-					/* HW need such time to make sure link
-					 * stable before enable MAC
-					 */
-					usleep_range(100, 200);
-
-					if (speed == AR40XX_PORT_SPEED_100M) {
-						u16 phy_val = 0;
-						/* Enable @100M, if down to 10M
-						 * clock will change smoothly
-						 */
-						ar40xx_phy_dbg_read(priv, i-1,
-								    0,
-								    &phy_val);
-						phy_val |=
-							AR40XX_PHY_MANU_CTRL_EN;
-						ar40xx_phy_dbg_write(priv, i-1,
-								     0,
-								     phy_val);
-					}
-					priv->ar40xx_port_old_link[i] = link;
-				}
-			}
-		}
-
-		if (priv->ar40xx_port_qm_buf[i] == AR40XX_QM_NOT_EMPTY) {
-			/* Check QM */
-			ar40xx_get_qm_status(priv, i, &qm_buffer_err);
-			if (qm_buffer_err) {
-				++qm_err_cnt[i];
-			} else {
-				priv->ar40xx_port_qm_buf[i] =
-						AR40XX_QM_EMPTY;
-				qm_err_cnt[i] = 0;
-				ar40xx_force_1g_full(priv, i);
-			}
-		}
-	}
-}
-
-static void
-ar40xx_qm_err_check_work_task(struct work_struct *work)
-{
-	struct ar40xx_priv *priv = container_of(work, struct ar40xx_priv,
-					qm_dwork.work);
-
-	mutex_lock(&priv->qm_lock);
-
-	ar40xx_sw_mac_polling_task(priv);
-
-	mutex_unlock(&priv->qm_lock);
-
-	schedule_delayed_work(&priv->qm_dwork,
-			      msecs_to_jiffies(AR40XX_QM_WORK_DELAY));
-}
-
-static int
-ar40xx_qm_err_check_work_start(struct ar40xx_priv *priv)
-{
-	mutex_init(&priv->qm_lock);
-
-	INIT_DELAYED_WORK(&priv->qm_dwork, ar40xx_qm_err_check_work_task);
-
-	schedule_delayed_work(&priv->qm_dwork,
-			      msecs_to_jiffies(AR40XX_QM_WORK_DELAY));
-
-	return 0;
-}
-
-/* End of qm error WAR */
-
-static int
-ar40xx_vlan_init(struct ar40xx_priv *priv)
-{
-	int port;
-	unsigned long bmp;
-
-	/* By default Enable VLAN */
-	priv->vlan = 1;
-	priv->vlan_table[AR40XX_LAN_VLAN] = priv->cpu_bmp | priv->lan_bmp;
-	priv->vlan_table[AR40XX_WAN_VLAN] = priv->cpu_bmp | priv->wan_bmp;
-	priv->vlan_tagged = priv->cpu_bmp;
-	bmp = priv->lan_bmp;
-	for_each_set_bit(port, &bmp, AR40XX_NUM_PORTS)
-			priv->pvid[port] = AR40XX_LAN_VLAN;
-
-	bmp = priv->wan_bmp;
-	for_each_set_bit(port, &bmp, AR40XX_NUM_PORTS)
-			priv->pvid[port] = AR40XX_WAN_VLAN;
-
-	return 0;
-}
-
-static void
-ar40xx_mib_work_func(struct work_struct *work)
-{
-	struct ar40xx_priv *priv;
-	int err;
-
-	priv = container_of(work, struct ar40xx_priv, mib_work.work);
-
-	mutex_lock(&priv->mib_lock);
-
-	err = ar40xx_mib_capture(priv);
-	if (err)
-		goto next_port;
-
-	ar40xx_mib_fetch_port_stat(priv, priv->mib_next_port, false);
-
-next_port:
-	priv->mib_next_port++;
-	if (priv->mib_next_port >= priv->dev.ports)
-		priv->mib_next_port = 0;
-
-	mutex_unlock(&priv->mib_lock);
-
-	schedule_delayed_work(&priv->mib_work,
-			      msecs_to_jiffies(AR40XX_MIB_WORK_DELAY));
-}
-
-static void
-ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members)
-{
-	u32 t;
-	u32 egress, ingress;
-	u32 pvid = priv->vlan_id[priv->pvid[port]];
-
-	if (priv->vlan) {
-		egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
-
-		ingress = AR40XX_IN_SECURE;
-	} else {
-		egress = AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH;
-		ingress = AR40XX_IN_PORT_ONLY;
-	}
-
-	t = pvid << AR40XX_PORT_VLAN0_DEF_SVID_S;
-	t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
-	ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
-
-	t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
-	t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
-
-	ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
-
-	t = members;
-	t |= AR40XX_PORT_LOOKUP_LEARN;
-	t |= ingress << AR40XX_PORT_LOOKUP_IN_MODE_S;
-	t |= AR40XX_PORT_STATE_FORWARD << AR40XX_PORT_LOOKUP_STATE_S;
-	ar40xx_write(priv, AR40XX_REG_PORT_LOOKUP(port), t);
-}
-
-static void
-ar40xx_vtu_op(struct ar40xx_priv *priv, u32 op, u32 val)
-{
-	if (ar40xx_wait_bit(priv, AR40XX_REG_VTU_FUNC1,
-			    AR40XX_VTU_FUNC1_BUSY, 0))
-		return;
-
-	if ((op & AR40XX_VTU_FUNC1_OP) == AR40XX_VTU_FUNC1_OP_LOAD)
-		ar40xx_write(priv, AR40XX_REG_VTU_FUNC0, val);
-
-	op |= AR40XX_VTU_FUNC1_BUSY;
-	ar40xx_write(priv, AR40XX_REG_VTU_FUNC1, op);
-}
-
-static void
-ar40xx_vtu_load_vlan(struct ar40xx_priv *priv, u32 vid, u32 port_mask)
-{
-	u32 op;
-	u32 val;
-	int i;
-
-	op = AR40XX_VTU_FUNC1_OP_LOAD | (vid << AR40XX_VTU_FUNC1_VID_S);
-	val = AR40XX_VTU_FUNC0_VALID | AR40XX_VTU_FUNC0_IVL;
-	for (i = 0; i < AR40XX_NUM_PORTS; i++) {
-		u32 mode;
-
-		if ((port_mask & BIT(i)) == 0)
-			mode = AR40XX_VTU_FUNC0_EG_MODE_NOT;
-		else if (priv->vlan == 0)
-			mode = AR40XX_VTU_FUNC0_EG_MODE_KEEP;
-		else if ((priv->vlan_tagged & BIT(i)) ||
-			 (priv->vlan_id[priv->pvid[i]] != vid))
-			mode = AR40XX_VTU_FUNC0_EG_MODE_TAG;
-		else
-			mode = AR40XX_VTU_FUNC0_EG_MODE_UNTAG;
-
-		val |= mode << AR40XX_VTU_FUNC0_EG_MODE_S(i);
-	}
-	ar40xx_vtu_op(priv, op, val);
-}
-
-static void
-ar40xx_vtu_flush(struct ar40xx_priv *priv)
-{
-	ar40xx_vtu_op(priv, AR40XX_VTU_FUNC1_OP_FLUSH, 0);
-}
-
-static int
-ar40xx_sw_hw_apply(struct switch_dev *dev)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	u8 portmask[AR40XX_NUM_PORTS];
-	int i, j;
-
-	mutex_lock(&priv->reg_mutex);
-	/* flush all vlan entries */
-	ar40xx_vtu_flush(priv);
-
-	memset(portmask, 0, sizeof(portmask));
-	if (priv->vlan) {
-		for (j = 0; j < AR40XX_MAX_VLANS; j++) {
-			u8 vp = priv->vlan_table[j];
-
-			if (!vp)
-				continue;
-
-			for (i = 0; i < dev->ports; i++) {
-				u8 mask = BIT(i);
-
-				if (vp & mask)
-					portmask[i] |= vp & ~mask;
-			}
-
-			ar40xx_vtu_load_vlan(priv, priv->vlan_id[j],
-					     priv->vlan_table[j]);
-		}
-	} else {
-		/* 8021q vlan disabled */
-		for (i = 0; i < dev->ports; i++) {
-			if (i == AR40XX_PORT_CPU)
-				continue;
-
-			portmask[i] = BIT(AR40XX_PORT_CPU);
-			portmask[AR40XX_PORT_CPU] |= BIT(i);
-		}
-	}
-
-	/* update the port destination mask registers and tag settings */
-	for (i = 0; i < dev->ports; i++)
-		ar40xx_setup_port(priv, i, portmask[i]);
-
-	ar40xx_set_mirror_regs(priv);
-
-	mutex_unlock(&priv->reg_mutex);
-	return 0;
-}
-
-static int
-ar40xx_sw_reset_switch(struct switch_dev *dev)
-{
-	struct ar40xx_priv *priv = swdev_to_ar40xx(dev);
-	int i, rv;
-
-	mutex_lock(&priv->reg_mutex);
-	memset(&priv->vlan, 0, sizeof(struct ar40xx_priv) -
-		offsetof(struct ar40xx_priv, vlan));
-
-	for (i = 0; i < AR40XX_MAX_VLANS; i++)
-		priv->vlan_id[i] = i;
-
-	ar40xx_vlan_init(priv);
-
-	priv->mirror_rx = false;
-	priv->mirror_tx = false;
-	priv->source_port = 0;
-	priv->monitor_port = 0;
-
-	mutex_unlock(&priv->reg_mutex);
-
-	rv = ar40xx_sw_hw_apply(dev);
-	return rv;
-}
-
-static int
-ar40xx_start(struct ar40xx_priv *priv)
-{
-	int ret;
-
-	ret = ar40xx_hw_init(priv);
-	if (ret)
-		return ret;
-
-	ret = ar40xx_sw_reset_switch(&priv->dev);
-	if (ret)
-		return ret;
-
-	/* at last, setup cpu port */
-	ret = ar40xx_cpuport_setup(priv);
-	if (ret)
-		return ret;
-
-	schedule_delayed_work(&priv->mib_work,
-			      msecs_to_jiffies(AR40XX_MIB_WORK_DELAY));
-
-	ar40xx_qm_err_check_work_start(priv);
-
-	return 0;
-}
-
-static const struct switch_dev_ops ar40xx_sw_ops = {
-	.attr_global = {
-		.attr = ar40xx_sw_attr_globals,
-		.n_attr = ARRAY_SIZE(ar40xx_sw_attr_globals),
-	},
-	.attr_port = {
-		.attr = ar40xx_sw_attr_port,
-		.n_attr = ARRAY_SIZE(ar40xx_sw_attr_port),
-	},
-	.attr_vlan = {
-		.attr = ar40xx_sw_attr_vlan,
-		.n_attr = ARRAY_SIZE(ar40xx_sw_attr_vlan),
-	},
-	.get_port_pvid = ar40xx_sw_get_pvid,
-	.set_port_pvid = ar40xx_sw_set_pvid,
-	.get_vlan_ports = ar40xx_sw_get_ports,
-	.set_vlan_ports = ar40xx_sw_set_ports,
-	.apply_config = ar40xx_sw_hw_apply,
-	.reset_switch = ar40xx_sw_reset_switch,
-	.get_port_link = ar40xx_sw_get_port_link,
-	.get_port_stats = ar40xx_sw_get_port_stats,
-};
-
-/* Platform driver probe function */
-
-static int ar40xx_probe(struct platform_device *pdev)
-{
-	struct device_node *switch_node;
-	struct device_node *psgmii_node;
-	struct device_node *mdio_node;
-	const __be32 *mac_mode;
-	struct clk *ess_clk;
-	struct switch_dev *swdev;
-	struct ar40xx_priv *priv;
-	u32 len;
-	u32 num_mibs;
-	struct resource psgmii_base = {0};
-	struct resource switch_base = {0};
-	int ret;
-
-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	platform_set_drvdata(pdev, priv);
-	ar40xx_priv = priv;
-
-	switch_node = of_node_get(pdev->dev.of_node);
-	if (of_address_to_resource(switch_node, 0, &switch_base) != 0)
-		return -EIO;
-
-	priv->hw_addr = devm_ioremap_resource(&pdev->dev, &switch_base);
-	if (IS_ERR(priv->hw_addr)) {
-		dev_err(&pdev->dev, "Failed to ioremap switch_base!\n");
-		return PTR_ERR(priv->hw_addr);
-	}
-
-	/*psgmii dts get*/
-	psgmii_node = of_find_node_by_name(NULL, "ess-psgmii");
-	if (!psgmii_node) {
-		dev_err(&pdev->dev, "Failed to find ess-psgmii node!\n");
-		return -EINVAL;
-	}
-
-	if (of_address_to_resource(psgmii_node, 0, &psgmii_base) != 0)
-		return -EIO;
-
-	priv->psgmii_hw_addr = devm_ioremap_resource(&pdev->dev, &psgmii_base);
-	if (IS_ERR(priv->psgmii_hw_addr)) {
-		dev_err(&pdev->dev, "psgmii ioremap fail!\n");
-		return PTR_ERR(priv->psgmii_hw_addr);
-	}
-
-	mac_mode = of_get_property(switch_node, "switch_mac_mode", &len);
-	if (!mac_mode) {
-		dev_err(&pdev->dev, "Failed to read switch_mac_mode\n");
-		return -EINVAL;
-	}
-	priv->mac_mode = be32_to_cpup(mac_mode);
-
-	ess_clk = of_clk_get_by_name(switch_node, "ess_clk");
-	if (ess_clk)
-		clk_prepare_enable(ess_clk);
-
-	priv->ess_rst = devm_reset_control_get(&pdev->dev, "ess_rst");
-	if (IS_ERR(priv->ess_rst)) {
-		dev_err(&pdev->dev, "Failed to get ess_rst control!\n");
-		return PTR_ERR(priv->ess_rst);
-	}
-
-	if (of_property_read_u32(switch_node, "switch_cpu_bmp",
-				 &priv->cpu_bmp) ||
-	    of_property_read_u32(switch_node, "switch_lan_bmp",
-				 &priv->lan_bmp) ||
-	    of_property_read_u32(switch_node, "switch_wan_bmp",
-				 &priv->wan_bmp)) {
-		dev_err(&pdev->dev, "Failed to read port properties\n");
-		return -EIO;
-	}
-
-	mutex_init(&priv->reg_mutex);
-	mutex_init(&priv->mib_lock);
-	INIT_DELAYED_WORK(&priv->mib_work, ar40xx_mib_work_func);
-
-	/* register switch */
-	swdev = &priv->dev;
-
-	mdio_node = of_find_compatible_node(NULL, NULL, "qcom,ipq4019-mdio");
-	if (!mdio_node) {
-		dev_err(&pdev->dev, "Probe failed - Cannot find mdio node by phandle!\n");
-		ret = -ENODEV;
-		goto err_missing_phy;
-	}
-
-	priv->mii_bus = of_mdio_find_bus(mdio_node);
-
-	if (priv->mii_bus == NULL) {
-		dev_err(&pdev->dev, "Probe failed - Missing PHYs!\n");
-		ret = -ENODEV;
-		goto err_missing_phy;
-	}
-
-	swdev->alias = dev_name(&priv->mii_bus->dev);
-
-	swdev->cpu_port = AR40XX_PORT_CPU;
-	swdev->name = "QCA AR40xx";
-	swdev->vlans = AR40XX_MAX_VLANS;
-	swdev->ports = AR40XX_NUM_PORTS;
-	swdev->ops = &ar40xx_sw_ops;
-	ret = register_switch(swdev, NULL);
-	if (ret < 0) {
-		dev_err(&pdev->dev, "Switch registration failed!\n");
-		return ret;
-	}
-
-	num_mibs = ARRAY_SIZE(ar40xx_mibs);
-	len = priv->dev.ports * num_mibs *
-	      sizeof(*priv->mib_stats);
-	priv->mib_stats = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
-	if (!priv->mib_stats) {
-		ret = -ENOMEM;
-		goto err_unregister_switch;
-	}
-
-	ar40xx_start(priv);
-
-	return 0;
-
-err_unregister_switch:
-	unregister_switch(&priv->dev);
-err_missing_phy:
-	platform_set_drvdata(pdev, NULL);
-	return ret;
-}
-
-static int ar40xx_remove(struct platform_device *pdev)
-{
-	struct ar40xx_priv *priv = platform_get_drvdata(pdev);
-
-	cancel_delayed_work_sync(&priv->qm_dwork);
-	cancel_delayed_work_sync(&priv->mib_work);
-
-	unregister_switch(&priv->dev);
-
-	return 0;
-}
-
-static const struct of_device_id ar40xx_of_mtable[] = {
-	{.compatible = "qcom,ess-switch" },
-	{}
-};
-
-struct platform_driver ar40xx_drv = {
-	.probe = ar40xx_probe,
-	.remove = ar40xx_remove,
-	.driver = {
-		.name    = "ar40xx",
-		.of_match_table = ar40xx_of_mtable,
-	},
-};
-
-module_platform_driver(ar40xx_drv);
-
-MODULE_DESCRIPTION("IPQ40XX ESS driver");
-MODULE_LICENSE("Dual BSD/GPL");
diff --git a/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.h b/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.h
deleted file mode 100644
index 7ba40ccf75..0000000000
--- a/target/linux/ipq40xx/files/drivers/net/mdio/ar40xx.h
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for
- * any purpose with or without fee is hereby granted, provided that the
- * above copyright notice and this permission notice appear in all copies.
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
- * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- */
-
- #ifndef __AR40XX_H
-#define __AR40XX_H
-
-#define AR40XX_MAX_VLANS	128
-#define AR40XX_NUM_PORTS	6
-#define AR40XX_NUM_PHYS	5
-
-#define BITS(_s, _n)	(((1UL << (_n)) - 1) << _s)
-
-struct ar40xx_priv {
-	struct switch_dev dev;
-
-	u8  __iomem      *hw_addr;
-	u8  __iomem      *psgmii_hw_addr;
-	u32 mac_mode;
-	struct reset_control *ess_rst;
-	u32 cpu_bmp;
-	u32 lan_bmp;
-	u32 wan_bmp;
-
-	struct mii_bus *mii_bus;
-	struct phy_device *phy;
-
-	/* mutex for qm task */
-	struct mutex qm_lock;
-	struct delayed_work qm_dwork;
-	u32 port_link_up[AR40XX_NUM_PORTS];
-	u32 ar40xx_port_old_link[AR40XX_NUM_PORTS];
-	u32 ar40xx_port_qm_buf[AR40XX_NUM_PORTS];
-
-	u32 phy_t_status;
-
-	/* mutex for switch reg access */
-	struct mutex reg_mutex;
-
-	/* mutex for mib task */
-	struct mutex mib_lock;
-	struct delayed_work mib_work;
-	int mib_next_port;
-	u64 *mib_stats;
-
-	char buf[2048];
-
-	/* all fields below will be cleared on reset */
-	bool vlan;
-	u16 vlan_id[AR40XX_MAX_VLANS];
-	u8 vlan_table[AR40XX_MAX_VLANS];
-	u8 vlan_tagged;
-	u16 pvid[AR40XX_NUM_PORTS];
-
-	/* mirror */
-	bool mirror_rx;
-	bool mirror_tx;
-	int source_port;
-	int monitor_port;
-};
-
-#define AR40XX_PORT_LINK_UP 1
-#define AR40XX_PORT_LINK_DOWN 0
-#define AR40XX_QM_NOT_EMPTY  1
-#define AR40XX_QM_EMPTY  0
-
-#define AR40XX_LAN_VLAN	1
-#define AR40XX_WAN_VLAN	2
-
-enum ar40xx_port_wrapper_cfg {
-	PORT_WRAPPER_PSGMII = 0,
-};
-
-struct ar40xx_mib_desc {
-	u32 size;
-	u32 offset;
-	const char *name;
-};
-
-#define AR40XX_PORT_CPU	0
-
-#define AR40XX_PSGMII_MODE_CONTROL	0x1b4
-#define   AR40XX_PSGMII_ATHR_CSCO_MODE_25M	BIT(0)
-
-#define AR40XX_PSGMIIPHY_TX_CONTROL	 0x288
-
-#define AR40XX_MII_ATH_MMD_ADDR		0x0d
-#define AR40XX_MII_ATH_MMD_DATA		0x0e
-#define AR40XX_MII_ATH_DBG_ADDR		0x1d
-#define AR40XX_MII_ATH_DBG_DATA		0x1e
-
-#define AR40XX_STATS_RXBROAD		0x00
-#define AR40XX_STATS_RXPAUSE		0x04
-#define AR40XX_STATS_RXMULTI		0x08
-#define AR40XX_STATS_RXFCSERR		0x0c
-#define AR40XX_STATS_RXALIGNERR		0x10
-#define AR40XX_STATS_RXRUNT		0x14
-#define AR40XX_STATS_RXFRAGMENT		0x18
-#define AR40XX_STATS_RX64BYTE		0x1c
-#define AR40XX_STATS_RX128BYTE		0x20
-#define AR40XX_STATS_RX256BYTE		0x24
-#define AR40XX_STATS_RX512BYTE		0x28
-#define AR40XX_STATS_RX1024BYTE		0x2c
-#define AR40XX_STATS_RX1518BYTE		0x30
-#define AR40XX_STATS_RXMAXBYTE		0x34
-#define AR40XX_STATS_RXTOOLONG		0x38
-#define AR40XX_STATS_RXGOODBYTE		0x3c
-#define AR40XX_STATS_RXBADBYTE		0x44
-#define AR40XX_STATS_RXOVERFLOW		0x4c
-#define AR40XX_STATS_FILTERED		0x50
-#define AR40XX_STATS_TXBROAD		0x54
-#define AR40XX_STATS_TXPAUSE		0x58
-#define AR40XX_STATS_TXMULTI		0x5c
-#define AR40XX_STATS_TXUNDERRUN		0x60
-#define AR40XX_STATS_TX64BYTE		0x64
-#define AR40XX_STATS_TX128BYTE		0x68
-#define AR40XX_STATS_TX256BYTE		0x6c
-#define AR40XX_STATS_TX512BYTE		0x70
-#define AR40XX_STATS_TX1024BYTE		0x74
-#define AR40XX_STATS_TX1518BYTE		0x78
-#define AR40XX_STATS_TXMAXBYTE		0x7c
-#define AR40XX_STATS_TXOVERSIZE		0x80
-#define AR40XX_STATS_TXBYTE		0x84
-#define AR40XX_STATS_TXCOLLISION	0x8c
-#define AR40XX_STATS_TXABORTCOL		0x90
-#define AR40XX_STATS_TXMULTICOL		0x94
-#define AR40XX_STATS_TXSINGLECOL	0x98
-#define AR40XX_STATS_TXEXCDEFER		0x9c
-#define AR40XX_STATS_TXDEFER		0xa0
-#define AR40XX_STATS_TXLATECOL		0xa4
-
-#define AR40XX_REG_MODULE_EN			0x030
-#define   AR40XX_MODULE_EN_MIB			BIT(0)
-
-#define AR40XX_REG_MIB_FUNC			0x034
-#define   AR40XX_MIB_BUSY		BIT(17)
-#define   AR40XX_MIB_CPU_KEEP			BIT(20)
-#define   AR40XX_MIB_FUNC		BITS(24, 3)
-#define   AR40XX_MIB_FUNC_S		24
-#define   AR40XX_MIB_FUNC_NO_OP		0x0
-#define   AR40XX_MIB_FUNC_FLUSH		0x1
-
-#define AR40XX_ESS_SERVICE_TAG		0x48
-#define AR40XX_ESS_SERVICE_TAG_STAG	BIT(17)
-
-#define AR40XX_REG_PORT_STATUS(_i)		(0x07c + (_i) * 4)
-#define   AR40XX_PORT_SPEED			BITS(0, 2)
-#define   AR40XX_PORT_STATUS_SPEED_S	0
-#define   AR40XX_PORT_TX_EN			BIT(2)
-#define   AR40XX_PORT_RX_EN			BIT(3)
-#define   AR40XX_PORT_STATUS_TXFLOW	BIT(4)
-#define   AR40XX_PORT_STATUS_RXFLOW	BIT(5)
-#define   AR40XX_PORT_DUPLEX			BIT(6)
-#define   AR40XX_PORT_TXHALF_FLOW		BIT(7)
-#define   AR40XX_PORT_STATUS_LINK_UP	BIT(8)
-#define   AR40XX_PORT_AUTO_LINK_EN		BIT(9)
-#define   AR40XX_PORT_STATUS_FLOW_CONTROL  BIT(12)
-
-#define AR40XX_REG_MAX_FRAME_SIZE		0x078
-#define   AR40XX_MAX_FRAME_SIZE_MTU		BITS(0, 14)
-
-#define AR40XX_REG_PORT_HEADER(_i)		(0x09c + (_i) * 4)
-
-#define AR40XX_REG_EEE_CTRL			0x100
-#define   AR40XX_EEE_CTRL_DISABLE_PHY(_i)	BIT(4 + (_i) * 2)
-
-#define AR40XX_REG_PORT_VLAN0(_i)		(0x420 + (_i) * 0x8)
-#define   AR40XX_PORT_VLAN0_DEF_SVID		BITS(0, 12)
-#define   AR40XX_PORT_VLAN0_DEF_SVID_S		0
-#define   AR40XX_PORT_VLAN0_DEF_CVID		BITS(16, 12)
-#define   AR40XX_PORT_VLAN0_DEF_CVID_S		16
-
-#define AR40XX_REG_PORT_VLAN1(_i)		(0x424 + (_i) * 0x8)
-#define   AR40XX_PORT_VLAN1_CORE_PORT		BIT(9)
-#define   AR40XX_PORT_VLAN1_PORT_TLS_MODE	BIT(7)
-#define   AR40XX_PORT_VLAN1_PORT_VLAN_PROP	BIT(6)
-#define   AR40XX_PORT_VLAN1_OUT_MODE		BITS(12, 2)
-#define   AR40XX_PORT_VLAN1_OUT_MODE_S		12
-#define   AR40XX_PORT_VLAN1_OUT_MODE_UNMOD	0
-#define   AR40XX_PORT_VLAN1_OUT_MODE_UNTAG	1
-#define   AR40XX_PORT_VLAN1_OUT_MODE_TAG		2
-#define   AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH	3
-
-#define AR40XX_REG_VTU_FUNC0			0x0610
-#define   AR40XX_VTU_FUNC0_EG_MODE		BITS(4, 14)
-#define   AR40XX_VTU_FUNC0_EG_MODE_S(_i)	(4 + (_i) * 2)
-#define   AR40XX_VTU_FUNC0_EG_MODE_KEEP		0
-#define   AR40XX_VTU_FUNC0_EG_MODE_UNTAG	1
-#define   AR40XX_VTU_FUNC0_EG_MODE_TAG		2
-#define   AR40XX_VTU_FUNC0_EG_MODE_NOT		3
-#define   AR40XX_VTU_FUNC0_IVL			BIT(19)
-#define   AR40XX_VTU_FUNC0_VALID		BIT(20)
-
-#define AR40XX_REG_VTU_FUNC1			0x0614
-#define   AR40XX_VTU_FUNC1_OP			BITS(0, 3)
-#define   AR40XX_VTU_FUNC1_OP_NOOP		0
-#define   AR40XX_VTU_FUNC1_OP_FLUSH		1
-#define   AR40XX_VTU_FUNC1_OP_LOAD		2
-#define   AR40XX_VTU_FUNC1_OP_PURGE		3
-#define   AR40XX_VTU_FUNC1_OP_REMOVE_PORT	4
-#define   AR40XX_VTU_FUNC1_OP_GET_NEXT		5
-#define   AR40XX7_VTU_FUNC1_OP_GET_ONE		6
-#define   AR40XX_VTU_FUNC1_FULL			BIT(4)
-#define   AR40XX_VTU_FUNC1_PORT			BIT(8, 4)
-#define   AR40XX_VTU_FUNC1_PORT_S		8
-#define   AR40XX_VTU_FUNC1_VID			BIT(16, 12)
-#define   AR40XX_VTU_FUNC1_VID_S		16
-#define   AR40XX_VTU_FUNC1_BUSY			BIT(31)
-
-#define AR40XX_REG_FWD_CTRL0			0x620
-#define   AR40XX_FWD_CTRL0_CPU_PORT_EN		BIT(10)
-#define   AR40XX_FWD_CTRL0_MIRROR_PORT		BITS(4, 4)
-#define   AR40XX_FWD_CTRL0_MIRROR_PORT_S	4
-
-#define AR40XX_REG_FWD_CTRL1			0x624
-#define   AR40XX_FWD_CTRL1_UC_FLOOD		BITS(0, 7)
-#define   AR40XX_FWD_CTRL1_UC_FLOOD_S		0
-#define   AR40XX_FWD_CTRL1_MC_FLOOD		BITS(8, 7)
-#define   AR40XX_FWD_CTRL1_MC_FLOOD_S		8
-#define   AR40XX_FWD_CTRL1_BC_FLOOD		BITS(16, 7)
-#define   AR40XX_FWD_CTRL1_BC_FLOOD_S		16
-#define   AR40XX_FWD_CTRL1_IGMP			BITS(24, 7)
-#define   AR40XX_FWD_CTRL1_IGMP_S		24
-
-#define AR40XX_REG_PORT_LOOKUP(_i)		(0x660 + (_i) * 0xc)
-#define   AR40XX_PORT_LOOKUP_MEMBER		BITS(0, 7)
-#define   AR40XX_PORT_LOOKUP_IN_MODE		BITS(8, 2)
-#define   AR40XX_PORT_LOOKUP_IN_MODE_S		8
-#define   AR40XX_PORT_LOOKUP_STATE		BITS(16, 3)
-#define   AR40XX_PORT_LOOKUP_STATE_S		16
-#define   AR40XX_PORT_LOOKUP_LEARN		BIT(20)
-#define   AR40XX_PORT_LOOKUP_LOOPBACK		BIT(21)
-#define   AR40XX_PORT_LOOKUP_ING_MIRROR_EN	BIT(25)
-
-#define AR40XX_REG_ATU_FUNC			0x60c
-#define   AR40XX_ATU_FUNC_OP			BITS(0, 4)
-#define   AR40XX_ATU_FUNC_OP_NOOP		0x0
-#define   AR40XX_ATU_FUNC_OP_FLUSH		0x1
-#define   AR40XX_ATU_FUNC_OP_LOAD		0x2
-#define   AR40XX_ATU_FUNC_OP_PURGE		0x3
-#define   AR40XX_ATU_FUNC_OP_FLUSH_LOCKED	0x4
-#define   AR40XX_ATU_FUNC_OP_FLUSH_UNICAST	0x5
-#define   AR40XX_ATU_FUNC_OP_GET_NEXT		0x6
-#define   AR40XX_ATU_FUNC_OP_SEARCH_MAC		0x7
-#define   AR40XX_ATU_FUNC_OP_CHANGE_TRUNK	0x8
-#define   AR40XX_ATU_FUNC_BUSY			BIT(31)
-
-#define AR40XX_REG_QM_DEBUG_ADDR		0x820
-#define AR40XX_REG_QM_DEBUG_VALUE		0x824
-#define   AR40XX_REG_QM_PORT0_3_QNUM		0x1d
-#define   AR40XX_REG_QM_PORT4_6_QNUM		0x1e
-
-#define AR40XX_REG_PORT_HOL_CTRL1(_i)		(0x974 + (_i) * 0x8)
-#define   AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN	BIT(16)
-
-#define AR40XX_REG_PORT_FLOWCTRL_THRESH(_i)	(0x9b0 + (_i) * 0x4)
-#define   AR40XX_PORT0_FC_THRESH_ON_DFLT	0x60
-#define   AR40XX_PORT0_FC_THRESH_OFF_DFLT	0x90
-
-#define AR40XX_PHY_DEBUG_0   0
-#define AR40XX_PHY_MANU_CTRL_EN  BIT(12)
-
-#define AR40XX_PHY_DEBUG_2   2
-
-#define AR40XX_PHY_SPEC_STATUS 0x11
-#define   AR40XX_PHY_SPEC_STATUS_LINK		BIT(10)
-#define   AR40XX_PHY_SPEC_STATUS_DUPLEX		BIT(13)
-#define   AR40XX_PHY_SPEC_STATUS_SPEED		BITS(14, 2)
-
-/* port forwarding state */
-enum {
-	AR40XX_PORT_STATE_DISABLED = 0,
-	AR40XX_PORT_STATE_BLOCK = 1,
-	AR40XX_PORT_STATE_LISTEN = 2,
-	AR40XX_PORT_STATE_LEARN = 3,
-	AR40XX_PORT_STATE_FORWARD = 4
-};
-
-/* ingress 802.1q mode */
-enum {
-	AR40XX_IN_PORT_ONLY = 0,
-	AR40XX_IN_PORT_FALLBACK = 1,
-	AR40XX_IN_VLAN_ONLY = 2,
-	AR40XX_IN_SECURE = 3
-};
-
-/* egress 802.1q mode */
-enum {
-	AR40XX_OUT_KEEP = 0,
-	AR40XX_OUT_STRIP_VLAN = 1,
-	AR40XX_OUT_ADD_VLAN = 2
-};
-
-/* port speed */
-enum {
-	AR40XX_PORT_SPEED_10M = 0,
-	AR40XX_PORT_SPEED_100M = 1,
-	AR40XX_PORT_SPEED_1000M = 2,
-	AR40XX_PORT_SPEED_ERR = 3,
-};
-
-#define AR40XX_MIB_WORK_DELAY	2000 /* msecs */
-
-#define AR40XX_QM_WORK_DELAY    100
-
-#define   AR40XX_MIB_FUNC_CAPTURE	0x3
-
-#define AR40XX_REG_PORT_STATS_START	0x1000
-#define AR40XX_REG_PORT_STATS_LEN		0x100
-
-#define AR40XX_PORTS_ALL	0x3f
-
-#define AR40XX_PSGMII_ID	5
-#define AR40XX_PSGMII_CALB_NUM	100
-#define AR40XX_MALIBU_PSGMII_MODE_CTRL	0x6d
-#define AR40XX_MALIBU_PHY_PSGMII_MODE_CTRL_ADJUST_VAL	0x220c
-#define AR40XX_MALIBU_PHY_MMD7_DAC_CTRL	0x801a
-#define AR40XX_MALIBU_DAC_CTRL_MASK	0x380
-#define AR40XX_MALIBU_DAC_CTRL_VALUE	0x280
-#define AR40XX_MALIBU_PHY_RLP_CTRL       0x805a
-#define AR40XX_PSGMII_TX_DRIVER_1_CTRL	0xb
-#define AR40XX_MALIBU_PHY_PSGMII_REDUCE_SERDES_TX_AMP	0x8a
-#define AR40XX_MALIBU_PHY_LAST_ADDR	4
-
-static inline struct ar40xx_priv *
-swdev_to_ar40xx(struct switch_dev *swdev)
-{
-	return container_of(swdev, struct ar40xx_priv, dev);
-}
-
-#endif
diff --git a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
index 8d523548e5..28e0e6bc8e 100644
--- a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+++ b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
@@ -12,9 +12,7 @@
 #include <linux/of.h>
 #include <linux/phy.h>
 #include <linux/bitfield.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
 #include <linux/ethtool_netlink.h>
-#endif
 #include <linux/gpio.h>
 #include <linux/sfp.h>
 
@@ -64,6 +62,8 @@
 
 #define QCA807X_CHIP_CONFIGURATION				0x1f
 #define QCA807X_BT_BX_REG_SEL					BIT(15)
+#define QCA807X_BT_BX_REG_SEL_FIBER				0
+#define QCA807X_BT_BX_REG_SEL_COPPER				1
 #define QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK		GENMASK(3, 0)
 #define QCA807X_CHIP_CONFIGURATION_MODE_QSGMII_SGMII		4
 #define QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER		3
@@ -119,7 +119,7 @@
 #define PSGMII_QSGMII_DRIVE_CONTROL_1			0xb
 #define PSGMII_QSGMII_TX_DRIVER_MASK			GENMASK(7, 4)
 #define PSGMII_MODE_CTRL				0x6d
-#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK		GENMASK(3, 0)
+#define PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK		BIT(0)
 #define PSGMII_MMD3_SERDES_CONTROL			0x805a
 
 struct qca807x_gpio_priv {
@@ -189,7 +189,6 @@ static int qca807x_set_tunable(struct phy_device *phydev,
 	}
 }
 
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
 static bool qca807x_distance_valid(int result)
 {
 	switch (result) {
@@ -322,16 +321,11 @@ static int qca807x_cable_test_start(struct phy_device *phydev)
 
 	return ret;
 }
-#endif
 
 #ifdef CONFIG_GPIOLIB
 static int qca807x_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
 {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0)
 	return GPIO_LINE_DIRECTION_OUT;
-#else
-	return GPIOF_DIR_OUT;
-#endif
 }
 
 static int qca807x_gpio_get_reg(unsigned int offset)
@@ -400,19 +394,9 @@ static int qca807x_gpio(struct phy_device *phydev)
 }
 #endif
 
-static int qca807x_read_copper_status(struct phy_device *phydev, bool combo_port)
+static int qca807x_read_copper_status(struct phy_device *phydev)
 {
-	int ss, err, page, old_link = phydev->link;
-
-	/* Only combo port has dual pages */
-	if (combo_port) {
-		/* Check whether copper page is set and set if needed */
-		page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
-		if (!(page & QCA807X_BT_BX_REG_SEL)) {
-			page |= QCA807X_BT_BX_REG_SEL;
-			phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
-		}
-	}
+	int ss, err, old_link = phydev->link;
 
 	/* Update the link, but return if there was an error */
 	err = genphy_update_link(phydev);
@@ -487,16 +471,9 @@ static int qca807x_read_copper_status(struct phy_device *phydev, bool combo_port
 	return 0;
 }
 
-static int qca807x_read_fiber_status(struct phy_device *phydev, bool combo_port)
+static int qca807x_read_fiber_status(struct phy_device *phydev)
 {
-	int ss, err, page, lpa, old_link = phydev->link;
-
-	/* Check whether fiber page is set and set if needed */
-	page = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
-	if (page & QCA807X_BT_BX_REG_SEL) {
-		page &= ~QCA807X_BT_BX_REG_SEL;
-		phy_write(phydev, QCA807X_CHIP_CONFIGURATION, page);
-	}
+	int ss, err, lpa, old_link = phydev->link;
 
 	/* Update the link, but return if there was an error */
 	err = genphy_update_link(phydev);
@@ -559,28 +536,17 @@ static int qca807x_read_fiber_status(struct phy_device *phydev, bool combo_port)
 
 static int qca807x_read_status(struct phy_device *phydev)
 {
-	int val;
-
-	/* Check for Combo port */
-	if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
-		/* Check for fiber mode first */
-		if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
-			/* Check for actual detected media */
-			val = phy_read(phydev, QCA807X_MEDIA_SELECT_STATUS);
-			if (val & QCA807X_MEDIA_DETECTED_COPPER) {
-				qca807x_read_copper_status(phydev, true);
-			} else if ((val & QCA807X_MEDIA_DETECTED_1000_BASE_X) ||
-				   (val & QCA807X_MEDIA_DETECTED_100_BASE_FX)) {
-				qca807x_read_fiber_status(phydev, true);
-			}
-		} else {
-			qca807x_read_copper_status(phydev, true);
+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) {
+		switch (phydev->port) {
+		case PORT_FIBRE:
+			return qca807x_read_fiber_status(phydev);
+		case PORT_TP:
+			return qca807x_read_copper_status(phydev);
+		default:
+			return -EINVAL;
 		}
-	} else {
-		qca807x_read_copper_status(phydev, false);
-	}
-
-	return 0;
+	} else
+		return qca807x_read_copper_status(phydev);
 }
 
 static int qca807x_config_intr(struct phy_device *phydev)
@@ -683,9 +649,63 @@ static int qca807x_led_config(struct phy_device *phydev)
 		return 0;
 }
 
+static int qca807x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
+{
+	struct phy_device *phydev = upstream;
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
+	phy_interface_t iface;
+	int ret;
+
+	sfp_parse_support(phydev->sfp_bus, id, support);
+	iface = sfp_select_interface(phydev->sfp_bus, support);
+
+	dev_info(&phydev->mdio.dev, "%s SFP module inserted\n", phy_modes(iface));
+
+	switch (iface) {
+	case PHY_INTERFACE_MODE_1000BASEX:
+	case PHY_INTERFACE_MODE_100BASEX:
+		/* Set PHY mode to PSGMII combo (1/4 copper + combo ports) mode */
+		ret = phy_modify(phydev,
+				 QCA807X_CHIP_CONFIGURATION,
+				 QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
+				 QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
+		/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
+		ret = phy_set_bits_mmd(phydev,
+				       MDIO_MMD_AN,
+				       QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
+				       QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN);
+		/* Select fiber page */
+		ret = phy_clear_bits(phydev,
+				     QCA807X_CHIP_CONFIGURATION,
+				     QCA807X_BT_BX_REG_SEL);
+
+		phydev->port = PORT_FIBRE;
+		break;
+	default:
+		dev_err(&phydev->mdio.dev, "Incompatible SFP module inserted\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static void qca807x_sfp_remove(void *upstream)
+{
+	struct phy_device *phydev = upstream;
+
+	/* Select copper page */
+	phy_set_bits(phydev,
+		     QCA807X_CHIP_CONFIGURATION,
+		     QCA807X_BT_BX_REG_SEL);
+
+	phydev->port = PORT_TP;
+}
+
 static const struct sfp_upstream_ops qca807x_sfp_ops = {
 	.attach = phy_sfp_attach,
 	.detach = phy_sfp_detach,
+	.module_insert = qca807x_sfp_insert,
+	.module_remove = qca807x_sfp_remove,
 };
 
 static int qca807x_config(struct phy_device *phydev)
@@ -696,28 +716,7 @@ static int qca807x_config(struct phy_device *phydev)
 
 	/* Check for Combo port */
 	if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
-		int fiber_mode_autodect;
 		int psgmii_serdes;
-		int chip_config;
-
-		if (of_property_read_bool(node, "qcom,fiber-enable")) {
-			/* Enable fiber mode autodection (1000Base-X or 100Base-FX) */
-			fiber_mode_autodect = phy_read_mmd(phydev, MDIO_MMD_AN,
-							   QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION);
-			fiber_mode_autodect |= QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION_EN;
-			phy_write_mmd(phydev, MDIO_MMD_AN, QCA807X_MMD7_FIBER_MODE_AUTO_DETECTION,
-				      fiber_mode_autodect);
-
-			/* Enable 4 copper + combo port mode */
-			chip_config = phy_read(phydev, QCA807X_CHIP_CONFIGURATION);
-			chip_config &= ~QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK;
-			chip_config |= FIELD_PREP(QCA807X_CHIP_CONFIGURATION_MODE_CFG_MASK,
-						  QCA807X_CHIP_CONFIGURATION_MODE_PSGMII_FIBER);
-			phy_write(phydev, QCA807X_CHIP_CONFIGURATION, chip_config);
-
-			linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
-			linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
-		}
 
 		/* Prevent PSGMII going into hibernation via PSGMII self test */
 		psgmii_serdes = phy_read_mmd(phydev, MDIO_MMD_PCS, PSGMII_MMD3_SERDES_CONTROL);
@@ -761,9 +760,10 @@ static int qca807x_probe(struct phy_device *phydev)
 	}
 
 	/* Attach SFP bus on combo port*/
-	if (of_property_read_bool(node, "qcom,fiber-enable")) {
-		if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION))
-			ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
+	if (phy_read(phydev, QCA807X_CHIP_CONFIGURATION)) {
+		ret = phy_sfp_probe(phydev, &qca807x_sfp_ops);
+		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported);
+		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->advertising);
 	}
 
 	return ret;
@@ -772,17 +772,14 @@ static int qca807x_probe(struct phy_device *phydev)
 static int qca807x_psgmii_config(struct phy_device *phydev)
 {
 	struct device_node *node = phydev->mdio.dev.of_node;
-	int psgmii_az, tx_amp, ret = 0;
+	int tx_amp, ret = 0;
 	u32 tx_driver_strength;
 
 	/* Workaround to enable AZ transmitting ability */
-	if (of_property_read_bool(node, "qcom,psgmii-az")) {
-		psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
-		psgmii_az &= ~PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK;
-		psgmii_az |= FIELD_PREP(PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK, 0xc);
-		ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL, psgmii_az);
-		psgmii_az = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PSGMII_MODE_CTRL);
-	}
+	ret = phy_clear_bits_mmd(phydev,
+				 MDIO_MMD_PMAPMD,
+				 PSGMII_MODE_CTRL,
+				 PSGMII_MODE_CTRL_AZ_WORKAROUND_MASK);
 
 	/* PSGMII/QSGMII TX amp set to DT defined value instead of default 600mV */
 	if (!of_property_read_u32(node, "qcom,tx-driver-strength", &tx_driver_strength)) {
@@ -799,9 +796,7 @@ static struct phy_driver qca807x_drivers[] = {
 	{
 		PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),
 		.name           = "Qualcomm QCA8072",
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
 		.flags		= PHY_POLL_CABLE_TEST,
-#endif
 		/* PHY_GBIT_FEATURES */
 		.probe		= qca807x_probe,
 		.config_init	= qca807x_config,
@@ -815,17 +810,15 @@ static struct phy_driver qca807x_drivers[] = {
 		.soft_reset	= genphy_soft_reset,
 		.get_tunable	= qca807x_get_tunable,
 		.set_tunable	= qca807x_set_tunable,
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
+		.resume		= genphy_resume,
+		.suspend	= genphy_suspend,
 		.cable_test_start	= qca807x_cable_test_start,
 		.cable_test_get_status	= qca807x_cable_test_get_status,
-#endif
 	},
 	{
 		PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),
 		.name           = "Qualcomm QCA8075",
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
 		.flags		= PHY_POLL_CABLE_TEST,
-#endif
 		/* PHY_GBIT_FEATURES */
 		.probe		= qca807x_probe,
 		.config_init	= qca807x_config,
@@ -839,10 +832,10 @@ static struct phy_driver qca807x_drivers[] = {
 		.soft_reset	= genphy_soft_reset,
 		.get_tunable	= qca807x_get_tunable,
 		.set_tunable	= qca807x_set_tunable,
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)
+		.resume		= genphy_resume,
+		.suspend	= genphy_suspend,
 		.cable_test_start	= qca807x_cable_test_start,
 		.cable_test_get_status	= qca807x_cable_test_get_status,
-#endif
 	},
 	{
 		PHY_ID_MATCH_EXACT(PHY_ID_QCA807X_PSGMII),
diff --git a/target/linux/ipq40xx/image/Makefile b/target/linux/ipq40xx/image/Makefile
index 5851b29875..2ba4c779a0 100644
--- a/target/linux/ipq40xx/image/Makefile
+++ b/target/linux/ipq40xx/image/Makefile
@@ -10,6 +10,8 @@ define Device/Default
 	IMAGES := sysupgrade.bin
 	IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
 	IMAGE/sysupgrade.bin/squashfs :=
+	DEVICE_COMPAT_VERSION := 1.1
+	DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
 endef
 
 include $(SUBTARGET).mk
diff --git a/target/linux/ipq40xx/image/chromium.mk b/target/linux/ipq40xx/image/chromium.mk
index 2abd2df02a..7410794fb4 100644
--- a/target/linux/ipq40xx/image/chromium.mk
+++ b/target/linux/ipq40xx/image/chromium.mk
@@ -33,4 +33,5 @@ define Device/google_wifi
 	DEVICE_PACKAGES := partx-utils mkf2fs e2fsprogs \
 			   kmod-fs-ext4 kmod-fs-f2fs kmod-google-firmware
 endef
-TARGET_DEVICES += google_wifi
+# Missing DSA Setup
+#TARGET_DEVICES += google_wifi
diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk
index 81cc83e28f..3c1cf67448 100644
--- a/target/linux/ipq40xx/image/generic.mk
+++ b/target/linux/ipq40xx/image/generic.mk
@@ -181,14 +181,16 @@ define Device/aruba_ap-303h
 	$(call Device/aruba_glenmorangie)
 	DEVICE_MODEL := AP-303H
 endef
-TARGET_DEVICES += aruba_ap-303h
+# Missing DSA Setup
+#TARGET_DEVICES += aruba_ap-303h
 
 define Device/aruba_ap-365
 	$(call Device/aruba_glenmorangie)
 	DEVICE_MODEL := AP-365
 	DEVICE_PACKAGES := kmod-hwmon-ad7418 ipq-wifi-aruba_ap-365
 endef
-TARGET_DEVICES += aruba_ap-365
+# Missing DSA Setup
+#TARGET_DEVICES += aruba_ap-365
 
 define Device/asus_map-ac2200
 	$(call Device/FitImageLzma)
@@ -226,7 +228,8 @@ define Device/asus_rt-ac42u
 	UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC82U')
 	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct kmod-usb-ledtrig-usbport
 endef
-TARGET_DEVICES += asus_rt-ac42u
+# Missing DSA Setup
+#TARGET_DEVICES += asus_rt-ac42u
 
 define Device/asus_rt-ac58u
 	$(call Device/FitImageLzma)
@@ -293,7 +296,8 @@ define Device/avm_fritzrepeater-3000
 	SOC := qcom-ipq4019
 	DEVICE_PACKAGES := ath10k-firmware-qca9984-ct fritz-caldata fritz-tffs-nand
 endef
-TARGET_DEVICES += avm_fritzrepeater-3000
+# Missing DSA Setup
+#TARGET_DEVICES += avm_fritzrepeater-3000
 
 define Device/buffalo_wtr-m2133hp
 	$(call Device/FitImage)
@@ -305,7 +309,8 @@ define Device/buffalo_wtr-m2133hp
 	BLOCKSIZE := 128k
 	PAGESIZE := 2048
 endef
-TARGET_DEVICES += buffalo_wtr-m2133hp
+# Missing DSA Setup
+#TARGET_DEVICES += buffalo_wtr-m2133hp
 
 define Device/cellc_rtl30vw
 	KERNEL_SUFFIX := -fit-zImage.itb
@@ -335,7 +340,8 @@ define Device/cilab_meshpoint-one
 	DEVICE_MODEL := MeshPoint.One
 	DEVICE_PACKAGES := kmod-i2c-gpio kmod-iio-bmp280-i2c kmod-hwmon-ina2xx kmod-rtc-pcf2127
 endef
-TARGET_DEVICES += cilab_meshpoint-one
+# Missing DSA Setup
+#TARGET_DEVICES += cilab_meshpoint-one
 
 define Device/compex_wpj419
 	$(call Device/FitImage)
@@ -349,7 +355,8 @@ define Device/compex_wpj419
 	PAGESIZE := 2048
 	FILESYSTEMS := squashfs
 endef
-TARGET_DEVICES += compex_wpj419
+# Missing DSA Setup
+#TARGET_DEVICES += compex_wpj419
 
 define Device/compex_wpj428
 	$(call Device/FitImage)
@@ -386,7 +393,8 @@ define Device/devolo_magic-2-wifi-next
 	DEVICE_PACKAGES := ipq-wifi-devolo_magic-2-wifi-next
 	DEFAULT := n
 endef
-TARGET_DEVICES += devolo_magic-2-wifi-next
+# Missing DSA Setup
+#TARGET_DEVICES += devolo_magic-2-wifi-next
 
 define Device/dlink_dap-2610
 	$(call Device/FitImageLzma)
@@ -412,7 +420,8 @@ define Device/dlink_dap-2610
 	IMAGE/factory.bin    := append-kernel | pad-offset 6144k 160 | append-rootfs | wrgg-image | check-size
 	IMAGE/sysupgrade.bin := append-kernel | wrgg-image | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size | append-metadata
 endef
-TARGET_DEVICES += dlink_dap-2610
+# Missing DSA Setup
+#TARGET_DEVICES += dlink_dap-2610
 
 define Device/edgecore_ecw5211
 	$(call Device/FitImage)
@@ -439,7 +448,8 @@ define Device/edgecore_oap100
 	DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
 	DEVICE_PACKAGES := ipq-wifi-edgecore_oap100 kmod-usb-acm kmod-usb-net kmod-usb-net-cdc-qmi uqmi
 endef
-TARGET_DEVICES += edgecore_oap100
+# Missing DSA Setup
+#TARGET_DEVICES += edgecore_oap100
 
 define Device/engenius_eap1300
 	$(call Device/FitImage)
@@ -452,7 +462,8 @@ define Device/engenius_eap1300
 	IMAGE_SIZE := 25344k
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
 endef
-TARGET_DEVICES += engenius_eap1300
+# Missing DSA Setup
+#TARGET_DEVICES += engenius_eap1300
 
 define Device/engenius_eap2200
 	$(call Device/FitImage)
@@ -464,7 +475,8 @@ define Device/engenius_eap2200
 	PAGESIZE := 2048
 	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
 endef
-TARGET_DEVICES += engenius_eap2200
+# Missing DSA Setup
+#TARGET_DEVICES += engenius_eap2200
 
 define Device/engenius_emd1
 	$(call Device/FitImage)
@@ -477,7 +489,8 @@ define Device/engenius_emd1
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
 	IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
 endef
-TARGET_DEVICES += engenius_emd1
+# Missing DSA Setup
+#TARGET_DEVICES += engenius_emd1
 
 define Device/engenius_emr3500
 	$(call Device/FitImage)
@@ -492,7 +505,8 @@ define Device/engenius_emr3500
 	IMAGE/factory.bin := qsdk-ipq-factory-nor | check-size
 	DEFAULT := n
 endef
-TARGET_DEVICES += engenius_emr3500
+# Missing DSA Setup
+#TARGET_DEVICES += engenius_emr3500
 
 define Device/engenius_ens620ext
 	$(call Device/FitImage)
@@ -518,7 +532,8 @@ define Device/engenius_ens620ext
 	IMAGE/factory_30.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size | SenaoFW $$$$(PRODUCT_ID) $$$$(FW_VER)
 	IMAGE/factory_35.bin := qsdk-ipq-factory-nor | check-size | SenaoFW $$$$(PRODUCT_ID_NEW) $$$$(FW_VER_NEW)
 endef
-TARGET_DEVICES += engenius_ens620ext
+# Missing DSA Setup
+#TARGET_DEVICES += engenius_ens620ext
 
 define Device/extreme-networks_ws-ap3915i
 	$(call Device/FitImage)
@@ -530,7 +545,8 @@ define Device/extreme-networks_ws-ap3915i
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
 	DEVICE_PACKAGES := ipq-wifi-extreme-networks_ws-ap3915i
 endef
-TARGET_DEVICES += extreme-networks_ws-ap3915i
+# Missing DSA Setup
+#TARGET_DEVICES += extreme-networks_ws-ap3915i
 
 define Device/ezviz_cs-w3-wd1200g-eup
 	$(call Device/FitImage)
@@ -547,7 +563,8 @@ define Device/ezviz_cs-w3-wd1200g-eup
 	DEVICE_COMPAT_MESSAGE := uboot's bootcmd has to be updated (see wiki). \
 		Upgrade via sysupgrade mechanism is not possible.
 endef
-TARGET_DEVICES += ezviz_cs-w3-wd1200g-eup
+# Missing DSA Setup
+#TARGET_DEVICES += ezviz_cs-w3-wd1200g-eup
 
 define Device/glinet_gl-ap1300
 	$(call Device/FitImage)
@@ -562,7 +579,8 @@ define Device/glinet_gl-ap1300
 	KERNEL_INSTALL := 1
 	DEVICE_PACKAGES := ipq-wifi-glinet_gl-ap1300 kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
 endef
-TARGET_DEVICES += glinet_gl-ap1300
+# Missing DSA Setup
+#TARGET_DEVICES += glinet_gl-ap1300
 
 define Device/glinet_gl-b1300
 	$(call Device/FitzImage)
@@ -605,7 +623,8 @@ define Device/glinet_gl-s1300
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
 	DEVICE_PACKAGES := ipq-wifi-glinet_gl-s1300 kmod-fs-ext4 kmod-mmc kmod-spi-dev
 endef
-TARGET_DEVICES += glinet_gl-s1300
+# Missing DSA Setup
+#TARGET_DEVICES += glinet_gl-s1300
 
 define Device/linksys_ea6350v3
 	# The Linksys EA6350v3 has a uboot bootloader that does not
@@ -695,7 +714,8 @@ define Device/linksys_whw01-v1
 		check-size
 	DEVICE_PACKAGES := uboot-envtools kmod-leds-pca963x
 endef
-TARGET_DEVICES += linksys_whw01-v1
+# Missing DSA Setup
+#TARGET_DEVICES += linksys_whw01-v1
 
 define Device/luma_wrtq-329acn
 	$(call Device/FitImage)
@@ -742,7 +762,8 @@ define Device/mobipromo_cm520-79f
 	PAGESIZE := 2048
 	DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
 endef
-TARGET_DEVICES += mobipromo_cm520-79f
+# Missing DSA Setup
+#TARGET_DEVICES += mobipromo_cm520-79f
 
 define Device/netgear_ex61x0v2
 	$(call Device/DniImage)
@@ -759,14 +780,16 @@ define Device/netgear_ex6100v2
 	DEVICE_MODEL := EX6100
 	DEVICE_VARIANT := v2
 endef
-TARGET_DEVICES += netgear_ex6100v2
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_ex6100v2
 
 define Device/netgear_ex6150v2
 	$(call Device/netgear_ex61x0v2)
 	DEVICE_MODEL := EX6150
 	DEVICE_VARIANT := v2
 endef
-TARGET_DEVICES += netgear_ex6150v2
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_ex6150v2
 
 define Device/netgear_orbi
 	$(call Device/DniImage)
@@ -794,7 +817,8 @@ define Device/netgear_rbr50
 	DEVICE_VARIANT := v1
 	NETGEAR_BOARD_ID := RBR50
 endef
-TARGET_DEVICES += netgear_rbr50
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_rbr50
 
 define Device/netgear_rbs50
 	$(call Device/netgear_rbx50)
@@ -802,7 +826,8 @@ define Device/netgear_rbs50
 	DEVICE_VARIANT := v1
 	NETGEAR_BOARD_ID := RBS50
 endef
-TARGET_DEVICES += netgear_rbs50
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_rbs50
 
 define Device/netgear_srx60
 	$(call Device/netgear_orbi)
@@ -817,14 +842,16 @@ define Device/netgear_srr60
 	DEVICE_MODEL := SRR60
 	NETGEAR_BOARD_ID := SRR60
 endef
-TARGET_DEVICES += netgear_srr60
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_srr60
 
 define Device/netgear_srs60
 	$(call Device/netgear_srx60)
 	DEVICE_MODEL := SRS60
 	NETGEAR_BOARD_ID := SRS60
 endef
-TARGET_DEVICES += netgear_srs60
+# Missing DSA Setup
+#TARGET_DEVICES += netgear_srs60
 
 define Device/netgear_wac510
 	$(call Device/FitImage)
@@ -854,7 +881,8 @@ define Device/openmesh_a42
 	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A42
 	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
 endef
-TARGET_DEVICES += openmesh_a42
+# Missing DSA Setup
+#TARGET_DEVICES += openmesh_a42
 
 define Device/openmesh_a62
 	$(call Device/FitImageLzma)
@@ -870,7 +898,8 @@ define Device/openmesh_a62
 	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
 	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct
 endef
-TARGET_DEVICES += openmesh_a62
+# Missing DSA Setup
+#TARGET_DEVICES += openmesh_a62
 
 define Device/p2w_r619ac
 	$(call Device/FitzImage)
@@ -924,7 +953,8 @@ define Device/plasmacloud_pa1200
 	IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=PA1200
 	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
 endef
-TARGET_DEVICES += plasmacloud_pa1200
+# Missing DSA Setup
+#TARGET_DEVICES += plasmacloud_pa1200
 
 define Device/plasmacloud_pa2200
 	$(call Device/FitImageLzma)
@@ -940,7 +970,8 @@ define Device/plasmacloud_pa2200
 	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata
 	DEVICE_PACKAGES := ath10k-firmware-qca9888-ct
 endef
-TARGET_DEVICES += plasmacloud_pa2200
+# Missing DSA Setup
+#TARGET_DEVICES += plasmacloud_pa2200
 
 define Device/qcom_ap-dk01.1-c1
 	DEVICE_VENDOR := Qualcomm Atheros
@@ -988,7 +1019,8 @@ define Device/qxwlan_e2600ac-c1
 	DEVICE_PACKAGES := ipq-wifi-qxwlan_e2600ac-c1
 	DEFAULT := n
 endef
-TARGET_DEVICES += qxwlan_e2600ac-c1
+# Missing DSA Setup
+#TARGET_DEVICES += qxwlan_e2600ac-c1
 
 define Device/qxwlan_e2600ac-c2
 	$(call Device/FitImage)
@@ -1002,7 +1034,8 @@ define Device/qxwlan_e2600ac-c2
 	PAGESIZE := 2048
 	DEVICE_PACKAGES := ipq-wifi-qxwlan_e2600ac-c2
 endef
-TARGET_DEVICES += qxwlan_e2600ac-c2
+# Missing DSA Setup
+#TARGET_DEVICES += qxwlan_e2600ac-c2
 
 define Device/sony_ncp-hg100-cellular
 	$(call Device/FitImage)
@@ -1015,7 +1048,8 @@ define Device/sony_ncp-hg100-cellular
 	DEVICE_PACKAGES := e2fsprogs ipq-wifi-sony_ncp-hg100-cellular \
 		kmod-fs-ext4 uqmi
 endef
-TARGET_DEVICES += sony_ncp-hg100-cellular
+# Missing DSA Setup
+#TARGET_DEVICES += sony_ncp-hg100-cellular
 
 define Device/teltonika_rutx10
 	$(call Device/FitImage)
@@ -1031,7 +1065,8 @@ define Device/teltonika_rutx10
 	IMAGE/nand-factory.ubi := append-ubi | qsdk-ipq-factory-nand | append-rutx-metadata
 	DEVICE_PACKAGES := ipq-wifi-teltonika_rutx kmod-bluetooth
 endef
-TARGET_DEVICES += teltonika_rutx10
+# Missing DSA Setup
+#TARGET_DEVICES += teltonika_rutx10
 
 define Device/tel_x1pro
 	$(call Device/FitImage)
@@ -1044,7 +1079,8 @@ define Device/tel_x1pro
 	DEVICE_PACKAGES := kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
 	DEFAULT := n
 endef
-TARGET_DEVICES += tel_x1pro
+# Missing DSA Setup
+#TARGET_DEVICES += tel_x1pro
 
 define Device/unielec_u4019-32m
 	$(call Device/FitImage)
@@ -1058,7 +1094,8 @@ define Device/unielec_u4019-32m
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
 	DEFAULT := n
 endef
-TARGET_DEVICES += unielec_u4019-32m
+# Missing DSA Setup
+#TARGET_DEVICES += unielec_u4019-32m
 
 define Device/zte_mf28x_common
 	$(call Device/FitzImage)
@@ -1082,7 +1119,8 @@ define Device/zte_mf289f
 	DEVICE_MODEL := MF289F
 	DEVICE_PACKAGES += ipq-wifi-zte_mf289f ath10k-firmware-qca9984-ct
 endef
-TARGET_DEVICES += zte_mf289f
+# Missing DSA Setup
+#TARGET_DEVICES += zte_mf289f
 
 define Device/zyxel_nbg6617
 	$(call Device/FitImageLzma)
@@ -1116,4 +1154,5 @@ define Device/zyxel_wre6606
 	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | check-size | append-metadata
 	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
 endef
-TARGET_DEVICES += zyxel_wre6606
+# Missing DSA Setup
+#TARGET_DEVICES += zyxel_wre6606
diff --git a/target/linux/ipq40xx/image/mikrotik.mk b/target/linux/ipq40xx/image/mikrotik.mk
index d1f0829cd3..8491ff4a42 100644
--- a/target/linux/ipq40xx/image/mikrotik.mk
+++ b/target/linux/ipq40xx/image/mikrotik.mk
@@ -69,4 +69,5 @@ define Device/mikrotik_wap-ac
 	SOC := qcom-ipq4018
 	DEVICE_PACKAGES := -kmod-ath10k-ct kmod-ath10k-ct-smallbuffers
 endef
-TARGET_DEVICES += mikrotik_wap-ac
+# Missing DSA Setup
+#TARGET_DEVICES += mikrotik_wap-ac
diff --git a/target/linux/ipq40xx/patches-5.10/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch b/target/linux/ipq40xx/patches-5.10/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
new file mode 100644
index 0000000000..7cad65aa0a
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
@@ -0,0 +1,43 @@
+From da75807ac41175e9db8c95f7a172b4133763b744 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Mon, 11 Jan 2021 17:49:36 +0100
+Subject: [PATCH] skbuff: add DSA specific data to struct skb_shared_info
+
+All of the already existing DSA tagging protocol drivers
+are storing the tagging data directly into the skb. In most
+cases that is the only way to send the required information
+to the underlying ethernet switch.
+
+However on certain platforms (like the Qualcomm IPQ40xx
+SoCs) the built-in ethernet switch is connected directly
+to an ethernet MAC, and the tagging information must be
+sent out-of-band which is done directly via the hardware
+TX descriptors of the ethernet MAC.
+
+In such cases, putting the information into the skb causes
+unneccesary overhead, because the ethernet driver must
+remove that before sending the ethernet frame towards to
+the hardware.
+
+This change adds two new DSA specific fields to struct
+skb_shared_info which makes it possible to send the
+tagging information via skb->shinfo. With this approach,
+the twofold modifications of the skb data can be avoided.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ include/linux/skbuff.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -522,6 +522,9 @@ struct skb_shared_info {
+ 	unsigned int	gso_type;
+ 	u32		tskey;
+ 
++	unsigned int	dsa_tag_proto;
++	unsigned char	dsa_tag_data[8];
++
+ 	/*
+ 	 * Warning : all fields before dataref are cleared in __alloc_skb()
+ 	 */
diff --git a/target/linux/ipq40xx/patches-5.10/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch b/target/linux/ipq40xx/patches-5.10/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
new file mode 100644
index 0000000000..133f1b8a96
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
@@ -0,0 +1,188 @@
+From 29a0c2fae991cab142575c92276c0afdeb260ebe Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Thu, 28 Oct 2021 21:44:52 +0200
+Subject: [PATCH] net: dsa: tag_ipq4019: add shinfo based tagging driver for
+ IPQ40xx
+
+This change adds a tagging protocol driver for the built-in
+ethernet switch of the Qualcomm Atheros IPQ4019 SoCs.
+
+In comparison to the existing tagging protocols this hardware
+requires a slightly different approach because the switch does
+not use in-band tags.
+
+On the receive path, the source port information is embedded
+into the RX descriptors of the ethernet MAC hardware. Similarly,
+the destination port mask must be sent via the TX descriptors
+of the ethernet MAC when a packet is sent towards the switch.
+
+In order to support this special requirements, this patch
+adds a new tagging protocol driver.
+
+The driver extracts the source port information directly
+from the 'receive return descriptor' of the ethernet MAC.
+It is possible because that descriptor is part of the skb
+received from the ethernet driver.
+
+Unfortunatley, it is not possible to put the destination
+port information directly to the TX descriptors, because
+those are handled internally by the driver of the ethernet
+hardware.
+
+To overcome this limitation, this tagging driver uses the
+DSA specific fields in skb->shinfo to send the destination
+port information to the ethernet driver.
+
+A similar tagging driver is exist but that uses skb
+extensions which causes unnecessary overhead.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ include/linux/dsa/ipq4019.h | 11 ++++++
+ include/net/dsa.h           |  2 +
+ net/dsa/Kconfig             |  6 +++
+ net/dsa/Makefile            |  1 +
+ net/dsa/tag_ipq4019.c       | 79 +++++++++++++++++++++++++++++++++++++
+ 5 files changed, 99 insertions(+)
+ create mode 100644 include/linux/dsa/ipq4019.h
+ create mode 100644 net/dsa/tag_ipq4019.c
+
+--- /dev/null
++++ b/include/linux/dsa/ipq4019.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef DSA_IPQ40XX_H
++#define DSA_IPQ40XX_H
++
++struct ipq40xx_dsa_tag_data {
++	u8 from_cpu;
++	u8 dp;
++};
++
++#endif /* DSA_IPQ40XX_H */
+--- a/include/net/dsa.h
++++ b/include/net/dsa.h
+@@ -46,6 +46,7 @@ struct phylink_link_state;
+ #define DSA_TAG_PROTO_AR9331_VALUE		16
+ #define DSA_TAG_PROTO_RTL4_A_VALUE		17
+ #define DSA_TAG_PROTO_BRCM_LEGACY_VALUE		22
++#define DSA_TAG_PROTO_IPQ4019_VALUE		24
+ 
+ enum dsa_tag_protocol {
+ 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,
+@@ -67,6 +68,7 @@ enum dsa_tag_protocol {
+ 	DSA_TAG_PROTO_OCELOT		= DSA_TAG_PROTO_OCELOT_VALUE,
+ 	DSA_TAG_PROTO_AR9331		= DSA_TAG_PROTO_AR9331_VALUE,
+ 	DSA_TAG_PROTO_RTL4_A		= DSA_TAG_PROTO_RTL4_A_VALUE,
++	DSA_TAG_PROTO_IPQ4019	= DSA_TAG_PROTO_IPQ4019_VALUE,
+ };
+ 
+ struct packet_type;
+--- a/net/dsa/Kconfig
++++ b/net/dsa/Kconfig
+@@ -63,6 +63,12 @@ config NET_DSA_TAG_BRCM_PREPEND
+ 	  Broadcom switches which places the tag before the Ethernet header
+ 	  (prepended).
+ 
++config NET_DSA_TAG_IPQ4019
++	tristate "Tag driver for Qualcomm Atheros IPQ4019 SoC built-in switch"
++	help
++	  Say Y or M if you want to enable support for tagging frames for
++	  the built-in switch of the Qualcomm Atheros IPQ4019 SoC-s.
++
+ config NET_DSA_TAG_GSWIP
+ 	tristate "Tag driver for Lantiq / Intel GSWIP switches"
+ 	help
+--- a/net/dsa/Makefile
++++ b/net/dsa/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) +=
+ obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
+ obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
+ obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
++obj-$(CONFIG_NET_DSA_TAG_IPQ4019) += tag_ipq4019.o
+ obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
+ obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
+ obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o
+--- /dev/null
++++ b/net/dsa/tag_ipq4019.c
+@@ -0,0 +1,79 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++/* Copyright (c) 2021, Gabor Juhos <j4g8y7@gmail.com> */
++
++#include <linux/bitfield.h>
++#include <linux/dsa/ipq4019.h>
++
++#include "dsa_priv.h"
++
++/* Receive Return Descriptor */
++struct edma_rrd {
++	u16 rrd0;
++	u16 rrd1;
++	u16 rrd2;
++	u16 rrd3;
++	u16 rrd4;
++	u16 rrd5;
++	u16 rrd6;
++	u16 rrd7;
++} __packed;
++
++#define EDMA_RRD_SIZE			sizeof(struct edma_rrd)
++
++#define EDMA_RRD1_PORT_ID_MASK		GENMASK(14, 12)
++
++static struct sk_buff *ipq4019_sh_tag_xmit(struct sk_buff *skb,
++					   struct net_device *dev)
++{
++	struct dsa_port *dp = dsa_slave_to_port(dev);
++	struct ipq40xx_dsa_tag_data *tag_data;
++
++	BUILD_BUG_ON(sizeof_field(struct skb_shared_info, dsa_tag_data) <
++		     sizeof(struct ipq40xx_dsa_tag_data));
++
++	skb_shinfo(skb)->dsa_tag_proto = DSA_TAG_PROTO_IPQ4019;
++	tag_data = (struct ipq40xx_dsa_tag_data *)skb_shinfo(skb)->dsa_tag_data;
++
++	tag_data->from_cpu = 1;
++	/* set the destination port information */
++	tag_data->dp = BIT(dp->index);
++
++	return skb;
++}
++
++static struct sk_buff *ipq4019_sh_tag_rcv(struct sk_buff *skb,
++					  struct net_device *dev,
++					  struct packet_type *pt)
++{
++	struct edma_rrd *rrd;
++	int offset;
++	int port;
++
++	offset = EDMA_RRD_SIZE + ETH_HLEN;
++	if (unlikely(skb_headroom(skb) < offset))
++		return NULL;
++
++	rrd = (struct edma_rrd *)(skb->data - offset);
++	port = FIELD_GET(EDMA_RRD1_PORT_ID_MASK, rrd->rrd1);
++
++	skb->dev = dsa_master_find_slave(dev, 0, port);
++	if (!skb->dev)
++		return NULL;
++
++	return skb;
++}
++
++const struct dsa_device_ops ipq4019_sh_tag_dsa_ops = {
++	.name	= "ipq4019-sh",
++	.proto	= DSA_TAG_PROTO_IPQ4019,
++	.xmit	= ipq4019_sh_tag_xmit,
++	.rcv	= ipq4019_sh_tag_rcv,
++};
++
++MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("DSA tag driver for the IPQ4019 SoC built-in ethernet switch");
++MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_IPQ4019);
++
++module_dsa_tag_driver(ipq4019_sh_tag_dsa_ops);
diff --git a/target/linux/ipq40xx/patches-5.10/702-dts-ipq4019-add-PHY-switch-nodes.patch b/target/linux/ipq40xx/patches-5.10/702-dts-ipq4019-add-PHY-switch-nodes.patch
deleted file mode 100644
index d95e75107b..0000000000
--- a/target/linux/ipq40xx/patches-5.10/702-dts-ipq4019-add-PHY-switch-nodes.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sun, 20 Nov 2016 02:20:54 +0100
-Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
-
-This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
-nodes which are needed for the ar40xx.c driver to initialize the
-switch.
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -617,6 +617,29 @@
- 			};
- 		};
- 
-+		ess-switch@c000000 {
-+			compatible = "qcom,ess-switch";
-+			reg = <0xc000000 0x80000>;
-+			switch_access_mode = "local bus";
-+			resets = <&gcc ESS_RESET>;
-+			reset-names = "ess_rst";
-+			clocks = <&gcc GCC_ESS_CLK>;
-+			clock-names = "ess_clk";
-+			switch_cpu_bmp = <0x1>;
-+			switch_lan_bmp = <0x1e>;
-+			switch_wan_bmp = <0x20>;
-+			switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
-+			switch_initvlas = <0x7c 0x54>;
-+			status = "disabled";
-+		};
-+
-+		ess-psgmii@98000 {
-+			compatible = "qcom,ess-psgmii";
-+			reg = <0x98000 0x800>;
-+			psgmii_access_mode = "local bus";
-+			status = "disabled";
-+		};
-+
- 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qcom,usb-ss-ipq4019-phy";
- 			#phy-cells = <0>;
diff --git a/target/linux/ipq40xx/patches-5.10/702-net-ethernet-qualcomm-add-IPQESS-support.patch b/target/linux/ipq40xx/patches-5.10/702-net-ethernet-qualcomm-add-IPQESS-support.patch
new file mode 100644
index 0000000000..72e9345118
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/702-net-ethernet-qualcomm-add-IPQESS-support.patch
@@ -0,0 +1,43 @@
+From 4f488235f498db43f2412116dea6e02c7fb20216 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 12:36:51 +0100
+Subject: [PATCH] net: ethernet: qualcomm: add IPQESS support
+
+Allow compiling the IPQESS driver that supports the
+Qualcomm IPQ40xx SoC built-in ethernet controller.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ drivers/net/ethernet/qualcomm/Kconfig  | 11 +++++++++++
+ drivers/net/ethernet/qualcomm/Makefile |  1 +
+ 2 files changed, 12 insertions(+)
+
+--- a/drivers/net/ethernet/qualcomm/Kconfig
++++ b/drivers/net/ethernet/qualcomm/Kconfig
+@@ -60,6 +60,17 @@ config QCOM_EMAC
+ 	  low power, Receive-Side Scaling (RSS), and IEEE 1588-2008
+ 	  Precision Clock Synchronization Protocol.
+ 
++config QCOM_IPQ4019_ESS_EDMA
++	tristate "Qualcomm Atheros IPQ4019 ESS EDMA support"
++	depends on OF
++	select PHYLINK
++	help
++	  This driver supports the Qualcomm Atheros IPQ40xx built-in
++	  ESS EDMA ethernet controller.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called ipqess.
++
+ source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
+ 
+ endif # NET_VENDOR_QUALCOMM
+--- a/drivers/net/ethernet/qualcomm/Makefile
++++ b/drivers/net/ethernet/qualcomm/Makefile
+@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
+ qcauart-objs := qca_uart.o
+ 
+ obj-y += emac/
++obj-y += ipqess/
+ 
+ obj-$(CONFIG_RMNET) += rmnet/
diff --git a/target/linux/ipq40xx/patches-5.10/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch b/target/linux/ipq40xx/patches-5.10/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
new file mode 100644
index 0000000000..68fb4eb4ce
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
@@ -0,0 +1,81 @@
+From 44327d7098d4f32c24ec8c528e5aff6e030956bc Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 20 Oct 2021 13:21:45 +0200
+Subject: [PATCH] arm: dts: ipq4019: add ethernet controller DT node
+
+Since IPQ40xx SoC built-in ethernet controller now has a driver,
+add its DT node so it can be used.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -38,6 +38,7 @@
+ 		spi1 = &blsp1_spi2;
+ 		i2c0 = &blsp1_i2c3;
+ 		i2c1 = &blsp1_i2c4;
++		ethernet0 = &gmac;
+ 	};
+ 
+ 	cpus {
+@@ -589,6 +590,57 @@
+ 			status = "disabled";
+ 		};
+ 
++		gmac: ethernet@c080000 {
++			compatible = "qcom,ipq4019-ess-edma";
++			reg = <0xc080000 0x8000>;
++			resets = <&gcc ESS_RESET>;
++			reset-names = "ess_rst";
++			clocks = <&gcc GCC_ESS_CLK>;
++			clock-names = "ess_clk";
++			interrupts = <GIC_SPI  65 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  66 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  67 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  68 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  69 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  70 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  71 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  72 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  73 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  74 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  75 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  76 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  77 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  78 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  79 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  80 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
++
++			status = "disabled";
++
++			phy-mode = "internal";
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++				pause;
++				asym-pause;
++			};
++		};
++
+ 		mdio: mdio@90000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
diff --git a/target/linux/ipq40xx/patches-5.10/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch b/target/linux/ipq40xx/patches-5.10/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
deleted file mode 100644
index 739a603b07..0000000000
--- a/target/linux/ipq40xx/patches-5.10/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 7c129254adb1093d10a62ed7bf7b956fcc6ffe34 Mon Sep 17 00:00:00 2001
-From: Rakesh Nair <ranair@codeaurora.org>
-Date: Wed, 20 Jul 2016 15:02:01 +0530
-Subject: [PATCH] net: IPQ4019 needs rfs/vlan_tag callbacks in
- netdev_ops
-
-Add callback support to get default vlan tag and register
-receive flow steering filter.
-
-Used by IPQ4019 ess-edma driver.
-
-BUG=chrome-os-partner:33096
-TEST=none
-
-Change-Id: I266070e4a0fbe4a0d9966fe79a71e50ec4f26c75
-Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
-Reviewed-on: https://chromium-review.googlesource.com/362203
-Commit-Ready: Grant Grundler <grundler@chromium.org>
-Tested-by: Grant Grundler <grundler@chromium.org>
-Reviewed-by: Grant Grundler <grundler@chromium.org>
----
- include/linux/netdevice.h | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/include/linux/netdevice.h
-+++ b/include/linux/netdevice.h
-@@ -779,6 +779,16 @@ struct xps_map {
- #define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \
-        - sizeof(struct xps_map)) / sizeof(u16))
- 
-+#ifdef CONFIG_RFS_ACCEL
-+typedef int (*set_rfs_filter_callback_t)(struct net_device *dev,
-+                                     __be32 src,
-+                                     __be32 dst,
-+                                     __be16 sport,
-+                                     __be16 dport,
-+                                     u8 proto,
-+                                     u16 rxq_index,
-+                                     u32 action);
-+#endif
- /*
-  * This structure holds all XPS maps for device.  Maps are indexed by CPU.
-  */
-@@ -1466,6 +1476,9 @@ struct net_device_ops {
- 						     const struct sk_buff *skb,
- 						     u16 rxq_index,
- 						     u32 flow_id);
-+        int                     (*ndo_register_rfs_filter)(struct net_device *dev,
-+                                                              set_rfs_filter_callback_t set_filter);
-+        int                     (*ndo_get_default_vlan_tag)(struct net_device *net);
- #endif
- 	int			(*ndo_add_slave)(struct net_device *dev,
- 						 struct net_device *slave_dev,
diff --git a/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch
new file mode 100644
index 0000000000..b98201e0d0
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch
@@ -0,0 +1,61 @@
+From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Fri, 25 Dec 2020 08:02:47 +0100
+Subject: [PATCH] net: phy: define PSGMII PHY interface mode
+
+The PSGMII interface is similar to QSGMII. The main difference
+is that the PSGMII interface combines five SGMII lines into a
+single link while in QSGMII only four lines are combined.
+
+Similarly to the QSGMII, this interface mode might also needs
+special handling within the MAC driver.
+
+Add definitions for the PHY layer to allow to express this type
+of connection between the MAC and PHY.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
+ drivers/net/phy/phylink.c                                      | 1 +
+ include/linux/phy.h                                            | 3 +++
+ 3 files changed, 5 insertions(+)
+
+--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
++++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+@@ -64,6 +64,7 @@ properties:
+       - mii
+       - gmii
+       - sgmii
++      - psgmii
+       - qsgmii
+       - tbi
+       - rev-mii
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -289,6 +289,7 @@ static int phylink_parse_mode(struct phy
+ 
+ 		switch (pl->link_config.interface) {
+ 		case PHY_INTERFACE_MODE_SGMII:
++		case PHY_INTERFACE_MODE_PSGMII:
+ 		case PHY_INTERFACE_MODE_QSGMII:
+ 			phylink_set(pl->supported, 10baseT_Half);
+ 			phylink_set(pl->supported, 10baseT_Full);
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -134,6 +134,7 @@ typedef enum {
+ 	PHY_INTERFACE_MODE_XGMII,
+ 	PHY_INTERFACE_MODE_XLGMII,
+ 	PHY_INTERFACE_MODE_MOCA,
++	PHY_INTERFACE_MODE_PSGMII,
+ 	PHY_INTERFACE_MODE_QSGMII,
+ 	PHY_INTERFACE_MODE_TRGMII,
+ 	PHY_INTERFACE_MODE_100BASEX,
+@@ -201,6 +202,8 @@ static inline const char *phy_modes(phy_
+ 		return "xlgmii";
+ 	case PHY_INTERFACE_MODE_MOCA:
+ 		return "moca";
++	case PHY_INTERFACE_MODE_PSGMII:
++		return "psgmii";
+ 	case PHY_INTERFACE_MODE_QSGMII:
+ 		return "qsgmii";
+ 	case PHY_INTERFACE_MODE_TRGMII:
diff --git a/target/linux/ipq40xx/patches-5.10/705-net-add-qualcomm-ar40xx-phy.patch b/target/linux/ipq40xx/patches-5.10/705-net-add-qualcomm-ar40xx-phy.patch
deleted file mode 100644
index cd0b10c6c8..0000000000
--- a/target/linux/ipq40xx/patches-5.10/705-net-add-qualcomm-ar40xx-phy.patch
+++ /dev/null
@@ -1,27 +0,0 @@
---- a/drivers/net/mdio/Kconfig
-+++ b/drivers/net/mdio/Kconfig
-@@ -27,6 +27,13 @@ config OF_MDIO
- 	help
- 	  OpenFirmware MDIO bus (Ethernet PHY) accessors
- 
-+config AR40XX_PHY
-+   tristate "Driver for Qualcomm Atheros IPQ40XX switches"
-+   depends on HAS_IOMEM && OF && OF_MDIO
-+   select SWCONFIG
-+   help
-+      This is the driver for Qualcomm Atheros IPQ40XX ESS switches.
-+
- if MDIO_BUS
- 
- config MDIO_DEVRES
---- a/drivers/net/mdio/Makefile
-+++ b/drivers/net/mdio/Makefile
-@@ -21,6 +21,8 @@ obj-$(CONFIG_MDIO_SUN4I)		+= mdio-sun4i.
- obj-$(CONFIG_MDIO_THUNDER)		+= mdio-thunder.o
- obj-$(CONFIG_MDIO_XGENE)		+= mdio-xgene.o
- 
-+obj-$(CONFIG_AR40XX_PHY)		+= ar40xx.o
-+
- obj-$(CONFIG_MDIO_BUS_MUX)		+= mdio-mux.o
- obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC)	+= mdio-mux-bcm-iproc.o
- obj-$(CONFIG_MDIO_BUS_MUX_GPIO)		+= mdio-mux-gpio.o
diff --git a/target/linux/ipq40xx/patches-5.10/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-5.10/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
new file mode 100644
index 0000000000..ed201b7c58
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
@@ -0,0 +1,53 @@
+From b5f71652b85a85ea53162e9e2b760b84fd0d254f Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 18:10:28 +0100
+Subject: [PATCH] net: dsa: add Qualcomm IPQ4019 built-in switch support
+
+Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in.
+
+It shares most of the stuff with its external counterpart, however it is
+modified for the SoC.
+Namely, it doesn't have second CPU port (Port 6), so it has 6 ports
+instead of 7.
+It also has no built-in PHY-s but rather requires external PSGMII based
+companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry
+out calibration before using them.
+PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which
+unfortunately requires some magic values as the datasheet doesnt document
+the bits that are being set or the register at all.
+
+Since its built-in it is MMIO like other peripherals and doesn't have its
+own MDIO bus but depends on the SoC provided one.
+
+CPU connection is at Port 0 and it uses some kind of a internal connection
+and no traditional RGMII/SGMII.
+It also doesn't use in-band tagging like other qca8k switches so a shinfo
+based tagger is used.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ drivers/net/dsa/qca/Kconfig  | 9 +++++++++
+ drivers/net/dsa/qca/Makefile | 1 +
+ 2 files changed, 10 insertions(+)
+
+--- a/drivers/net/dsa/qca/Kconfig
++++ b/drivers/net/dsa/qca/Kconfig
+@@ -7,3 +7,12 @@ config NET_DSA_AR9331
+ 	help
+ 	  This enables support for the Qualcomm Atheros AR9331 built-in Ethernet
+ 	  switch.
++
++config NET_DSA_QCA8K_IPQ4019
++	tristate "Qualcomm Atheros IPQ4019 built-in Ethernet switch support"
++	depends on HAS_IOMEM && NET_DSA
++	select NET_DSA_TAG_IPQ4019
++	select REGMAP
++	help
++	  This enables support for the Qualcomm Atheros IPQ4019 SoC built-in
++	  Ethernet switch.
+--- a/drivers/net/dsa/qca/Makefile
++++ b/drivers/net/dsa/qca/Makefile
+@@ -1,2 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_NET_DSA_AR9331)	+= ar9331.o
++obj-$(CONFIG_NET_DSA_QCA8K_IPQ4019)	+= qca8k-ipq4019.o
diff --git a/target/linux/ipq40xx/patches-5.10/706-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-5.10/706-arm-dts-ipq4019-add-switch-node.patch
new file mode 100644
index 0000000000..a231c7331b
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/706-arm-dts-ipq4019-add-switch-node.patch
@@ -0,0 +1,98 @@
+From ebb62523990a27b3a25e422fa575619f7f725a20 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 18:15:04 +0100
+Subject: [PATCH] arm: dts: ipq4019: add switch node
+
+Since the built-in IPQ40xx switch now has a driver, add the required node
+for it to work.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 78 +++++++++++++++++++++++++++++
+ 1 file changed, 78 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -590,6 +590,82 @@
+ 			status = "disabled";
+ 		};
+ 
++		switch: switch@c000000 {
++			compatible = "qca,ipq4019-qca8337n";
++			reg = <0xc000000 0x80000>, <0x98000 0x800>;
++			reg-names = "base", "psgmii_phy";
++			resets = <&gcc ESS_PSGMII_ARES>;
++			reset-names = "psgmii_rst";
++			mdio = <&mdio>;
++			psgmii-ethphy = <&psgmiiphy>;
++
++			status = "disabled";
++
++			ports {
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				port@0 { /* MAC0 */
++					reg = <0>;
++					label = "cpu";
++					ethernet = <&gmac>;
++					phy-mode = "internal";
++
++					fixed-link {
++						speed = <1000>;
++						full-duplex;
++						pause;
++						asym-pause;
++					};
++				};
++
++				swport1: port@1 { /* MAC1 */
++					reg = <1>;
++					label = "lan1";
++					phy-handle = <&ethphy0>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport2: port@2 { /* MAC2 */
++					reg = <2>;
++					label = "lan2";
++					phy-handle = <&ethphy1>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport3: port@3 { /* MAC3 */
++					reg = <3>;
++					label = "lan3";
++					phy-handle = <&ethphy2>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport4: port@4 { /* MAC4 */
++					reg = <4>;
++					label = "lan4";
++					phy-handle = <&ethphy3>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport5: port@5 { /* MAC5 */
++					reg = <5>;
++					label = "wan";
++					phy-handle = <&ethphy4>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++			};
++		};
++
+ 		gmac: ethernet@c080000 {
+ 			compatible = "qcom,ipq4019-ess-edma";
+ 			reg = <0xc080000 0x8000>;
diff --git a/target/linux/ipq40xx/patches-5.10/706-dt-bindings-net-add-QCA807x-PHY.patch b/target/linux/ipq40xx/patches-5.10/707-dt-bindings-net-add-QCA807x-PHY.patch
similarity index 100%
rename from target/linux/ipq40xx/patches-5.10/706-dt-bindings-net-add-QCA807x-PHY.patch
rename to target/linux/ipq40xx/patches-5.10/707-dt-bindings-net-add-QCA807x-PHY.patch
diff --git a/target/linux/ipq40xx/patches-5.10/707-net-phy-Add-Qualcom-QCA807x-driver.patch b/target/linux/ipq40xx/patches-5.10/708-net-phy-Add-Qualcom-QCA807x-driver.patch
similarity index 100%
rename from target/linux/ipq40xx/patches-5.10/707-net-phy-Add-Qualcom-QCA807x-driver.patch
rename to target/linux/ipq40xx/patches-5.10/708-net-phy-Add-Qualcom-QCA807x-driver.patch
diff --git a/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-5.10/709-arm-dts-ipq4019-QCA807x-properties.patch
similarity index 97%
rename from target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch
rename to target/linux/ipq40xx/patches-5.10/709-arm-dts-ipq4019-QCA807x-properties.patch
index c08f3a83e6..cc4b44b393 100644
--- a/target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch
+++ b/target/linux/ipq40xx/patches-5.10/709-arm-dts-ipq4019-QCA807x-properties.patch
@@ -20,7 +20,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
  
  / {
  	#address-cells = <1>;
-@@ -598,22 +599,39 @@
+@@ -726,22 +727,38 @@
  
  			ethphy0: ethernet-phy@0 {
  				reg = <0>;
@@ -56,7 +56,6 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
 +				reg = <5>;
 +
 +				qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
-+				qcom,psgmii-az;
  			};
  		};
  
diff --git a/target/linux/ipq40xx/patches-5.10/710-net-add-qualcomm-essedma-ethernet-driver.patch b/target/linux/ipq40xx/patches-5.10/710-net-add-qualcomm-essedma-ethernet-driver.patch
deleted file mode 100644
index 793ce72142..0000000000
--- a/target/linux/ipq40xx/patches-5.10/710-net-add-qualcomm-essedma-ethernet-driver.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 12e9319da1adacac92930c899c99f0e1970cac11 Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@googlemail.com>
-Date: Thu, 19 Jan 2017 02:01:31 +0100
-Subject: [PATCH 33/38] NET: add qualcomm essedma ethernet driver
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- drivers/net/ethernet/qualcomm/Kconfig  | 9 +++++++++
- drivers/net/ethernet/qualcomm/Makefile | 1 +
- 2 files changed, 10 insertions(+)
-
---- a/drivers/net/ethernet/qualcomm/Kconfig
-+++ b/drivers/net/ethernet/qualcomm/Kconfig
-@@ -62,4 +62,14 @@ config QCOM_EMAC
- 
- source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
- 
-+config ESSEDMA
-+	tristate "Qualcomm Atheros ESS Edma support"
-+	depends on OF_MDIO
-+	help
-+	  This driver supports ethernet edma adapter.
-+	  Say Y to build this driver.
-+
-+	  To compile this driver as a module, choose M here. The module
-+	  will be called essedma.ko.
-+
- endif # NET_VENDOR_QUALCOMM
---- a/drivers/net/ethernet/qualcomm/Makefile
-+++ b/drivers/net/ethernet/qualcomm/Makefile
-@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
- qcauart-objs := qca_uart.o
- 
- obj-y += emac/
-+obj-$(CONFIG_ESSEDMA) += essedma/
- 
- obj-$(CONFIG_RMNET) += rmnet/
diff --git a/target/linux/ipq40xx/patches-5.10/711-dts-ipq4019-add-ethernet-essedma-node.patch b/target/linux/ipq40xx/patches-5.10/711-dts-ipq4019-add-ethernet-essedma-node.patch
deleted file mode 100644
index 3567eb7810..0000000000
--- a/target/linux/ipq40xx/patches-5.10/711-dts-ipq4019-add-ethernet-essedma-node.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From c611d3780fa101662a822d10acf8feb04ca97409 Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sun, 20 Nov 2016 01:01:10 +0100
-Subject: [PATCH] dts: ipq4019: add ethernet essedma node
-
-This patch adds the device-tree node for the ethernet
-interfaces.
-
-Note: The driver isn't anywhere close to be upstream,
-so the info might change.
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 60 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 60 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -39,6 +39,8 @@
- 		spi1 = &blsp1_spi2;
- 		i2c0 = &blsp1_i2c3;
- 		i2c1 = &blsp1_i2c4;
-+		ethernet0 = &gmac0;
-+		ethernet1 = &gmac1;
- 	};
- 
- 	cpus {
-@@ -658,6 +660,64 @@
- 			status = "disabled";
- 		};
- 
-+		edma@c080000 {
-+			compatible = "qcom,ess-edma";
-+			reg = <0xc080000 0x8000>;
-+			qcom,page-mode = <0>;
-+			qcom,rx_head_buf_size = <1540>;
-+			qcom,mdio_supported;
-+			qcom,poll_required = <1>;
-+			qcom,num_gmac = <2>;
-+			interrupts = <0  65 IRQ_TYPE_EDGE_RISING
-+				      0  66 IRQ_TYPE_EDGE_RISING
-+				      0  67 IRQ_TYPE_EDGE_RISING
-+				      0  68 IRQ_TYPE_EDGE_RISING
-+				      0  69 IRQ_TYPE_EDGE_RISING
-+				      0  70 IRQ_TYPE_EDGE_RISING
-+				      0  71 IRQ_TYPE_EDGE_RISING
-+				      0  72 IRQ_TYPE_EDGE_RISING
-+				      0  73 IRQ_TYPE_EDGE_RISING
-+				      0  74 IRQ_TYPE_EDGE_RISING
-+				      0  75 IRQ_TYPE_EDGE_RISING
-+				      0  76 IRQ_TYPE_EDGE_RISING
-+				      0  77 IRQ_TYPE_EDGE_RISING
-+				      0  78 IRQ_TYPE_EDGE_RISING
-+				      0  79 IRQ_TYPE_EDGE_RISING
-+				      0  80 IRQ_TYPE_EDGE_RISING
-+				      0 240 IRQ_TYPE_EDGE_RISING
-+				      0 241 IRQ_TYPE_EDGE_RISING
-+				      0 242 IRQ_TYPE_EDGE_RISING
-+				      0 243 IRQ_TYPE_EDGE_RISING
-+				      0 244 IRQ_TYPE_EDGE_RISING
-+				      0 245 IRQ_TYPE_EDGE_RISING
-+				      0 246 IRQ_TYPE_EDGE_RISING
-+				      0 247 IRQ_TYPE_EDGE_RISING
-+				      0 248 IRQ_TYPE_EDGE_RISING
-+				      0 249 IRQ_TYPE_EDGE_RISING
-+				      0 250 IRQ_TYPE_EDGE_RISING
-+				      0 251 IRQ_TYPE_EDGE_RISING
-+				      0 252 IRQ_TYPE_EDGE_RISING
-+				      0 253 IRQ_TYPE_EDGE_RISING
-+				      0 254 IRQ_TYPE_EDGE_RISING
-+				      0 255 IRQ_TYPE_EDGE_RISING>;
-+
-+			status = "disabled";
-+
-+			gmac0: gmac0 {
-+				local-mac-address = [00 00 00 00 00 00];
-+				vlan_tag = <1 0x1f>;
-+			};
-+
-+			gmac1: gmac1 {
-+				local-mac-address = [00 00 00 00 00 00];
-+				qcom,phy_mdio_addr = <4>;
-+				qcom,poll_required = <1>;
-+				qcom,forced_speed = <1000>;
-+				qcom,forced_duplex = <1>;
-+				vlan_tag = <2 0x20>;
-+			};
-+		};
-+
- 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qcom,usb-ss-ipq4019-phy";
- 			#phy-cells = <0>;
diff --git a/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch b/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
new file mode 100644
index 0000000000..e13c1ec223
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/700-skbuff-add-DSA-specific-data-to-struct-skb_shared_in.patch
@@ -0,0 +1,43 @@
+From da75807ac41175e9db8c95f7a172b4133763b744 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Mon, 11 Jan 2021 17:49:36 +0100
+Subject: [PATCH] skbuff: add DSA specific data to struct skb_shared_info
+
+All of the already existing DSA tagging protocol drivers
+are storing the tagging data directly into the skb. In most
+cases that is the only way to send the required information
+to the underlying ethernet switch.
+
+However on certain platforms (like the Qualcomm IPQ40xx
+SoCs) the built-in ethernet switch is connected directly
+to an ethernet MAC, and the tagging information must be
+sent out-of-band which is done directly via the hardware
+TX descriptors of the ethernet MAC.
+
+In such cases, putting the information into the skb causes
+unneccesary overhead, because the ethernet driver must
+remove that before sending the ethernet frame towards to
+the hardware.
+
+This change adds two new DSA specific fields to struct
+skb_shared_info which makes it possible to send the
+tagging information via skb->shinfo. With this approach,
+the twofold modifications of the skb data can be avoided.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ include/linux/skbuff.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -528,6 +528,9 @@ struct skb_shared_info {
+ 	unsigned int	gso_type;
+ 	u32		tskey;
+ 
++	unsigned int	dsa_tag_proto;
++	unsigned char	dsa_tag_data[8];
++
+ 	/*
+ 	 * Warning : all fields before dataref are cleared in __alloc_skb()
+ 	 */
diff --git a/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch b/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
new file mode 100644
index 0000000000..74079d68a1
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/701-net-dsa-tag_ipq4019-add-shinfo-based-tagging-driver-.patch
@@ -0,0 +1,187 @@
+From 29a0c2fae991cab142575c92276c0afdeb260ebe Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Thu, 28 Oct 2021 21:44:52 +0200
+Subject: [PATCH] net: dsa: tag_ipq4019: add shinfo based tagging driver for
+ IPQ40xx
+
+This change adds a tagging protocol driver for the built-in
+ethernet switch of the Qualcomm Atheros IPQ4019 SoCs.
+
+In comparison to the existing tagging protocols this hardware
+requires a slightly different approach because the switch does
+not use in-band tags.
+
+On the receive path, the source port information is embedded
+into the RX descriptors of the ethernet MAC hardware. Similarly,
+the destination port mask must be sent via the TX descriptors
+of the ethernet MAC when a packet is sent towards the switch.
+
+In order to support this special requirements, this patch
+adds a new tagging protocol driver.
+
+The driver extracts the source port information directly
+from the 'receive return descriptor' of the ethernet MAC.
+It is possible because that descriptor is part of the skb
+received from the ethernet driver.
+
+Unfortunatley, it is not possible to put the destination
+port information directly to the TX descriptors, because
+those are handled internally by the driver of the ethernet
+hardware.
+
+To overcome this limitation, this tagging driver uses the
+DSA specific fields in skb->shinfo to send the destination
+port information to the ethernet driver.
+
+A similar tagging driver is exist but that uses skb
+extensions which causes unnecessary overhead.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ include/linux/dsa/ipq4019.h | 11 ++++++
+ include/net/dsa.h           |  2 +
+ net/dsa/Kconfig             |  6 +++
+ net/dsa/Makefile            |  1 +
+ net/dsa/tag_ipq4019.c       | 79 +++++++++++++++++++++++++++++++++++++
+ 5 files changed, 99 insertions(+)
+ create mode 100644 include/linux/dsa/ipq4019.h
+ create mode 100644 net/dsa/tag_ipq4019.c
+
+--- /dev/null
++++ b/include/linux/dsa/ipq4019.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef DSA_IPQ40XX_H
++#define DSA_IPQ40XX_H
++
++struct ipq40xx_dsa_tag_data {
++	u8 from_cpu;
++	u8 dp;
++};
++
++#endif /* DSA_IPQ40XX_H */
+--- a/include/net/dsa.h
++++ b/include/net/dsa.h
+@@ -51,6 +51,7 @@ struct phylink_link_state;
+ #define DSA_TAG_PROTO_SEVILLE_VALUE		21
+ #define DSA_TAG_PROTO_BRCM_LEGACY_VALUE		22
+ #define DSA_TAG_PROTO_SJA1110_VALUE		23
++#define DSA_TAG_PROTO_IPQ4019_VALUE		24
+ 
+ enum dsa_tag_protocol {
+ 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,
+@@ -77,6 +78,7 @@ enum dsa_tag_protocol {
+ 	DSA_TAG_PROTO_OCELOT_8021Q	= DSA_TAG_PROTO_OCELOT_8021Q_VALUE,
+ 	DSA_TAG_PROTO_SEVILLE		= DSA_TAG_PROTO_SEVILLE_VALUE,
+ 	DSA_TAG_PROTO_SJA1110		= DSA_TAG_PROTO_SJA1110_VALUE,
++	DSA_TAG_PROTO_IPQ4019		= DSA_TAG_PROTO_IPQ4019_VALUE,
+ };
+ 
+ struct dsa_switch;
+--- a/net/dsa/Kconfig
++++ b/net/dsa/Kconfig
+@@ -57,6 +57,12 @@ config NET_DSA_TAG_HELLCREEK
+ 	  Say Y or M if you want to enable support for tagging frames
+ 	  for the Hirschmann Hellcreek TSN switches.
+ 
++config NET_DSA_TAG_IPQ4019
++	tristate "Tag driver for Qualcomm Atheros IPQ4019 SoC built-in switch"
++	help
++	  Say Y or M if you want to enable support for tagging frames for
++	  the built-in switch of the Qualcomm Atheros IPQ4019 SoC-s.
++
+ config NET_DSA_TAG_GSWIP
+ 	tristate "Tag driver for Lantiq / Intel GSWIP switches"
+ 	help
+--- a/net/dsa/Makefile
++++ b/net/dsa/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_NET_DSA_TAG_AR9331) += tag_
+ obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) += tag_brcm.o
+ obj-$(CONFIG_NET_DSA_TAG_DSA_COMMON) += tag_dsa.o
+ obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
++obj-$(CONFIG_NET_DSA_TAG_IPQ4019) += tag_ipq4019.o
+ obj-$(CONFIG_NET_DSA_TAG_HELLCREEK) += tag_hellcreek.o
+ obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
+ obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
+--- /dev/null
++++ b/net/dsa/tag_ipq4019.c
+@@ -0,0 +1,78 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++/* Copyright (c) 2021, Gabor Juhos <j4g8y7@gmail.com> */
++
++#include <linux/bitfield.h>
++#include <linux/dsa/ipq4019.h>
++
++#include "dsa_priv.h"
++
++/* Receive Return Descriptor */
++struct edma_rrd {
++	u16 rrd0;
++	u16 rrd1;
++	u16 rrd2;
++	u16 rrd3;
++	u16 rrd4;
++	u16 rrd5;
++	u16 rrd6;
++	u16 rrd7;
++} __packed;
++
++#define EDMA_RRD_SIZE			sizeof(struct edma_rrd)
++
++#define EDMA_RRD1_PORT_ID_MASK		GENMASK(14, 12)
++
++static struct sk_buff *ipq4019_sh_tag_xmit(struct sk_buff *skb,
++					   struct net_device *dev)
++{
++	struct dsa_port *dp = dsa_slave_to_port(dev);
++	struct ipq40xx_dsa_tag_data *tag_data;
++
++	BUILD_BUG_ON(sizeof_field(struct skb_shared_info, dsa_tag_data) <
++		     sizeof(struct ipq40xx_dsa_tag_data));
++
++	skb_shinfo(skb)->dsa_tag_proto = DSA_TAG_PROTO_IPQ4019;
++	tag_data = (struct ipq40xx_dsa_tag_data *)skb_shinfo(skb)->dsa_tag_data;
++
++	tag_data->from_cpu = 1;
++	/* set the destination port information */
++	tag_data->dp = BIT(dp->index);
++
++	return skb;
++}
++
++static struct sk_buff *ipq4019_sh_tag_rcv(struct sk_buff *skb,
++					  struct net_device *dev)
++{
++	struct edma_rrd *rrd;
++	int offset;
++	int port;
++
++	offset = EDMA_RRD_SIZE + ETH_HLEN;
++	if (unlikely(skb_headroom(skb) < offset))
++		return NULL;
++
++	rrd = (struct edma_rrd *)(skb->data - offset);
++	port = FIELD_GET(EDMA_RRD1_PORT_ID_MASK, rrd->rrd1);
++
++	skb->dev = dsa_master_find_slave(dev, 0, port);
++	if (!skb->dev)
++		return NULL;
++
++	return skb;
++}
++
++const struct dsa_device_ops ipq4019_sh_tag_dsa_ops = {
++	.name	= "ipq4019-sh",
++	.proto	= DSA_TAG_PROTO_IPQ4019,
++	.xmit	= ipq4019_sh_tag_xmit,
++	.rcv	= ipq4019_sh_tag_rcv,
++};
++
++MODULE_LICENSE("GPL v2");
++MODULE_DESCRIPTION("DSA tag driver for the IPQ4019 SoC built-in ethernet switch");
++MODULE_AUTHOR("Gabor Juhos <j4g8y7@gmail.com>");
++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_IPQ4019);
++
++module_dsa_tag_driver(ipq4019_sh_tag_dsa_ops);
diff --git a/target/linux/ipq40xx/patches-5.15/702-dts-ipq4019-add-PHY-switch-nodes.patch b/target/linux/ipq40xx/patches-5.15/702-dts-ipq4019-add-PHY-switch-nodes.patch
deleted file mode 100644
index d95e75107b..0000000000
--- a/target/linux/ipq40xx/patches-5.15/702-dts-ipq4019-add-PHY-switch-nodes.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sun, 20 Nov 2016 02:20:54 +0100
-Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
-
-This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
-nodes which are needed for the ar40xx.c driver to initialize the
-switch.
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -617,6 +617,29 @@
- 			};
- 		};
- 
-+		ess-switch@c000000 {
-+			compatible = "qcom,ess-switch";
-+			reg = <0xc000000 0x80000>;
-+			switch_access_mode = "local bus";
-+			resets = <&gcc ESS_RESET>;
-+			reset-names = "ess_rst";
-+			clocks = <&gcc GCC_ESS_CLK>;
-+			clock-names = "ess_clk";
-+			switch_cpu_bmp = <0x1>;
-+			switch_lan_bmp = <0x1e>;
-+			switch_wan_bmp = <0x20>;
-+			switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
-+			switch_initvlas = <0x7c 0x54>;
-+			status = "disabled";
-+		};
-+
-+		ess-psgmii@98000 {
-+			compatible = "qcom,ess-psgmii";
-+			reg = <0x98000 0x800>;
-+			psgmii_access_mode = "local bus";
-+			status = "disabled";
-+		};
-+
- 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qcom,usb-ss-ipq4019-phy";
- 			#phy-cells = <0>;
diff --git a/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch b/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch
new file mode 100644
index 0000000000..72e9345118
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/702-net-ethernet-qualcomm-add-IPQESS-support.patch
@@ -0,0 +1,43 @@
+From 4f488235f498db43f2412116dea6e02c7fb20216 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 12:36:51 +0100
+Subject: [PATCH] net: ethernet: qualcomm: add IPQESS support
+
+Allow compiling the IPQESS driver that supports the
+Qualcomm IPQ40xx SoC built-in ethernet controller.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ drivers/net/ethernet/qualcomm/Kconfig  | 11 +++++++++++
+ drivers/net/ethernet/qualcomm/Makefile |  1 +
+ 2 files changed, 12 insertions(+)
+
+--- a/drivers/net/ethernet/qualcomm/Kconfig
++++ b/drivers/net/ethernet/qualcomm/Kconfig
+@@ -60,6 +60,17 @@ config QCOM_EMAC
+ 	  low power, Receive-Side Scaling (RSS), and IEEE 1588-2008
+ 	  Precision Clock Synchronization Protocol.
+ 
++config QCOM_IPQ4019_ESS_EDMA
++	tristate "Qualcomm Atheros IPQ4019 ESS EDMA support"
++	depends on OF
++	select PHYLINK
++	help
++	  This driver supports the Qualcomm Atheros IPQ40xx built-in
++	  ESS EDMA ethernet controller.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called ipqess.
++
+ source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
+ 
+ endif # NET_VENDOR_QUALCOMM
+--- a/drivers/net/ethernet/qualcomm/Makefile
++++ b/drivers/net/ethernet/qualcomm/Makefile
+@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
+ qcauart-objs := qca_uart.o
+ 
+ obj-y += emac/
++obj-y += ipqess/
+ 
+ obj-$(CONFIG_RMNET) += rmnet/
diff --git a/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch b/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
new file mode 100644
index 0000000000..68fb4eb4ce
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/703-arm-dts-ipq4019-add-ethernet-controller-DT-node.patch
@@ -0,0 +1,81 @@
+From 44327d7098d4f32c24ec8c528e5aff6e030956bc Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 20 Oct 2021 13:21:45 +0200
+Subject: [PATCH] arm: dts: ipq4019: add ethernet controller DT node
+
+Since IPQ40xx SoC built-in ethernet controller now has a driver,
+add its DT node so it can be used.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++
+ 1 file changed, 48 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -38,6 +38,7 @@
+ 		spi1 = &blsp1_spi2;
+ 		i2c0 = &blsp1_i2c3;
+ 		i2c1 = &blsp1_i2c4;
++		ethernet0 = &gmac;
+ 	};
+ 
+ 	cpus {
+@@ -589,6 +590,57 @@
+ 			status = "disabled";
+ 		};
+ 
++		gmac: ethernet@c080000 {
++			compatible = "qcom,ipq4019-ess-edma";
++			reg = <0xc080000 0x8000>;
++			resets = <&gcc ESS_RESET>;
++			reset-names = "ess_rst";
++			clocks = <&gcc GCC_ESS_CLK>;
++			clock-names = "ess_clk";
++			interrupts = <GIC_SPI  65 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  66 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  67 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  68 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  69 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  70 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  71 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  72 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  73 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  74 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  75 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  76 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  77 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  78 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  79 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI  80 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
++				     <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
++
++			status = "disabled";
++
++			phy-mode = "internal";
++			fixed-link {
++				speed = <1000>;
++				full-duplex;
++				pause;
++				asym-pause;
++			};
++		};
++
+ 		mdio: mdio@90000 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
diff --git a/target/linux/ipq40xx/patches-5.15/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch b/target/linux/ipq40xx/patches-5.15/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
deleted file mode 100644
index efc35712c8..0000000000
--- a/target/linux/ipq40xx/patches-5.15/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 7c129254adb1093d10a62ed7bf7b956fcc6ffe34 Mon Sep 17 00:00:00 2001
-From: Rakesh Nair <ranair@codeaurora.org>
-Date: Wed, 20 Jul 2016 15:02:01 +0530
-Subject: [PATCH] net: IPQ4019 needs rfs/vlan_tag callbacks in
- netdev_ops
-
-Add callback support to get default vlan tag and register
-receive flow steering filter.
-
-Used by IPQ4019 ess-edma driver.
-
-BUG=chrome-os-partner:33096
-TEST=none
-
-Change-Id: I266070e4a0fbe4a0d9966fe79a71e50ec4f26c75
-Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
-Reviewed-on: https://chromium-review.googlesource.com/362203
-Commit-Ready: Grant Grundler <grundler@chromium.org>
-Tested-by: Grant Grundler <grundler@chromium.org>
-Reviewed-by: Grant Grundler <grundler@chromium.org>
----
- include/linux/netdevice.h | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/include/linux/netdevice.h
-+++ b/include/linux/netdevice.h
-@@ -785,6 +785,16 @@ struct xps_map {
- #define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \
-        - sizeof(struct xps_map)) / sizeof(u16))
- 
-+#ifdef CONFIG_RFS_ACCEL
-+typedef int (*set_rfs_filter_callback_t)(struct net_device *dev,
-+                                     __be32 src,
-+                                     __be32 dst,
-+                                     __be16 sport,
-+                                     __be16 dport,
-+                                     u8 proto,
-+                                     u16 rxq_index,
-+                                     u32 action);
-+#endif
- /*
-  * This structure holds all XPS maps for device.  Maps are indexed by CPU.
-  *
-@@ -1491,6 +1501,9 @@ struct net_device_ops {
- 						     const struct sk_buff *skb,
- 						     u16 rxq_index,
- 						     u32 flow_id);
-+        int                     (*ndo_register_rfs_filter)(struct net_device *dev,
-+                                                              set_rfs_filter_callback_t set_filter);
-+        int                     (*ndo_get_default_vlan_tag)(struct net_device *net);
- #endif
- 	int			(*ndo_add_slave)(struct net_device *dev,
- 						 struct net_device *slave_dev,
diff --git a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch
new file mode 100644
index 0000000000..9791652fd3
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch
@@ -0,0 +1,61 @@
+From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <j4g8y7@gmail.com>
+Date: Fri, 25 Dec 2020 08:02:47 +0100
+Subject: [PATCH] net: phy: define PSGMII PHY interface mode
+
+The PSGMII interface is similar to QSGMII. The main difference
+is that the PSGMII interface combines five SGMII lines into a
+single link while in QSGMII only four lines are combined.
+
+Similarly to the QSGMII, this interface mode might also needs
+special handling within the MAC driver.
+
+Add definitions for the PHY layer to allow to express this type
+of connection between the MAC and PHY.
+
+Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
+---
+ Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
+ drivers/net/phy/phylink.c                                      | 1 +
+ include/linux/phy.h                                            | 3 +++
+ 3 files changed, 5 insertions(+)
+
+--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
++++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+@@ -64,6 +64,7 @@ properties:
+       - mii
+       - gmii
+       - sgmii
++      - psgmii
+       - qsgmii
+       - tbi
+       - rev-mii
+--- a/drivers/net/phy/phylink.c
++++ b/drivers/net/phy/phylink.c
+@@ -293,6 +293,7 @@ static int phylink_parse_mode(struct phy
+ 
+ 		switch (pl->link_config.interface) {
+ 		case PHY_INTERFACE_MODE_SGMII:
++		case PHY_INTERFACE_MODE_PSGMII:
+ 		case PHY_INTERFACE_MODE_QSGMII:
+ 			phylink_set(pl->supported, 10baseT_Half);
+ 			phylink_set(pl->supported, 10baseT_Full);
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -138,6 +138,7 @@ typedef enum {
+ 	PHY_INTERFACE_MODE_XGMII,
+ 	PHY_INTERFACE_MODE_XLGMII,
+ 	PHY_INTERFACE_MODE_MOCA,
++	PHY_INTERFACE_MODE_PSGMII,
+ 	PHY_INTERFACE_MODE_QSGMII,
+ 	PHY_INTERFACE_MODE_TRGMII,
+ 	PHY_INTERFACE_MODE_100BASEX,
+@@ -209,6 +210,8 @@ static inline const char *phy_modes(phy_
+ 		return "xlgmii";
+ 	case PHY_INTERFACE_MODE_MOCA:
+ 		return "moca";
++	case PHY_INTERFACE_MODE_PSGMII:
++		return "psgmii";
+ 	case PHY_INTERFACE_MODE_QSGMII:
+ 		return "qsgmii";
+ 	case PHY_INTERFACE_MODE_TRGMII:
diff --git a/target/linux/ipq40xx/patches-5.15/705-net-add-qualcomm-ar40xx-phy.patch b/target/linux/ipq40xx/patches-5.15/705-net-add-qualcomm-ar40xx-phy.patch
deleted file mode 100644
index 46d311a9b9..0000000000
--- a/target/linux/ipq40xx/patches-5.15/705-net-add-qualcomm-ar40xx-phy.patch
+++ /dev/null
@@ -1,27 +0,0 @@
---- a/drivers/net/mdio/Kconfig
-+++ b/drivers/net/mdio/Kconfig
-@@ -41,6 +41,13 @@ config ACPI_MDIO
- 	help
- 	  ACPI MDIO bus (Ethernet PHY) accessors
- 
-+config AR40XX_PHY
-+   tristate "Driver for Qualcomm Atheros IPQ40XX switches"
-+   depends on HAS_IOMEM && OF && OF_MDIO
-+   select SWCONFIG
-+   help
-+      This is the driver for Qualcomm Atheros IPQ40XX ESS switches.
-+
- if MDIO_BUS
- 
- config MDIO_DEVRES
---- a/drivers/net/mdio/Makefile
-+++ b/drivers/net/mdio/Makefile
-@@ -23,6 +23,8 @@ obj-$(CONFIG_MDIO_SUN4I)		+= mdio-sun4i.
- obj-$(CONFIG_MDIO_THUNDER)		+= mdio-thunder.o
- obj-$(CONFIG_MDIO_XGENE)		+= mdio-xgene.o
- 
-+obj-$(CONFIG_AR40XX_PHY)		+= ar40xx.o
-+
- obj-$(CONFIG_MDIO_BUS_MUX)		+= mdio-mux.o
- obj-$(CONFIG_MDIO_BUS_MUX_BCM6368)	+= mdio-mux-bcm6368.o
- obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC)	+= mdio-mux-bcm-iproc.o
diff --git a/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
new file mode 100644
index 0000000000..d75b5e514d
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/705-net-dsa-add-Qualcomm-IPQ4019-built-in-switch-support.patch
@@ -0,0 +1,56 @@
+From b5f71652b85a85ea53162e9e2b760b84fd0d254f Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 18:10:28 +0100
+Subject: [PATCH] net: dsa: add Qualcomm IPQ4019 built-in switch support
+
+Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in.
+
+It shares most of the stuff with its external counterpart, however it is
+modified for the SoC.
+Namely, it doesn't have second CPU port (Port 6), so it has 6 ports
+instead of 7.
+It also has no built-in PHY-s but rather requires external PSGMII based
+companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry
+out calibration before using them.
+PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which
+unfortunately requires some magic values as the datasheet doesnt document
+the bits that are being set or the register at all.
+
+Since its built-in it is MMIO like other peripherals and doesn't have its
+own MDIO bus but depends on the SoC provided one.
+
+CPU connection is at Port 0 and it uses some kind of a internal connection
+and no traditional RGMII/SGMII.
+It also doesn't use in-band tagging like other qca8k switches so a shinfo
+based tagger is used.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ drivers/net/dsa/qca/Kconfig  | 9 +++++++++
+ drivers/net/dsa/qca/Makefile | 1 +
+ 2 files changed, 10 insertions(+)
+
+--- a/drivers/net/dsa/qca/Kconfig
++++ b/drivers/net/dsa/qca/Kconfig
+@@ -15,3 +15,13 @@ config NET_DSA_QCA8K
+ 	help
+ 	  This enables support for the Qualcomm Atheros QCA8K Ethernet
+ 	  switch chips.
++
++config NET_DSA_QCA8K_IPQ4019
++	tristate "Qualcomm Atheros IPQ4019 built-in Ethernet switch support"
++	depends on HAS_IOMEM && NET_DSA
++	select NET_DSA_TAG_IPQ4019
++	select REGMAP
++	help
++	  This enables support for the Qualcomm Atheros IPQ4019 SoC built-in
++	  Ethernet switch.
++
+--- a/drivers/net/dsa/qca/Makefile
++++ b/drivers/net/dsa/qca/Makefile
+@@ -1,4 +1,5 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ obj-$(CONFIG_NET_DSA_AR9331)	+= ar9331.o
++obj-$(CONFIG_NET_DSA_QCA8K_IPQ4019)	+= qca8k-ipq4019.o
+ obj-$(CONFIG_NET_DSA_QCA8K)	+= qca8k.o
+ qca8k-y 			+= qca8k-common.o qca8k-8xxx.o
diff --git a/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch
new file mode 100644
index 0000000000..a231c7331b
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.15/706-arm-dts-ipq4019-add-switch-node.patch
@@ -0,0 +1,98 @@
+From ebb62523990a27b3a25e422fa575619f7f725a20 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 1 Nov 2021 18:15:04 +0100
+Subject: [PATCH] arm: dts: ipq4019: add switch node
+
+Since the built-in IPQ40xx switch now has a driver, add the required node
+for it to work.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 78 +++++++++++++++++++++++++++++
+ 1 file changed, 78 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -590,6 +590,82 @@
+ 			status = "disabled";
+ 		};
+ 
++		switch: switch@c000000 {
++			compatible = "qca,ipq4019-qca8337n";
++			reg = <0xc000000 0x80000>, <0x98000 0x800>;
++			reg-names = "base", "psgmii_phy";
++			resets = <&gcc ESS_PSGMII_ARES>;
++			reset-names = "psgmii_rst";
++			mdio = <&mdio>;
++			psgmii-ethphy = <&psgmiiphy>;
++
++			status = "disabled";
++
++			ports {
++				#address-cells = <1>;
++				#size-cells = <0>;
++
++				port@0 { /* MAC0 */
++					reg = <0>;
++					label = "cpu";
++					ethernet = <&gmac>;
++					phy-mode = "internal";
++
++					fixed-link {
++						speed = <1000>;
++						full-duplex;
++						pause;
++						asym-pause;
++					};
++				};
++
++				swport1: port@1 { /* MAC1 */
++					reg = <1>;
++					label = "lan1";
++					phy-handle = <&ethphy0>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport2: port@2 { /* MAC2 */
++					reg = <2>;
++					label = "lan2";
++					phy-handle = <&ethphy1>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport3: port@3 { /* MAC3 */
++					reg = <3>;
++					label = "lan3";
++					phy-handle = <&ethphy2>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport4: port@4 { /* MAC4 */
++					reg = <4>;
++					label = "lan4";
++					phy-handle = <&ethphy3>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++
++				swport5: port@5 { /* MAC5 */
++					reg = <5>;
++					label = "wan";
++					phy-handle = <&ethphy4>;
++					phy-mode = "psgmii";
++
++					status = "disabled";
++				};
++			};
++		};
++
+ 		gmac: ethernet@c080000 {
+ 			compatible = "qcom,ipq4019-ess-edma";
+ 			reg = <0xc080000 0x8000>;
diff --git a/target/linux/ipq40xx/patches-5.15/706-dt-bindings-net-add-QCA807x-PHY.patch b/target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch
similarity index 100%
rename from target/linux/ipq40xx/patches-5.15/706-dt-bindings-net-add-QCA807x-PHY.patch
rename to target/linux/ipq40xx/patches-5.15/707-dt-bindings-net-add-QCA807x-PHY.patch
diff --git a/target/linux/ipq40xx/patches-5.15/707-net-phy-Add-Qualcom-QCA807x-driver.patch b/target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch
similarity index 100%
rename from target/linux/ipq40xx/patches-5.15/707-net-phy-Add-Qualcom-QCA807x-driver.patch
rename to target/linux/ipq40xx/patches-5.15/708-net-phy-Add-Qualcom-QCA807x-driver.patch
diff --git a/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
similarity index 97%
rename from target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch
rename to target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
index c08f3a83e6..cc4b44b393 100644
--- a/target/linux/ipq40xx/patches-5.10/708-arm-dts-ipq4019-QCA807x-properties.patch
+++ b/target/linux/ipq40xx/patches-5.15/709-arm-dts-ipq4019-QCA807x-properties.patch
@@ -20,7 +20,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
  
  / {
  	#address-cells = <1>;
-@@ -598,22 +599,39 @@
+@@ -726,22 +727,38 @@
  
  			ethphy0: ethernet-phy@0 {
  				reg = <0>;
@@ -56,7 +56,6 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
 +				reg = <5>;
 +
 +				qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
-+				qcom,psgmii-az;
  			};
  		};
  
diff --git a/target/linux/ipq40xx/patches-5.15/710-net-add-qualcomm-essedma-ethernet-driver.patch b/target/linux/ipq40xx/patches-5.15/710-net-add-qualcomm-essedma-ethernet-driver.patch
deleted file mode 100644
index 793ce72142..0000000000
--- a/target/linux/ipq40xx/patches-5.15/710-net-add-qualcomm-essedma-ethernet-driver.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 12e9319da1adacac92930c899c99f0e1970cac11 Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@googlemail.com>
-Date: Thu, 19 Jan 2017 02:01:31 +0100
-Subject: [PATCH 33/38] NET: add qualcomm essedma ethernet driver
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- drivers/net/ethernet/qualcomm/Kconfig  | 9 +++++++++
- drivers/net/ethernet/qualcomm/Makefile | 1 +
- 2 files changed, 10 insertions(+)
-
---- a/drivers/net/ethernet/qualcomm/Kconfig
-+++ b/drivers/net/ethernet/qualcomm/Kconfig
-@@ -62,4 +62,14 @@ config QCOM_EMAC
- 
- source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
- 
-+config ESSEDMA
-+	tristate "Qualcomm Atheros ESS Edma support"
-+	depends on OF_MDIO
-+	help
-+	  This driver supports ethernet edma adapter.
-+	  Say Y to build this driver.
-+
-+	  To compile this driver as a module, choose M here. The module
-+	  will be called essedma.ko.
-+
- endif # NET_VENDOR_QUALCOMM
---- a/drivers/net/ethernet/qualcomm/Makefile
-+++ b/drivers/net/ethernet/qualcomm/Makefile
-@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
- qcauart-objs := qca_uart.o
- 
- obj-y += emac/
-+obj-$(CONFIG_ESSEDMA) += essedma/
- 
- obj-$(CONFIG_RMNET) += rmnet/
diff --git a/target/linux/ipq40xx/patches-5.15/711-dts-ipq4019-add-ethernet-essedma-node.patch b/target/linux/ipq40xx/patches-5.15/711-dts-ipq4019-add-ethernet-essedma-node.patch
deleted file mode 100644
index 3567eb7810..0000000000
--- a/target/linux/ipq40xx/patches-5.15/711-dts-ipq4019-add-ethernet-essedma-node.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From c611d3780fa101662a822d10acf8feb04ca97409 Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sun, 20 Nov 2016 01:01:10 +0100
-Subject: [PATCH] dts: ipq4019: add ethernet essedma node
-
-This patch adds the device-tree node for the ethernet
-interfaces.
-
-Note: The driver isn't anywhere close to be upstream,
-so the info might change.
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 60 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 60 insertions(+)
-
---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -39,6 +39,8 @@
- 		spi1 = &blsp1_spi2;
- 		i2c0 = &blsp1_i2c3;
- 		i2c1 = &blsp1_i2c4;
-+		ethernet0 = &gmac0;
-+		ethernet1 = &gmac1;
- 	};
- 
- 	cpus {
-@@ -658,6 +660,64 @@
- 			status = "disabled";
- 		};
- 
-+		edma@c080000 {
-+			compatible = "qcom,ess-edma";
-+			reg = <0xc080000 0x8000>;
-+			qcom,page-mode = <0>;
-+			qcom,rx_head_buf_size = <1540>;
-+			qcom,mdio_supported;
-+			qcom,poll_required = <1>;
-+			qcom,num_gmac = <2>;
-+			interrupts = <0  65 IRQ_TYPE_EDGE_RISING
-+				      0  66 IRQ_TYPE_EDGE_RISING
-+				      0  67 IRQ_TYPE_EDGE_RISING
-+				      0  68 IRQ_TYPE_EDGE_RISING
-+				      0  69 IRQ_TYPE_EDGE_RISING
-+				      0  70 IRQ_TYPE_EDGE_RISING
-+				      0  71 IRQ_TYPE_EDGE_RISING
-+				      0  72 IRQ_TYPE_EDGE_RISING
-+				      0  73 IRQ_TYPE_EDGE_RISING
-+				      0  74 IRQ_TYPE_EDGE_RISING
-+				      0  75 IRQ_TYPE_EDGE_RISING
-+				      0  76 IRQ_TYPE_EDGE_RISING
-+				      0  77 IRQ_TYPE_EDGE_RISING
-+				      0  78 IRQ_TYPE_EDGE_RISING
-+				      0  79 IRQ_TYPE_EDGE_RISING
-+				      0  80 IRQ_TYPE_EDGE_RISING
-+				      0 240 IRQ_TYPE_EDGE_RISING
-+				      0 241 IRQ_TYPE_EDGE_RISING
-+				      0 242 IRQ_TYPE_EDGE_RISING
-+				      0 243 IRQ_TYPE_EDGE_RISING
-+				      0 244 IRQ_TYPE_EDGE_RISING
-+				      0 245 IRQ_TYPE_EDGE_RISING
-+				      0 246 IRQ_TYPE_EDGE_RISING
-+				      0 247 IRQ_TYPE_EDGE_RISING
-+				      0 248 IRQ_TYPE_EDGE_RISING
-+				      0 249 IRQ_TYPE_EDGE_RISING
-+				      0 250 IRQ_TYPE_EDGE_RISING
-+				      0 251 IRQ_TYPE_EDGE_RISING
-+				      0 252 IRQ_TYPE_EDGE_RISING
-+				      0 253 IRQ_TYPE_EDGE_RISING
-+				      0 254 IRQ_TYPE_EDGE_RISING
-+				      0 255 IRQ_TYPE_EDGE_RISING>;
-+
-+			status = "disabled";
-+
-+			gmac0: gmac0 {
-+				local-mac-address = [00 00 00 00 00 00];
-+				vlan_tag = <1 0x1f>;
-+			};
-+
-+			gmac1: gmac1 {
-+				local-mac-address = [00 00 00 00 00 00];
-+				qcom,phy_mdio_addr = <4>;
-+				qcom,poll_required = <1>;
-+				qcom,forced_speed = <1000>;
-+				qcom,forced_duplex = <1>;
-+				vlan_tag = <2 0x20>;
-+			};
-+		};
-+
- 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qcom,usb-ss-ipq4019-phy";
- 			#phy-cells = <0>;
diff --git a/target/linux/kirkwood/modules.mk b/target/linux/kirkwood/modules.mk
new file mode 100644
index 0000000000..1543098cd4
--- /dev/null
+++ b/target/linux/kirkwood/modules.mk
@@ -0,0 +1,30 @@
+define KernelPackage/ata-marvell-sata
+  TITLE:=Marvell Serial ATA support
+  DEPENDS:=@TARGET_kirkwood
+  KCONFIG:=CONFIG_SATA_MV CONFIG_SATA_PMP=y
+  FILES:=$(LINUX_DIR)/drivers/ata/sata_mv.ko
+  AUTOLOAD:=$(call AutoLoad,41,sata_mv,1)
+  $(call AddDepends/ata)
+endef
+
+define KernelPackage/ata-marvell-sata/description
+ SATA support for marvell chipsets
+endef
+
+$(eval $(call KernelPackage,ata-marvell-sata))
+
+define KernelPackage/mvsdio
+  SUBMENU:=$(OTHER_MENU)
+  TITLE:=Marvell MMC/SD/SDIO host driver
+  DEPENDS:=+kmod-mmc @TARGET_kirkwood
+  KCONFIG:= CONFIG_MMC_MVSDIO
+  FILES:= \
+	$(LINUX_DIR)/drivers/mmc/host/mvsdio.ko
+  AUTOLOAD:=$(call AutoProbe,mvsdio,1)
+endef
+
+define KernelPackage/mvsdio/description
+ Kernel support for the Marvell SDIO host driver.
+endef
+
+$(eval $(call KernelPackage,mvsdio))
diff --git a/target/linux/lantiq/patches-5.10/0320-MIPS-lantiq-enable-all-hardware-interrupts-on-second.patch b/target/linux/lantiq/patches-5.10/0320-MIPS-lantiq-enable-all-hardware-interrupts-on-second.patch
new file mode 100644
index 0000000000..0ac9adfb96
--- /dev/null
+++ b/target/linux/lantiq/patches-5.10/0320-MIPS-lantiq-enable-all-hardware-interrupts-on-second.patch
@@ -0,0 +1,86 @@
+From 2025bc9c3a949b65bfd0601f727678b37962c6c5 Mon Sep 17 00:00:00 2001
+From: Aleksander Jan Bajkowski <olek2@wp.pl>
+Date: Fri, 4 Jun 2021 18:27:58 +0200
+Subject: [PATCH] MIPS: lantiq: enable all hardware interrupts on second VPE
+
+This patch is needed to handle interrupts by the second VPE on the Lantiq
+ARX100, xRX200, xRX300 and xRX330 SoCs. Switching some ICU interrupts to
+the second VPE results in a hang. Currently, the vsmp_init_secondary()
+function is responsible for enabling these interrupts. It only enables
+Malta-specific interrupts (SW0, SW1, HW4 and HW5).
+
+The MIPS core has 8 interrupts defined. On Lantiq SoCs, hardware
+interrupts are wired to an ICU instance. Each VPE has an independent
+instance of the ICU. The mapping of the ICU interrupts is shown below:
+SW0(IP0) - IPI call,
+SW1(IP1) - IPI resched,
+HW0(IP2) - ICU 0-31,
+HW1(IP3) - ICU 32-63,
+HW2(IP4) - ICU 64-95,
+HW3(IP5) - ICU 96-127,
+HW4(IP6) - ICU 128-159,
+HW5(IP7) - timer.
+
+This patch enables all interrupt lines on the second VPE.
+
+This problem affects multithreaded SoCs with a custom interrupt controller.
+SOCs with 1004Kc core and newer use the MIPS GIC. At this point, I am aware
+that the Realtek RTL839x and RTL930x SoCs may need a similar fix. In the
+future, this may be replaced with some generic solution.
+
+Tested on Lantiq xRX200.
+
+Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
+---
+ arch/mips/lantiq/prom.c | 26 ++++++++++++++++++++++++--
+ 1 file changed, 24 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/lantiq/prom.c
++++ b/arch/mips/lantiq/prom.c
+@@ -37,6 +37,14 @@ static struct ltq_soc_info soc_info;
+ /* for Multithreading (APRP), vpe.c will use it */
+ unsigned long cp0_memsize;
+ 
++/*
++ * These structs are used to override vsmp_init_secondary()
++ */
++#if defined(CONFIG_MIPS_MT_SMP)
++extern const struct plat_smp_ops vsmp_smp_ops;
++static struct plat_smp_ops lantiq_smp_ops;
++#endif
++
+ const char *get_system_type(void)
+ {
+ 	return soc_info.sys_type;
+@@ -100,6 +108,17 @@ void __init device_tree_init(void)
+ 	unflatten_and_copy_device_tree();
+ }
+ 
++#if defined(CONFIG_MIPS_MT_SMP)
++static void lantiq_init_secondary(void)
++{
++	/*
++	 * MIPS CPU startup function vsmp_init_secondary() will only
++	 * enable some of the interrupts for the second CPU/VPE.
++	 */
++	set_c0_status(ST0_IM);
++}
++#endif
++
+ void __init prom_init(void)
+ {
+ 	/* call the soc specific detetcion code and get it to fill soc_info */
+@@ -111,7 +130,10 @@ void __init prom_init(void)
+ 	prom_init_cmdline();
+ 
+ #if defined(CONFIG_MIPS_MT_SMP)
+-	if (register_vsmp_smp_ops())
+-		panic("failed to register_vsmp_smp_ops()");
++	if (cpu_has_mipsmt) {
++		lantiq_smp_ops = vsmp_smp_ops;
++		lantiq_smp_ops.init_secondary = lantiq_init_secondary;
++		register_smp_ops(&lantiq_smp_ops);
++	}
+ #endif
+ }
diff --git a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts
index 218fef5cec..37588e2ac4 100644
--- a/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts
+++ b/target/linux/mediatek/dts/mt7986a-bananapi-bpi-r3.dts
@@ -351,6 +351,20 @@
 		};
 	};
 
+	i2c0_pins: i2c0-pins {
+		mux {
+			function = "i2c";
+			groups = "i2c";
+		};
+	};
+
+	pwm_pins: pwm-pins {
+		mux {
+			function = "pwm";
+			groups = "pwm0", "pwm1_0";
+		};
+	};
+
 	wf_led_pins: wf-led-pins {
 		mux {
 			function = "led";
@@ -420,6 +434,23 @@
 	status = "okay";
 };
 
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm_pins>;
+	status = "okay";
+};
+
+&fan {
+	pwms = <&pwm 0 500000 0>;
+	status = "okay";
+};
+
 &wmac {
 	mediatek,eeprom-data = <0x86790900 0xc4326 0x60000000 0x00 0x00 0x00 0x00 0x00
 				0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 601c859617..ade4cebbd5 100644
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/reset/mt7986-resets.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -199,6 +200,20 @@
 			status = "okay";
 		};
 
+		pwm: pwm@10048000 {
+			compatible = "mediatek,mt7986-pwm";
+			reg = <0 0x10048000 0 0x1000>;
+			#clock-cells = <1>;
+			#pwm-cells = <2>;
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&topckgen CLK_TOP_PWM_SEL>,
+				 <&infracfg CLK_INFRA_PWM_BSEL>,
+				 <&infracfg CLK_INFRA_PWM1_CK>,
+				 <&infracfg CLK_INFRA_PWM2_CK>;
+			clock-names = "top", "main", "pwm1", "pwm2";
+			status = "disabled";
+		};
+
 		uart0: serial@11002000 {
 			compatible = "mediatek,mt7986-uart",
 				     "mediatek,mt6577-uart";
@@ -240,6 +255,20 @@
 			status = "disabled";
 		};
 
+		i2c0: i2c@11008000 {
+			compatible = "mediatek,mt7986-i2c";
+			reg = <0 0x11008000 0 0x90>,
+			      <0 0x10217080 0 0x80>;
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			clock-div = <5>;
+			clocks = <&infracfg CLK_INFRA_I2C0_CK>,
+				 <&infracfg CLK_INFRA_AP_DMA_CK>;
+			clock-names = "main", "dma";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		spi0: spi@1100a000 {
 			compatible = "mediatek,mt7986-spi-ipm", "mediatek,spi-ipm";
 			reg = <0 0x1100a000 0 0x100>;
@@ -264,6 +293,16 @@
 			status = "disabled";
 		};
 
+		auxadc: adc@1100d000 {
+			compatible = "mediatek,mt7986-auxadc",
+				     "mediatek,mt7622-auxadc";
+			reg = <0 0x1100d000 0 0x1000>;
+			clocks = <&infracfg CLK_INFRA_ADC_26M_CK>,
+				 <&infracfg CLK_INFRA_ADC_FRC_CK>;
+			clock-names = "main", "32k";
+			#io-channel-cells = <1>;
+		};
+
 		ssusb: usb@11200000 {
 			compatible = "mediatek,mt7986-xhci",
 				     "mediatek,mtk-xhci";
@@ -304,6 +343,21 @@
 			status = "disabled";
 		};
 
+		thermal: thermal@1100c800 {
+			#thermal-sensor-cells = <1>;
+			compatible = "mediatek,mt7986-thermal";
+			reg = <0 0x1100c800 0 0x800>;
+			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&infracfg CLK_INFRA_THERM_CK>,
+				 <&infracfg CLK_INFRA_ADC_26M_CK>,
+				 <&infracfg CLK_INFRA_ADC_FRC_CK>;
+			clock-names = "therm", "auxadc", "adc_32k";
+			mediatek,auxadc = <&auxadc>;
+			mediatek,apmixedsys = <&apmixedsys>;
+			nvmem-cells = <&thermal_calibration>;
+			nvmem-cell-names = "calibration-data";
+		};
+
 		pcie: pcie@11280000 {
 			compatible = "mediatek,mt7986-pcie",
 				     "mediatek,mt8192-pcie";
@@ -341,7 +395,7 @@
 
 		pcie_phy: t-phy@11c00000 {
 			compatible = "mediatek,mt7986-tphy",
-				     "mediatek,generic-tphy-v2";
+				     "mediatek,generic-tphy-v4";
 			#address-cells = <2>;
 			#size-cells = <2>;
 			ranges;
@@ -352,6 +406,116 @@
 				clocks = <&clk40m>;
 				clock-names = "ref";
 				#phy-cells = <1>;
+				auto_load_valid;
+				auto_load_valid_ln1;
+				nvmem-cells = <&pcie_intr_ln0>,
+					      <&pcie_rx_imp_ln0>,
+					      <&pcie_tx_imp_ln0>,
+					      <&pcie_auto_load_valid_ln0>,
+					      <&pcie_intr_ln1>,
+					      <&pcie_rx_imp_ln1>,
+					      <&pcie_tx_imp_ln1>,
+					      <&pcie_auto_load_valid_ln1>;
+				nvmem-cell-names = "intr",
+						   "rx_imp",
+						   "tx_imp",
+						   "auto_load_valid",
+						   "intr_ln1",
+						   "rx_imp_ln1",
+						   "tx_imp_ln1",
+						   "auto_load_valid_ln1";
+			};
+		};
+
+		efuse: efuse@11d00000 {
+			compatible = "mediatek,mt7986-efuse",
+				     "mediatek,efuse";
+			reg = <0 0x11d00000 0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			thermal_calibration: calib@274 {
+				reg = <0x274 0xc>;
+			};
+
+			comb_auto_load_valid: usb3-alv-imp@8da {
+				reg = <0x8da 1>;
+				bits = <0 1>;
+			};
+
+			comb_rx_imp_p0: usb3-rx-imp@8d8 {
+				reg = <0x8d8 1>;
+				bits = <0 5>;
+			};
+
+			comb_tx_imp_p0: usb3-tx-imp@8d8 {
+				reg = <0x8d8 2>;
+				bits = <5 5>;
+			};
+
+			comb_intr_p0: usb3-intr@8d9 {
+				reg = <0x8d9 1>;
+				bits = <2 6>;
+			};
+
+			u2_auto_load_valid_p0: usb2-alv-p0@8e0 {
+				reg  = <0x8e0 1>;
+				bits = <0 1>;
+			};
+
+			u2_intr_p0: usb2-intr-p0@8e0 {
+				reg  = <0x8e0 1>;
+				bits = <1 5>;
+			};
+
+			u2_auto_load_valid_p1: usb2-alv-p1@8e0 {
+				reg  = <0x8e0 2>;
+				bits = <6 1>;
+			};
+
+			u2_intr_p1: usb2-intr-p1@8e0 {
+				reg  = <0x8e0 2>;
+				bits = <7 5>;
+			};
+
+			pcie_rx_imp_ln0: pcie-rx-imp@8d0 {
+				reg = <0x8d0 1>;
+				bits = <0 5>;
+			};
+
+			pcie_tx_imp_ln0: pcie-tx-imp@8d0 {
+				reg = <0x8d0 2>;
+				bits = <5 5>;
+			};
+
+			pcie_intr_ln0: pcie-intr@8d1 {
+				reg = <0x8d1 1>;
+				bits = <2 6>;
+			};
+
+			pcie_auto_load_valid_ln0: pcie-ln0-alv@8d4 {
+				reg = <0x8d4 1>;
+				bits = <0 1>;
+			};
+
+			pcie_rx_imp_ln1: pcie-rx-imp@8d2 {
+				reg = <0x8d2 1>;
+				bits = <0 5>;
+			};
+
+			pcie_tx_imp_ln1: pcie-tx-imp@8d2 {
+				reg = <0x8d2 2>;
+				bits = <5 5>;
+			};
+
+			pcie_intr_ln1: pcie-intr@8d3 {
+				reg = <0x8d3 1>;
+				bits = <2 6>;
+			};
+
+			pcie_auto_load_valid_ln1: pcie-ln1-alv@8d4 {
+				reg = <0x8d4 1>;
+				bits = <1 1>;
 			};
 		};
 
@@ -369,6 +533,9 @@
 					 <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
 				clock-names = "ref", "da_ref";
 				#phy-cells = <1>;
+				auto_load_valid;
+				nvmem-cells = <&u2_intr_p0>, <&u2_auto_load_valid_p0>;
+				nvmem-cell-names = "intr", "auto_load_valid";
 			};
 
 			u3port0: usb-phy@11e10700 {
@@ -376,6 +543,12 @@
 				clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
 				clock-names = "ref";
 				#phy-cells = <1>;
+				auto_load_valid;
+				nvmem-cells = <&comb_intr_p0>,
+					      <&comb_rx_imp_p0>,
+					      <&comb_tx_imp_p0>,
+					      <&comb_auto_load_valid>;
+				nvmem-cell-names = "intr", "rx_imp", "tx_imp", "auto_load_valid";
 			};
 
 			u2port1: usb-phy@11e11000 {
@@ -384,6 +557,9 @@
 					 <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
 				clock-names = "ref", "da_ref";
 				#phy-cells = <1>;
+				auto_load_valid;
+				nvmem-cells = <&u2_intr_p1>, <&u2_auto_load_valid_p1>;
+				nvmem-cell-names = "intr", "auto_load_valid";
 			};
 		};
 
@@ -486,4 +662,71 @@
 		};
 	};
 
+	fan: pwm-fan {
+		compatible = "pwm-fan";
+		/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
+		cooling-levels = <0 128 255>;
+		#cooling-cells = <2>;
+		status = "disabled";
+	};
+
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+			thermal-sensors = <&thermal 0>;
+			trips {
+				cpu_trip_crit: crit {
+					temperature = <125000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+
+				cpu_trip_hot: hot {
+					temperature = <120000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+
+				cpu_trip_active_high: active-high {
+					temperature = <115000>;
+					hysteresis = <2000>;
+					type = "active";
+				};
+
+				cpu_trip_active_low: active-low {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "active";
+				};
+
+				cpu_trip_passive: passive {
+					temperature = <40000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				cpu-active-high {
+					/* active: set fan to cooling level 2 */
+					cooling-device = <&fan 2 2>;
+					trip = <&cpu_trip_active_high>;
+				};
+
+				cpu-active-low {
+					/* active: set fan to cooling level 1 */
+					cooling-device = <&fan 1 1>;
+					trip = <&cpu_trip_active_low>;
+				};
+
+				cpu-passive {
+					/* passive: set fan to cooling level 0 */
+					cooling-device = <&fan 0 0>;
+					trip = <&cpu_trip_passive>;
+				};
+			};
+
+		};
+	};
 };
diff --git a/target/linux/mediatek/filogic/config-5.15 b/target/linux/mediatek/filogic/config-5.15
index c7e870de78..d17522924e 100644
--- a/target/linux/mediatek/filogic/config-5.15
+++ b/target/linux/mediatek/filogic/config-5.15
@@ -198,7 +198,6 @@ CONFIG_IRQ_TIME_ACCOUNTING=y
 CONFIG_IRQ_WORK=y
 CONFIG_JBD2=y
 CONFIG_JUMP_LABEL=y
-# CONFIG_LEDS_UBNT_LEDBAR is not set
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_LOCK_SPIN_ON_OWNER=y
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index cd74da7450..df890a4152 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -45,7 +45,7 @@ define Device/bananapi_bpi-r3
   DEVICE_DTS_CONFIG := config-mt7986a-bananapi-bpi-r3
   DEVICE_DTS_OVERLAY:= mt7986a-bananapi-bpi-r3-nor mt7986a-bananapi-bpi-r3-emmc-nor mt7986a-bananapi-bpi-r3-emmc-snand mt7986a-bananapi-bpi-r3-snand
   DEVICE_DTS_DIR := ../dts
-  DEVICE_PACKAGES := kmod-usb3 kmod-i2c-gpio kmod-sfp e2fsprogs f2fsck mkf2fs
+  DEVICE_PACKAGES := kmod-hwmon-pwmfan kmod-i2c-gpio kmod-sfp kmod-usb3 e2fsprogs f2fsck mkf2fs
   IMAGES := sysupgrade.itb
   KERNEL_INITRAMFS_SUFFIX := -recovery.itb
   ARTIFACTS := \
diff --git a/target/linux/mediatek/modules.mk b/target/linux/mediatek/modules.mk
index 0eb2866cf0..42f2d7d832 100644
--- a/target/linux/mediatek/modules.mk
+++ b/target/linux/mediatek/modules.mk
@@ -39,18 +39,4 @@ endef
 
 $(eval $(call KernelPackage,sdhci-mtk))
 
-define KernelPackage/leds-ubnt-ledbar
-  SUBMENU:=LED modules
-  TITLE:=Ubiquiti UniFi 6 LR LED support
-  KCONFIG:=CONFIG_LEDS_UBNT_LEDBAR
-  FILES:= \
-	$(LINUX_DIR)/drivers/leds/leds-ubnt-ledbar.ko
-  AUTOLOAD:=$(call AutoProbe,leds-ubnt-ledbar,1)
-  DEPENDS:=@TARGET_mediatek_mt7622 +kmod-i2c-core
-endef
 
-define KernelPackage/leds-ubnt-ledbar/description
-  LED support for Ubiquiti UniFi 6 LR
-endef
-
-$(eval $(call KernelPackage,leds-ubnt-ledbar))
diff --git a/target/linux/mediatek/patches-5.15/501-auxadc-add-auxadc-32k-clk.patch b/target/linux/mediatek/patches-5.15/501-auxadc-add-auxadc-32k-clk.patch
new file mode 100644
index 0000000000..a49fbca4ee
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/501-auxadc-add-auxadc-32k-clk.patch
@@ -0,0 +1,66 @@
+--- a/drivers/iio/adc/mt6577_auxadc.c
++++ b/drivers/iio/adc/mt6577_auxadc.c
+@@ -42,6 +42,7 @@ struct mtk_auxadc_compatible {
+ struct mt6577_auxadc_device {
+ 	void __iomem *reg_base;
+ 	struct clk *adc_clk;
++	struct clk *adc_32k_clk;
+ 	struct mutex lock;
+ 	const struct mtk_auxadc_compatible *dev_comp;
+ };
+@@ -222,6 +223,12 @@ static int __maybe_unused mt6577_auxadc_
+ 		return ret;
+ 	}
+ 
++	ret = clk_prepare_enable(adc_dev->adc_32k_clk);
++	if (ret) {
++		pr_err("failed to enable auxadc clock\n");
++		return ret;
++	}
++
+ 	mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
+ 			      MT6577_AUXADC_PDN_EN, 0);
+ 	mdelay(MT6577_AUXADC_POWER_READY_MS);
+@@ -236,6 +243,8 @@ static int __maybe_unused mt6577_auxadc_
+ 
+ 	mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
+ 			      0, MT6577_AUXADC_PDN_EN);
++
++	clk_disable_unprepare(adc_dev->adc_32k_clk);
+ 	clk_disable_unprepare(adc_dev->adc_clk);
+ 
+ 	return 0;
+@@ -277,6 +286,17 @@ static int mt6577_auxadc_probe(struct pl
+ 		return ret;
+ 	}
+ 
++	adc_dev->adc_32k_clk = devm_clk_get(&pdev->dev, "32k");
++	if (IS_ERR(adc_dev->adc_32k_clk)) {
++		dev_err(&pdev->dev, "failed to get auxadc 32k clock\n");
++	} else {
++		ret = clk_prepare_enable(adc_dev->adc_32k_clk);
++		if (ret) {
++			dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n");
++			return ret;
++		}
++	}
++
+ 	adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
+ 	if (!adc_clk_rate) {
+ 		ret = -EINVAL;
+@@ -306,6 +326,7 @@ err_power_off:
+ 	mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
+ 			      0, MT6577_AUXADC_PDN_EN);
+ err_disable_clk:
++	clk_disable_unprepare(adc_dev->adc_32k_clk);
+ 	clk_disable_unprepare(adc_dev->adc_clk);
+ 	return ret;
+ }
+@@ -320,6 +341,7 @@ static int mt6577_auxadc_remove(struct p
+ 	mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
+ 			      0, MT6577_AUXADC_PDN_EN);
+ 
++	clk_disable_unprepare(adc_dev->adc_32k_clk);
+ 	clk_disable_unprepare(adc_dev->adc_clk);
+ 
+ 	return 0;
diff --git a/target/linux/mediatek/patches-5.15/800-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch b/target/linux/mediatek/patches-5.15/800-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch
new file mode 100644
index 0000000000..e57f742fc8
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/800-nvmem-mtk-efuse-support-minimum-one-byte-access-stri.patch
@@ -0,0 +1,46 @@
+From 44ae4ed142265a6d50a9d3e6f4c395f97b6849ab Mon Sep 17 00:00:00 2001
+From: Zhanyong Wang <zhanyong.wang@mediatek.com>
+Date: Sat, 6 Nov 2021 20:06:30 +0800
+Subject: [PATCH 2/5] nvmem: mtk-efuse: support minimum one byte access stride
+ and granularity
+
+In order to support nvmem bits property, should support minimum 1 byte
+read stride and minimum 1 byte read granularity at the same time.
+
+Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
+Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
+Change-Id: Iafe1ebf195d58a3e9e3518913f795d14a01dfd3b
+---
+ drivers/nvmem/mtk-efuse.c | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+--- a/drivers/nvmem/mtk-efuse.c
++++ b/drivers/nvmem/mtk-efuse.c
+@@ -19,11 +19,12 @@ static int mtk_reg_read(void *context,
+ 			unsigned int reg, void *_val, size_t bytes)
+ {
+ 	struct mtk_efuse_priv *priv = context;
+-	u32 *val = _val;
+-	int i = 0, words = bytes / 4;
++	void __iomem *addr = priv->base + reg;
++	u8 *val = _val;
++	int i;
+ 
+-	while (words--)
+-		*val++ = readl(priv->base + reg + (i++ * 4));
++	for (i = 0; i < bytes; i++, val++)
++		*val = readb(addr + i);
+ 
+ 	return 0;
+ }
+@@ -45,8 +46,8 @@ static int mtk_efuse_probe(struct platfo
+ 	if (IS_ERR(priv->base))
+ 		return PTR_ERR(priv->base);
+ 
+-	econfig.stride = 4;
+-	econfig.word_size = 4;
++	econfig.stride = 1;
++	econfig.word_size = 1;
+ 	econfig.reg_read = mtk_reg_read;
+ 	econfig.size = resource_size(res);
+ 	econfig.priv = priv;
diff --git a/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch b/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
new file mode 100644
index 0000000000..4c2fd18b3b
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/801-phy-phy-mtk-tphy-Add-PCIe-2-lane-efuse-support.patch
@@ -0,0 +1,225 @@
+From 41ffe32e7ec23f592e21c508b5108899ad393059 Mon Sep 17 00:00:00 2001
+From: Zhanyong Wang <zhanyong.wang@mediatek.com>
+Date: Tue, 25 Jan 2022 16:50:47 +0800
+Subject: [PATCH 4/5] phy: phy-mtk-tphy: Add PCIe 2 lane efuse support
+
+Add PCIe 2 lane efuse support in tphy driver.
+
+Signed-off-by: Jie Yang <jieyy.yang@mediatek.com>
+Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
+---
+ drivers/phy/mediatek/phy-mtk-tphy.c | 140 ++++++++++++++++++++++++++++
+ 1 file changed, 140 insertions(+)
+
+--- a/drivers/phy/mediatek/phy-mtk-tphy.c
++++ b/drivers/phy/mediatek/phy-mtk-tphy.c
+@@ -44,6 +44,15 @@
+ #define SSUSB_SIFSLV_V2_U3PHYD		0x200
+ #define SSUSB_SIFSLV_V2_U3PHYA		0x400
+ 
++/* version V4 sub-banks offset base address */
++/* pcie phy banks */
++#define SSUSB_SIFSLV_V4_SPLLC		0x000
++#define SSUSB_SIFSLV_V4_CHIP		0x100
++#define SSUSB_SIFSLV_V4_U3PHYD		0x900
++#define SSUSB_SIFSLV_V4_U3PHYA		0xb00
++
++#define SSUSB_LN1_OFFSET		0x10000
++
+ #define U3P_MISC_REG1		0x04
+ #define MR1_EFUSE_AUTO_LOAD_DIS		BIT(6)
+ 
+@@ -320,6 +329,7 @@ enum mtk_phy_version {
+ 	MTK_PHY_V1 = 1,
+ 	MTK_PHY_V2,
+ 	MTK_PHY_V3,
++	MTK_PHY_V4,
+ };
+ 
+ struct mtk_phy_pdata {
+@@ -369,6 +379,9 @@ struct mtk_phy_instance {
+ 	u32 efuse_intr;
+ 	u32 efuse_tx_imp;
+ 	u32 efuse_rx_imp;
++	u32 efuse_intr_ln1;
++	u32 efuse_tx_imp_ln1;
++	u32 efuse_rx_imp_ln1;
+ 	int eye_src;
+ 	int eye_vrt;
+ 	int eye_term;
+@@ -946,6 +959,36 @@ static void phy_v2_banks_init(struct mtk
+ 	}
+ }
+ 
++static void phy_v4_banks_init(struct mtk_tphy *tphy,
++			      struct mtk_phy_instance *instance)
++{
++	struct u2phy_banks *u2_banks = &instance->u2_banks;
++	struct u3phy_banks *u3_banks = &instance->u3_banks;
++
++	switch (instance->type) {
++	case PHY_TYPE_USB2:
++		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;
++		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;
++		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;
++		break;
++	case PHY_TYPE_USB3:
++		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;
++		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;
++		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;
++		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;
++		break;
++	case PHY_TYPE_PCIE:
++		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V4_SPLLC;
++		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V4_CHIP;
++		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V4_U3PHYD;
++		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V4_U3PHYA;
++		break;
++	default:
++		dev_err(tphy->dev, "incompatible PHY type\n");
++		return;
++	}
++}
++
+ static void phy_parse_property(struct mtk_tphy *tphy,
+ 				struct mtk_phy_instance *instance)
+ {
+@@ -1143,6 +1186,40 @@ static int phy_efuse_get(struct mtk_tphy
+ 
+ 		dev_dbg(dev, "u3 efuse - intr %x, rx_imp %x, tx_imp %x\n",
+ 			instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);
++
++		if (tphy->pdata->version != MTK_PHY_V4)
++			break;
++
++		ret = nvmem_cell_read_variable_le_u32(dev, "intr_ln1", &instance->efuse_intr_ln1);
++		if (ret) {
++			dev_err(dev, "fail to get u3 lane1 intr efuse, %d\n", ret);
++			break;
++		}
++
++		ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp_ln1", &instance->efuse_rx_imp_ln1);
++		if (ret) {
++			dev_err(dev, "fail to get u3 lane1 rx_imp efuse, %d\n", ret);
++			break;
++		}
++
++		ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp_ln1", &instance->efuse_tx_imp_ln1);
++		if (ret) {
++			dev_err(dev, "fail to get u3 lane1 tx_imp efuse, %d\n", ret);
++			break;
++		}
++
++		/* no efuse, ignore it */
++		if (!instance->efuse_intr_ln1 &&
++		    !instance->efuse_rx_imp_ln1 &&
++		    !instance->efuse_tx_imp_ln1) {
++			dev_warn(dev, "no u3 lane1 efuse, but dts enable it\n");
++			instance->efuse_sw_en = 0;
++			break;
++		}
++
++		dev_info(dev, "u3 lane1 efuse - intr %x, rx_imp %x, tx_imp %x\n",
++			 instance->efuse_intr_ln1, instance->efuse_rx_imp_ln1,
++			 instance->efuse_tx_imp_ln1);
+ 		break;
+ 	default:
+ 		dev_err(dev, "no sw efuse for type %d\n", instance->type);
+@@ -1174,6 +1251,31 @@ static void phy_efuse_set(struct mtk_phy
+ 		writel(tmp, u2_banks->com + U3P_USBPHYACR1);
+ 		break;
+ 	case PHY_TYPE_USB3:
++		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
++		tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
++		writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RSV);
++
++		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_IMPCAL0);
++		tmp &= ~P3D_RG_TX_IMPEL;
++		tmp |= P3D_RG_TX_IMPEL_VAL(instance->efuse_tx_imp);
++		tmp |= P3D_RG_FORCE_TX_IMPEL;
++		writel(tmp, u3_banks->phyd + U3P_U3_PHYD_IMPCAL0);
++
++		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_IMPCAL1);
++		tmp &= ~P3D_RG_RX_IMPEL;
++		tmp |= P3D_RG_RX_IMPEL_VAL(instance->efuse_rx_imp);
++		tmp |= P3D_RG_FORCE_RX_IMPEL;
++		writel(tmp, u3_banks->phyd + U3P_U3_PHYD_IMPCAL1);
++
++		tmp = readl(u3_banks->phya + U3P_U3_PHYA_REG0);
++		tmp &= ~P3A_RG_IEXT_INTR;
++		tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
++		writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
++		pr_err("%s set efuse, tx_imp %x, rx_imp %x intr %x\n",
++			__func__, instance->efuse_tx_imp,
++			instance->efuse_rx_imp, instance->efuse_intr);
++
++		break;
+ 	case PHY_TYPE_PCIE:
+ 		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
+ 		tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
+@@ -1195,6 +1297,34 @@ static void phy_efuse_set(struct mtk_phy
+ 		tmp &= ~P3A_RG_IEXT_INTR;
+ 		tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
+ 		writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
++		if (!instance->efuse_intr_ln1 &&
++		    !instance->efuse_rx_imp_ln1 &&
++		    !instance->efuse_tx_imp_ln1)
++			break;
++
++		tmp = readl(u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_RSV);
++		tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
++		writel(tmp, u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_RSV);
++
++		tmp = readl(u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_IMPCAL0);
++		tmp &= ~P3D_RG_TX_IMPEL;
++		tmp |= P3D_RG_TX_IMPEL_VAL(instance->efuse_tx_imp_ln1);
++		tmp |= P3D_RG_FORCE_TX_IMPEL;
++		writel(tmp, u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_IMPCAL0);
++
++		tmp = readl(u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_IMPCAL1);
++		tmp &= ~P3D_RG_RX_IMPEL;
++		tmp |= P3D_RG_RX_IMPEL_VAL(instance->efuse_rx_imp_ln1);
++		tmp |= P3D_RG_FORCE_RX_IMPEL;
++		writel(tmp, u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_IMPCAL1);
++
++		tmp = readl(u3_banks->phya + SSUSB_LN1_OFFSET + U3P_U3_PHYA_REG0);
++		tmp &= ~P3A_RG_IEXT_INTR;
++		tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr_ln1);
++		writel(tmp, u3_banks->phya + SSUSB_LN1_OFFSET + U3P_U3_PHYA_REG0);
++		dev_info(dev, "%s set LN1 efuse, tx_imp %x, rx_imp %x intr %x\n",
++			 __func__, instance->efuse_tx_imp_ln1,
++			 instance->efuse_rx_imp_ln1, instance->efuse_intr_ln1);
+ 		break;
+ 	default:
+ 		dev_warn(dev, "no sw efuse for type %d\n", instance->type);
+@@ -1334,6 +1464,9 @@ static struct phy *mtk_phy_xlate(struct
+ 	case MTK_PHY_V3:
+ 		phy_v2_banks_init(tphy, instance);
+ 		break;
++	case MTK_PHY_V4:
++		phy_v4_banks_init(tphy, instance);
++		break;
+ 	default:
+ 		dev_err(dev, "phy version is not supported\n");
+ 		return ERR_PTR(-EINVAL);
+@@ -1374,6 +1507,12 @@ static const struct mtk_phy_pdata tphy_v
+ 	.version = MTK_PHY_V3,
+ };
+ 
++static const struct mtk_phy_pdata tphy_v4_pdata = {
++	.avoid_rx_sen_degradation = false,
++	.sw_efuse_supported = true,
++	.version = MTK_PHY_V4,
++};
++
+ static const struct mtk_phy_pdata mt8173_pdata = {
+ 	.avoid_rx_sen_degradation = true,
+ 	.version = MTK_PHY_V1,
+@@ -1393,6 +1532,7 @@ static const struct of_device_id mtk_tph
+ 	{ .compatible = "mediatek,generic-tphy-v1", .data = &tphy_v1_pdata },
+ 	{ .compatible = "mediatek,generic-tphy-v2", .data = &tphy_v2_pdata },
+ 	{ .compatible = "mediatek,generic-tphy-v3", .data = &tphy_v3_pdata },
++	{ .compatible = "mediatek,generic-tphy-v4", .data = &tphy_v4_pdata },
+ 	{ },
+ };
+ MODULE_DEVICE_TABLE(of, mtk_tphy_id_table);
diff --git a/target/linux/mediatek/patches-5.15/802-phy-phy-mtk-tphy-add-auto-load-valid-check-mechanism.patch b/target/linux/mediatek/patches-5.15/802-phy-phy-mtk-tphy-add-auto-load-valid-check-mechanism.patch
new file mode 100644
index 0000000000..67580f1e11
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/802-phy-phy-mtk-tphy-add-auto-load-valid-check-mechanism.patch
@@ -0,0 +1,149 @@
+From 1d5819e90f2ef6dead11809744372a9863227a92 Mon Sep 17 00:00:00 2001
+From: Zhanyong Wang <zhanyong.wang@mediatek.com>
+Date: Tue, 25 Jan 2022 19:03:34 +0800
+Subject: [PATCH 5/5] phy: phy-mtk-tphy: add auto-load-valid check mechanism
+ support
+
+add auto-load-valid check mechanism support
+
+Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
+---
+ drivers/phy/mediatek/phy-mtk-tphy.c | 67 +++++++++++++++++++++++++++--
+ 1 file changed, 64 insertions(+), 3 deletions(-)
+
+--- a/drivers/phy/mediatek/phy-mtk-tphy.c
++++ b/drivers/phy/mediatek/phy-mtk-tphy.c
+@@ -376,9 +376,13 @@ struct mtk_phy_instance {
+ 	u32 type_sw_reg;
+ 	u32 type_sw_index;
+ 	u32 efuse_sw_en;
++	bool efuse_alv_en;
++	u32 efuse_autoloadvalid;
+ 	u32 efuse_intr;
+ 	u32 efuse_tx_imp;
+ 	u32 efuse_rx_imp;
++	bool efuse_alv_ln1_en;
++	u32 efuse_ln1_autoloadvalid;
+ 	u32 efuse_intr_ln1;
+ 	u32 efuse_tx_imp_ln1;
+ 	u32 efuse_rx_imp_ln1;
+@@ -1125,6 +1129,7 @@ static int phy_efuse_get(struct mtk_tphy
+ {
+ 	struct device *dev = &instance->phy->dev;
+ 	int ret = 0;
++	bool alv = false;
+ 
+ 	/* tphy v1 doesn't support sw efuse, skip it */
+ 	if (!tphy->pdata->sw_efuse_supported) {
+@@ -1139,6 +1144,20 @@ static int phy_efuse_get(struct mtk_tphy
+ 
+ 	switch (instance->type) {
+ 	case PHY_TYPE_USB2:
++		alv = of_property_read_bool(dev->of_node, "auto_load_valid");
++		if (alv) {
++			instance->efuse_alv_en = alv;
++			ret = nvmem_cell_read_variable_le_u32(dev, "auto_load_valid",
++							&instance->efuse_autoloadvalid);
++			if (ret) {
++				dev_err(dev, "fail to get u2 alv efuse, %d\n", ret);
++				break;
++			}
++			dev_info(dev,
++				"u2 auto load valid efuse: ENABLE with value: %u\n",
++				instance->efuse_autoloadvalid);
++		}
++
+ 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);
+ 		if (ret) {
+ 			dev_err(dev, "fail to get u2 intr efuse, %d\n", ret);
+@@ -1157,6 +1176,20 @@ static int phy_efuse_get(struct mtk_tphy
+ 
+ 	case PHY_TYPE_USB3:
+ 	case PHY_TYPE_PCIE:
++		alv = of_property_read_bool(dev->of_node, "auto_load_valid");
++		if (alv) {
++			instance->efuse_alv_en = alv;
++			ret = nvmem_cell_read_variable_le_u32(dev, "auto_load_valid",
++							&instance->efuse_autoloadvalid);
++			if (ret) {
++				dev_err(dev, "fail to get u3(pcei) alv efuse, %d\n", ret);
++				break;
++			}
++			dev_info(dev,
++				"u3 auto load valid efuse: ENABLE with value: %u\n",
++				instance->efuse_autoloadvalid);
++		}
++
+ 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);
+ 		if (ret) {
+ 			dev_err(dev, "fail to get u3 intr efuse, %d\n", ret);
+@@ -1190,6 +1223,20 @@ static int phy_efuse_get(struct mtk_tphy
+ 		if (tphy->pdata->version != MTK_PHY_V4)
+ 			break;
+ 
++		alv = of_property_read_bool(dev->of_node, "auto_load_valid_ln1");
++		if (alv) {
++			instance->efuse_alv_ln1_en = alv;
++			ret = nvmem_cell_read_variable_le_u32(dev, "auto_load_valid_ln1",
++							&instance->efuse_ln1_autoloadvalid);
++			if (ret) {
++				dev_err(dev, "fail to get pcie auto_load_valid efuse, %d\n", ret);
++				break;
++			}
++			dev_info(dev,
++				"pcie auto load valid efuse: ENABLE with value: %u\n",
++				instance->efuse_ln1_autoloadvalid);
++		}
++
+ 		ret = nvmem_cell_read_variable_le_u32(dev, "intr_ln1", &instance->efuse_intr_ln1);
+ 		if (ret) {
+ 			dev_err(dev, "fail to get u3 lane1 intr efuse, %d\n", ret);
+@@ -1241,6 +1288,10 @@ static void phy_efuse_set(struct mtk_phy
+ 
+ 	switch (instance->type) {
+ 	case PHY_TYPE_USB2:
++		if (instance->efuse_alv_en &&
++		    instance->efuse_autoloadvalid == 1)
++			break;
++
+ 		tmp = readl(u2_banks->misc + U3P_MISC_REG1);
+ 		tmp |= MR1_EFUSE_AUTO_LOAD_DIS;
+ 		writel(tmp, u2_banks->misc + U3P_MISC_REG1);
+@@ -1251,6 +1302,10 @@ static void phy_efuse_set(struct mtk_phy
+ 		writel(tmp, u2_banks->com + U3P_USBPHYACR1);
+ 		break;
+ 	case PHY_TYPE_USB3:
++		if (instance->efuse_alv_en &&
++		    instance->efuse_autoloadvalid == 1)
++			break;
++
+ 		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
+ 		tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
+ 		writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RSV);
+@@ -1277,6 +1332,10 @@ static void phy_efuse_set(struct mtk_phy
+ 
+ 		break;
+ 	case PHY_TYPE_PCIE:
++		if (instance->efuse_alv_en &&
++		    instance->efuse_autoloadvalid == 1)
++			break;
++
+ 		tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
+ 		tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
+ 		writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RSV);
+@@ -1297,9 +1356,12 @@ static void phy_efuse_set(struct mtk_phy
+ 		tmp &= ~P3A_RG_IEXT_INTR;
+ 		tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
+ 		writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
+-		if (!instance->efuse_intr_ln1 &&
+-		    !instance->efuse_rx_imp_ln1 &&
+-		    !instance->efuse_tx_imp_ln1)
++
++		if ((!instance->efuse_intr_ln1 &&
++		     !instance->efuse_rx_imp_ln1 &&
++		     !instance->efuse_tx_imp_ln1) ||
++		    (instance->efuse_alv_ln1_en &&
++		     instance->efuse_ln1_autoloadvalid == 1))
+ 			break;
+ 
+ 		tmp = readl(u3_banks->phyd + SSUSB_LN1_OFFSET + U3P_U3_PHYD_RSV);
diff --git a/target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch b/target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch
new file mode 100644
index 0000000000..1860a6da01
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/803-i2c-busses-add-mt7986-support.patch
@@ -0,0 +1,30 @@
+--- a/drivers/i2c/busses/i2c-mt65xx.c
++++ b/drivers/i2c/busses/i2c-mt65xx.c
+@@ -365,6 +365,19 @@ static const struct mtk_i2c_compatible m
+ 	.max_dma_support = 32,
+ };
+ 
++static const struct mtk_i2c_compatible mt7986_compat = {
++	.quirks = &mt7622_i2c_quirks,
++	.regs = mt_i2c_regs_v1,
++	.pmic_i2c = 0,
++	.dcm = 1,
++	.auto_restart = 1,
++	.aux_len_reg = 1,
++	.max_dma_support = 32,
++	.timing_adjust = 0,
++	.dma_sync = 1,
++	.ltiming_adjust = 0,
++};
++
+ static const struct mtk_i2c_compatible mt8173_compat = {
+ 	.regs = mt_i2c_regs_v1,
+ 	.pmic_i2c = 0,
+@@ -411,6 +424,7 @@ static const struct of_device_id mtk_i2c
+ 	{ .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
+ 	{ .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat },
+ 	{ .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
++	{ .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat },
+ 	{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
+ 	{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
+ 	{ .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
diff --git a/target/linux/mediatek/patches-5.15/804-pwm-add-mt7986-support.patch b/target/linux/mediatek/patches-5.15/804-pwm-add-mt7986-support.patch
new file mode 100644
index 0000000000..fe095c5633
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/804-pwm-add-mt7986-support.patch
@@ -0,0 +1,23 @@
+--- a/drivers/pwm/pwm-mediatek.c
++++ b/drivers/pwm/pwm-mediatek.c
+@@ -302,6 +302,12 @@ static const struct pwm_mediatek_of_data
+ 	.has_ck_26m_sel = true,
+ };
+ 
++static const struct pwm_mediatek_of_data mt7986_pwm_data = {
++	.num_pwms = 2,
++	.pwm45_fixup = false,
++	.has_ck_26m_sel = false,
++};
++
+ static const struct pwm_mediatek_of_data mt8516_pwm_data = {
+ 	.num_pwms = 5,
+ 	.pwm45_fixup = false,
+@@ -314,6 +320,7 @@ static const struct of_device_id pwm_med
+ 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
+ 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
+ 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
++	{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
+ 	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
+ 	{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
+ 	{ },
diff --git a/target/linux/mediatek/patches-5.15/805-thermal-drivers-mediatek-add-support-for-MT7986-and-.patch b/target/linux/mediatek/patches-5.15/805-thermal-drivers-mediatek-add-support-for-MT7986-and-.patch
new file mode 100644
index 0000000000..ff2b71872c
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/805-thermal-drivers-mediatek-add-support-for-MT7986-and-.patch
@@ -0,0 +1,284 @@
+From cd47d86ab09f1f3ec5c86441d4fe95e0cf597c06 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Tue, 13 Sep 2022 00:56:24 +0100
+Subject: [PATCH] thermal/drivers/mediatek: add support for MT7986 and MT7981
+
+Add support for V3 generation thermal found in MT7986 and MT7981 SoCs.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/thermal/mtk_thermal.c | 202 +++++++++++++++++++++++++++++++++-
+ 1 file changed, 198 insertions(+), 4 deletions(-)
+
+--- a/drivers/thermal/mtk_thermal.c
++++ b/drivers/thermal/mtk_thermal.c
+@@ -150,6 +150,21 @@
+ #define CALIB_BUF1_VALID_V2(x)		(((x) >> 4) & 0x1)
+ #define CALIB_BUF1_O_SLOPE_SIGN_V2(x)	(((x) >> 3) & 0x1)
+ 
++/*
++ * Layout of the fuses providing the calibration data
++ * These macros could be used for MT7981 and MT7986.
++ */
++#define CALIB_BUF0_ADC_GE_V3(x)		(((x) >> 0) & 0x3ff)
++#define CALIB_BUF0_ADC_OE_V3(x)		(((x) >> 10) & 0x3ff)
++#define CALIB_BUF0_DEGC_CALI_V3(x)	(((x) >> 20) & 0x3f)
++#define CALIB_BUF0_O_SLOPE_V3(x)	(((x) >> 26) & 0x3f)
++#define CALIB_BUF1_VTS_TS1_V3(x)	(((x) >> 0) & 0x1ff)
++#define CALIB_BUF1_VTS_TS2_V3(x)	(((x) >> 21) & 0x1ff)
++#define CALIB_BUF1_VTS_TSABB_V3(x)	(((x) >> 9) & 0x1ff)
++#define CALIB_BUF1_VALID_V3(x)		(((x) >> 18) & 0x1)
++#define CALIB_BUF1_O_SLOPE_SIGN_V3(x)	(((x) >> 19) & 0x1)
++#define CALIB_BUF1_ID_V3(x)		(((x) >> 20) & 0x1)
++
+ enum {
+ 	VTS1,
+ 	VTS2,
+@@ -163,6 +178,7 @@ enum {
+ enum mtk_thermal_version {
+ 	MTK_THERMAL_V1 = 1,
+ 	MTK_THERMAL_V2,
++	MTK_THERMAL_V3,
+ };
+ 
+ /* MT2701 thermal sensors */
+@@ -245,6 +261,27 @@ enum mtk_thermal_version {
+ /* The calibration coefficient of sensor  */
+ #define MT8183_CALIBRATION	153
+ 
++/* AUXADC channel 11 is used for the temperature sensors */
++#define MT7986_TEMP_AUXADC_CHANNEL	11
++
++/* The total number of temperature sensors in the MT7986 */
++#define MT7986_NUM_SENSORS		1
++
++/* The number of banks in the MT7986 */
++#define MT7986_NUM_ZONES		1
++
++/* The number of sensing points per bank */
++#define MT7986_NUM_SENSORS_PER_ZONE	1
++
++/* MT7986 thermal sensors */
++#define MT7986_TS1	0
++
++/* The number of controller in the MT7986 */
++#define MT7986_NUM_CONTROLLER		1
++
++/* The calibration coefficient of sensor  */
++#define MT7986_CALIBRATION		165
++
+ struct mtk_thermal;
+ 
+ struct thermal_bank_cfg {
+@@ -279,6 +316,7 @@ struct mtk_thermal {
+ 
+ 	struct clk *clk_peri_therm;
+ 	struct clk *clk_auxadc;
++	struct clk *clk_adc_32k;
+ 	/* lock: for getting and putting banks */
+ 	struct mutex lock;
+ 
+@@ -386,6 +424,14 @@ static const int mt7622_mux_values[MT762
+ static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
+ static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
+ 
++/* MT7986 thermal sensor data */
++static const int mt7986_bank_data[MT7986_NUM_SENSORS] = { MT7986_TS1, };
++static const int mt7986_msr[MT7986_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, };
++static const int mt7986_adcpnp[MT7986_NUM_SENSORS_PER_ZONE] = {	TEMP_ADCPNP0, };
++static const int mt7986_mux_values[MT7986_NUM_SENSORS] = { 0, };
++static const int mt7986_vts_index[MT7986_NUM_SENSORS] = { VTS1 };
++static const int mt7986_tc_offset[MT7986_NUM_CONTROLLER] = { 0x0, };
++
+ /*
+  * The MT8173 thermal controller has four banks. Each bank can read up to
+  * four temperature sensors simultaneously. The MT8173 has a total of 5
+@@ -549,6 +595,30 @@ static const struct mtk_thermal_data mt8
+ 	.version = MTK_THERMAL_V1,
+ };
+ 
++/*
++ * MT7986 uses AUXADC Channel 11 for raw data access.
++ */
++static const struct mtk_thermal_data mt7986_thermal_data = {
++	.auxadc_channel = MT7986_TEMP_AUXADC_CHANNEL,
++	.num_banks = MT7986_NUM_ZONES,
++	.num_sensors = MT7986_NUM_SENSORS,
++	.vts_index = mt7986_vts_index,
++	.cali_val = MT7986_CALIBRATION,
++	.num_controller = MT7986_NUM_CONTROLLER,
++	.controller_offset = mt7986_tc_offset,
++	.need_switch_bank = true,
++	.bank_data = {
++		{
++			.num_sensors = 1,
++			.sensors = mt7986_bank_data,
++		},
++	},
++	.msr = mt7986_msr,
++	.adcpnp = mt7986_adcpnp,
++	.sensor_mux_values = mt7986_mux_values,
++	.version = MTK_THERMAL_V3,
++};
++
+ /**
+  * raw_to_mcelsius - convert a raw ADC value to mcelsius
+  * @mt:	The thermal controller
+@@ -603,6 +673,22 @@ static int raw_to_mcelsius_v2(struct mtk
+ 	return (format_2 - tmp) * 100;
+ }
+ 
++static int raw_to_mcelsius_v3(struct mtk_thermal *mt, int sensno, s32 raw)
++{
++	s32 tmp;
++
++	if (raw == 0)
++		return 0;
++
++	raw &= 0xfff;
++	tmp = 100000 * 15 / 16 * 10000;
++	tmp /= 4096 - 512 + mt->adc_ge;
++	tmp /= 1490;
++	tmp *= raw - mt->vts[sensno] - 2900;
++
++	return mt->degc_cali * 500 - tmp;
++}
++
+ /**
+  * mtk_thermal_get_bank - get bank
+  * @bank:	The bank
+@@ -659,9 +745,12 @@ static int mtk_thermal_bank_temperature(
+ 		if (mt->conf->version == MTK_THERMAL_V1) {
+ 			temp = raw_to_mcelsius_v1(
+ 				mt, conf->bank_data[bank->id].sensors[i], raw);
+-		} else {
++		} else if (mt->conf->version == MTK_THERMAL_V2) {
+ 			temp = raw_to_mcelsius_v2(
+ 				mt, conf->bank_data[bank->id].sensors[i], raw);
++		} else {
++			temp = raw_to_mcelsius_v3(
++				mt, conf->bank_data[bank->id].sensors[i], raw);
+ 		}
+ 
+ 		/*
+@@ -887,6 +976,26 @@ static int mtk_thermal_extract_efuse_v2(
+ 	return 0;
+ }
+ 
++static int mtk_thermal_extract_efuse_v3(struct mtk_thermal *mt, u32 *buf)
++{
++	if (!CALIB_BUF1_VALID_V3(buf[1]))
++		return -EINVAL;
++
++	mt->adc_oe = CALIB_BUF0_ADC_OE_V3(buf[0]);
++	mt->adc_ge = CALIB_BUF0_ADC_GE_V3(buf[0]);
++	mt->degc_cali = CALIB_BUF0_DEGC_CALI_V3(buf[0]);
++	mt->o_slope = CALIB_BUF0_O_SLOPE_V3(buf[0]);
++	mt->vts[VTS1] = CALIB_BUF1_VTS_TS1_V3(buf[1]);
++	mt->vts[VTS2] = CALIB_BUF1_VTS_TS2_V3(buf[1]);
++	mt->vts[VTSABB] = CALIB_BUF1_VTS_TSABB_V3(buf[1]);
++	mt->o_slope_sign = CALIB_BUF1_O_SLOPE_SIGN_V3(buf[1]);
++
++	if (CALIB_BUF1_ID_V3(buf[1]) == 0)
++		mt->o_slope = 0;
++
++	return 0;
++}
++
+ static int mtk_thermal_get_calibration_data(struct device *dev,
+ 					    struct mtk_thermal *mt)
+ {
+@@ -897,6 +1006,7 @@ static int mtk_thermal_get_calibration_d
+ 
+ 	/* Start with default values */
+ 	mt->adc_ge = 512;
++	mt->adc_oe = 512;
+ 	for (i = 0; i < mt->conf->num_sensors; i++)
+ 		mt->vts[i] = 260;
+ 	mt->degc_cali = 40;
+@@ -924,8 +1034,10 @@ static int mtk_thermal_get_calibration_d
+ 
+ 	if (mt->conf->version == MTK_THERMAL_V1)
+ 		ret = mtk_thermal_extract_efuse_v1(mt, buf);
+-	else
++	else if (mt->conf->version == MTK_THERMAL_V2)
+ 		ret = mtk_thermal_extract_efuse_v2(mt, buf);
++	else
++		ret = mtk_thermal_extract_efuse_v3(mt, buf);
+ 
+ 	if (ret) {
+ 		dev_info(dev, "Device not calibrated, using default calibration values\n");
+@@ -956,6 +1068,10 @@ static const struct of_device_id mtk_the
+ 		.data = (void *)&mt7622_thermal_data,
+ 	},
+ 	{
++		.compatible = "mediatek,mt7986-thermal",
++		.data = (void *)&mt7986_thermal_data,
++	},
++	{
+ 		.compatible = "mediatek,mt8183-thermal",
+ 		.data = (void *)&mt8183_thermal_data,
+ 	}, {
+@@ -1009,6 +1125,12 @@ static int mtk_thermal_probe(struct plat
+ 	if (IS_ERR(mt->clk_auxadc))
+ 		return PTR_ERR(mt->clk_auxadc);
+ 
++	if (mt->conf->version == MTK_THERMAL_V3) {
++		mt->clk_adc_32k = devm_clk_get(&pdev->dev, "adc_32k");
++		if (IS_ERR(mt->clk_adc_32k))
++			return PTR_ERR(mt->clk_adc_32k);
++	}
++
+ 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ 	mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
+ 	if (IS_ERR(mt->thermal_base))
+@@ -1058,10 +1180,18 @@ static int mtk_thermal_probe(struct plat
+ 	if (ret)
+ 		return ret;
+ 
++	if (mt->conf->version == MTK_THERMAL_V3) {
++		ret = clk_prepare_enable(mt->clk_adc_32k);
++		if (ret) {
++			dev_err(&pdev->dev, "Can't enable auxadc 32k clk: %d\n", ret);
++			return ret;
++		}
++	}
++
+ 	ret = clk_prepare_enable(mt->clk_auxadc);
+ 	if (ret) {
+ 		dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
+-		return ret;
++		goto err_disable_clk_adc_32k;
+ 	}
+ 
+ 	ret = clk_prepare_enable(mt->clk_peri_therm);
+@@ -1070,7 +1200,8 @@ static int mtk_thermal_probe(struct plat
+ 		goto err_disable_clk_auxadc;
+ 	}
+ 
+-	if (mt->conf->version == MTK_THERMAL_V2) {
++	if (mt->conf->version == MTK_THERMAL_V2 ||
++	    mt->conf->version == MTK_THERMAL_V3) {
+ 		mtk_thermal_turn_on_buffer(apmixed_base);
+ 		mtk_thermal_release_periodic_ts(mt, auxadc_base);
+ 	}
+@@ -1099,6 +1230,9 @@ err_disable_clk_peri_therm:
+ 	clk_disable_unprepare(mt->clk_peri_therm);
+ err_disable_clk_auxadc:
+ 	clk_disable_unprepare(mt->clk_auxadc);
++err_disable_clk_adc_32k:
++	if (mt->conf->version == MTK_THERMAL_V3)
++		clk_disable_unprepare(mt->clk_adc_32k);
+ 
+ 	return ret;
+ }
+@@ -1110,6 +1244,9 @@ static int mtk_thermal_remove(struct pla
+ 	clk_disable_unprepare(mt->clk_peri_therm);
+ 	clk_disable_unprepare(mt->clk_auxadc);
+ 
++	if (mt->conf->version == MTK_THERMAL_V3)
++		clk_disable_unprepare(mt->clk_adc_32k);
++
+ 	return 0;
+ }
+ 
diff --git a/target/linux/mpc85xx/patches-5.10/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch b/target/linux/mpc85xx/patches-5.10/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch
deleted file mode 100644
index 38ae4e08e6..0000000000
--- a/target/linux/mpc85xx/patches-5.10/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 29af30435022442ec4eccf3166956b8e0b8a2134 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
-Date: Mon, 5 Sep 2022 23:13:47 +0200
-Subject: [PATCH] gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type
- in mpc85xx
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Commit e39d5ef67804 ("powerpc/5xxx: extend mpc8xxx_gpio driver to support
-mpc512x gpios") implemented support for IRQ_TYPE_LEVEL_LOW flow type in
-mpc512x via falling edge type. Do same for mpc85xx which support was added
-in commit 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio").
-
-Fixes probing of lm90 hwmon driver on mpc85xx based board which use level
-interrupt. Without it kernel prints error and refuse lm90 to work:
-
-    [   15.258370] genirq: Setting trigger mode 8 for irq 49 failed (mpc8xxx_irq_set_type+0x0/0xf8)
-    [   15.267168] lm90 0-004c: cannot request IRQ 49
-    [   15.272708] lm90: probe of 0-004c failed with error -22
-
-Fixes: 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio")
-Signed-off-by: Pali Rohár <pali@kernel.org>
----
- drivers/gpio/gpio-mpc8xxx.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpio/gpio-mpc8xxx.c
-+++ b/drivers/gpio/gpio-mpc8xxx.c
-@@ -169,6 +169,7 @@ static int mpc8xxx_irq_set_type(struct i
- 
- 	switch (flow_type) {
- 	case IRQ_TYPE_EDGE_FALLING:
-+	case IRQ_TYPE_LEVEL_LOW:
- 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
- 		gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
- 			gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
diff --git a/target/linux/mpc85xx/patches-5.15/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch b/target/linux/mpc85xx/patches-5.15/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch
index c31649d207..e69de29bb2 100644
--- a/target/linux/mpc85xx/patches-5.15/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch
+++ b/target/linux/mpc85xx/patches-5.15/110-gpio-mpc8xxx-Fix-support-for-IRQ_TYPE_LEVEL_LOW-flow.patch
@@ -1,37 +0,0 @@
-From 29af30435022442ec4eccf3166956b8e0b8a2134 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
-Date: Mon, 5 Sep 2022 23:13:47 +0200
-Subject: [PATCH] gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type
- in mpc85xx
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Commit e39d5ef67804 ("powerpc/5xxx: extend mpc8xxx_gpio driver to support
-mpc512x gpios") implemented support for IRQ_TYPE_LEVEL_LOW flow type in
-mpc512x via falling edge type. Do same for mpc85xx which support was added
-in commit 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio").
-
-Fixes probing of lm90 hwmon driver on mpc85xx based board which use level
-interrupt. Without it kernel prints error and refuse lm90 to work:
-
-    [   15.258370] genirq: Setting trigger mode 8 for irq 49 failed (mpc8xxx_irq_set_type+0x0/0xf8)
-    [   15.267168] lm90 0-004c: cannot request IRQ 49
-    [   15.272708] lm90: probe of 0-004c failed with error -22
-
-Fixes: 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio")
-Signed-off-by: Pali Rohár <pali@kernel.org>
----
- drivers/gpio/gpio-mpc8xxx.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpio/gpio-mpc8xxx.c
-+++ b/drivers/gpio/gpio-mpc8xxx.c
-@@ -172,6 +172,7 @@ static int mpc8xxx_irq_set_type(struct i
- 
- 	switch (flow_type) {
- 	case IRQ_TYPE_EDGE_FALLING:
-+	case IRQ_TYPE_LEVEL_LOW:
- 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
- 		gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
- 			gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
diff --git a/target/linux/generic/hack-5.10/301-mips_image_cmdline_hack.patch b/target/linux/octeon/patches-5.10/100-mips_image_cmdline_hack.patch
similarity index 100%
rename from target/linux/generic/hack-5.10/301-mips_image_cmdline_hack.patch
rename to target/linux/octeon/patches-5.10/100-mips_image_cmdline_hack.patch
diff --git a/target/linux/generic/hack-5.15/301-mips_image_cmdline_hack.patch b/target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch
similarity index 100%
rename from target/linux/generic/hack-5.15/301-mips_image_cmdline_hack.patch
rename to target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch
diff --git a/target/linux/qoriq/Makefile b/target/linux/qoriq/Makefile
index d6a84634e2..a92186fd6e 100644
--- a/target/linux/qoriq/Makefile
+++ b/target/linux/qoriq/Makefile
@@ -8,7 +8,7 @@ ARCH:=powerpc64
 BOARD:=qoriq
 BOARDNAME:=NXP QorIQ (PowerPC)
 CPU_TYPE:=e5500
-FEATURES:=boot-part ext4 fpu legacy-sdcard powerpc64 ramdisk root-part rtc source-only
+FEATURES:=boot-part ext4 fpu legacy-sdcard powerpc64 ramdisk rootfs-part rtc source-only
 SUBTARGETS:=generic
 
 KERNEL_PATCHVER:=5.10
diff --git a/target/linux/ramips/dts/mt7621_asus_rt-ax53u.dts b/target/linux/ramips/dts/mt7621_asus_rt-ax53u.dts
index fc1a00a1c9..aec8a0494d 100644
--- a/target/linux/ramips/dts/mt7621_asus_rt-ax53u.dts
+++ b/target/linux/ramips/dts/mt7621_asus_rt-ax53u.dts
@@ -158,11 +158,6 @@
 			status = "okay";
 			label = "lan3";
 		};
-
-		port@4 {
-			status = "okay";
-			label = "lan4";
-		};
 	};
 };
 
diff --git a/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
new file mode 100644
index 0000000000..38cd1cd8fd
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_snr_snr-cpe-me2-lite.dts
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "snr,snr-cpe-me2-lite", "mediatek,mt7621-soc";
+	model = "SNR-CPE-ME2-Lite";
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: led-0 {
+			label = "green:sys";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_vpn: led-1 {
+			label = "green:vpn";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		groups = "jtag", "wdt";
+		function = "gpio";
+	};
+};
+
+&gdma {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "config";
+				reg = <0x30000 0x10000>;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0xfb0000>;
+			};
+		};
+	};
+};
+
+&sdhci {
+	status = "okay";
+};
+
+&mdio {
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
+&gmac0 {
+	nvmem-cells = <&macaddr_factory_e000>;
+	nvmem-cell-names = "mac-address";
+};
+
+&gmac1 {
+	status = "okay";
+	label = "wan";
+	phy-handle = <&ethphy0>;
+
+	nvmem-cells = <&macaddr_factory_e006>;
+	nvmem-cell-names = "mac-address";
+};
+
+&switch0 {
+	ports {
+		port@1 {
+			status = "okay";
+			label = "lan1";
+		};
+
+		port@2 {
+			status = "okay";
+			label = "lan2";
+		};
+
+		port@3 {
+			status = "okay";
+			label = "lan3";
+		};
+
+		port@4 {
+			status = "okay";
+			label = "lan4";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x0000>;
+		ieee80211-freq-limit = <2400000 2500000>;
+	};
+};
+
+&pcie1 {
+	wifi@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
+
+&factory {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_factory_e000: macaddr@e000 {
+		reg = <0xe000 0x6>;
+	};
+
+	macaddr_factory_e006: macaddr@e006 {
+		reg = <0xe006 0x6>;
+	};
+};
diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk
index 88fb7876a7..d213641691 100644
--- a/target/linux/ramips/image/mt7621.mk
+++ b/target/linux/ramips/image/mt7621.mk
@@ -1271,6 +1271,7 @@ TARGET_DEVICES += linksys_ea8100-v2
 
 define Device/linksys_re6500
   $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 7872k
   DEVICE_VENDOR := Linksys
   DEVICE_MODEL := RE6500
@@ -1723,6 +1724,17 @@ define Device/sercomm_na502s
 endef
 TARGET_DEVICES += sercomm_na502s
 
+define Device/snr_snr-cpe-me2-lite
+  $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
+  IMAGE_SIZE := 16064k
+  DEVICE_VENDOR := SNR
+  DEVICE_MODEL := SNR-CPE-ME2-Lite
+  UIMAGE_NAME := $$(DEVICE_MODEL)
+  DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
+endef
+TARGET_DEVICES += snr_snr-cpe-me2-lite
+
 define Device/storylink_sap-g3200u3
   $(Device/dsa-migration)
   IMAGE_SIZE := 7872k
@@ -1954,7 +1966,7 @@ define Device/ubnt_unifi-flexhd
   DEVICE_MODEL := UniFi FlexHD
   DEVICE_DTS_CONFIG := config@2
   KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
-  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware
+  DEVICE_PACKAGES += kmod-mt7603 kmod-mt7615e kmod-mt7615-firmware kmod-leds-ubnt-ledbar
   IMAGE_SIZE := 15552k
 endef
 TARGET_DEVICES += ubnt_unifi-flexhd
diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
index 8a9a0af7b0..0a05017fd7 100644
--- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network
@@ -29,6 +29,7 @@ ramips_setup_interfaces()
 		ucidef_set_interface_lan "lan"
 		;;
 	ampedwireless,ally-r1900k|\
+	asus,rt-ax53u|\
 	gehua,ghl-r-001|\
 	h3c,tx1800-plus|\
 	h3c,tx1801-plus|\
@@ -147,9 +148,9 @@ ramips_setup_macs()
 		lan_mac=$label_mac
 		;;
 	buffalo,wsr-1166dhp)
-		local index="$(find_mtd_index "board_data")"
-		wan_mac="$(grep -m1 mac= "/dev/mtd${index}" | cut -d= -f2)"
+		wan_mac=$(mtd_get_mac_ascii board_data "mac")
 		lan_mac=$wan_mac
+		label_mac=$wan_mac
 		;;
 	dlink,dir-860l-b1)
 		lan_mac=$(mtd_get_mac_ascii factory lanmac)
diff --git a/target/linux/ramips/mt7621/config-5.10 b/target/linux/ramips/mt7621/config-5.10
index 213fce2c36..1b415f3e66 100644
--- a/target/linux/ramips/mt7621/config-5.10
+++ b/target/linux/ramips/mt7621/config-5.10
@@ -110,7 +110,6 @@ CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 # CONFIG_KERNEL_ZSTD is not set
 CONFIG_LED_TRIGGER_PHY=y
-CONFIG_LEDS_UBNT_LEDBAR=y
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_LZO_COMPRESS=y
diff --git a/target/linux/ramips/mt7621/config-5.15 b/target/linux/ramips/mt7621/config-5.15
index 79f0a9bc15..a8094fe305 100644
--- a/target/linux/ramips/mt7621/config-5.15
+++ b/target/linux/ramips/mt7621/config-5.15
@@ -111,7 +111,6 @@ CONFIG_IRQ_FORCED_THREADING=y
 CONFIG_IRQ_MIPS_CPU=y
 CONFIG_IRQ_WORK=y
 CONFIG_KMAP_LOCAL=y
-CONFIG_LEDS_UBNT_LEDBAR=y
 CONFIG_LED_TRIGGER_PHY=y
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
diff --git a/target/linux/realtek/files-5.10/arch/mips/rtl838x/prom.c b/target/linux/realtek/files-5.10/arch/mips/rtl838x/prom.c
index ae768f9338..1428c01a33 100644
--- a/target/linux/realtek/files-5.10/arch/mips/rtl838x/prom.c
+++ b/target/linux/realtek/files-5.10/arch/mips/rtl838x/prom.c
@@ -31,14 +31,21 @@ const void *fdt;
 
 #ifdef CONFIG_MIPS_MT_SMP
 extern const struct plat_smp_ops vsmp_smp_ops;
+static struct plat_smp_ops rtl_smp_ops;
 
 static void rtl_init_secondary(void)
 {
+#ifndef CONFIG_CEVT_R4K
 /*
- * MIPS timer interrupt might fire like crazy if not used or initialized
- * properly. Silence it by setting the maximum possible interval.
+ * These devices are low on resources. There might be the chance that CEVT_R4K
+ * is not enabled in kernel build. Nevertheless the timer and interrupt 7 might
+ * be active by default after startup of secondary VPE. With no registered
+ * handler that leads to continuous unhandeled interrupts. In this case disable
+ * counting (DC) in the core and confirm a pending interrupt.
  */
+	write_c0_cause(read_c0_cause() | CAUSEF_DC);
 	write_c0_compare(0);
+#endif /* CONFIG_CEVT_R4K */
 /*
  * Enable all CPU interrupts, as everything is managed by the external
  * controller. TODO: Standard vsmp_init_secondary() has special treatment for
@@ -49,7 +56,7 @@ static void rtl_init_secondary(void)
 	else
 		set_c0_status(ST0_IM);
 }
-#endif
+#endif /* CONFIG_MIPS_MT_SMP */
 
 const char *get_system_type(void)
 {
@@ -220,8 +227,6 @@ void __init prom_init(void)
 
 #ifdef CONFIG_MIPS_MT_SMP
 	if (cpu_has_mipsmt) {
-		struct plat_smp_ops rtl_smp_ops;
-
 		rtl_smp_ops = vsmp_smp_ops;
 		rtl_smp_ops.init_secondary = rtl_init_secondary;
 		register_smp_ops(&rtl_smp_ops);
diff --git a/target/linux/realtek/patches-5.10/007-5.16-gpio-realtek-realtek-otto-fix-gpio-line-irq-offset.patch b/target/linux/realtek/patches-5.10/007-5.16-gpio-realtek-realtek-otto-fix-gpio-line-irq-offset.patch
index f1f739d470..9935c57257 100644
--- a/target/linux/realtek/patches-5.10/007-5.16-gpio-realtek-realtek-otto-fix-gpio-line-irq-offset.patch
+++ b/target/linux/realtek/patches-5.10/007-5.16-gpio-realtek-realtek-otto-fix-gpio-line-irq-offset.patch
@@ -1,4 +1,5 @@
-gpio: realtek-otto: fix GPIO line IRQ offset
+From: Sander Vanheule <sander@svanheule.net>
+Subject: gpio: realtek-otto: fix GPIO line IRQ offset
 
 The irqchip uses one domain for all GPIO lines, so th line offset should be
 determined w.r.t. the first line of the first port, not the first line of the
diff --git a/target/linux/realtek/patches-5.10/300-mips-add-rtl838x-platform.patch b/target/linux/realtek/patches-5.10/300-mips-add-rtl838x-platform.patch
index 87ab1a7543..591b157d40 100644
--- a/target/linux/realtek/patches-5.10/300-mips-add-rtl838x-platform.patch
+++ b/target/linux/realtek/patches-5.10/300-mips-add-rtl838x-platform.patch
@@ -1,3 +1,18 @@
+From fce11f68491b46b93df69de0630cd9edb90bc772 Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Wed, 29 Dec 2021 21:54:21 +0100
+Subject: [PATCH] realtek: Create 4 different Realtek Platforms
+
+Creates RTL83XX as a basic kernel config parameter for the
+RTL838X, RTL839x, RTL930X and RTL931X platforms with respective
+configurations for the SoCs, which are introduced in addition.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ arch/mips/Kbuild.platforms                    |  1 +
+ arch/mips/Kconfig                             | 57 ++++++++++++++
+ 2 files changed, 58 insertions(+)
+
 --- a/arch/mips/Kbuild.platforms
 +++ b/arch/mips/Kbuild.platforms
 @@ -23,6 +23,7 @@ platform-$(CONFIG_PIC32MZDA)		+= pic32/
diff --git a/target/linux/realtek/patches-5.10/301-gpio-add-rtl8231-driver.patch b/target/linux/realtek/patches-5.10/301-gpio-add-rtl8231-driver.patch
index 9175b55e8e..2725651243 100644
--- a/target/linux/realtek/patches-5.10/301-gpio-add-rtl8231-driver.patch
+++ b/target/linux/realtek/patches-5.10/301-gpio-add-rtl8231-driver.patch
@@ -1,3 +1,28 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: [PATCH] realtek: update the tree to the latest refactored version
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/gpio/Kconfig                          |    6 ++++++
+ drivers/gpio/Makefile                         |    1 +
+ 2 files changed, 7 insertions(+)
+
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -508,6 +508,12 @@ config GPIO_REG
diff --git a/target/linux/realtek/patches-5.10/303-gpio-update-dependencies-for-gpio-realtek-otto.patch b/target/linux/realtek/patches-5.10/303-gpio-update-dependencies-for-gpio-realtek-otto.patch
index b6678e71fe..5f0986b905 100644
--- a/target/linux/realtek/patches-5.10/303-gpio-update-dependencies-for-gpio-realtek-otto.patch
+++ b/target/linux/realtek/patches-5.10/303-gpio-update-dependencies-for-gpio-realtek-otto.patch
@@ -1,3 +1,16 @@
+From 9bac1c20b8f39f2e0e342b087add5093b94feaed Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Wed, 5 May 2021 22:05:39 +0900
+Subject: realtek: backport gpio-realtek-otto driver from 5.13 to 5.10
+
+This patch backports "gpio-realtek-otto" driver to Kernel 5.10.
+"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
+is used in OpenWrt, so update the dependency by the additional patch.
+
+Submitted-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+ drivers/gpio/Kconfig                          |   4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -491,8 +491,8 @@ config GPIO_RDA
diff --git a/target/linux/realtek/patches-5.10/304-spi-update-dependency-for-spi-realtek-rtl.patch b/target/linux/realtek/patches-5.10/304-spi-update-dependency-for-spi-realtek-rtl.patch
index 2d8cf9e7cb..23c5448aa2 100644
--- a/target/linux/realtek/patches-5.10/304-spi-update-dependency-for-spi-realtek-rtl.patch
+++ b/target/linux/realtek/patches-5.10/304-spi-update-dependency-for-spi-realtek-rtl.patch
@@ -1,3 +1,17 @@
+From 0b000cbfe0aa0323bffa855ef8449c0687a4c071 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Thu, 6 May 2021 19:30:58 +0900
+Subject: realtek: backport spi-realtek-rtl driver from 5.12 to 5.10
+
+This patch backports "spi-realtek-rtl" driver to Kernel 5.10 from 5.12.
+"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
+is used in OpenWrt, so update the dependency by the additional patch.
+
+Submitted-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+ drivers/spi/Makefile                          |  2 +-
+ 1 files changed, 1 insertion(+), 1 deletion(-)
+
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
 @@ -94,7 +94,7 @@ obj-$(CONFIG_SPI_QCOM_QSPI)		+= spi-qcom
diff --git a/target/linux/realtek/patches-5.10/305-irqchip-update-dependency-for-irq-realtek-rtl.patch b/target/linux/realtek/patches-5.10/305-irqchip-update-dependency-for-irq-realtek-rtl.patch
index ebab9792fc..0c1cc4235e 100644
--- a/target/linux/realtek/patches-5.10/305-irqchip-update-dependency-for-irq-realtek-rtl.patch
+++ b/target/linux/realtek/patches-5.10/305-irqchip-update-dependency-for-irq-realtek-rtl.patch
@@ -1,3 +1,17 @@
+From 2cd00b51470a30198b048a5fca48a04db77e29cc Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Fri, 21 May 2021 23:16:37 +0900
+Subject: [PATCH] realtek: backport irq-realtek-rtl driver from 5.12 to 5.10
+
+This patch backports "irq-realtek-rtl" driver to Kernel 5.10 from 5.12.
+"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
+is used in OpenWrt, so update the dependency by the additional patch.
+
+Submitted-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+ drivers/irqchip/Makefile                      | 2 +-
+ 1 files changed, 1 insertion(+), 1 deletion(-)
+
 --- a/drivers/irqchip/Makefile
 +++ b/drivers/irqchip/Makefile
 @@ -114,4 +114,4 @@ obj-$(CONFIG_LOONGSON_PCH_PIC)		+= irq-l
diff --git a/target/linux/realtek/patches-5.10/307-wdt-update-dependency-for-realtek-otto-wdt.patch b/target/linux/realtek/patches-5.10/307-wdt-update-dependency-for-realtek-otto-wdt.patch
index 0b8699c130..f92981340b 100644
--- a/target/linux/realtek/patches-5.10/307-wdt-update-dependency-for-realtek-otto-wdt.patch
+++ b/target/linux/realtek/patches-5.10/307-wdt-update-dependency-for-realtek-otto-wdt.patch
@@ -1,3 +1,20 @@
+From b8fc5eecdc5d33cf261986436597b5482ab856da Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander@svanheule.net>
+Date: Sun, 14 Nov 2021 19:45:32 +0100
+Subject: [PATCH] realtek: Backport Realtek Otto WDT driver
+
+Add patch submitted upstream to linux-watchdog and replace the MIPS
+architecture symbols. Requires one extra patch for the DIV_ROUND_*
+macros, which have moved to a different header since 5.10.
+
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Tested-by: Stijn Segers <foss@volatilesystems.org>
+Tested-by: Paul Fertser <fercerpav@gmail.com>
+Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
+---
+ drivers/watchdog/Kconfig                      | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
 --- a/drivers/watchdog/Kconfig
 +++ b/drivers/watchdog/Kconfig
 @@ -997,10 +997,10 @@ config RTD119X_WATCHDOG
diff --git a/target/linux/realtek/patches-5.10/308-otto-wdt-fix-missing-math-header.patch b/target/linux/realtek/patches-5.10/308-otto-wdt-fix-missing-math-header.patch
index 0fb61b9df5..78b145617f 100644
--- a/target/linux/realtek/patches-5.10/308-otto-wdt-fix-missing-math-header.patch
+++ b/target/linux/realtek/patches-5.10/308-otto-wdt-fix-missing-math-header.patch
@@ -1,3 +1,20 @@
+From b8fc5eecdc5d33cf261986436597b5482ab856da Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander@svanheule.net>
+Date: Sun, 14 Nov 2021 19:45:32 +0100
+Subject: [PATCH] realtek: Backport Realtek Otto WDT driver
+
+Add patch submitted upstream to linux-watchdog and replace the MIPS
+architecture symbols. Requires one extra patch for the DIV_ROUND_*
+macros, which have moved to a different header since 5.10.
+
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Tested-by: Stijn Segers <foss@volatilesystems.org>
+Tested-by: Paul Fertser <fercerpav@gmail.com>
+Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
+---
+ drivers/watchdog/realtek_otto_wdt.c           | 2 +-
+ 1 files changed, 1 insertion(+), 1 deletion(-)
+
 --- a/drivers/watchdog/realtek_otto_wdt.c
 +++ b/drivers/watchdog/realtek_otto_wdt.c
 @@ -21,7 +21,7 @@
diff --git a/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch b/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
index 2b9102633e..93d69c07cf 100644
--- a/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
+++ b/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
@@ -1,3 +1,24 @@
+From 775d903216a08c2a8009863d2f9c33f62657ba94 Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Thu, 6 Jan 2022 20:27:01 +0100
+Subject: [PATCH] realtek: Replace the RTL9300 generic timer with a CEVT timer
+
+The RTL9300 has a broken R4K MIPS timer interrupt, however, the
+R4K clocksource works. We replace the RTL9300 timer with a
+Clock Event Timer (CEVT), which is VSMP aware and can be instantiated
+as part of brining a VSMTP cpu up instead of the R4K CEVT source.
+For this we place the RTL9300 CEVT timer in arch/mips/kernel
+together with other MIPS CEVT timers, initialize the SoC IRQs
+from a modified smp-mt.c and instantiate each timer as part
+of the MIPS time setup in arch/mips/include/asm/time.h instead
+of the R4K CEVT, similarly as is done by other MIPS CEVT timers.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ arch/mips/kernel/Makefile                     | 1 +
+ arch/mips/include/asm/time.h                  | 7 +++++++
+ 2 files changed, 8 insertions(+)
+
 --- a/arch/mips/kernel/Makefile
 +++ b/arch/mips/kernel/Makefile
 @@ -27,6 +27,7 @@ obj-$(CONFIG_CEVT_BCM1480)	+= cevt-bcm14
diff --git a/target/linux/realtek/patches-5.10/310-add-i2c-rtl9300-support.patch b/target/linux/realtek/patches-5.10/310-add-i2c-rtl9300-support.patch
index c4d23d90e1..4df9bf043b 100644
--- a/target/linux/realtek/patches-5.10/310-add-i2c-rtl9300-support.patch
+++ b/target/linux/realtek/patches-5.10/310-add-i2c-rtl9300-support.patch
@@ -1,3 +1,20 @@
+From 63a0a4d85bc900464c5b046b13808a582345f8c8 Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Sat, 11 Dec 2021 20:14:47 +0100
+Subject: [PATCH] realtek: Add support for RTL9300/RTL9310 I2C controller
+
+This adds support for the RTL9300 and RTL9310 I2C controller.
+The controller implements the SMBus protocol for SMBus transfers
+over an I2C bus. The driver supports selecting one of the 2 possible
+SCL pins and any of the 8 possible SDA pins. Bus speeds of
+100kHz (standard speed) and 400kHz (high speed I2C) are supported.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ drivers/i2c/busses/Kconfig                    | 10 +++++++++
+ drivers/i2c/busses/Makefile                   |  1 +
+ 2 files changed, 11 insertions(+)
+
 --- a/drivers/i2c/busses/Kconfig
 +++ b/drivers/i2c/busses/Kconfig
 @@ -954,6 +954,16 @@ config I2C_RK3X
diff --git a/target/linux/realtek/patches-5.10/311-add-i2c-mux-rtl9300-support.patch b/target/linux/realtek/patches-5.10/311-add-i2c-mux-rtl9300-support.patch
index 0204643d02..d0bfba4538 100644
--- a/target/linux/realtek/patches-5.10/311-add-i2c-mux-rtl9300-support.patch
+++ b/target/linux/realtek/patches-5.10/311-add-i2c-mux-rtl9300-support.patch
@@ -1,3 +1,22 @@
+From f4bdb7fdccdfe3fa382abe77f72a16c2f2e6add0 Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Sat, 11 Dec 2021 20:25:37 +0100
+Subject: [PATCH] realtek: Add support for RTL9300/RTL9310 I2C multiplexing
+
+The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
+masters, each with a fixed SCL pin, that cannot be changed. Each of these
+masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
+This multiplexer directly controls the two masters and their shared
+IO configuration registers to allow multiplexing between any of these
+busses. The two masters cannot be used in parallel as the multiplex
+is protected by a standard multiplex lock.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ drivers/i2c/muxes/Kconfig                     |  9 +++++++
+ drivers/i2c/muxes/Makefile                    |  1 +
+ 2 files changed, 10 insertions(+)
+
 --- a/drivers/i2c/muxes/Kconfig
 +++ b/drivers/i2c/muxes/Kconfig
 @@ -99,6 +99,15 @@ config I2C_MUX_REG
diff --git a/target/linux/realtek/patches-5.10/312-rt9313-support.patch b/target/linux/realtek/patches-5.10/312-rt9313-support.patch
index 37a61106d2..516bca2b6e 100644
--- a/target/linux/realtek/patches-5.10/312-rt9313-support.patch
+++ b/target/linux/realtek/patches-5.10/312-rt9313-support.patch
@@ -1,3 +1,19 @@
+From 0b8dfe085180b58b81d2657c76b080168e3bc8df Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Wed, 19 Jan 2022 18:14:02 +0100
+Subject: [PATCH] realtek: Add RTL931X sub-target
+
+We add the RTL931X sub-target with kernel configuration for
+a dual core MIPS InterAptive CPU.
+
+Submitted-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ arch/mips/Makefile                            | 10 +++++++++++++--
+ arch/mips/kernel/head.S                       |  4 ++++
+ aarch/mips/kernel/vmlinux.lds.S               |  4 ++++
+ 3 files changed, 18 insertions(+), 2 deletions(-)
+
 --- a/arch/mips/Makefile
 +++ b/arch/mips/Makefile
 @@ -307,14 +307,24 @@ endif
@@ -44,20 +60,6 @@
  
  EXPORT(_stext)
  
-@@ -79,11 +81,13 @@ FEXPORT(__kernel_entry)
- 	j	kernel_entry
- #endif /* CONFIG_BOOT_RAW */
- 
-+#ifndef CONFIG_RTL931X
- #ifdef CONFIG_IMAGE_CMDLINE_HACK
- 	.ascii	"CMDLINE:"
- EXPORT(__image_cmdline)
- 	.fill	0x400
- #endif /* CONFIG_IMAGE_CMDLINE_HACK */
-+#endif
- 
- 	__REF
- 
 --- a/arch/mips/kernel/vmlinux.lds.S
 +++ b/arch/mips/kernel/vmlinux.lds.S
 @@ -55,7 +55,11 @@ SECTIONS
diff --git a/target/linux/realtek/patches-5.10/315-irqchip-irq-realtek-rtl-add-VPE-support.patch b/target/linux/realtek/patches-5.10/315-irqchip-irq-realtek-rtl-add-VPE-support.patch
index 09252068b2..26c36302c2 100644
--- a/target/linux/realtek/patches-5.10/315-irqchip-irq-realtek-rtl-add-VPE-support.patch
+++ b/target/linux/realtek/patches-5.10/315-irqchip-irq-realtek-rtl-add-VPE-support.patch
@@ -1,3 +1,17 @@
+From 6c18e9c491959ac0674ebe36b09f9ddc3f2c9bce Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Fri, 31 Dec 2021 11:56:49 +0100
+Subject: [PATCH] realtek: Add VPE support for the IRQ driver
+
+In order to support VSMP, enable support for both VPEs
+of the RTL839X and RTL930X SoCs in the irq-realtek-rtl
+driver. Add support for IRQ affinity setting.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ drivers/irqchip/irq-realtek-rtl.c             | 152 +++++++++++++++---
+ 1 file changed, 73 insertions(+), 76 deletions(-)
+
 --- a/drivers/irqchip/irq-realtek-rtl.c
 +++ b/drivers/irqchip/irq-realtek-rtl.c
 @@ -21,21 +21,63 @@
diff --git a/target/linux/realtek/patches-5.10/316-otto-gpio-uniprocessor-irq-mask.patch b/target/linux/realtek/patches-5.10/316-otto-gpio-uniprocessor-irq-mask.patch
index a3241cadbd..3980875dd4 100644
--- a/target/linux/realtek/patches-5.10/316-otto-gpio-uniprocessor-irq-mask.patch
+++ b/target/linux/realtek/patches-5.10/316-otto-gpio-uniprocessor-irq-mask.patch
@@ -1,3 +1,25 @@
+From bde6311569ef25a00c3beaeabfd6b78b19651872 Mon Sep 17 00:00:00 2001
+From: Sander Vanheule <sander@svanheule.net>
+Date: Sun, 29 May 2022 19:38:09 +0200
+Subject: [PATCH] realtek: don't unmask non-maskable GPIO IRQs
+
+On uniprocessor builds, for_each_cpu(cpu, mask) will assume 'mask'
+always contains exactly one CPU, and ignore the actual mask contents.
+This causes the loop to run, even when it shouldn't on an empty mask,
+and tries to access an uninitialised pointer.
+
+Fix this by wrapping the loop in a cpumask_empty() check, to ensure it
+will not run on uniprocessor builds if the CPU mask is empty.
+
+Fixes: af6cd37f42f3 ("realtek: replace RTL93xx GPIO patches")
+Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+Reported-by: Robert Marko <robimarko@gmail.com>
+Tested-by: Robert Marko <robimarko@gmail.com>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+---
+ drivers/gpio/gpio-realtek-otto.c              | 9 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
 --- a/drivers/gpio/gpio-realtek-otto.c
 +++ b/drivers/gpio/gpio-realtek-otto.c
 @@ -304,6 +304,7 @@ static int realtek_gpio_irq_set_affinity
diff --git a/target/linux/realtek/patches-5.10/318-add-rtl83xx-clk-support.patch b/target/linux/realtek/patches-5.10/318-add-rtl83xx-clk-support.patch
index 285b7489f2..94c4230835 100644
--- a/target/linux/realtek/patches-5.10/318-add-rtl83xx-clk-support.patch
+++ b/target/linux/realtek/patches-5.10/318-add-rtl83xx-clk-support.patch
@@ -1,3 +1,16 @@
+From 800d5fb3c6a16661932c932bacd660e38d06b727 Mon Sep 17 00:00:00 2001
+From: Markus Stockhausen <markus.stockhausen@gmx.de>
+Date: Thu, 25 Aug 2022 08:22:36 +0200
+Subject: [PATCH] realtek: add patch to enable new clock driver in kernel
+
+Allow building the clock driver with kernel config options.
+
+Submitted-by: Markus Stockhausen <markus.stockhausen@gmx.de>
+---
+ drivers/clk/Kconfig                           | 1 +
+ drivers/clk/Makefile                          | 1 +
+ 2 files changed, 2 insertions(+)
+
 --- a/drivers/clk/Kconfig
 +++ b/drivers/clk/Kconfig
 @@ -372,6 +372,7 @@ source "drivers/clk/mediatek/Kconfig"
diff --git a/target/linux/realtek/patches-5.10/319-irqchip-irq-realtek-rtl-fix-VPE-affinity.patch b/target/linux/realtek/patches-5.10/319-irqchip-irq-realtek-rtl-fix-VPE-affinity.patch
index 0ecff843fb..bb95e7103a 100644
--- a/target/linux/realtek/patches-5.10/319-irqchip-irq-realtek-rtl-fix-VPE-affinity.patch
+++ b/target/linux/realtek/patches-5.10/319-irqchip-irq-realtek-rtl-fix-VPE-affinity.patch
@@ -1,3 +1,17 @@
+From 2cd00b51470a30198b048a5fca48a04db77e29cc Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Fri, 21 May 2021 23:16:37 +0900
+Subject: [PATCH] realtek: backport irq-realtek-rtl driver from 5.12 to 5.10
+
+This patch backports "irq-realtek-rtl" driver to Kernel 5.10 from 5.12.
+"MACH_REALTEK_RTL" is used as a platform name in upstream, but "RTL838X"
+is used in OpenWrt, so update the dependency by the additional patch.
+
+Submitted-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+---
+ drivers/irqchip/irq-realtek-rtl.c             | 38 +++++++++++------
+ 1 files changed, 58 insertions(+), 20 deletions(-)
+
 --- a/drivers/irqchip/irq-realtek-rtl.c
 +++ b/drivers/irqchip/irq-realtek-rtl.c
 @@ -28,6 +28,7 @@ static DEFINE_RAW_SPINLOCK(irq_lock);
diff --git a/target/linux/realtek/patches-5.10/700-net-dsa-add-support-for-rtl838x-switch.patch b/target/linux/realtek/patches-5.10/700-net-dsa-add-support-for-rtl838x-switch.patch
index d585a316c5..f97ea94d9b 100644
--- a/target/linux/realtek/patches-5.10/700-net-dsa-add-support-for-rtl838x-switch.patch
+++ b/target/linux/realtek/patches-5.10/700-net-dsa-add-support-for-rtl838x-switch.patch
@@ -1,3 +1,25 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: net: dsa: Add support for rtl838x switch
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/net/dsa/rtl83xx/Kconfig               | 2 ++
+ drivers/net/dsa/rtl83xx/Makefile              | 1 +
+ 2 files changed, 3 insertions(+)
+
 --- a/drivers/net/dsa/Kconfig
 +++ b/drivers/net/dsa/Kconfig
 @@ -68,6 +68,8 @@ config NET_DSA_QCA8K
diff --git a/target/linux/realtek/patches-5.10/701-net-dsa-add-rtl838x-support-for-tag-trailer.patch b/target/linux/realtek/patches-5.10/701-net-dsa-add-rtl838x-support-for-tag-trailer.patch
index 8c7efb58f3..27299f17de 100644
--- a/target/linux/realtek/patches-5.10/701-net-dsa-add-rtl838x-support-for-tag-trailer.patch
+++ b/target/linux/realtek/patches-5.10/701-net-dsa-add-rtl838x-support-for-tag-trailer.patch
@@ -1,3 +1,24 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: net: dsa: Add rtl838x support for tag trailer
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ net/dsa/tag_trailer.c                         | 16 +++++++++++++-
+ 1 file changed, 17 insertions(+), 1 deletion(-)
+
 --- a/net/dsa/tag_trailer.c
 +++ b/net/dsa/tag_trailer.c
 @@ -17,7 +17,12 @@ static struct sk_buff *trailer_xmit(stru
diff --git a/target/linux/realtek/patches-5.10/702-net-dsa-increase-dsa-max-ports-for-rtl838x.patch b/target/linux/realtek/patches-5.10/702-net-dsa-increase-dsa-max-ports-for-rtl838x.patch
index 929f2b9444..63991d373c 100644
--- a/target/linux/realtek/patches-5.10/702-net-dsa-increase-dsa-max-ports-for-rtl838x.patch
+++ b/target/linux/realtek/patches-5.10/702-net-dsa-increase-dsa-max-ports-for-rtl838x.patch
@@ -1,3 +1,24 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: net: dsa: Increase max ports for rtl838x
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ include/linux/platform_data/dsa.h             | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/include/linux/platform_data/dsa.h
 +++ b/include/linux/platform_data/dsa.h
 @@ -6,7 +6,7 @@ struct device;
diff --git a/target/linux/realtek/patches-5.10/702-net-ethernet-add-support-for-rtl838x-ethernet.patch b/target/linux/realtek/patches-5.10/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
index f76f8e39a9..9f50e8b564 100644
--- a/target/linux/realtek/patches-5.10/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
+++ b/target/linux/realtek/patches-5.10/702-net-ethernet-add-support-for-rtl838x-ethernet.patch
@@ -1,3 +1,25 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: net: ethernet: Add support for RTL838x ethernet
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/net/ethernet/Kconfig                  | 7 +-
+ drivers/net/ethernet/Makefile                 | 1 +
+ 2 files changed, 8 insertions(+)
+
 --- a/drivers/net/ethernet/Kconfig
 +++ b/drivers/net/ethernet/Kconfig
 @@ -163,6 +163,13 @@ source "drivers/net/ethernet/rdc/Kconfig
diff --git a/target/linux/realtek/patches-5.10/703-include-linux-add-phy-ops-for-rtl838x.patch b/target/linux/realtek/patches-5.10/703-include-linux-add-phy-ops-for-rtl838x.patch
index 0841b85fd8..8f68dd4e88 100644
--- a/target/linux/realtek/patches-5.10/703-include-linux-add-phy-ops-for-rtl838x.patch
+++ b/target/linux/realtek/patches-5.10/703-include-linux-add-phy-ops-for-rtl838x.patch
@@ -1,3 +1,24 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: phy: Add PHY ops for rtl838x EEE
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ include/linux/phy.h                           | 4 ++++
+ 1 file changed, 4 insertions(+)
+
 --- a/include/linux/phy.h
 +++ b/include/linux/phy.h
 @@ -885,6 +885,10 @@ struct phy_driver {
diff --git a/target/linux/realtek/patches-5.10/704-drivers-net-phy-eee-support-for-rtl838x.patch b/target/linux/realtek/patches-5.10/704-drivers-net-phy-eee-support-for-rtl838x.patch
index 3cb04c0868..c46be91fe0 100644
--- a/target/linux/realtek/patches-5.10/704-drivers-net-phy-eee-support-for-rtl838x.patch
+++ b/target/linux/realtek/patches-5.10/704-drivers-net-phy-eee-support-for-rtl838x.patch
@@ -1,3 +1,24 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: net: phy: EEE support for rtl838x
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ drivers/net/phy/phylink.                      | 14 +++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
 --- a/drivers/net/phy/phylink.c
 +++ b/drivers/net/phy/phylink.c
 @@ -1449,6 +1449,11 @@ int phylink_ethtool_ksettings_set(struct
diff --git a/target/linux/realtek/patches-5.10/704-include-linux-add-phy-hsgmii-mode.patch b/target/linux/realtek/patches-5.10/704-include-linux-add-phy-hsgmii-mode.patch
index 58f4fef456..442bff82fa 100644
--- a/target/linux/realtek/patches-5.10/704-include-linux-add-phy-hsgmii-mode.patch
+++ b/target/linux/realtek/patches-5.10/704-include-linux-add-phy-hsgmii-mode.patch
@@ -1,3 +1,17 @@
+From 9d9bf16aa8d966834ac1280f96c37d22552c33d1 Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Wed, 8 Sep 2021 16:13:18 +0200
+Subject: phy: Add PHY hsgmii mode
+
+This adds RTL93xx-specific MAC configuration routines that allow also configuration
+of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
+protocol.
+
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ include/linux/phy.h                           | 3 +++
+ 1 file changed, 3 insertions(+)
+
 --- a/include/linux/phy.h
 +++ b/include/linux/phy.h
 @@ -134,6 +134,7 @@ typedef enum {
diff --git a/target/linux/realtek/patches-5.10/705-add-rtl-phy.patch b/target/linux/realtek/patches-5.10/705-add-rtl-phy.patch
index e88c26b348..47041262fc 100644
--- a/target/linux/realtek/patches-5.10/705-add-rtl-phy.patch
+++ b/target/linux/realtek/patches-5.10/705-add-rtl-phy.patch
@@ -1,3 +1,17 @@
+From 89f71ebb355c624320c2b0ace8ae9488ff53cbeb Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <mail@birger-koblitz.de>
+Date: Tue, 5 Jan 2021 20:40:52 +0100
+Subject: PHY: Add realtek PHY
+
+This fixes the build problems for the REALTEK target by adding a proper
+configuration option for the phy module.
+
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+---
+ drivers/net/phy/Kconfig                       | 6 ++++++
+ drivers/net/phy/Makefile                      | 1 +
+ 2 files changed, 7 insertions(+)
+
 --- a/drivers/net/phy/Kconfig
 +++ b/drivers/net/phy/Kconfig
 @@ -330,6 +330,12 @@ config REALTEK_PHY
diff --git a/target/linux/realtek/patches-5.10/705-include-linux-phy-increase-phy-address-number-for-rtl839x.patch b/target/linux/realtek/patches-5.10/705-include-linux-phy-increase-phy-address-number-for-rtl839x.patch
index ab3ea8e689..bba6fd7182 100644
--- a/target/linux/realtek/patches-5.10/705-include-linux-phy-increase-phy-address-number-for-rtl839x.patch
+++ b/target/linux/realtek/patches-5.10/705-include-linux-phy-increase-phy-address-number-for-rtl839x.patch
@@ -1,3 +1,24 @@
+From 2b88563ee5aafd9571d965b7f2093a0f58d98a31 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Thu, 26 Nov 2020 12:02:21 +0100
+Subject: PHY: Increase max PHY adddress number
+
+* rename the target to realtek
+* add refactored DSA driver
+* add latest gpio driver
+* lots of arch cleanups
+* new irq driver
+* additional boards
+
+Submitted-by: Bert Vermeulen <bert@biot.com>
+Submitted-by: Birger Koblitz <mail@birger-koblitz.de>
+Submitted-by: Sander Vanheule <sander@svanheule.net>
+Submitted-by: Bjørn Mork <bjorn@mork.no>
+Submitted-by: John Crispin <john@phrozen.org>
+---
+ include/linux/phy.h                           | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
 --- a/include/linux/phy.h
 +++ b/include/linux/phy.h
 @@ -233,7 +233,7 @@ static inline const char *phy_modes(phy_
diff --git a/target/linux/realtek/patches-5.10/708-brflood-api.patch b/target/linux/realtek/patches-5.10/708-brflood-api.patch
index 06b9b7f758..2716933ae7 100644
--- a/target/linux/realtek/patches-5.10/708-brflood-api.patch
+++ b/target/linux/realtek/patches-5.10/708-brflood-api.patch
@@ -1,3 +1,21 @@
+From afa3ab54c03d5126b14651f367b38165fab5b3cc Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Tue, 18 Jan 2022 17:18:43 +0100
+Subject: net: brflood API
+
+Adds the DSA API for bridge configuration (flooding, L2 learning,
+and aging) offload as found in Linux 5.12 so that we can implement
+it in our drivver.
+
+Submitted-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ include/net/dsa.h                             |  6 +++++++--
+ net/dsa/dsa_priv.h                            |  6 +++---
+ net/dsa/port.c                                | 28 ++++++++----
+ net/dsa/slave.c                               |  6 +++---
+ 4 file changed, 29 insertions(+), 13 deletions(-)
+
 --- a/include/net/dsa.h
 +++ b/include/net/dsa.h
 @@ -552,8 +552,14 @@ struct dsa_switch_ops {
diff --git a/target/linux/realtek/patches-5.10/709-lag-offloading.patch b/target/linux/realtek/patches-5.10/709-lag-offloading.patch
index 8758953542..f84687ff4a 100644
--- a/target/linux/realtek/patches-5.10/709-lag-offloading.patch
+++ b/target/linux/realtek/patches-5.10/709-lag-offloading.patch
@@ -1,6 +1,28 @@
+From afa3ab54c03d5126b14651f367b38165fab5b3cc Mon Sep 17 00:00:00 2001
+From: Birger Koblitz <git@birger-koblitz.de>
+Date: Tue, 18 Jan 2022 17:18:43 +0100
+Subject: [PATCH] realtek: Backport bridge configuration for DSA
+
+Adds the DSA API for bridge configuration (flooding, L2 learning,
+and aging) offload as found in Linux 5.12 so that we can implement
+it in our drivver.
+
+Submitted-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
+Submitted-by: Birger Koblitz <git@birger-koblitz.de>
+---
+ drivers/net/bonding/bond_main.c               |  2 ++
+ include/net/dsa.h                             | 79 ++++++++++++++++-
+ net/dsa/dsa2.c                                | 88 +++++++++++++++++++
+ net/dsa/dsa_priv.h                            | 74 ++++++++++++++
+ net/dsa/port.c                                | 92 ++++++++++++++++++++
+ net/dsa/slave.c                               | 88 ++++++++++++++++---
+ net/dsa/switch.c                              | 49 ++++++++++
+ net/sda/tag_dsa.c                             | 13 +++++-
+ 8 file changed, 460 insertions(+), 25 deletions(-)
+
 --- a/drivers/net/bonding/bond_main.c
 +++ b/drivers/net/bonding/bond_main.c
-@@ -2046,6 +2046,8 @@ int bond_enslave(struct net_device *bond
+@@ -2045,6 +2045,8 @@ int bond_enslave(struct net_device *bond
  		goto err_unregister;
  	}
  
diff --git a/target/linux/rockchip/Makefile b/target/linux/rockchip/Makefile
index 40d4fd967b..ceb433c705 100644
--- a/target/linux/rockchip/Makefile
+++ b/target/linux/rockchip/Makefile
@@ -7,7 +7,7 @@ BOARDNAME:=Rockchip
 FEATURES:=ext4 audio usb usbgadget display gpio fpu pci pcie rootfs-part boot-part squashfs
 SUBTARGETS:=armv8
 
-KERNEL_PATCHVER=5.15
+KERNEL_PATCHVER:=5.15
 
 define Target/Description
 	Build firmware image for Rockchip SoC devices.
diff --git a/target/linux/uml/patches-5.10/001-um-Fix-build-w-o-CONFIG_PM_SLEEP.patch b/target/linux/uml/patches-5.10/001-um-Fix-build-w-o-CONFIG_PM_SLEEP.patch
index 1f7db9ecf4..acee358dd7 100644
--- a/target/linux/uml/patches-5.10/001-um-Fix-build-w-o-CONFIG_PM_SLEEP.patch
+++ b/target/linux/uml/patches-5.10/001-um-Fix-build-w-o-CONFIG_PM_SLEEP.patch
@@ -16,7 +16,7 @@ Signed-off-by: Richard Weinberger <richard@nod.at>
 ---
 --- a/arch/um/kernel/um_arch.c
 +++ b/arch/um/kernel/um_arch.c
-@@ -387,12 +387,12 @@
+@@ -387,12 +387,12 @@ void text_poke_sync(void)
  {
  }
  
diff --git a/target/linux/uml/patches-5.15/001-um-fix-default-console-kernel-parameter.patch b/target/linux/uml/patches-5.15/001-um-fix-default-console-kernel-parameter.patch
deleted file mode 100644
index dd7fe57d5f..0000000000
--- a/target/linux/uml/patches-5.15/001-um-fix-default-console-kernel-parameter.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 53b5c5f559cc95fc676cb4cc9e5a8d9f0cb8f58c Mon Sep 17 00:00:00 2001
-Message-Id: <53b5c5f559cc95fc676cb4cc9e5a8d9f0cb8f58c.1659815468.git.chunkeey@gmail.com>
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sat, 6 Aug 2022 21:22:01 +0200
-Subject: [PATCH v1 1/2] um: fix default console kernel parameter
-To: linux-um@lists.infradead.org
-Cc: Richard Weinberger <richard@nod.at>,
-    Anton Ivanov <anton.ivanov@cambridgegreys.com>,
-    Johannes Berg <johannes@sipsolutions.net>
-
-OpenWrt's UML with 5.15 was producing odd errors/warnings during preinit
-part of the early userspace portion:
-
-|[    0.000000] Kernel command line: ubd0=root.img root=98:0 console=tty
-|[...]
-|[    0.440000] random: jshn: uninitialized urandom read (4 bytes read)
-|[    0.460000] random: jshn: uninitialized urandom read (4 bytes read)
-|/etc/preinit: line 47: can't create /dev/tty: No such device or address
-|/etc/preinit: line 48: can't create /dev/tty: No such device or address
-|/etc/preinit: line 58: can't open /dev/tty: No such device or address
-|[...] repeated many times
-
-That "/dev/tty" came from the command line (which is automatically
-added if no console= parameter was specified for the uml binary).
-
-The TLDP project tells the following about the /dev/tty:
-<https://tldp.org/HOWTO/Text-Terminal-HOWTO-7.html#ss7.3>
-| /dev/tty stands for the controlling terminal (if any) for the current
-| process.[...]
-| /dev/tty is something like a link to the actually terminal device[..]
-
-The "(if any)" is important here, since it's possible for processes to
-not have a controlling terminal.
-
-I think this was a simple typo and the author wanted tty0 there.
-
-CC: Thomas Meyer <thomas@m3y3r.de>
-Fixes: d7ffac33631b ("um: stdio_console: Make preferred console")
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- arch/um/kernel/um_arch.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/um/kernel/um_arch.c
-+++ b/arch/um/kernel/um_arch.c
-@@ -31,7 +31,7 @@
- #include <os.h>
- 
- #define DEFAULT_COMMAND_LINE_ROOT "root=98:0"
--#define DEFAULT_COMMAND_LINE_CONSOLE "console=tty"
-+#define DEFAULT_COMMAND_LINE_CONSOLE "console=tty0"
- 
- /* Changed in add_arg and setup_arch, which run before SMP is started */
- static char __initdata command_line[COMMAND_LINE_SIZE] = { 0 };
diff --git a/target/sdk/files/Makefile b/target/sdk/files/Makefile
index f620f0ef01..dca8bbe20e 100644
--- a/target/sdk/files/Makefile
+++ b/target/sdk/files/Makefile
@@ -14,7 +14,7 @@ export TOPDIR LC_ALL LANG SDK
 
 world:
 
-DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep -E '\/usr' -m 1)
+DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep '/usr' -m 1)
 export PATH:=$(TOPDIR)/staging_dir/host/bin:$(PATH)
 
 ifneq ($(OPENWRT_BUILD),1)
diff --git a/toolchain/fortify-headers/Makefile b/toolchain/fortify-headers/Makefile
index a6151bb2f1..904a10066c 100644
--- a/toolchain/fortify-headers/Makefile
+++ b/toolchain/fortify-headers/Makefile
@@ -11,7 +11,7 @@ PKG_NAME:=fortify-headers
 PKG_VERSION:=1.1
 PKG_RELEASE=1
 
-PKG_SOURCE_URL:=http://dl.2f30.org/releases
+PKG_SOURCE_URL:=https://dl.2f30.org/releases
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_HASH:=6ba5d860a2d2ba4c3346924b93930c34856eafe148bdbdf271ecab8065201fb6
 
diff --git a/toolchain/gdb/Makefile b/toolchain/gdb/Makefile
index d69217f6ca..4587c591f4 100644
--- a/toolchain/gdb/Makefile
+++ b/toolchain/gdb/Makefile
@@ -33,12 +33,12 @@ HOST_CONFIGURE_ARGS = \
 	--with-gmp=$(TOPDIR)/staging_dir/host \
 	--with-mpfr=$(TOPDIR)/staging_dir/host \
 	--with-mpc=$(TOPDIR)/staging_dir/host \
+	--with-expat=$(TOPDIR)/staging_dir/host \
 	--disable-werror \
 	--without-uiout \
 	--enable-tui --disable-gdbtk --without-x \
 	--without-included-gettext \
 	--enable-threads \
-	--with-expat \
 	--disable-unit-tests \
 	--disable-ubsan \
 	--disable-binutils \
diff --git a/tools/Makefile b/tools/Makefile
index 660d72efe8..4eee0cc81a 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -22,22 +22,22 @@ ifneq ($(CONFIG_SDK)$(CONFIG_PACKAGE_kmod-b43)$(CONFIG_PACKAGE_b43legacy-firmwar
 endif
 
 tools-y += autoconf autoconf-archive automake bc bison cmake cpio dosfstools
-tools-y += e2fsprogs fakeroot findutils firmware-utils flex gengetopt
+tools-y += e2fsprogs expat fakeroot findutils firmware-utils flex gengetopt
 tools-y += libressl libtool lzma m4 make-ext4fs meson missing-macros mkimage
 tools-y += mklibs mtd-utils mtools ninja padjffs2 patch-image
 tools-y += patchelf pkgconf quilt squashfskit4 sstrip zip zlib zstd
-tools-$(BUILD_B43_TOOLS) += b43-tools
-tools-$(BUILD_ISL) += isl
-tools-$(BUILD_TOOLCHAIN) += expat gmp mpc mpfr
-tools-$(CONFIG_EFI_IMAGES) += gptfdisk popt
-tools-$(CONFIG_TARGET_apm821xx)$(CONFIG_TARGET_gemini) += genext2fs
-tools-$(CONFIG_TARGET_ath79) += lzma-old squashfs
-tools-$(CONFIG_TARGET_mxs) += elftosb sdimage
-tools-$(CONFIG_TARGET_realtek) += 7z
-tools-$(CONFIG_TARGET_tegra) += cbootimage cbootimage-configs
-tools-$(CONFIG_USES_MINOR) += kernel2minor
-tools-$(CONFIG_USE_SPARSE) += sparse
-tools-$(CONFIG_USE_LLVM_BUILD) += llvm-bpf
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(BUILD_B43_TOOLS),y) += b43-tools
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(BUILD_ISL),y) += isl
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(BUILD_TOOLCHAIN),y) += gmp mpc mpfr
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_EFI_IMAGES),y) += gptfdisk popt
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_TARGET_apm821xx)$(CONFIG_TARGET_gemini),y) += genext2fs
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_TARGET_ath79),y) += lzma-old squashfs
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_TARGET_mxs),y) += elftosb sdimage
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_TARGET_realtek),y) += 7z
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_TARGET_tegra),y) += cbootimage cbootimage-configs
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_USES_MINOR),y) += kernel2minor
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_USE_SPARSE),y) += sparse
+tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_USE_LLVM_BUILD),y) += llvm-bpf
 
 # builddir dependencies
 $(curdir)/autoconf/compile := $(curdir)/m4/compile
@@ -46,13 +46,12 @@ $(curdir)/b43-tools/compile := $(curdir)/bison/compile
 $(curdir)/bc/compile := $(curdir)/bison/compile $(curdir)/libtool/compile
 $(curdir)/bison/compile := $(curdir)/flex/compile
 $(curdir)/cbootimage/compile += $(curdir)/automake/compile
-$(curdir)/cmake/compile += $(curdir)/libressl/compile $(curdir)/ninja/compile
+$(curdir)/cmake/compile += $(curdir)/libressl/compile $(curdir)/ninja/compile $(curdir)/expat/compile $(curdir)/xz/compile $(curdir)/zlib/compile $(curdir)/zstd/compile
 $(curdir)/dosfstools/compile := $(curdir)/autoconf/compile $(curdir)/automake/compile
-$(curdir)/expat/compile := $(curdir)/cmake/compile
 $(curdir)/e2fsprogs/compile := $(curdir)/libtool/compile
 $(curdir)/fakeroot/compile := $(curdir)/libtool/compile
 $(curdir)/findutils/compile := $(curdir)/bison/compile
-$(curdir)/firmware-utils/compile += $(curdir)/libressl/compile $(curdir)/zlib/compile
+$(curdir)/firmware-utils/compile += $(curdir)/cmake/compile $(curdir)/zlib/compile
 $(curdir)/flex/compile := $(curdir)/libtool/compile
 $(curdir)/gengetopt/compile := $(curdir)/libtool/compile
 $(curdir)/gmp/compile := $(curdir)/libtool/compile
@@ -77,7 +76,6 @@ $(curdir)/quilt/compile := $(curdir)/autoconf/compile $(curdir)/findutils/compil
 $(curdir)/sdcc/compile := $(curdir)/bison/compile
 $(curdir)/squashfs/compile := $(curdir)/lzma-old/compile
 $(curdir)/squashfskit4/compile := $(curdir)/xz/compile $(curdir)/zlib/compile
-$(curdir)/zlib/compile := $(curdir)/cmake/compile
 $(curdir)/zstd/compile := $(curdir)/meson/compile
 
 ifneq ($(HOST_OS),Linux)
@@ -89,14 +87,14 @@ ifeq ($(HOST_OS),Darwin)
 else
   $(curdir)/dwarves/compile += $(curdir)/elfutils/compile
   $(curdir)/elfutils/compile := $(curdir)/m4/compile $(curdir)/zlib/compile
-  tools-$(CONFIG_DWARVES) += dwarves
+  tools-$(if $(CONFIG_BUILD_ALL_HOST_TOOLS)$(CONFIG_DWARVES),y) += dwarves
   tools-y += elfutils
 endif
 
 ifneq ($(CONFIG_CCACHE)$(CONFIG_SDK),)
-$(foreach tool, $(filter-out xz zstd pkgconf patch ninja meson libressl cmake,$(tools-y)), $(eval $(curdir)/$(tool)/compile += $(curdir)/ccache/compile))
+$(foreach tool, $(filter-out zstd zlib xz pkgconf patch ninja meson libressl expat cmake,$(tools-y)), $(eval $(curdir)/$(tool)/compile += $(curdir)/ccache/compile))
 tools-y += ccache
-$(curdir)/ccache/compile := $(curdir)/cmake/compile $(curdir)/zstd/compile
+$(curdir)/ccache/compile := $(curdir)/cmake/compile
 endif
 
 # in case there is no patch tool on the host we need to make patch tool a
diff --git a/tools/ccache/Makefile b/tools/ccache/Makefile
index 9b2937dccd..0cf528bb5f 100644
--- a/tools/ccache/Makefile
+++ b/tools/ccache/Makefile
@@ -8,11 +8,11 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/target.mk
 
 PKG_NAME:=ccache
-PKG_VERSION:=4.6
+PKG_VERSION:=4.6.3
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=https://github.com/ccache/ccache/releases/download/v$(PKG_VERSION)
-PKG_HASH:=3d2bb860f4359169e640f60cf7cc11da5fab5fb9aed55230d78141e49c3945e9
+PKG_HASH:=1e3a251bb112632553b8255a78661fe526c3a16598496d51128c32b218fd8b22
 
 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/cmake.mk
diff --git a/tools/ccache/patches/100-honour-copts.patch b/tools/ccache/patches/100-honour-copts.patch
index 55422985b7..c8f2fc0fe6 100644
--- a/tools/ccache/patches/100-honour-copts.patch
+++ b/tools/ccache/patches/100-honour-copts.patch
@@ -1,6 +1,6 @@
 --- a/src/ccache.cpp
 +++ b/src/ccache.cpp
-@@ -1633,6 +1633,7 @@ calculate_result_and_manifest_key(Contex
+@@ -1756,6 +1756,7 @@ calculate_result_and_manifest_key(Contex
                               "CPLUS_INCLUDE_PATH",
                               "OBJC_INCLUDE_PATH",
                               "OBJCPLUS_INCLUDE_PATH", // clang
diff --git a/tools/cmake/Makefile b/tools/cmake/Makefile
index a0695c7d62..07e2a43218 100644
--- a/tools/cmake/Makefile
+++ b/tools/cmake/Makefile
@@ -7,7 +7,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=cmake
-PKG_VERSION:=3.24.1
+PKG_VERSION:=3.24.2
 PKG_VERSION_MAJOR:=$(word 1,$(subst ., ,$(PKG_VERSION))).$(word 2,$(subst ., ,$(PKG_VERSION)))
 PKG_RELEASE:=1
 PKG_CPE_ID:=cpe:/a:kitware:cmake
@@ -15,7 +15,7 @@ PKG_CPE_ID:=cpe:/a:kitware:cmake
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \
 		https://cmake.org/files/v$(PKG_VERSION_MAJOR)/
-PKG_HASH:=4931e277a4db1a805f13baa7013a7757a0cbfe5b7932882925c7061d9d1fa82b
+PKG_HASH:=0d9020f06f3ddf17fb537dc228e1a56c927ee506b486f55fe2dc19f69bf0c8db
 
 HOST_BUILD_PARALLEL:=1
 HOST_CONFIGURE_PARALLEL:=1
@@ -32,8 +32,14 @@ HOST_CONFIGURE_VARS += \
 HOST_CONFIGURE_ARGS := \
 	$(if $(MAKE_JOBSERVER),--parallel="$(MAKE_JOBSERVER)") \
 	--prefix="$(STAGING_DIR_HOST)" \
+	--system-expat \
+	--system-liblzma \
+	--system-zlib \
+	--system-zstd \
 	--generator=Ninja
 
+HOST_LDFLAGS += -Wl,-rpath,$(STAGING_DIR_HOST)/lib
+
 define Host/Compile/Default
 	+$(NINJA) -C $(HOST_BUILD_DIR) $(1)
 endef
diff --git a/tools/cmake/patches/110-liblzma.patch b/tools/cmake/patches/110-liblzma.patch
new file mode 100644
index 0000000000..e98dd5ade7
--- /dev/null
+++ b/tools/cmake/patches/110-liblzma.patch
@@ -0,0 +1,17 @@
+--- a/Modules/FindLibLZMA.cmake
++++ b/Modules/FindLibLZMA.cmake
+@@ -43,7 +43,13 @@ This module will set the following varia
+   version number as a string (ex: "5.0.3")
+ #]=======================================================================]
+ 
+-find_path(LIBLZMA_INCLUDE_DIR lzma.h )
++if(UNIX)
++  find_package(PkgConfig QUIET)
++  pkg_search_module(PC_liblzma liblzma)
++endif()
++
++find_path(LIBLZMA_INCLUDE_DIR lzma.h HINTS ${PC_liblzma_INCLUDEDIR} ${PC_liblzma_INCLUDE_DIRS})
++find_library(LIBLZMA_LIBRARY NAMES lzma HINTS ${PC_liblzma_LIBDIR} ${PC_liblzma_LIBRARY_DIRS})
+ if(NOT LIBLZMA_LIBRARY)
+   find_library(LIBLZMA_LIBRARY_RELEASE NAMES lzma liblzma NAMES_PER_DIR PATH_SUFFIXES lib)
+   find_library(LIBLZMA_LIBRARY_DEBUG NAMES lzmad liblzmad NAMES_PER_DIR PATH_SUFFIXES lib)
diff --git a/tools/cmake/patches/140-zlib.patch b/tools/cmake/patches/140-zlib.patch
new file mode 100644
index 0000000000..f79801c8a5
--- /dev/null
+++ b/tools/cmake/patches/140-zlib.patch
@@ -0,0 +1,20 @@
+--- a/Modules/FindZLIB.cmake
++++ b/Modules/FindZLIB.cmake
+@@ -85,10 +85,13 @@ else()
+   set(ZLIB_NAMES_DEBUG zd zlibd zdlld zlibd1 zlib1d zlibstaticd zlibwapid zlibvcd zlibstatd)
+ endif()
+ 
+-# Try each search configuration.
+-foreach(search ${_ZLIB_SEARCHES})
+-  find_path(ZLIB_INCLUDE_DIR NAMES zlib.h ${${search}} PATH_SUFFIXES include)
+-endforeach()
++if(UNIX)
++  find_package(PkgConfig QUIET)
++  pkg_search_module(PC_zlib zlib)
++endif()
++
++find_path(ZLIB_INCLUDE_DIR zlib.h HINTS ${PC_zlib_INCLUDEDIR} ${PC_zlib_INCLUDE_DIRS})
++find_library(ZLIB_LIBRARY NAMES z HINTS ${PC_zlib_LIBDIR} ${PC_zlib_LIBRARY_DIRS})
+ 
+ # Allow ZLIB_LIBRARY to be set manually, as the location of the zlib library
+ if(NOT ZLIB_LIBRARY)
diff --git a/tools/cmake/patches/150-zstd-libarchive.patch b/tools/cmake/patches/150-zstd-libarchive.patch
new file mode 100644
index 0000000000..603ac03775
--- /dev/null
+++ b/tools/cmake/patches/150-zstd-libarchive.patch
@@ -0,0 +1,18 @@
+--- a/Utilities/cmlibarchive/CMakeLists.txt
++++ b/Utilities/cmlibarchive/CMakeLists.txt
+@@ -630,8 +630,13 @@ IF(ENABLE_ZSTD)
+     SET(ZSTD_FIND_QUIETLY TRUE)
+   ENDIF (ZSTD_INCLUDE_DIR)
+ 
+-  FIND_PATH(ZSTD_INCLUDE_DIR zstd.h)
+-  FIND_LIBRARY(ZSTD_LIBRARY NAMES zstd libzstd)
++  IF(UNIX)
++  FIND_PACKAGE(PkgConfig QUIET)
++  PKG_SEARCH_MODULE(PC_ZSTD libzstd)
++  ENDIF()
++
++  FIND_PATH(ZSTD_INCLUDE_DIR zstd.h HINTS ${PC_ZSTD_INCLUDEDIR} ${PC_ZSTD_INCLUDE_DIRS})
++  FIND_LIBRARY(ZSTD_LIBRARY NAMES zstd HINTS ${PC_ZSTD_LIBDIR} ${PC_ZSTD_LIBRARY_DIRS})
+   INCLUDE(FindPackageHandleStandardArgs)
+   FIND_PACKAGE_HANDLE_STANDARD_ARGS(ZSTD DEFAULT_MSG ZSTD_LIBRARY ZSTD_INCLUDE_DIR)
+ ELSE(ENABLE_ZSTD)
diff --git a/tools/expat/Makefile b/tools/expat/Makefile
index 7079dabcaf..22acf45e08 100644
--- a/tools/expat/Makefile
+++ b/tools/expat/Makefile
@@ -9,25 +9,25 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=expat
 PKG_CPE_ID:=cpe:/a:libexpat:expat
-PKG_VERSION:=2.4.8
+PKG_VERSION:=2.4.9
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
-PKG_HASH:=a247a7f6bbb21cf2ca81ea4cbb916bfb9717ca523631675f99b3d4a5678dcd16
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
+PKG_HASH:=6e8c0728fe5c7cd3f93a6acce43046c5e4736c7b4b68e032e9350daa0efc0354
 PKG_SOURCE_URL:=https://github.com/libexpat/libexpat/releases/download/R_$(subst .,_,$(PKG_VERSION))
 
-include $(INCLUDE_DIR)/host-build.mk
-include $(INCLUDE_DIR)/cmake.mk
+HOST_BUILD_PARALLEL:=1
 
-CMAKE_HOST_OPTIONS += \
-	-DDOCBOOK_TO_MAN=OFF \
-	-DEXPAT_BUILD_TOOLS=OFF \
-	-DEXPAT_BUILD_EXAMPLES=OFF \
-	-DEXPAT_BUILD_TESTS=OFF \
-	-DEXPAT_BUILD_DOCS=OFF \
-	-DEXPAT_WITH_LIBBSD=OFF \
-	-DEXPAT_ENABLE_INSTALL=ON \
-	-DEXPAT_DTD=ON \
-	-DEXPAT_NS=OFF \
-	-DEXPAT_DEV_URANDOM=OFF
+include $(INCLUDE_DIR)/host-build.mk
+
+HOSTCC := $(HOSTCC_NOCACHE)
+
+HOST_CONFIGURE_ARGS += \
+	--disable-shared \
+	--without-docbook \
+	--with-pic
+
+define Host/Uninstall
+	-$(call Host/Compile/Default,uninstall)
+endef
 
 $(eval $(call HostBuild))
diff --git a/tools/libressl/Makefile b/tools/libressl/Makefile
index bf2bd4e999..0b5175124e 100644
--- a/tools/libressl/Makefile
+++ b/tools/libressl/Makefile
@@ -15,7 +15,7 @@ PKG_RELEASE:=1
 PKG_CPE_ID:=cpe:/a:openbsd:libressl
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
-PKG_SOURCE_URL:=http://mirror.ox.ac.uk/pub/OpenBSD/LibreSSL \
+PKG_SOURCE_URL:=https://mirror.ox.ac.uk/pub/OpenBSD/LibreSSL \
 	http://ftp.jaist.ac.jp/pub/OpenBSD/LibreSSL \
 	https://ftp.openbsd.org/pub/OpenBSD/LibreSSL
 
diff --git a/tools/meson/patches/010-wsl2.patch b/tools/meson/patches/010-wsl2.patch
new file mode 100644
index 0000000000..4ab799d699
--- /dev/null
+++ b/tools/meson/patches/010-wsl2.patch
@@ -0,0 +1,21 @@
+From 7d1ef4343ed5b2b7ab51469177a42c32c47f0528 Mon Sep 17 00:00:00 2001
+From: Rosen Penev <rosenp@gmail.com>
+Date: Tue, 6 Sep 2022 01:36:17 -0700
+Subject: [PATCH] minstall: handle extra error for selinuxenabled
+
+Microsoft's WSL2 uses a Plan 9 filesystem, which returns IOError when file is missing.
+---
+ mesonbuild/minstall.py | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/mesonbuild/minstall.py
++++ b/mesonbuild/minstall.py
+@@ -229,7 +229,7 @@ def restore_selinux_contexts() -> None:
+     '''
+     try:
+         subprocess.check_call(['selinuxenabled'])
+-    except (FileNotFoundError, NotADirectoryError, PermissionError, subprocess.CalledProcessError):
++    except (FileNotFoundError, NotADirectoryError, OSError, PermissionError, subprocess.CalledProcessError):
+         # If we don't have selinux or selinuxenabled returned 1, failure
+         # is ignored quietly.
+         return
diff --git a/tools/zlib/Makefile b/tools/zlib/Makefile
index 58315b8083..974de38154 100644
--- a/tools/zlib/Makefile
+++ b/tools/zlib/Makefile
@@ -20,23 +20,23 @@ PKG_LICENSE:=Zlib
 PKG_LICENSE_FILES:=README
 PKG_CPE_ID:=cpe:/a:gnu:zlib
 
+HOST_BUILD_PARALLEL:=1
+
 include $(INCLUDE_DIR)/host-build.mk
-include $(INCLUDE_DIR)/cmake.mk
 
-HOST_CFLAGS +=-fPIC
+HOSTCC := $(HOSTCC_NOCACHE)
+HOST_CFLAGS += $(HOST_FPIC)
 
-define Host/Install
-	$(CP) $(HOST_BUILD_DIR)/libz.a $(STAGING_DIR_HOST)/lib/
-	$(CP) $(HOST_BUILD_DIR)/zconf.h $(STAGING_DIR_HOST)/include/
-	$(CP) $(HOST_BUILD_DIR)/zlib.h $(STAGING_DIR_HOST)/include/
-	$(CP) $(HOST_BUILD_DIR)/zlib.pc $(STAGING_DIR_HOST)/lib/pkgconfig/
-endef
+HOST_CONFIGURE_ARGS = \
+	--prefix=$(STAGING_DIR_HOST) \
+	--sysconfdir=$(STAGING_DIR_HOST)/etc \
+	--localstatedir=$(STAGING_DIR_HOST)/var \
+	--libdir=$(STAGING_DIR_HOST)/lib \
+	--includedir=$(STAGING_DIR_HOST)/include \
+	--static
 
-define Host/Clean
-	rm -f $(STAGING_DIR_HOST)/lib/libz.a
-	rm -f $(STAGING_DIR_HOST)/include/zconf.h
-	rm -f $(STAGING_DIR_HOST)/include/zlib.h
-	rm -f $(STAGING_DIR_HOST)/lib/pkgconfig//zlib.pc
+define Host/Uninstall
+	-$(call Host/Compile/Default,uninstall)
 endef
 
 $(eval $(call HostBuild))