Merge Official Source
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
commit
a0f924378d
23
package/boot/uboot-envtools/files/octeon
Normal file
23
package/boot/uboot-envtools/files/octeon
Normal file
@ -0,0 +1,23 @@
|
||||
#
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# Copyright (C) 2023 OpenWrt.org
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#
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[ -e /etc/config/ubootenv ] && exit 0
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touch /etc/config/ubootenv
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. /lib/uboot-envtools.sh
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. /lib/functions.sh
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board=$(board_name)
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case "$board" in
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cisco,vedge1000)
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ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000"
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;;
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esac
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config_load ubootenv
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config_foreach ubootenv_add_app_config ubootenv
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exit 0
|
@ -8,9 +8,9 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=ath11k-firmware
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PKG_SOURCE_DATE:=2023-03-31
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PKG_SOURCE_VERSION:=a039049a9349722fa5c74185452ab04644a0d351
|
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PKG_MIRROR_HASH:=ed401e3f6e91d70565b3396139193f7e815f410db93700697205ac8ed1b828c5
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PKG_SOURCE_DATE:=2023-07-06
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PKG_SOURCE_VERSION:=69f6b7346b64784188dba791a9cfb614eefa441f
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PKG_MIRROR_HASH:=0f0203f755cb6713f6a1f41397dcd0f1a24e5cdbe75258af961343b927ebb3e9
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PKG_RELEASE:=1
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PKG_SOURCE_PROTO:=git
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@ -60,14 +60,14 @@ $(eval $(call Download,qcn9074-board))
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define Package/ath11k-firmware-ipq8074/install
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$(INSTALL_DIR) $(1)/lib/firmware/IPQ8074
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$(INSTALL_DATA) \
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$(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \
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$(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \
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$(1)/lib/firmware/IPQ8074/
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endef
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define Package/ath11k-firmware-qcn9074/install
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$(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0
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$(INSTALL_DATA) \
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$(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \
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$(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \
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$(1)/lib/firmware/ath11k/QCN9074/hw1.0/
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$(INSTALL_BIN) \
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$(DL_DIR)/$(QCN9074_BOARD_FILE) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin
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|
@ -13,7 +13,6 @@ if len(argv) != 2:
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json_path = Path(argv[1])
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file_path = Path(getenv("FILE_DIR")) / getenv("FILE_NAME")
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if not file_path.is_file():
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print("Skip JSON creation for non existing file", file_path)
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exit(0)
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@ -37,7 +36,14 @@ def get_titles():
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|
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device_id = getenv("DEVICE_ID")
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hash_file = hashlib.sha256(file_path.read_bytes()).hexdigest()
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|
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sha256_hash = hashlib.sha256()
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with open(str(file_path),"rb") as f:
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# Read and update hash string value in blocks of 4K
|
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for byte_block in iter(lambda: f.read(4096),b""):
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sha256_hash.update(byte_block)
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|
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hash_file = sha256_hash.hexdigest()
|
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|
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if file_path.with_suffix(file_path.suffix + ".sha256sum").exists():
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hash_unsigned = (
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|
@ -127,9 +127,11 @@ _call_info: FORCE
|
||||
echo 'Available Profiles:'
|
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echo; $(PROFILE_LIST)
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|
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BUILD_PACKAGES:=$(USER_PACKAGES) $(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel)
|
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BUILD_PACKAGES:=$(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel)
|
||||
# "-pkgname" in the package list means remove "pkgname" from the package list
|
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BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES))
|
||||
BUILD_PACKAGES:=$(USER_PACKAGES) $(BUILD_PACKAGES)
|
||||
BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES))
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PACKAGES:=
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_call_image: staging_dir/host/.prereq-build
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|
@ -17,6 +17,9 @@ ubnt,edgerouter-4)
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ubnt,edgerouter-6p)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "lan0"
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;;
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cisco,vedge1000)
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ucidef_set_interfaces_lan_wan "mgmt0" "lan0"
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;;
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*)
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ucidef_set_interfaces_lan_wan "eth0" "eth1"
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;;
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|
@ -3,6 +3,15 @@ do_sysinfo_octeon() {
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local name
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machine=$(grep "^system type" /proc/cpuinfo | sed "s/system type.*: \(.*\)/\1/g")
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of_machine=$(head -n1 /sys/firmware/devicetree/base/compatible)
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|
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# Sadly for whatever reason the N821 (Cisco Viptela vEdge 1000) uses the
|
||||
# same supposedly unique board ID as the EdgeRouter. This is bad, so
|
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# we override what cpuinfo gives us using the device tree as a hint.
|
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case "$of_machine" in
|
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"cisco,vedge1000"*)
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return 0
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esac
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case "$machine" in
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"UBNT_E100"*)
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|
@ -65,6 +65,7 @@ CONFIG_EDAC_OCTEON_LMC=y
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CONFIG_EDAC_OCTEON_PC=y
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CONFIG_EDAC_OCTEON_PCI=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_EEPROM_AT24=y
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CONFIG_EXT4_FS=y
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CONFIG_F2FS_FS=y
|
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CONFIG_FAT_FS=y
|
||||
@ -158,6 +159,7 @@ CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
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CONFIG_NR_CPUS=16
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CONFIG_NR_CPUS_DEFAULT_64=y
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CONFIG_NVMEM=y
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CONFIG_NVMEM_SYSFS=y
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CONFIG_OCTEON_ETHERNET=y
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CONFIG_OCTEON_ILM=y
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CONFIG_OCTEON_MGMT_ETHERNET=y
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@ -191,6 +193,8 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y
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CONFIG_QUEUED_RWLOCKS=y
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||||
CONFIG_QUEUED_SPINLOCKS=y
|
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CONFIG_RAS=y
|
||||
CONFIG_REGMAP=y
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CONFIG_REGMAP_I2C=y
|
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CONFIG_RELAY=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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||||
|
@ -0,0 +1,293 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/include/ "octeon_3xxx.dtsi"
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/ {
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compatible = "cisco,vedge1000", "cavium,cn6130";
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model = "Cisco/Viptela vEdge 1000";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&ciu>;
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soc@0 {
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smi0: mdio@1180000001800 {
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mgmtphy: ethernet-phy@0 {
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reg = <0x00>;
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};
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};
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mgmt0: ethernet@1070000100000 {
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compatible = "cavium,octeon-5750-mix";
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reg = <0x10700 0x100000 0x00 0x100>,
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<0x11800 0xe0000000 0x00 0x300>,
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<0x11800 0xe0000400 0x00 0x400>,
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<0x11800 0xe0002000 0x00 0x08>;
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cell-index = <0x00>;
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interrupts = <0x00 0x3e 0x01 0x2e>;
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&mgmtphy>;
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};
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pip: pip@11800a0000000 {
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interface@0 {
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ethernet@0 {
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(3)>;
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label = "lan2";
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/delete-property/ local-mac-address;
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};
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ethernet@1 {
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(4)>;
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label = "lan3";
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/delete-property/ local-mac-address;
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};
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ethernet@2 {
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(1)>;
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label = "lan0";
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/delete-property/ local-mac-address;
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};
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ethernet@3 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x3>;
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||||
nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
|
||||
mac-address-increment = <(2)>;
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label = "lan1";
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};
|
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};
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interface@1 {
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ethernet@0 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x0>;
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(7)>;
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label = "lan6";
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};
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ethernet@1 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x1>;
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nvmem-cells = <&macaddr_eeprom>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(8)>;
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label = "lan7";
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};
|
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ethernet@2 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x2>;
|
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nvmem-cells = <&macaddr_eeprom>;
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||||
nvmem-cell-names = "mac-address";
|
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mac-address-increment = <(5)>;
|
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label = "lan4";
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <0x3>;
|
||||
nvmem-cells = <&macaddr_eeprom>;
|
||||
nvmem-cell-names = "mac-address";
|
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mac-address-increment = <(6)>;
|
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label = "lan5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
twsi0: i2c@1180000001000 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
jc42@18 {
|
||||
compatible = "jedec,jc-42.4-temp";
|
||||
reg = <0x18>;
|
||||
};
|
||||
};
|
||||
|
||||
twsi2: i2c@1180000001200 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-twsi";
|
||||
reg = <0x11800 0x1200 0x00 0x200>;
|
||||
interrupts = <0x00 0x3b>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tmp@4c {
|
||||
compatible = "maxim,max6699";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
rtc@6f {
|
||||
compatible = "microchip,mcp7941x";
|
||||
reg = <0x6f>;
|
||||
};
|
||||
|
||||
tlv-eeprom@54 {
|
||||
compatible = "atmel,24c512";
|
||||
reg = <0x54>;
|
||||
pagesize = <0x80>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom: mac-address@8 {
|
||||
reg = <0x8 6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@1180000000800 {
|
||||
clock-frequency = <600000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
uart1: serial@1180000000c00 {
|
||||
compatible = "cavium,octeon-3860-uart", "ns16550";
|
||||
reg = <0x11800 0xc00 0x00 0x400>;
|
||||
reg-shift = <0x03>;
|
||||
interrupts = <0x00 0x23>;
|
||||
clock-frequency = <600000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
mmc0: mmc@1180000002000 {
|
||||
compatible = "cavium,octeon-6130-mmc";
|
||||
reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <0x01 0x13 0x00 0x3f>;
|
||||
|
||||
mmc-slot@0 {
|
||||
compatible = "cavium,octeon-6130-mmc-slot";
|
||||
reg = <0x00>;
|
||||
voltage-ranges = <0xce4 0xce4>;
|
||||
max-frequency = <0x3197500>;
|
||||
wp-gpios = <&gpio 0x02 0x00>;
|
||||
cd-gpios = <&gpio 0x03 0x01>;
|
||||
cavium,bus-max-width = <0x04>;
|
||||
};
|
||||
};
|
||||
|
||||
bootbus: bootbus@1180000000000 {
|
||||
compatible = "cavium,octeon-3860-bootbus";
|
||||
reg = <0x11800 0x00 0x00 0x200>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x00 0x1ec00000 0x1400000>,
|
||||
<1 0 0x10000 0x20000000 0x00>,
|
||||
<2 0 0x10000 0x30000000 0x00>,
|
||||
<3 0 0x10000 0x40000000 0x00>,
|
||||
<4 0 0x10000 0x50000000 0x00>,
|
||||
<5 0 0x10000 0x60000000 0x00>,
|
||||
<6 0 0x00 0x1e000000 0x10000>,
|
||||
<7 0 0x10000 0x80000000 0x00>;
|
||||
|
||||
cavium,cs-config@0 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <0x00>;
|
||||
cavium,t-adr = <0x0a>;
|
||||
cavium,t-ce = <0x32>;
|
||||
cavium,t-oe = <0x32>;
|
||||
cavium,t-we = <0x23>;
|
||||
cavium,t-rd-hld = <0x19>;
|
||||
cavium,t-wr-hld = <0x23>;
|
||||
cavium,t-pause = <0x00>;
|
||||
cavium,t-wait = <0x12c>;
|
||||
cavium,t-page = <0x19>;
|
||||
cavium,t-rd-dly = <0x00>;
|
||||
cavium,t-ale = <0x03>;
|
||||
cavium,pages = <0x00>;
|
||||
cavium,bus-width = <0x10>;
|
||||
};
|
||||
|
||||
/delete-node/ cavium,cs-config@1;
|
||||
/delete-node/ cavium,cs-config@2;
|
||||
/delete-node/ cavium,cs-config@3;
|
||||
/delete-node/ cavium,cs-config@4;
|
||||
/delete-node/ cavium,cs-config@5;
|
||||
|
||||
cavium,cs-config@6 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <0x06>;
|
||||
cavium,t-adr = <0x0a>;
|
||||
cavium,t-ce = <0x0a>;
|
||||
cavium,t-oe = <0xa0>;
|
||||
cavium,t-we = <0x64>;
|
||||
cavium,t-rd-hld = <0x00>;
|
||||
cavium,t-wr-hld = <0x00>;
|
||||
cavium,t-pause = <0x32>;
|
||||
cavium,t-wait = <0x12c>;
|
||||
cavium,t-page = <0x12c>;
|
||||
cavium,t-rd-dly = <0x0a>;
|
||||
cavium,t-ale = <0x3f>;
|
||||
cavium,pages = <0x00>;
|
||||
cavium,bus-width = <0x08>;
|
||||
/delete-property/ cavium,wait-mode;
|
||||
};
|
||||
|
||||
flash0: nor@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x00 0x00 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00 0x200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@fe0000 {
|
||||
label = "environment";
|
||||
reg = <0xfe0000 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpld: cpld@6,0 {
|
||||
compatible = "cisco,n821-cpld", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg-io-width = <1>; // Syscon uses 4-byte accesses by default
|
||||
|
||||
reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices..
|
||||
ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on
|
||||
};
|
||||
};
|
||||
|
||||
uctl@118006f000000 {
|
||||
compatible = "cavium,octeon-6335-uctl";
|
||||
reg = <0x11800 0x6f000000 0x00 0x100>;
|
||||
ranges;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
refclk-frequency = <0xb71b00>;
|
||||
refclk-type = "crystal";
|
||||
|
||||
ehci@16f0000000000 {
|
||||
compatible = "cavium,octeon-6335-ehci", "usb-ehci";
|
||||
reg = <0x16f00 0x00 0x00 0x100>;
|
||||
interrupts = <0x00 0x38>;
|
||||
big-endian-regs;
|
||||
};
|
||||
|
||||
ohci@16f0000000400 {
|
||||
compatible = "cavium,octeon-6335-ohci", "usb-ohci";
|
||||
reg = <0x16f00 0x400 0x00 0x100>;
|
||||
interrupts = <0x00 0x38>;
|
||||
big-endian-regs;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -19,13 +19,3 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&eeprom {
|
||||
compatible = "nvmem-cells";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
};
|
||||
|
@ -62,12 +62,3 @@
|
||||
};
|
||||
};
|
||||
|
||||
&eeprom {
|
||||
compatible = "nvmem-cells";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
};
|
||||
|
@ -33,12 +33,12 @@
|
||||
|
||||
led_power_blue: power_blue {
|
||||
label = "blue:power";
|
||||
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_power_white: power_white {
|
||||
label = "white:power";
|
||||
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -99,22 +99,36 @@
|
||||
reg = <0>;
|
||||
spi-max-frequency = <25000000>;
|
||||
|
||||
partition@0 {
|
||||
label = "boot0";
|
||||
read-only;
|
||||
reg = <0x000000 0x300000>;
|
||||
};
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@300000 {
|
||||
label = "dummy";
|
||||
read-only;
|
||||
reg = <0x300000 0x100000>;
|
||||
};
|
||||
partition@0 {
|
||||
label = "boot0";
|
||||
read-only;
|
||||
reg = <0x000000 0x300000>;
|
||||
};
|
||||
|
||||
eeprom: partition@400000 {
|
||||
label = "eeprom";
|
||||
read-only;
|
||||
reg = <0x400000 0x10000>;
|
||||
partition@300000 {
|
||||
label = "dummy";
|
||||
read-only;
|
||||
reg = <0x300000 0x100000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
compatible = "nvmem-cells";
|
||||
reg = <0x400000 0x10000>;
|
||||
label = "eeprom";
|
||||
read-only;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -207,12 +221,3 @@
|
||||
};
|
||||
};
|
||||
|
||||
&eeprom {
|
||||
compatible = "nvmem-cells";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
};
|
||||
|
@ -94,4 +94,22 @@ define Device/ubnt_unifi-usg
|
||||
endef
|
||||
TARGET_DEVICES += ubnt_unifi-usg
|
||||
|
||||
define Device/cisco_vedge1000
|
||||
DEVICE_VENDOR := Cisco Viptela
|
||||
DEVICE_MODEL := vEdge 1000
|
||||
BOARD_NAME := cisco,vedge1000
|
||||
DEVICE_PACKAGES += \
|
||||
kmod-hwmon-jc42 \
|
||||
kmod-hwmon-max6697 \
|
||||
kmod-of-mdio \
|
||||
kmod-rtc-ds1307 \
|
||||
kmod-usb-dwc3 \
|
||||
kmod-usb-storage-uas \
|
||||
kmod-usb3
|
||||
KERNEL := kernel-bin | append-dtb-elf
|
||||
KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts)
|
||||
DEVICE_DTS := cn6130_cisco_vedge1000
|
||||
endef
|
||||
TARGET_DEVICES += cisco_vedge1000
|
||||
|
||||
$(eval $(call BuildImage))
|
||||
|
@ -21,6 +21,7 @@ board=$(board_name)
|
||||
board_config_update
|
||||
|
||||
lan_list=$(ls -1 -v -d /sys/class/net/lan* | xargs -n1 basename | xargs)
|
||||
lan_list_rev=$(ls -1 -v -d -r /sys/class/net/lan* | xargs -n1 basename | xargs)
|
||||
ucidef_set_bridge_device switch
|
||||
ucidef_set_interface_lan "$lan_list"
|
||||
|
||||
@ -30,6 +31,7 @@ lan_mac_end=""
|
||||
label_mac=""
|
||||
case $board in
|
||||
hpe,1920-8g|\
|
||||
hpe,1920-8g-poe|\
|
||||
hpe,1920-16g|\
|
||||
hpe,1920-24g)
|
||||
label_mac=$(mtd_get_mac_binary factory 0x68)
|
||||
@ -65,6 +67,9 @@ done
|
||||
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
|
||||
|
||||
case $board in
|
||||
hpe,1920-8g-poe)
|
||||
ucidef_set_poe 180 "$lan_list_rev" "lan9 lan10"
|
||||
;;
|
||||
netgear,gs110tpp-v1)
|
||||
ucidef_set_poe 130 "$lan_list" "lan9 lan10"
|
||||
;;
|
||||
|
16
target/linux/realtek/base-files/etc/board.d/03_gpio_switches
Normal file
16
target/linux/realtek/base-files/etc/board.d/03_gpio_switches
Normal file
@ -0,0 +1,16 @@
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
|
||||
board_config_update
|
||||
|
||||
board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
hpe,1920-8g-poe)
|
||||
ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
|
||||
;;
|
||||
esac
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
12
target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts
Normal file
12
target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g-poe.dts
Normal file
@ -0,0 +1,12 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "rtl8380_hpe_1920-8g.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "hpe,1920-8g-poe", "realtek,rtl838x-soc";
|
||||
model = "HPE 1920-8G-PoE+ (JG922A)";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
@ -1,115 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "rtl838x.dtsi"
|
||||
#include "rtl838x_hpe_1920.dtsi"
|
||||
#include "rtl8380_hpe_1920-8g.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "hpe,1920-8g", "realtek,rtl838x-soc";
|
||||
model = "HPE 1920-8G (JG920A)";
|
||||
|
||||
gpio1: rtl8231-gpio {
|
||||
compatible = "realtek,rtl8231-gpio";
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
indirect-access-bus-id = <0>;
|
||||
};
|
||||
|
||||
i2c0: i2c-gpio-0 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
sfp0: sfp-0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
||||
// tx-fault and tx-disable unconnected
|
||||
};
|
||||
|
||||
i2c1: i2c-gpio-1 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
sfp1: sfp-1 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c1>;
|
||||
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
// tx-fault and tx-disable unconnected
|
||||
};
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
mdio: mdio-bus {
|
||||
compatible = "realtek,rtl838x-mdio";
|
||||
regmap = <ðernet0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
INTERNAL_PHY(8)
|
||||
INTERNAL_PHY(9)
|
||||
INTERNAL_PHY(10)
|
||||
INTERNAL_PHY(11)
|
||||
INTERNAL_PHY(12)
|
||||
INTERNAL_PHY(13)
|
||||
INTERNAL_PHY(14)
|
||||
INTERNAL_PHY(15)
|
||||
|
||||
INTERNAL_PHY(24)
|
||||
INTERNAL_PHY(26)
|
||||
};
|
||||
};
|
||||
|
||||
&switch0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
SWITCH_PORT(8, 1, internal)
|
||||
SWITCH_PORT(9, 2, internal)
|
||||
SWITCH_PORT(10, 3, internal)
|
||||
SWITCH_PORT(11, 4, internal)
|
||||
SWITCH_PORT(12, 5, internal)
|
||||
SWITCH_PORT(13, 6, internal)
|
||||
SWITCH_PORT(14, 7, internal)
|
||||
SWITCH_PORT(15, 8, internal)
|
||||
|
||||
port@24 {
|
||||
reg = <24>;
|
||||
label = "lan9";
|
||||
phy-handle = <&phy24>;
|
||||
phy-mode = "1000base-x";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp0>;
|
||||
};
|
||||
|
||||
port@26 {
|
||||
reg = <26>;
|
||||
label = "lan10";
|
||||
phy-handle = <&phy26>;
|
||||
phy-mode = "1000base-x";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp1>;
|
||||
};
|
||||
|
||||
port@28 {
|
||||
ethernet = <ðernet0>;
|
||||
reg = <28>;
|
||||
phy-mode = "internal";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
112
target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi
Normal file
112
target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dtsi
Normal file
@ -0,0 +1,112 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "rtl838x.dtsi"
|
||||
#include "rtl838x_hpe_1920.dtsi"
|
||||
|
||||
/ {
|
||||
gpio1: rtl8231-gpio {
|
||||
compatible = "realtek,rtl8231-gpio";
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
indirect-access-bus-id = <0>;
|
||||
};
|
||||
|
||||
i2c0: i2c-gpio-0 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
sfp0: sfp-0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
||||
// tx-fault and tx-disable unconnected
|
||||
};
|
||||
|
||||
i2c1: i2c-gpio-1 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
sfp1: sfp-1 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c1>;
|
||||
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
|
||||
// tx-fault and tx-disable unconnected
|
||||
};
|
||||
};
|
||||
|
||||
ðernet0 {
|
||||
mdio: mdio-bus {
|
||||
compatible = "realtek,rtl838x-mdio";
|
||||
regmap = <ðernet0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
INTERNAL_PHY(8)
|
||||
INTERNAL_PHY(9)
|
||||
INTERNAL_PHY(10)
|
||||
INTERNAL_PHY(11)
|
||||
INTERNAL_PHY(12)
|
||||
INTERNAL_PHY(13)
|
||||
INTERNAL_PHY(14)
|
||||
INTERNAL_PHY(15)
|
||||
|
||||
INTERNAL_PHY(24)
|
||||
INTERNAL_PHY(26)
|
||||
};
|
||||
};
|
||||
|
||||
&switch0 {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
SWITCH_PORT(8, 1, internal)
|
||||
SWITCH_PORT(9, 2, internal)
|
||||
SWITCH_PORT(10, 3, internal)
|
||||
SWITCH_PORT(11, 4, internal)
|
||||
SWITCH_PORT(12, 5, internal)
|
||||
SWITCH_PORT(13, 6, internal)
|
||||
SWITCH_PORT(14, 7, internal)
|
||||
SWITCH_PORT(15, 8, internal)
|
||||
|
||||
port@24 {
|
||||
reg = <24>;
|
||||
label = "lan9";
|
||||
phy-handle = <&phy24>;
|
||||
phy-mode = "1000base-x";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp0>;
|
||||
};
|
||||
|
||||
port@26 {
|
||||
reg = <26>;
|
||||
label = "lan10";
|
||||
phy-handle = <&phy26>;
|
||||
phy-mode = "1000base-x";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp1>;
|
||||
};
|
||||
|
||||
port@28 {
|
||||
ethernet = <ðernet0>;
|
||||
reg = <28>;
|
||||
phy-mode = "internal";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -99,6 +99,14 @@ define Device/hpe_1920-8g
|
||||
endef
|
||||
TARGET_DEVICES += hpe_1920-8g
|
||||
|
||||
define Device/hpe_1920-8g-poe
|
||||
$(Device/hpe_1920)
|
||||
SOC := rtl8380
|
||||
DEVICE_MODEL := 1920-8G-PoE+ (JG922A)
|
||||
H3C_DEVICE_ID := 0x00010025
|
||||
endef
|
||||
TARGET_DEVICES += hpe_1920-8g-poe
|
||||
|
||||
define Device/hpe_1920-16g
|
||||
$(Device/hpe_1920)
|
||||
SOC := rtl8382
|
||||
|
@ -145,7 +145,7 @@ $(BIN_DIR)/$(SDK_NAME).tar.xz: clean
|
||||
./files/Config.in \
|
||||
./files/Makefile \
|
||||
./files/include/prepare.mk \
|
||||
./files/README.SDK \
|
||||
./files/README.md \
|
||||
$(SDK_BUILD_DIR)/
|
||||
mkdir -p $(SDK_BUILD_DIR)/package/kernel
|
||||
$(CP) \
|
||||
|
Loading…
x
Reference in New Issue
Block a user