From 00f8c86624a7d61010a7455e882fa3221187bd87 Mon Sep 17 00:00:00 2001 From: Sean Khan Date: Tue, 26 Mar 2024 19:40:21 -0400 Subject: [PATCH 01/31] qca-ssdk: rework make to allow parallel building The current build procedure always wipes away build files, this is costly as ssdk is a parent dependency on a whole host of packages and will always end up rebuilding (and in serial) the whole package. This patch includes: 1. Module Building Optimization: Instead of creating a temporary directory (temp) and copying files into it for module building, the directly invoke the module build command with the necessary paths. This simplifies the build process and avoids unnecessary file operations, speeding up the build process and reducing disk usage. 2. Parallel Build Support: By removing the explicit creation of the temporary directory and associated file copying operations, and passing in $(MAKE) $(PKG_JOBS) allows building in parallel. 3. Fix `EXTRA_CFLAGS`: This variable is referenced and set within MAKE_FLAGS, so doesn't preserve spaces. Should have its defined value quoted. Signed-off-by: Sean Khan --- package/kernel/qca-ssdk/Makefile | 12 +++-- .../patches/200-allow-parallel-build.patch | 50 +++++++++++++++++++ 2 files changed, 59 insertions(+), 3 deletions(-) create mode 100644 package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch diff --git a/package/kernel/qca-ssdk/Makefile b/package/kernel/qca-ssdk/Makefile index cd81aeb61c..8d49ec9e3b 100644 --- a/package/kernel/qca-ssdk/Makefile +++ b/package/kernel/qca-ssdk/Makefile @@ -10,6 +10,7 @@ PKG_SOURCE_VERSION:=23a5aa4a4d5834da7a07efb58baebfbee91786b0 PKG_MIRROR_HASH:=2310cdad1ebc424c534aa3a2c71e72e0ab3635295653a88d17dfc64c402cd151 PKG_FLAGS:=nonshared +PKG_BUILD_PARALLEL:=1 PKG_BUILD_FLAGS:=no-lto include $(INCLUDE_DIR)/kernel.mk @@ -21,7 +22,7 @@ define KernelPackage/qca-ssdk SUBMENU:=Network Devices TITLE:=Qualcom SSDK switch driver DEPENDS:=@(TARGET_qualcommax) - FILES:=$(PKG_BUILD_DIR)/build/bin/qca-ssdk.ko + FILES:=$(PKG_BUILD_DIR)/qca-ssdk.ko AUTOLOAD:=$(call AutoLoad,30,qca-ssdk) endef @@ -31,7 +32,7 @@ endef GCC_VERSION=$(shell echo "$(CONFIG_GCC_VERSION)" | sed 's/[^0-9.]*\([0-9.]*\).*/\1/') -LNX_CONFIG_OPTS = LNX_MAKEOPTS='$(KERNEL_MAKEOPTS)' MODULE_TYPE=KSLIB modules +LNX_CONFIG_OPTS = LNX_MAKEOPTS='$(KERNEL_MAKEOPTS)' PRJ_PATH=$(PKG_BUILD_DIR) MODULE_TYPE=KSLIB modules MAKE_FLAGS+= \ TARGET_NAME=$(CONFIG_TARGET_NAME) \ @@ -42,7 +43,7 @@ MAKE_FLAGS+= \ ARCH=$(LINUX_KARCH) \ TARGET_SUFFIX=$(CONFIG_TARGET_SUFFIX) \ GCC_VERSION=$(GCC_VERSION) \ - EXTRA_CFLAGS=-fno-stack-protector -I$(STAGING_DIR)/usr/include \ + EXTRA_CFLAGS="-fno-stack-protector -I$(STAGING_DIR)/usr/include" \ SoC=$(CONFIG_TARGET_SUBTARGET) \ PTP_FEATURE=disable SWCONFIG_FEATURE=disable \ ISISC_ENABLE=disable IN_QCA803X_PHY=FALSE \ @@ -57,6 +58,11 @@ ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq60xx") MAKE_FLAGS+= CHIP_TYPE=CPPE endif + +define Build/Compile + +$(MAKE) $(PKG_JOBS) $(MAKE_FLAGS) -C $(PKG_BUILD_DIR) $(LNX_CONFIG_OPTS) +endef + define Build/InstallDev $(INSTALL_DIR) $(1)/usr/include/qca-ssdk $(INSTALL_DIR) $(1)/usr/include/qca-ssdk/api diff --git a/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch b/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch new file mode 100644 index 0000000000..5635c2fdcf --- /dev/null +++ b/package/kernel/qca-ssdk/patches/200-allow-parallel-build.patch @@ -0,0 +1,50 @@ +--- a/Makefile ++++ b/Makefile +@@ -1,17 +1,19 @@ +-include ./config +- + ifndef PRJ_PATH + PRJ_PATH=$(shell pwd) + endif + export PRJ_PATH + +-include ./make/config.mk +-include ./make/tools.mk +-include ./make/$(OS)_opt.mk ++include $(PRJ_PATH)/config ++ ++include $(PRJ_PATH)/make/config.mk ++include $(PRJ_PATH)/make/tools.mk ++include $(PRJ_PATH)/make/$(OS)_opt.mk + + SUB_DIR=$(patsubst %/, %, $(dir $(wildcard src/*/Makefile))) + SUB_LIB=$(subst src/, , $(SUB_DIR)) + ++include $(PRJ_PATH)/Makefile.modules ++ + #################################################################### + # SSDK-Style Makefile + #################################################################### +@@ -27,11 +29,7 @@ all: $(BIN_DIR) kslib + # LNX Modules-Style Makefile + #################################################################### + modules: $(BIN_DIR) kslib_c +- mkdir -p ./temp/;cp * ./temp -a;cd ./temp;cp ../Makefile.modules ./Makefile; +- make -C $(SYS_PATH) M=$(PRJ_PATH)/temp $(LNX_MAKEOPTS) modules +- cp $(PRJ_PATH)/temp/Module.symvers $(PRJ_PATH)/Module.symvers; +- cp temp/*.ko build/bin; +- rm -Rf ./temp/*.o ./temp/*.ko ./temp/*.a ++ @$(MAKE) -C $(SYS_PATH) M=$(PRJ_PATH) $(LNX_MAKEOPTS) modules + @echo "---Build [SSDK-$(VERSION)] at $(BUILD_DATE) finished." + + kslib_c: +--- a/make/linux_opt.mk ++++ b/make/linux_opt.mk +@@ -777,6 +777,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M + #################################################################### + # cflags for LNX Modules-Style Makefile + #################################################################### +-LNX_LOCAL_CFLAGS += $(MODULE_INC) $(MODULE_CFLAG) ${EXTRA_INC} -DFALLTHROUGH ++LNX_LOCAL_CFLAGS = $(MODULE_INC) $(MODULE_CFLAG) ${EXTRA_INC} -DFALLTHROUGH + export LNX_LOCAL_CFLAGS + From 5aa63c2b85ee3e0d0e6ede58ef5a6dc68de02393 Mon Sep 17 00:00:00 2001 From: Mieczyslaw Nalewaj Date: Mon, 1 Apr 2024 10:44:17 +0200 Subject: [PATCH 02/31] generic: 6.1: refresh backport patches Refresh backport patches for kernel 6.1.82 with make target/linux/refresh. Fixes: 06cdc07f8cc7 ("ath79: add support for Huawei AP5030DN") Signed-off-by: Mieczyslaw Nalewaj --- .../734-v6.8-net-phy-bcm54612e-add-suspend-resume.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/generic/backport-6.1/734-v6.8-net-phy-bcm54612e-add-suspend-resume.patch b/target/linux/generic/backport-6.1/734-v6.8-net-phy-bcm54612e-add-suspend-resume.patch index 8d88d46955..64d1b160d3 100644 --- a/target/linux/generic/backport-6.1/734-v6.8-net-phy-bcm54612e-add-suspend-resume.patch +++ b/target/linux/generic/backport-6.1/734-v6.8-net-phy-bcm54612e-add-suspend-resume.patch @@ -16,7 +16,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c -@@ -941,6 +941,8 @@ static struct phy_driver broadcom_driver +@@ -942,6 +942,8 @@ static struct phy_driver broadcom_driver .config_intr = bcm_phy_config_intr, .handle_interrupt = bcm_phy_handle_interrupt, .link_change_notify = bcm54xx_link_change_notify, From 3e3e1b8bab94d5eb162604d4c198b426761598d7 Mon Sep 17 00:00:00 2001 From: Gentry Deng Date: Sun, 31 Mar 2024 21:42:12 +0800 Subject: [PATCH 03/31] README: replace "MacOSX" with "macOS" In October 2018, the last version of the operating system named "Mac OS X" ended its life cycle. It's time to change it to "macOS". Signed-off-by: Gentry Deng --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 8bca0ee7b0..9141b2392d 100644 --- a/README.md +++ b/README.md @@ -31,7 +31,7 @@ An advanced user may require additional or specific package. (Toolchain, SDK, .. ## Development -To build your own firmware you need a GNU/Linux, BSD or MacOSX system (case +To build your own firmware you need a GNU/Linux, BSD or macOS system (case sensitive filesystem required). Cygwin is unsupported because of the lack of a case sensitive file system. From a0962e8c0435c5511059206c40dbab9dc522767c Mon Sep 17 00:00:00 2001 From: Sean Khan Date: Sun, 31 Mar 2024 22:03:22 -0400 Subject: [PATCH 04/31] qca-nss-dp: cp instead of symlink for `nss_dp_arch.h` Build files shouldn't be symlinked into the staging directory, as doing so would create a race condition if the build folder for 'qca-nss-dp' gets deleted for any reason. We should instead just copy over the required platform file to avoid breaking compilation for any dependent packages. Signed-off-by: Sean Khan --- package/kernel/qca-nss-dp/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/kernel/qca-nss-dp/Makefile b/package/kernel/qca-nss-dp/Makefile index e17446d236..167a9af4e4 100644 --- a/package/kernel/qca-nss-dp/Makefile +++ b/package/kernel/qca-nss-dp/Makefile @@ -39,7 +39,7 @@ EXTRA_CFLAGS+= \ NSS_DP_HAL_DIR:=$(PKG_BUILD_DIR)/hal define Build/Configure - $(LN) $(NSS_DP_HAL_DIR)/soc_ops/$(CONFIG_TARGET_SUBTARGET)/nss_$(CONFIG_TARGET_SUBTARGET).h \ + $(CP) $(NSS_DP_HAL_DIR)/soc_ops/$(CONFIG_TARGET_SUBTARGET)/nss_$(CONFIG_TARGET_SUBTARGET).h \ $(PKG_BUILD_DIR)/exports/nss_dp_arch.h endef From 7236d4f82b57680d76a52abc934130cb02cc913c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Mon, 1 Apr 2024 23:59:03 +0200 Subject: [PATCH 05/31] mt76: add mt7603 possible workaround for MT7603EN / MT7628AN stability MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add debugfs entry for disabling frames buffering that may be a reason for mt7603 instability. This patch was sent upstream for review and at least wasn't rejected yet. Let's add it to let OpenWrt users test if it really helps. Example usage: echo N > /sys/kernel/debug/ieee80211/phy0/mt76/frames_buffering Signed-off-by: Rafał Miłecki --- package/kernel/mt76/Makefile | 2 +- ...-add-debugfs-attr-for-disabling-fram.patch | 81 +++++++++++++++++++ 2 files changed, 82 insertions(+), 1 deletion(-) create mode 100644 package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index 61491063e9..c44ed4d1da 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mt76 -PKG_RELEASE=1 +PKG_RELEASE=2 PKG_LICENSE:=GPLv2 PKG_LICENSE_FILES:= diff --git a/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch b/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch new file mode 100644 index 0000000000..7d2b7eccbf --- /dev/null +++ b/package/kernel/mt76/patches/101-wifi-mt76-mt7603-add-debugfs-attr-for-disabling-fram.patch @@ -0,0 +1,81 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 25 Mar 2024 18:54:02 +0100 +Subject: [PATCH] wifi: mt76: mt7603: add debugfs attr for disabling frames + buffering +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +MT7603EN and MT7628AN were reported by multiple users to be unstable +under high traffic. Transmission of packets could stop for seconds often +leading to disconnections. + +Long research & debugging revelaed a close relation between MCU +interrupts of type PKT_TYPE_TXS and slowdowns / stalls. That led to +questioning frames buffering feature. + +It turns out that disabling SKBs loopback code makes mt7603 devices much +more stable under load. There are still some traffic hiccups but those +happen like once every an hour and end up in recovery in most cases. + +Add a debugfs option for disabling frames buffering so users can give it +a try. If this solution yields a success we can make this feature +disabled by default. + +This change was successfully tested using 2 GHz AP interface on: +1. Netgear R6220 - MT7621ST (SoC) + MT7603EN (WiFi) + MT7612EN (WiFi) +2. Xiaomi Mi Router 4C - MT7628AN (Wi-Fi SoC) + +Link: https://lore.kernel.org/linux-wireless/7c96d5ee-86c1-8068-1b58-40db6087a24f@gmail.com/ +Closes: https://github.com/openwrt/mt76/issues/865 +Fixes: c8846e101502 ("mt76: add driver for MT7603E and MT7628/7688") +Signed-off-by: Rafał Miłecki +--- + mt7603/debugfs.c | 2 ++ + mt7603/dma.c | 3 +++ + mt7603/init.c | 1 + + mt7603/mt7603.h | 2 ++ + 4 files changed, 8 insertions(+) + +--- a/mt7603/debugfs.c ++++ b/mt7603/debugfs.c +@@ -115,4 +115,6 @@ void mt7603_init_debugfs(struct mt7603_d + &dev->sensitivity_limit); + debugfs_create_bool("dynamic_sensitivity", 0600, dir, + &dev->dynamic_sensitivity); ++ debugfs_create_bool("frames_buffering", 0600, dir, ++ &dev->frames_buffering); + } +--- a/mt7603/dma.c ++++ b/mt7603/dma.c +@@ -27,6 +27,9 @@ mt7603_rx_loopback_skb(struct mt7603_dev + u32 val; + u8 tid = 0; + ++ if (!dev->frames_buffering) ++ goto free; ++ + if (skb->len < MT_TXD_SIZE + sizeof(struct ieee80211_hdr)) + goto free; + +--- a/mt7603/init.c ++++ b/mt7603/init.c +@@ -517,6 +517,7 @@ int mt7603_register_device(struct mt7603 + dev->slottime = 9; + dev->sensitivity_limit = 28; + dev->dynamic_sensitivity = true; ++ dev->frames_buffering = true; + + ret = mt7603_init_hardware(dev); + if (ret) +--- a/mt7603/mt7603.h ++++ b/mt7603/mt7603.h +@@ -155,6 +155,8 @@ struct mt7603_dev { + u32 reset_test; + + unsigned int reset_cause[__RESET_CAUSE_MAX]; ++ ++ bool frames_buffering; + }; + + extern const struct mt76_driver_ops mt7603_drv_ops; From 631014d9b097b533920d3dbf120218ab735716cc Mon Sep 17 00:00:00 2001 From: Georgi Valkov Date: Sat, 30 Mar 2024 22:10:27 +0200 Subject: [PATCH 06/31] toolchain/gcc: fix build errors on macOS with Xcode 15.3 /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/usr/include/c++/v1/__locale:550:5: error: '__abi_tag__' attribute only applies to structs, variables, functions, and namespaces _LIBCPP_INLINE_VISIBILITY ^ /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/usr/include/c++/v1/__config:891:37: note: expanded from macro '_LIBCPP_INLINE_VISIBILITY' # define _LIBCPP_INLINE_VISIBILITY _LIBCPP_HIDE_FROM_ABI ^ /Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/usr/include/c++/v1/__config:870:26: note: expanded from macro '_LIBCPP_HIDE_FROM_ABI' __attribute__((__abi_tag__(_LIBCPP_TOSTRING(_LIBCPP_ODR_SIGNATURE)))) Fixed using backport of upstream commits [1-2] as discussed here https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111632#c21 [1] Include safe-ctype.h after C++ standard headers, to avoid over-poisoning https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=9970b576b7e4ae337af1268395ff221348c4b34a [2] libcc1: fix include https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5213047b1d50af63dfabb5e5649821a6cb157e33 Signed-off-by: Georgi Valkov --- ...pe.h-after-C-standard-headers-to-avo.patch | 139 ++++++++++++++++++ ...pe.h-after-C-standard-headers-to-avo.patch | 139 ++++++++++++++++++ .../021-libcc1-fix-vector-include.patch | 65 ++++++++ ...pe.h-after-C-standard-headers-to-avo.patch | 139 ++++++++++++++++++ .../021-libcc1-fix-vector-include.patch | 65 ++++++++ 5 files changed, 547 insertions(+) create mode 100644 toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch create mode 100644 toolchain/gcc/patches-12.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch create mode 100644 toolchain/gcc/patches-12.x/021-libcc1-fix-vector-include.patch create mode 100644 toolchain/gcc/patches-13.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch create mode 100644 toolchain/gcc/patches-13.x/021-libcc1-fix-vector-include.patch diff --git a/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch b/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch new file mode 100644 index 0000000000..a17c56b272 --- /dev/null +++ b/toolchain/gcc/patches-11.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch @@ -0,0 +1,139 @@ +From 9970b576b7e4ae337af1268395ff221348c4b34a Mon Sep 17 00:00:00 2001 +From: Francois-Xavier Coudert +Date: Thu, 7 Mar 2024 14:36:03 +0100 +Subject: [PATCH] Include safe-ctype.h after C++ standard headers, to avoid + over-poisoning + +When building gcc's C++ sources against recent libc++, the poisoning of +the ctype macros due to including safe-ctype.h before including C++ +standard headers such as , , etc, causes many compilation +errors, similar to: + + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:546:5: error: '__abi_tag__' attribute + only applies to structs, variables, functions, and namespaces + 546 | _LIBCPP_INLINE_VISIBILITY + | ^ + /usr/include/c++/v1/__config:813:37: note: expanded from macro + '_LIBCPP_INLINE_VISIBILITY' + 813 | # define _LIBCPP_INLINE_VISIBILITY _LIBCPP_HIDE_FROM_ABI + | ^ + /usr/include/c++/v1/__config:792:26: note: expanded from macro + '_LIBCPP_HIDE_FROM_ABI' + 792 | + __attribute__((__abi_tag__(_LIBCPP_TOSTRING( + _LIBCPP_VERSIONED_IDENTIFIER)))) + | ^ + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:547:37: error: expected ';' at end of + declaration list + 547 | char_type toupper(char_type __c) const + | ^ + /usr/include/c++/v1/__locale:553:48: error: too many arguments + provided to function-like macro invocation + 553 | const char_type* toupper(char_type* __low, const + char_type* __high) const + | ^ + /home/dim/src/gcc/master/gcc/../include/safe-ctype.h:146:9: note: + macro 'toupper' defined here + 146 | #define toupper(c) do_not_use_toupper_with_safe_ctype + | ^ + +This is because libc++ uses different transitive includes than +libstdc++, and some of those transitive includes pull in various ctype +declarations (typically via ). + +There was already a special case for including before +safe-ctype.h, so move the rest of the C++ standard header includes to +the same location, to fix the problem. + +gcc/ChangeLog: + + * system.h: Include safe-ctype.h after C++ standard headers. + +Signed-off-by: Dimitry Andric +--- + gcc/system.h | 39 ++++++++++++++++++--------------------- + 1 file changed, 18 insertions(+), 21 deletions(-) + +diff --git a/gcc/system.h b/gcc/system.h +index b0edab02885..ab29fc19776 100644 +--- a/gcc/system.h ++++ b/gcc/system.h +@@ -194,27 +194,8 @@ extern int fprintf_unlocked (FILE *, const char *, ...); + #undef fread_unlocked + #undef fwrite_unlocked + +-/* Include before "safe-ctype.h" to avoid GCC poisoning +- the ctype macros through safe-ctype.h */ +- +-#ifdef __cplusplus +-#ifdef INCLUDE_STRING +-# include +-#endif +-#endif +- +-/* There are an extraordinary number of issues with . +- The last straw is that it varies with the locale. Use libiberty's +- replacement instead. */ +-#include "safe-ctype.h" +- +-#include +- +-#include +- +-#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO +-extern int errno; +-#endif ++/* Include C++ standard headers before "safe-ctype.h" to avoid GCC ++ poisoning the ctype macros through safe-ctype.h */ + + #ifdef __cplusplus + #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY) +@@ -229,6 +210,9 @@ extern int errno; + #ifdef INCLUDE_SET + # include + #endif ++#ifdef INCLUDE_STRING ++# include ++#endif + #ifdef INCLUDE_VECTOR + # include + #endif +@@ -244,6 +228,19 @@ extern int errno; + # include + #endif + ++/* There are an extraordinary number of issues with . ++ The last straw is that it varies with the locale. Use libiberty's ++ replacement instead. */ ++#include "safe-ctype.h" ++ ++#include ++ ++#include ++ ++#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO ++extern int errno; ++#endif ++ + /* Some of glibc's string inlines cause warnings. Plus we'd rather + rely on (and therefore test) GCC's string builtins. */ + #define __NO_STRING_INLINES +-- +2.39.3 + diff --git a/toolchain/gcc/patches-12.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch b/toolchain/gcc/patches-12.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch new file mode 100644 index 0000000000..986d19057f --- /dev/null +++ b/toolchain/gcc/patches-12.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch @@ -0,0 +1,139 @@ +From 9970b576b7e4ae337af1268395ff221348c4b34a Mon Sep 17 00:00:00 2001 +From: Francois-Xavier Coudert +Date: Thu, 7 Mar 2024 14:36:03 +0100 +Subject: [PATCH] Include safe-ctype.h after C++ standard headers, to avoid + over-poisoning + +When building gcc's C++ sources against recent libc++, the poisoning of +the ctype macros due to including safe-ctype.h before including C++ +standard headers such as , , etc, causes many compilation +errors, similar to: + + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:546:5: error: '__abi_tag__' attribute + only applies to structs, variables, functions, and namespaces + 546 | _LIBCPP_INLINE_VISIBILITY + | ^ + /usr/include/c++/v1/__config:813:37: note: expanded from macro + '_LIBCPP_INLINE_VISIBILITY' + 813 | # define _LIBCPP_INLINE_VISIBILITY _LIBCPP_HIDE_FROM_ABI + | ^ + /usr/include/c++/v1/__config:792:26: note: expanded from macro + '_LIBCPP_HIDE_FROM_ABI' + 792 | + __attribute__((__abi_tag__(_LIBCPP_TOSTRING( + _LIBCPP_VERSIONED_IDENTIFIER)))) + | ^ + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:547:37: error: expected ';' at end of + declaration list + 547 | char_type toupper(char_type __c) const + | ^ + /usr/include/c++/v1/__locale:553:48: error: too many arguments + provided to function-like macro invocation + 553 | const char_type* toupper(char_type* __low, const + char_type* __high) const + | ^ + /home/dim/src/gcc/master/gcc/../include/safe-ctype.h:146:9: note: + macro 'toupper' defined here + 146 | #define toupper(c) do_not_use_toupper_with_safe_ctype + | ^ + +This is because libc++ uses different transitive includes than +libstdc++, and some of those transitive includes pull in various ctype +declarations (typically via ). + +There was already a special case for including before +safe-ctype.h, so move the rest of the C++ standard header includes to +the same location, to fix the problem. + +gcc/ChangeLog: + + * system.h: Include safe-ctype.h after C++ standard headers. + +Signed-off-by: Dimitry Andric +--- + gcc/system.h | 39 ++++++++++++++++++--------------------- + 1 file changed, 18 insertions(+), 21 deletions(-) + +diff --git a/gcc/system.h b/gcc/system.h +index b0edab02885..ab29fc19776 100644 +--- a/gcc/system.h ++++ b/gcc/system.h +@@ -194,27 +194,8 @@ extern int fprintf_unlocked (FILE *, const char *, ...); + #undef fread_unlocked + #undef fwrite_unlocked + +-/* Include before "safe-ctype.h" to avoid GCC poisoning +- the ctype macros through safe-ctype.h */ +- +-#ifdef __cplusplus +-#ifdef INCLUDE_STRING +-# include +-#endif +-#endif +- +-/* There are an extraordinary number of issues with . +- The last straw is that it varies with the locale. Use libiberty's +- replacement instead. */ +-#include "safe-ctype.h" +- +-#include +- +-#include +- +-#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO +-extern int errno; +-#endif ++/* Include C++ standard headers before "safe-ctype.h" to avoid GCC ++ poisoning the ctype macros through safe-ctype.h */ + + #ifdef __cplusplus + #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY) +@@ -229,6 +210,9 @@ extern int errno; + #ifdef INCLUDE_SET + # include + #endif ++#ifdef INCLUDE_STRING ++# include ++#endif + #ifdef INCLUDE_VECTOR + # include + #endif +@@ -245,6 +229,19 @@ extern int errno; + # include + #endif + ++/* There are an extraordinary number of issues with . ++ The last straw is that it varies with the locale. Use libiberty's ++ replacement instead. */ ++#include "safe-ctype.h" ++ ++#include ++ ++#include ++ ++#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO ++extern int errno; ++#endif ++ + /* Some of glibc's string inlines cause warnings. Plus we'd rather + rely on (and therefore test) GCC's string builtins. */ + #define __NO_STRING_INLINES +-- +2.39.3 + diff --git a/toolchain/gcc/patches-12.x/021-libcc1-fix-vector-include.patch b/toolchain/gcc/patches-12.x/021-libcc1-fix-vector-include.patch new file mode 100644 index 0000000000..b6b15cd1c6 --- /dev/null +++ b/toolchain/gcc/patches-12.x/021-libcc1-fix-vector-include.patch @@ -0,0 +1,65 @@ +From 5213047b1d50af63dfabb5e5649821a6cb157e33 Mon Sep 17 00:00:00 2001 +From: Francois-Xavier Coudert +Date: Sat, 16 Mar 2024 09:50:00 +0100 +Subject: [PATCH] libcc1: fix include + +Use INCLUDE_VECTOR before including system.h, instead of directly +including , to avoid running into poisoned identifiers. + +Signed-off-by: Dimitry Andric + +libcc1/ChangeLog: + + PR middle-end/111632 + * libcc1plugin.cc: Fix include. + * libcp1plugin.cc: Fix include. +--- + libcc1/libcc1plugin.cc | 3 +-- + libcc1/libcp1plugin.cc | 3 +-- + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/libcc1/libcc1plugin.cc b/libcc1/libcc1plugin.cc +index 72d17c3b81c..e64847466f4 100644 +--- a/libcc1/libcc1plugin.cc ++++ b/libcc1/libcc1plugin.cc +@@ -32,6 +32,7 @@ + #undef PACKAGE_VERSION + + #define INCLUDE_MEMORY ++#define INCLUDE_VECTOR + #include "gcc-plugin.h" + #include "system.h" + #include "coretypes.h" +@@ -69,8 +70,6 @@ + #include "gcc-c-interface.h" + #include "context.hh" + +-#include +- + using namespace cc1_plugin; + + +diff --git a/libcc1/libcp1plugin.cc b/libcc1/libcp1plugin.cc +index 0eff7c68d29..da68c5d0ac1 100644 +--- a/libcc1/libcp1plugin.cc ++++ b/libcc1/libcp1plugin.cc +@@ -33,6 +33,7 @@ + #undef PACKAGE_VERSION + + #define INCLUDE_MEMORY ++#define INCLUDE_VECTOR + #include "gcc-plugin.h" + #include "system.h" + #include "coretypes.h" +@@ -71,8 +72,6 @@ + #include "rpc.hh" + #include "context.hh" + +-#include +- + using namespace cc1_plugin; + + +-- +2.39.3 + diff --git a/toolchain/gcc/patches-13.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch b/toolchain/gcc/patches-13.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch new file mode 100644 index 0000000000..986d19057f --- /dev/null +++ b/toolchain/gcc/patches-13.x/020-Include-safe-ctype.h-after-C-standard-headers-to-avo.patch @@ -0,0 +1,139 @@ +From 9970b576b7e4ae337af1268395ff221348c4b34a Mon Sep 17 00:00:00 2001 +From: Francois-Xavier Coudert +Date: Thu, 7 Mar 2024 14:36:03 +0100 +Subject: [PATCH] Include safe-ctype.h after C++ standard headers, to avoid + over-poisoning + +When building gcc's C++ sources against recent libc++, the poisoning of +the ctype macros due to including safe-ctype.h before including C++ +standard headers such as , , etc, causes many compilation +errors, similar to: + + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:546:5: error: '__abi_tag__' attribute + only applies to structs, variables, functions, and namespaces + 546 | _LIBCPP_INLINE_VISIBILITY + | ^ + /usr/include/c++/v1/__config:813:37: note: expanded from macro + '_LIBCPP_INLINE_VISIBILITY' + 813 | # define _LIBCPP_INLINE_VISIBILITY _LIBCPP_HIDE_FROM_ABI + | ^ + /usr/include/c++/v1/__config:792:26: note: expanded from macro + '_LIBCPP_HIDE_FROM_ABI' + 792 | + __attribute__((__abi_tag__(_LIBCPP_TOSTRING( + _LIBCPP_VERSIONED_IDENTIFIER)))) + | ^ + In file included from /home/dim/src/gcc/master/gcc/gensupport.cc:23: + In file included from /home/dim/src/gcc/master/gcc/system.h:233: + In file included from /usr/include/c++/v1/vector:321: + In file included from + /usr/include/c++/v1/__format/formatter_bool.h:20: + In file included from + /usr/include/c++/v1/__format/formatter_integral.h:32: + In file included from /usr/include/c++/v1/locale:202: + /usr/include/c++/v1/__locale:547:37: error: expected ';' at end of + declaration list + 547 | char_type toupper(char_type __c) const + | ^ + /usr/include/c++/v1/__locale:553:48: error: too many arguments + provided to function-like macro invocation + 553 | const char_type* toupper(char_type* __low, const + char_type* __high) const + | ^ + /home/dim/src/gcc/master/gcc/../include/safe-ctype.h:146:9: note: + macro 'toupper' defined here + 146 | #define toupper(c) do_not_use_toupper_with_safe_ctype + | ^ + +This is because libc++ uses different transitive includes than +libstdc++, and some of those transitive includes pull in various ctype +declarations (typically via ). + +There was already a special case for including before +safe-ctype.h, so move the rest of the C++ standard header includes to +the same location, to fix the problem. + +gcc/ChangeLog: + + * system.h: Include safe-ctype.h after C++ standard headers. + +Signed-off-by: Dimitry Andric +--- + gcc/system.h | 39 ++++++++++++++++++--------------------- + 1 file changed, 18 insertions(+), 21 deletions(-) + +diff --git a/gcc/system.h b/gcc/system.h +index b0edab02885..ab29fc19776 100644 +--- a/gcc/system.h ++++ b/gcc/system.h +@@ -194,27 +194,8 @@ extern int fprintf_unlocked (FILE *, const char *, ...); + #undef fread_unlocked + #undef fwrite_unlocked + +-/* Include before "safe-ctype.h" to avoid GCC poisoning +- the ctype macros through safe-ctype.h */ +- +-#ifdef __cplusplus +-#ifdef INCLUDE_STRING +-# include +-#endif +-#endif +- +-/* There are an extraordinary number of issues with . +- The last straw is that it varies with the locale. Use libiberty's +- replacement instead. */ +-#include "safe-ctype.h" +- +-#include +- +-#include +- +-#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO +-extern int errno; +-#endif ++/* Include C++ standard headers before "safe-ctype.h" to avoid GCC ++ poisoning the ctype macros through safe-ctype.h */ + + #ifdef __cplusplus + #if defined (INCLUDE_ALGORITHM) || !defined (HAVE_SWAP_IN_UTILITY) +@@ -229,6 +210,9 @@ extern int errno; + #ifdef INCLUDE_SET + # include + #endif ++#ifdef INCLUDE_STRING ++# include ++#endif + #ifdef INCLUDE_VECTOR + # include + #endif +@@ -245,6 +229,19 @@ extern int errno; + # include + #endif + ++/* There are an extraordinary number of issues with . ++ The last straw is that it varies with the locale. Use libiberty's ++ replacement instead. */ ++#include "safe-ctype.h" ++ ++#include ++ ++#include ++ ++#if !defined (errno) && defined (HAVE_DECL_ERRNO) && !HAVE_DECL_ERRNO ++extern int errno; ++#endif ++ + /* Some of glibc's string inlines cause warnings. Plus we'd rather + rely on (and therefore test) GCC's string builtins. */ + #define __NO_STRING_INLINES +-- +2.39.3 + diff --git a/toolchain/gcc/patches-13.x/021-libcc1-fix-vector-include.patch b/toolchain/gcc/patches-13.x/021-libcc1-fix-vector-include.patch new file mode 100644 index 0000000000..b6b15cd1c6 --- /dev/null +++ b/toolchain/gcc/patches-13.x/021-libcc1-fix-vector-include.patch @@ -0,0 +1,65 @@ +From 5213047b1d50af63dfabb5e5649821a6cb157e33 Mon Sep 17 00:00:00 2001 +From: Francois-Xavier Coudert +Date: Sat, 16 Mar 2024 09:50:00 +0100 +Subject: [PATCH] libcc1: fix include + +Use INCLUDE_VECTOR before including system.h, instead of directly +including , to avoid running into poisoned identifiers. + +Signed-off-by: Dimitry Andric + +libcc1/ChangeLog: + + PR middle-end/111632 + * libcc1plugin.cc: Fix include. + * libcp1plugin.cc: Fix include. +--- + libcc1/libcc1plugin.cc | 3 +-- + libcc1/libcp1plugin.cc | 3 +-- + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/libcc1/libcc1plugin.cc b/libcc1/libcc1plugin.cc +index 72d17c3b81c..e64847466f4 100644 +--- a/libcc1/libcc1plugin.cc ++++ b/libcc1/libcc1plugin.cc +@@ -32,6 +32,7 @@ + #undef PACKAGE_VERSION + + #define INCLUDE_MEMORY ++#define INCLUDE_VECTOR + #include "gcc-plugin.h" + #include "system.h" + #include "coretypes.h" +@@ -69,8 +70,6 @@ + #include "gcc-c-interface.h" + #include "context.hh" + +-#include +- + using namespace cc1_plugin; + + +diff --git a/libcc1/libcp1plugin.cc b/libcc1/libcp1plugin.cc +index 0eff7c68d29..da68c5d0ac1 100644 +--- a/libcc1/libcp1plugin.cc ++++ b/libcc1/libcp1plugin.cc +@@ -33,6 +33,7 @@ + #undef PACKAGE_VERSION + + #define INCLUDE_MEMORY ++#define INCLUDE_VECTOR + #include "gcc-plugin.h" + #include "system.h" + #include "coretypes.h" +@@ -71,8 +72,6 @@ + #include "rpc.hh" + #include "context.hh" + +-#include +- + using namespace cc1_plugin; + + +-- +2.39.3 + From 004c8530193891f451b92095e26f09345fc308ec Mon Sep 17 00:00:00 2001 From: Paul Spooren Date: Tue, 2 Apr 2024 13:18:50 +0200 Subject: [PATCH 07/31] zstd: update to 1.5.6 Full changelog here: https://github.com/facebook/zstd/releases/tag/v1.5.6 Signed-off-by: Paul Spooren --- tools/zstd/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/zstd/Makefile b/tools/zstd/Makefile index 4d46a5f950..41dd70b7a9 100644 --- a/tools/zstd/Makefile +++ b/tools/zstd/Makefile @@ -1,11 +1,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=zstd -PKG_VERSION:=1.5.5 +PKG_VERSION:=1.5.6 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://github.com/facebook/zstd/releases/download/v$(PKG_VERSION) -PKG_HASH:=9c4396cc829cfae319a6e2615202e82aad41372073482fce286fac78646d3ee4 +PKG_HASH:=8c29e06cf42aacc1eafc4077ae2ec6c6fcb96a626157e0593d5e82a34fd403c1 PKG_LICENSE:=BSD-3-Clause PKG_LICENSE_FILES:=LICENSE From d1eb0bec390a3bb77c3b3f5f792469a780578bbf Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 2 Apr 2024 10:27:21 +0200 Subject: [PATCH 08/31] procd: update to Git HEAD (2024-03-30) 254810d16cf1 watchdog: always close fd on watchdog stop 946552a7b598 trace: use standard POSIX header for basename() Signed-off-by: Robert Marko --- package/system/procd/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile index 662b03f2f0..af16724999 100644 --- a/package/system/procd/Makefile +++ b/package/system/procd/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git -PKG_MIRROR_HASH:=b324cca5b9870c73f3b1c21547ca061acef6e7acb2488244c2f5be129d3a2e6c -PKG_SOURCE_DATE:=2024-03-25 -PKG_SOURCE_VERSION:=ca8c30208d5e1aaa2c0e3f732c4c9944735e9850 +PKG_MIRROR_HASH:=2ba058d25c7489e9d38d674878087aa5d36ffd9fe4f83bee6c88e2a0c340c757 +PKG_SOURCE_DATE:=2024-03-30 +PKG_SOURCE_VERSION:=946552a7b598a0b88db6101e864679554ec4f221 CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 From 108374a65616a1623999eb4f50e0bf5b8c8e4206 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 2 Apr 2024 21:41:59 +0200 Subject: [PATCH 09/31] toolchain: binutils: backport patch to fix mipsel_24kc_24kf Backport patch to fix mipsel_24kc_24kf. Patch has been merged in binutils master and these are straight backports with minor rework. Signed-off-by: Christian Marangi --- ...call-elf_backend_size_dynamic_sectio.patch | 2172 ++++++++++++++++ ...te-_bfd_mips_elf_early_size_sections.patch | 218 ++ ...call-elf_backend_size_dynamic_sectio.patch | 2172 ++++++++++++++++ ...te-_bfd_mips_elf_early_size_sections.patch | 218 ++ ...rch-ld-Fix-relocation-error-of-pcrel.patch | 2 +- ...call-elf_backend_size_dynamic_sectio.patch | 2172 ++++++++++++++++ ...te-_bfd_mips_elf_early_size_sections.patch | 218 ++ ...call-elf_backend_size_dynamic_sectio.patch | 2172 ++++++++++++++++ ...te-_bfd_mips_elf_early_size_sections.patch | 218 ++ ...call-elf_backend_size_dynamic_sectio.patch | 2228 +++++++++++++++++ ...te-_bfd_mips_elf_early_size_sections.patch | 218 ++ 11 files changed, 12007 insertions(+), 1 deletion(-) create mode 100644 toolchain/binutils/patches/2.38/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch create mode 100644 toolchain/binutils/patches/2.38/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch create mode 100644 toolchain/binutils/patches/2.39/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch create mode 100644 toolchain/binutils/patches/2.39/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch create mode 100644 toolchain/binutils/patches/2.40/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch create mode 100644 toolchain/binutils/patches/2.40/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch create mode 100644 toolchain/binutils/patches/2.41/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch create mode 100644 toolchain/binutils/patches/2.41/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch create mode 100644 toolchain/binutils/patches/2.42/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch create mode 100644 toolchain/binutils/patches/2.42/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch diff --git a/toolchain/binutils/patches/2.38/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch b/toolchain/binutils/patches/2.38/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch new file mode 100644 index 0000000000..94488c3290 --- /dev/null +++ b/toolchain/binutils/patches/2.38/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch @@ -0,0 +1,2172 @@ +From af969b14aedcc0ae27dcefab4327ff2d153dec8b Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 19:25:42 +1030 +Subject: [PATCH 1/2] PR 30569, always call elf_backend_size_dynamic_sections + +This largely mechanical patch is preparation for a followup patch. + +For quite some time I've thought that it would be useful to call +elf_backend_size_dynamic_sections even when no dynamic objects are +seen by the linker. That's what this patch does, with some renaming. +There are no functional changes to the linker, just a move of the +dynobj test in bfd_elf_size_dynamic_sections to target backend +functions, replacing the asserts/aborts already there. No doubt some +of the current always_size_sections functions could be moved to +size_dynamic_sections but I haven't made that change. + +Because both hooks are now always called, I have renamed +always_size_sections to early_size_sections and size_dynamic_sections +to late_size_sections. I condisdered calling late_size_sections plain +size_sections, since this is the usual target dynamic section sizing +hook, but decided that searching the sources for "size_sections" would +then hit early_size_sections and other functions. +--- + bfd/elf-bfd.h | 35 +++++++++++++++++------------------ + bfd/elf-m10300.c | 11 ++++++----- + bfd/elf32-arc.c | 9 +++++---- + bfd/elf32-arm.c | 15 ++++++++------- + bfd/elf32-bfin.c | 31 ++++++++++++++++--------------- + bfd/elf32-cr16.c | 11 ++++++----- + bfd/elf32-cris.c | 13 +++++++------ + bfd/elf32-csky.c | 8 ++++---- + bfd/elf32-frv.c | 23 ++++++++++++----------- + bfd/elf32-hppa.c | 8 ++++---- + bfd/elf32-i386.c | 7 +++---- + bfd/elf32-lm32.c | 15 ++++++++------- + bfd/elf32-m32c.c | 8 ++++---- + bfd/elf32-m32r.c | 11 ++++++----- + bfd/elf32-m68k.c | 16 ++++++++-------- + bfd/elf32-metag.c | 8 ++++---- + bfd/elf32-microblaze.c | 9 +++++---- + bfd/elf32-mips.c | 6 ++---- + bfd/elf32-nds32.c | 9 +++++---- + bfd/elf32-nios2.c | 15 ++++++++------- + bfd/elf32-or1k.c | 9 +++++---- + bfd/elf32-ppc.c | 11 ++++++----- + bfd/elf32-rl78.c | 8 ++++---- + bfd/elf32-s390.c | 10 +++++----- + bfd/elf32-score.c | 35 ++++++++++++++++++----------------- + bfd/elf32-score.h | 4 ++-- + bfd/elf32-score7.c | 13 +++++++------ + bfd/elf32-sh.c | 15 +++++++-------- + bfd/elf32-sparc.c | 3 +-- + bfd/elf32-tic6x.c | 14 +++++++------- + bfd/elf32-tilegx.c | 2 +- + bfd/elf32-tilepro.c | 11 +++++------ + bfd/elf32-vax.c | 16 +++++++--------- + bfd/elf32-xstormy16.c | 8 ++++---- + bfd/elf32-xtensa.c | 13 ++++++------- + bfd/elf64-alpha.c | 19 ++++++++++--------- + bfd/elf64-hppa.c | 11 ++++------- + bfd/elf64-ia64-vms.c | 13 +++++++------ + bfd/elf64-mips.c | 8 ++++---- + bfd/elf64-ppc.c | 12 ++++++------ + bfd/elf64-s390.c | 10 +++++----- + bfd/elf64-sparc.c | 4 ++-- + bfd/elf64-tilegx.c | 2 +- + bfd/elf64-x86-64.c | 7 +++---- + bfd/elflink.c | 9 ++++----- + bfd/elfn32-mips.c | 6 ++---- + bfd/elfnn-aarch64.c | 21 +++++++++++---------- + bfd/elfnn-ia64.c | 11 ++++++----- + bfd/elfnn-kvx.c | 19 +++++++++---------- + bfd/elfnn-loongarch.c | 9 +++++---- + bfd/elfnn-riscv.c | 7 ++++--- + bfd/elfxx-mips.c | 15 ++++++++------- + bfd/elfxx-mips.h | 4 ++-- + bfd/elfxx-sparc.c | 7 ++++--- + bfd/elfxx-sparc.h | 2 +- + bfd/elfxx-target.h | 12 ++++++------ + bfd/elfxx-tilegx.c | 7 ++++--- + bfd/elfxx-tilegx.h | 2 +- + bfd/elfxx-x86.c | 8 ++++---- + bfd/elfxx-x86.h | 8 ++++---- + ld/emultempl/vms.em | 7 +++---- + 61 files changed, 343 insertions(+), 337 deletions(-) + +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1135,7 +1135,7 @@ struct elf_backend_data + /* The ADJUST_DYNAMIC_SYMBOL function is called by the ELF backend + linker for every symbol which is defined by a dynamic object and + referenced by a regular object. This is called after all the +- input files have been seen, but before the SIZE_DYNAMIC_SECTIONS ++ input files have been seen, but before the LATE_SIZE_SECTIONS + function has been called. The hash table entry should be + bfd_link_hash_defined ore bfd_link_hash_defweak, and it should be + defined in a section from a dynamic object. Dynamic object +@@ -1147,24 +1147,23 @@ struct elf_backend_data + bool (*elf_backend_adjust_dynamic_symbol) + (struct bfd_link_info *info, struct elf_link_hash_entry *h); + +- /* The ALWAYS_SIZE_SECTIONS function is called by the backend linker +- after all the linker input files have been seen but before the +- section sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL, but before SIZE_DYNAMIC_SECTIONS. */ +- bool (*elf_backend_always_size_sections) ++ /* The EARLY_SIZE_SECTIONS and LATE_SIZE_SECTIONS functions are ++ called by the backend linker after all linker input files have ++ been seen and sections have been assigned to output sections, but ++ before the section sizes have been set. Both of these functions ++ are called even when no dynamic object is seen by the linker. ++ Between them, they must set the sizes of the dynamic sections and ++ other backend specific sections, and may fill in their contents. ++ Most backends need only use LATE_SIZE_SECTIONS. ++ EARLY_SIZE_SECTIONS is called before --export-dynamic makes some ++ symbols dynamic and before ADJUST_DYNAMIC_SYMBOL processes ++ dynamic symbols, LATE_SIZE_SECTIONS afterwards. The generic ELF ++ linker can handle the .dynsym, .dynstr and .hash sections. ++ Besides those, these functions must handle the .interp section ++ and any other sections created by CREATE_DYNAMIC_SECTIONS. */ ++ bool (*elf_backend_early_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); +- +- /* The SIZE_DYNAMIC_SECTIONS function is called by the ELF backend +- linker after all the linker input files have been seen but before +- the sections sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL has been called on all appropriate symbols. +- It is only called when linking against a dynamic object. It must +- set the sizes of the dynamic sections, and may fill in their +- contents as well. The generic ELF linker can handle the .dynsym, +- .dynstr and .hash sections. This function must handle the +- .interp section and any sections created by the +- CREATE_DYNAMIC_SECTIONS entry point. */ +- bool (*elf_backend_size_dynamic_sections) ++ bool (*elf_backend_late_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); + + /* The STRIP_ZERO_SIZED_DYNAMIC_SECTIONS function is called by the +--- a/bfd/elf-m10300.c ++++ b/bfd/elf-m10300.c +@@ -5003,8 +5003,8 @@ _bfd_mn10300_elf_adjust_dynamic_symbol ( + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_mn10300_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_mn10300_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + struct elf32_mn10300_link_hash_table *htab = elf32_mn10300_hash_table (info); + bfd * dynobj; +@@ -5012,7 +5012,8 @@ _bfd_mn10300_elf_size_dynamic_sections ( + bool relocs; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5499,8 +5500,8 @@ mn10300_elf_mkobject (bfd *abfd) + _bfd_mn10300_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mn10300_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_mn10300_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mn10300_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_mn10300_elf_finish_dynamic_symbol +--- a/bfd/elf32-arc.c ++++ b/bfd/elf32-arc.c +@@ -2702,8 +2702,8 @@ elf_arc_finish_dynamic_sections (bfd * o + + /* Set the sizes of the dynamic sections. */ + static bool +-elf_arc_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_arc_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2711,7 +2711,8 @@ elf_arc_size_dynamic_sections (bfd *outp + struct elf_link_hash_table *htab = elf_hash_table (info); + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3126,7 +3127,7 @@ arc_elf_relax_section (bfd *abfd, asecti + #define elf_backend_finish_dynamic_symbol elf_arc_finish_dynamic_symbol + + #define elf_backend_finish_dynamic_sections elf_arc_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_arc_size_dynamic_sections ++#define elf_backend_late_size_sections elf_arc_late_size_sections + + #define elf_backend_can_gc_sections 1 + #define elf_backend_want_got_plt 1 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -16709,8 +16709,8 @@ bfd_elf32_arm_set_byteswap_code (struct + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info * info) ++elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; +@@ -16723,7 +16723,9 @@ elf32_arm_size_dynamic_sections (bfd * o + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; ++ + check_use_blx (htab); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -17095,8 +17097,7 @@ elf32_arm_size_dynamic_sections (bfd * o + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elf32_arm_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + struct elf32_arm_link_hash_table *htab; +@@ -20263,8 +20264,8 @@ elf32_arm_backend_symbol_processing (bfd + #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections +-#define elf_backend_always_size_sections elf32_arm_always_size_sections ++#define elf_backend_late_size_sections elf32_arm_late_size_sections ++#define elf_backend_early_size_sections elf32_arm_early_size_sections + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_init_file_header elf32_arm_init_file_header + #define elf_backend_reloc_type_class elf32_arm_reloc_type_class +--- a/bfd/elf32-bfin.c ++++ b/bfd/elf32-bfin.c +@@ -4031,8 +4031,8 @@ _bfinfdpic_size_got_plt (bfd *output_bfd + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_bfinfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -4041,7 +4041,8 @@ elf32_bfinfdpic_size_dynamic_sections (b + + htab = elf_hash_table (info); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -4090,7 +4091,7 @@ elf32_bfinfdpic_size_dynamic_sections (b + } + + static bool +-elf32_bfinfdpic_always_size_sections (bfd *output_bfd, ++elf32_bfinfdpic_early_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) +@@ -5128,15 +5129,16 @@ bfin_discard_copies (struct elf_link_has + } + + static bool +-bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++bfin_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5428,8 +5430,7 @@ struct bfd_elf_special_section const elf + #define elf_backend_check_relocs bfin_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + bfin_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- bfin_size_dynamic_sections ++#define elf_backend_late_size_sections bfin_late_size_sections + #define elf_backend_relocate_section bfin_relocate_section + #define elf_backend_finish_dynamic_symbol \ + bfin_finish_dynamic_symbol +@@ -5475,9 +5476,9 @@ struct bfd_elf_special_section const elf + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + bfinfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_bfinfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_bfinfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -5485,9 +5486,9 @@ struct bfd_elf_special_section const elf + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_bfinfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_bfinfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_bfinfdpic_late_size_sections + #undef elf_backend_finish_dynamic_symbol + #define elf_backend_finish_dynamic_symbol \ + elf32_bfinfdpic_finish_dynamic_symbol +--- a/bfd/elf32-cr16.c ++++ b/bfd/elf32-cr16.c +@@ -2381,15 +2381,16 @@ _bfd_cr16_elf_adjust_dynamic_symbol (str + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_cr16_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -2826,8 +2827,8 @@ _bfd_cr16_elf_reloc_type_class (const st + _bfd_cr16_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_cr16_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_cr16_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_cr16_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_cr16_elf_finish_dynamic_symbol +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2527,7 +2527,7 @@ cris_elf_plt_sym_val (bfd_vma i ATTRIBUT + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_cris_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_cris_size_dynamic_sections if no dynamic sections will be ++ or elf_cris_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static bool +@@ -3508,8 +3508,8 @@ cris_elf_check_relocs (bfd *abfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_cris_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_cris_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_cris_link_hash_table * htab; + bfd *dynobj; +@@ -3521,7 +3521,8 @@ elf_cris_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4090,8 +4091,8 @@ elf_cris_got_elt_size (bfd *abfd ATTRIBU + elf_cris_adjust_dynamic_symbol + #define elf_backend_copy_indirect_symbol \ + elf_cris_copy_indirect_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_cris_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf_cris_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_finish_dynamic_symbol \ + elf_cris_finish_dynamic_symbol +--- a/bfd/elf32-csky.c ++++ b/bfd/elf32-csky.c +@@ -1893,8 +1893,8 @@ csky_allocate_dynrelocs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++csky_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct csky_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1907,7 +1907,7 @@ csky_elf_size_dynamic_sections (bfd *out + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- return false; ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5344,7 +5344,7 @@ elf32_csky_obj_attrs_handle_unknown (bfd + /* Dynamic relocate related API. */ + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol csky_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections csky_elf_size_dynamic_sections ++#define elf_backend_late_size_sections csky_elf_late_size_sections + #define elf_backend_finish_dynamic_symbol csky_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections csky_elf_finish_dynamic_sections + #define elf_backend_rela_normal 1 +--- a/bfd/elf32-frv.c ++++ b/bfd/elf32-frv.c +@@ -5423,15 +5423,16 @@ _frvfdpic_size_got_plt (bfd *output_bfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_frvfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + struct _frvfdpic_dynamic_got_plt_info gpinfo; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5472,8 +5473,8 @@ elf32_frvfdpic_size_dynamic_sections (bf + } + + static bool +-elf32_frvfdpic_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -6817,9 +6818,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + frvfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_frvfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_frvfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -6827,9 +6828,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_frvfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_frvfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_frvfdpic_late_size_sections + #undef bfd_elf32_bfd_relax_section + #define bfd_elf32_bfd_relax_section \ + elf32_frvfdpic_relax_section +--- a/bfd/elf32-hppa.c ++++ b/bfd/elf32-hppa.c +@@ -2042,8 +2042,8 @@ clobber_millicode_symbols (struct elf_li + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_hppa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf32_hppa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_hppa_link_hash_table *htab; + bfd *dynobj; +@@ -2057,7 +2057,7 @@ elf32_hppa_size_dynamic_sections (bfd *o + + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4450,7 +4450,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Inte + #define elf_backend_hide_symbol elf32_hppa_hide_symbol + #define elf_backend_finish_dynamic_symbol elf32_hppa_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_hppa_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf32_hppa_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_gc_mark_hook elf32_hppa_gc_mark_hook + #define elf_backend_grok_prstatus elf32_hppa_grok_prstatus +--- a/bfd/elf32-i386.c ++++ b/bfd/elf32-i386.c +@@ -1905,8 +1905,7 @@ elf_i386_scan_relocs (bfd *abfd, + } + + static bool +-elf_i386_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_i386_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -1919,7 +1918,7 @@ elf_i386_always_size_sections (bfd *outp + elf_i386_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Set the correct type for an x86 ELF section. We do this by the +@@ -4412,7 +4411,7 @@ elf_i386_link_setup_gnu_properties (stru + #define bfd_elf32_get_synthetic_symtab elf_i386_get_synthetic_symtab + + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible +-#define elf_backend_always_size_sections elf_i386_always_size_sections ++#define elf_backend_early_size_sections elf_i386_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_fake_sections elf_i386_fake_sections + #define elf_backend_finish_dynamic_sections elf_i386_finish_dynamic_sections +--- a/bfd/elf32-lm32.c ++++ b/bfd/elf32-lm32.c +@@ -1906,8 +1906,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-lm32_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++lm32_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_lm32_link_hash_table *htab; + bfd *dynobj; +@@ -1920,7 +1920,8 @@ lm32_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -2309,7 +2310,7 @@ lm32_elf_create_dynamic_sections (bfd *a + } + + static bool +-lm32_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++lm32_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info)) + { +@@ -2395,7 +2396,7 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #define bfd_elf32_bfd_link_hash_table_create lm32_elf_link_hash_table_create + #define elf_backend_check_relocs lm32_elf_check_relocs + #define elf_backend_reloc_type_class lm32_elf_reloc_type_class +-#define elf_backend_size_dynamic_sections lm32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections lm32_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections lm32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections lm32_elf_finish_dynamic_sections +@@ -2416,8 +2417,8 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #undef elf32_bed + #define elf32_bed elf32_lm32fdpic_bed + +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections lm32_elf_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections lm32_elf_early_size_sections + #undef bfd_elf32_bfd_copy_private_bfd_data + #define bfd_elf32_bfd_copy_private_bfd_data lm32_elf_fdpic_copy_private_bfd_data + +--- a/bfd/elf32-m32c.c ++++ b/bfd/elf32-m32c.c +@@ -773,8 +773,8 @@ m32c_elf_finish_dynamic_sections (bfd *a + } + + static bool +-m32c_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32c_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2131,8 +2131,8 @@ _bfd_m32c_elf_eh_frame_address_size (bfd + #define elf_backend_check_relocs m32c_elf_check_relocs + #define elf_backend_object_p m32c_elf_object_p + #define elf_symbol_leading_char ('_') +-#define elf_backend_always_size_sections \ +- m32c_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ m32c_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + m32c_elf_finish_dynamic_sections + +--- a/bfd/elf32-m32r.c ++++ b/bfd/elf32-m32r.c +@@ -1958,8 +1958,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32r_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -1968,7 +1968,7 @@ m32r_elf_size_dynamic_sections (bfd *out + bfd *ibfd; + + #ifdef DEBUG_PIC +- printf ("m32r_elf_size_dynamic_sections()\n"); ++ printf ("m32r_elf_late_size_sections()\n"); + #endif + + htab = m32r_elf_hash_table (info); +@@ -1976,7 +1976,8 @@ m32r_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3658,7 +3659,7 @@ m32r_elf_reloc_type_class (const struct + + #define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections + #define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +-#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections ++#define elf_backend_late_size_sections m32r_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2934,7 +2934,7 @@ elf_m68k_get_plt_info (bfd *output_bfd) + It's a convenient place to determine the PLT style. */ + + static bool +-elf_m68k_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_m68k_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + /* Bind input BFDs to GOTs and calculate sizes of .got and .rela.got + sections. */ +@@ -3107,15 +3107,16 @@ elf_m68k_adjust_dynamic_symbol (struct b + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_m68k_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_m68k_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -4628,12 +4629,11 @@ elf_m68k_grok_psinfo (bfd *abfd, Elf_Int + #define bfd_elf32_bfd_final_link bfd_elf_final_link + + #define elf_backend_check_relocs elf_m68k_check_relocs +-#define elf_backend_always_size_sections \ +- elf_m68k_always_size_sections ++#define elf_backend_early_size_sections \ ++ elf_m68k_early_size_sections + #define elf_backend_adjust_dynamic_symbol \ + elf_m68k_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_m68k_size_dynamic_sections ++#define elf_backend_late_size_sections elf_m68k_late_size_sections + #define elf_backend_final_write_processing elf_m68k_final_write_processing + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_m68k_relocate_section +--- a/bfd/elf32-metag.c ++++ b/bfd/elf32-metag.c +@@ -2717,8 +2717,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_metag_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_metag_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_metag_link_hash_table *htab; + bfd *dynobj; +@@ -2729,7 +2729,7 @@ elf_metag_size_dynamic_sections (bfd *ou + htab = metag_link_hash_table (info); + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4019,7 +4019,7 @@ elf_metag_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol elf_metag_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol elf_metag_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf_metag_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_metag_size_dynamic_sections ++#define elf_backend_late_size_sections elf_metag_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_init_file_header elf_metag_init_file_header +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2901,8 +2901,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++microblaze_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_mb_link_hash_table *htab; + bfd *dynobj; +@@ -2914,7 +2914,8 @@ microblaze_elf_size_dynamic_sections (bf + return false; + + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3431,7 +3432,7 @@ microblaze_elf_add_symbol_hook (bfd *abf + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_late_size_sections microblaze_elf_late_size_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + + #include "elf32-target.h" +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2526,10 +2526,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-nds32.c ++++ b/bfd/elf32-nds32.c +@@ -4248,8 +4248,8 @@ elf32_nds32_add_dynreloc (bfd *output_bf + /* Set the sizes of the dynamic sections. */ + + static bool +-nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_nds32_link_hash_table *htab; + bfd *dynobj; +@@ -4262,7 +4262,8 @@ nds32_elf_size_dynamic_sections (bfd *ou + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -13930,7 +13931,7 @@ nds32_elf_unify_tls_model (bfd *inbfd, a + #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections nds32_elf_late_size_sections + #define elf_backend_relocate_section nds32_elf_relocate_section + #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook + #define elf_backend_grok_prstatus nds32_elf_grok_prstatus +--- a/bfd/elf32-nios2.c ++++ b/bfd/elf32-nios2.c +@@ -5411,7 +5411,7 @@ nios2_elf32_adjust_dynamic_symbol (struc + return true; + } + +-/* Worker function for nios2_elf32_size_dynamic_sections. */ ++/* Worker function for nios2_elf32_late_size_sections. */ + static bool + adjust_dynrelocs (struct elf_link_hash_entry *h, PTR inf) + { +@@ -5438,7 +5438,7 @@ adjust_dynrelocs (struct elf_link_hash_e + return true; + } + +-/* Another worker function for nios2_elf32_size_dynamic_sections. ++/* Another worker function for nios2_elf32_late_size_sections. + Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + static bool +@@ -5673,11 +5673,11 @@ allocate_dynrelocs (struct elf_link_hash + return true; + } + +-/* Implement elf_backend_size_dynamic_sections: ++/* Implement elf_backend_late_size_sections: + Set the sizes of the dynamic sections. */ + static bool +-nios2_elf32_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nios2_elf32_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -5687,7 +5687,8 @@ nios2_elf32_size_dynamic_sections (bfd * + + htab = elf32_nios2_hash_table (info); + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + htab->res_n_size = 0; + if (htab->root.dynamic_sections_created) +@@ -6058,7 +6059,7 @@ const struct bfd_elf_special_section elf + nios2_elf32_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol nios2_elf32_adjust_dynamic_symbol + #define elf_backend_reloc_type_class nios2_elf32_reloc_type_class +-#define elf_backend_size_dynamic_sections nios2_elf32_size_dynamic_sections ++#define elf_backend_late_size_sections nios2_elf32_late_size_sections + #define elf_backend_add_symbol_hook nios2_elf_add_symbol_hook + #define elf_backend_copy_indirect_symbol nios2_elf32_copy_indirect_symbol + #define elf_backend_object_p nios2_elf32_object_p +--- a/bfd/elf32-or1k.c ++++ b/bfd/elf32-or1k.c +@@ -3023,8 +3023,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-or1k_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++or1k_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_or1k_link_hash_table *htab; + bfd *dynobj; +@@ -3037,7 +3037,8 @@ or1k_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -3390,7 +3391,7 @@ or1k_grok_psinfo (bfd *abfd, Elf_Interna + #define elf_backend_copy_indirect_symbol or1k_elf_copy_indirect_symbol + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections or1k_elf_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections or1k_elf_size_dynamic_sections ++#define elf_backend_late_size_sections or1k_elf_late_size_sections + #define elf_backend_adjust_dynamic_symbol or1k_elf_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol or1k_elf_finish_dynamic_symbol + +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -5497,8 +5497,8 @@ static const unsigned char glink_eh_fram + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_elf_link_hash_table *htab; + asection *s; +@@ -5506,11 +5506,12 @@ ppc_elf_size_dynamic_sections (bfd *outp + bfd *ibfd; + + #ifdef DEBUG +- fprintf (stderr, "ppc_elf_size_dynamic_sections called\n"); ++ fprintf (stderr, "ppc_elf_late_size_sections called\n"); + #endif + + htab = ppc_elf_hash_table (info); +- BFD_ASSERT (htab->elf.dynobj != NULL); ++ if (htab->elf.dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -10410,7 +10411,7 @@ ppc_elf_finish_dynamic_sections (bfd *ou + #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol + #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol + #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook +-#define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections ppc_elf_late_size_sections + #define elf_backend_hash_symbol ppc_elf_hash_symbol + #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections +--- a/bfd/elf32-rl78.c ++++ b/bfd/elf32-rl78.c +@@ -1440,8 +1440,8 @@ rl78_elf_finish_dynamic_sections (bfd *a + } + + static bool +-rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++rl78_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2609,8 +2609,8 @@ rl78_elf_relax_section (bfd *abfd, + + #define bfd_elf32_bfd_relax_section rl78_elf_relax_section + #define elf_backend_check_relocs rl78_elf_check_relocs +-#define elf_backend_always_size_sections \ +- rl78_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ rl78_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + rl78_elf_finish_dynamic_sections + +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -1366,7 +1366,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1778,8 +1778,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1790,7 +1790,7 @@ elf_s390_size_dynamic_sections (bfd *out + htab = elf_s390_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3926,7 +3926,7 @@ elf32_s390_merge_private_bfd_data (bfd * + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf32-score.c ++++ b/bfd/elf32-score.c +@@ -1089,7 +1089,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s3_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s3_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + static bool + score_elf_sort_hash_table (struct bfd_link_info *info, +@@ -3160,8 +3160,8 @@ s3_bfd_score_elf_adjust_dynamic_symbol ( + /* This function is called after all the input files have been read, + and the input sections have been assigned to output sections. */ + static bool +-s3_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s3_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3237,14 +3237,15 @@ s3_bfd_score_elf_always_size_sections (b + + /* Set the sizes of the dynamic sections. */ + static bool +-s3_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s3_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3313,7 +3314,7 @@ s3_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s3_bfd_score_elf_always_size_sections() has already done ++ /* s3_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +@@ -4177,22 +4178,22 @@ _bfd_score_elf_adjust_dynamic_symbol (st + } + + static bool +-_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s3_bfd_score_elf_early_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s7_bfd_score_elf_early_size_sections (output_bfd, info); + } + + static bool +-_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s3_bfd_score_elf_late_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s7_bfd_score_elf_late_size_sections (output_bfd, info); + } + + static bool +@@ -4455,10 +4456,10 @@ _bfd_score_elf_common_definition (Elf_In + _bfd_score_elf_section_from_bfd_section + #define elf_backend_adjust_dynamic_symbol \ + _bfd_score_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_score_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_score_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_score_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_score_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections \ + _bfd_score_elf_create_dynamic_sections +--- a/bfd/elf32-score.h ++++ b/bfd/elf32-score.h +@@ -78,10 +78,10 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + struct elf_link_hash_entry *); + + extern bool +-s7_bfd_score_elf_always_size_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_early_size_sections (bfd *, struct bfd_link_info *); + + extern bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern bool + s7_bfd_score_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); +--- a/bfd/elf32-score7.c ++++ b/bfd/elf32-score7.c +@@ -975,7 +975,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s7_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s7_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + + static bool +@@ -2969,8 +2969,8 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + and the input sections have been assigned to output sections. */ + + bool +-s7_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s7_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3047,14 +3047,15 @@ s7_bfd_score_elf_always_size_sections (b + /* Set the sizes of the dynamic sections. */ + + bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s7_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3123,7 +3124,7 @@ s7_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s7_bfd_score_elf_always_size_sections() has already done ++ /* s7_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +--- a/bfd/elf32-sh.c ++++ b/bfd/elf32-sh.c +@@ -2925,7 +2925,7 @@ allocate_dynrelocs (struct elf_link_hash + It's a convenient place to determine the PLT style. */ + + static bool +-sh_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++sh_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + sh_elf_hash_table (info)->plt_info = get_plt_info (output_bfd, + bfd_link_pic (info)); +@@ -2940,8 +2940,8 @@ sh_elf_always_size_sections (bfd *output + /* Set the sizes of the dynamic sections. */ + + static bool +-sh_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++sh_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_sh_link_hash_table *htab; + bfd *dynobj; +@@ -2954,7 +2954,8 @@ sh_elf_size_dynamic_sections (bfd *outpu + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -6589,10 +6590,8 @@ sh_elf_encode_eh_address (bfd *abfd, + sh_elf_link_hash_table_create + #define elf_backend_adjust_dynamic_symbol \ + sh_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- sh_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- sh_elf_size_dynamic_sections ++#define elf_backend_early_size_sections sh_elf_early_size_sections ++#define elf_backend_late_size_sections sh_elf_late_size_sections + #define elf_backend_omit_section_dynsym sh_elf_omit_section_dynsym + #define elf_backend_finish_dynamic_symbol \ + sh_elf_finish_dynamic_symbol +--- a/bfd/elf32-sparc.c ++++ b/bfd/elf32-sparc.c +@@ -248,8 +248,7 @@ elf32_sparc_reloc_type_class (const stru + #define elf_backend_adjust_dynamic_symbol \ + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ + _bfd_sparc_elf_finish_dynamic_symbol +--- a/bfd/elf32-tic6x.c ++++ b/bfd/elf32-tic6x.c +@@ -3160,7 +3160,7 @@ elf32_tic6x_allocate_dynrelocs (struct e + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_tic6x_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf32_tic6x_link_hash_table *htab; + bfd *dynobj; +@@ -3171,7 +3171,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + htab = elf32_tic6x_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3358,7 +3358,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + and the input sections have been assigned to output sections. */ + + static bool +-elf32_tic6x_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (elf32_tic6x_using_dsbt (output_bfd) && !bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -4261,10 +4261,10 @@ elf32_tic6x_write_section (bfd *output_b + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible + #define elf_backend_finish_dynamic_symbol \ + elf32_tic6x_finish_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf32_tic6x_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_tic6x_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf32_tic6x_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_tic6x_late_size_sections + #define elf_backend_finish_dynamic_sections \ + elf32_tic6x_finish_dynamic_sections + #define bfd_elf32_bfd_final_link \ +--- a/bfd/elf32-tilegx.c ++++ b/bfd/elf32-tilegx.c +@@ -105,7 +105,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf32-tilepro.c ++++ b/bfd/elf32-tilepro.c +@@ -2182,11 +2182,9 @@ tilepro_elf_omit_section_dynsym (bfd *ou + #define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + + static bool +-tilepro_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++tilepro_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { +- (void)output_bfd; +- + struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; +@@ -2195,7 +2193,8 @@ tilepro_elf_size_dynamic_sections (bfd * + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3739,7 +3738,7 @@ tilepro_additional_program_headers (bfd + #define elf_backend_check_relocs tilepro_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilepro_elf_late_size_sections + #define elf_backend_relocate_section tilepro_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +--- a/bfd/elf32-vax.c ++++ b/bfd/elf32-vax.c +@@ -36,7 +36,6 @@ static bool elf_vax_check_relocs (bfd *, + asection *, const Elf_Internal_Rela *); + static bool elf_vax_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); +-static bool elf_vax_size_dynamic_sections (bfd *, struct bfd_link_info *); + static int elf_vax_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, +@@ -985,8 +984,8 @@ elf_vax_discard_got_entries (struct elf_ + /* Discard unused dynamic data if this is a static link. */ + + static bool +-elf_vax_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_vax_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -1024,14 +1023,15 @@ elf_vax_always_size_sections (bfd *outpu + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_vax_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_vax_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -1861,10 +1861,8 @@ elf_vax_plt_sym_val (bfd_vma i, const as + #define elf_backend_check_relocs elf_vax_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf_vax_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf_vax_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf_vax_size_dynamic_sections ++#define elf_backend_early_size_sections elf_vax_early_size_sections ++#define elf_backend_late_size_sections elf_vax_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_vax_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-xstormy16.c ++++ b/bfd/elf32-xstormy16.c +@@ -706,8 +706,8 @@ xstormy16_elf_relax_section (bfd *dynobj + } + + static bool +-xstormy16_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++xstormy16_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -1013,8 +1013,8 @@ xstormy16_elf_gc_mark_hook (asection *se + #define elf_backend_relocate_section xstormy16_elf_relocate_section + #define elf_backend_gc_mark_hook xstormy16_elf_gc_mark_hook + #define elf_backend_check_relocs xstormy16_elf_check_relocs +-#define elf_backend_always_size_sections \ +- xstormy16_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ xstormy16_elf_early_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -1568,8 +1568,8 @@ elf_xtensa_allocate_local_got_size (stru + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_xtensa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + bfd *dynobj, *abfd; +@@ -1586,7 +1586,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + srelgot = htab->elf.srelgot; + srelplt = htab->elf.srelplt; + +@@ -1791,8 +1791,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + } + + static bool +-elf_xtensa_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_xtensa_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + asection *tls_sec; +@@ -11551,8 +11550,8 @@ static const struct bfd_elf_special_sect + #define elf_backend_object_p elf_xtensa_object_p + #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class + #define elf_backend_relocate_section elf_xtensa_relocate_section +-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections +-#define elf_backend_always_size_sections elf_xtensa_always_size_sections ++#define elf_backend_late_size_sections elf_xtensa_late_size_sections ++#define elf_backend_early_size_sections elf_xtensa_early_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_special_sections elf_xtensa_special_sections + #define elf_backend_action_discarded elf_xtensa_action_discarded +--- a/bfd/elf64-alpha.c ++++ b/bfd/elf64-alpha.c +@@ -2579,8 +2579,8 @@ elf64_alpha_size_plt_section (struct bfd + } + + static bool +-elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *i; + struct alpha_elf_link_hash_table * htab; +@@ -2806,8 +2806,8 @@ elf64_alpha_size_rela_got_section (struc + /* Set the sizes of the dynamic sections. */ + + static bool +-elf64_alpha_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2819,7 +2819,8 @@ elf64_alpha_size_dynamic_sections (bfd * + return false; + + dynobj = elf_hash_table(info)->dynobj; +- BFD_ASSERT(dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5465,10 +5466,10 @@ static const struct elf_size_info alpha_ + elf64_alpha_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol +-#define elf_backend_always_size_sections \ +- elf64_alpha_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf64_alpha_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf64_alpha_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf64_alpha_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-hppa.c ++++ b/bfd/elf64-hppa.c +@@ -176,9 +176,6 @@ static bool elf64_hppa_adjust_dynamic_sy + static bool elf64_hppa_mark_milli_and_exported_functions + (struct elf_link_hash_entry *, void *); + +-static bool elf64_hppa_size_dynamic_sections +- (bfd *, struct bfd_link_info *); +- + static int elf64_hppa_link_output_symbol_hook + (struct bfd_link_info *, const char *, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); +@@ -1520,7 +1517,7 @@ elf64_hppa_mark_milli_and_exported_funct + the contents of our special sections. */ + + static bool +-elf64_hppa_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf64_hppa_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf64_hppa_link_hash_table *hppa_info; + struct elf64_hppa_allocate_data data; +@@ -1534,7 +1531,8 @@ elf64_hppa_size_dynamic_sections (bfd *o + return false; + + dynobj = hppa_info->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Mark each function this program exports so that we will allocate + space in the .opd section for each function's FPTR. If we are +@@ -3984,8 +3982,7 @@ const struct elf_size_info hppa64_elf_si + #define elf_backend_adjust_dynamic_symbol \ + elf64_hppa_adjust_dynamic_symbol + +-#define elf_backend_size_dynamic_sections \ +- elf64_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf64_hppa_late_size_sections + + #define elf_backend_finish_dynamic_symbol \ + elf64_hppa_finish_dynamic_symbol +--- a/bfd/elf64-ia64-vms.c ++++ b/bfd/elf64-ia64-vms.c +@@ -2590,8 +2590,8 @@ elf64_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elf64_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf64_ia64_allocate_data data; + struct elf64_ia64_link_hash_table *ia64_info; +@@ -2600,11 +2600,12 @@ elf64_ia64_size_dynamic_sections (bfd *o + struct elf_link_hash_table *hash_table; + + hash_table = elf_hash_table (info); +- dynobj = hash_table->dynobj; + ia64_info = elf64_ia64_hash_table (info); + if (ia64_info == NULL) + return false; +- BFD_ASSERT(dynobj != NULL); ++ dynobj = hash_table->dynobj; ++ if (dynobj == NULL) ++ return true; + data.info = info; + + /* Allocate the GOT entries. */ +@@ -5484,8 +5485,8 @@ static const struct elf_size_info elf64_ + elf64_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf64_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf64_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf64_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4741,10 +4741,10 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -119,8 +119,8 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_edit +-#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections ++#define elf_backend_early_size_sections ppc64_elf_edit ++#define elf_backend_late_size_sections ppc64_elf_late_size_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_action_discarded ppc64_elf_action_discarded +@@ -10121,7 +10121,7 @@ allocate_dynrelocs (struct elf_link_hash + ((((v) & 0x3ffff0000ULL) << 16) | (v & 0xffff)) + #define HA34(v) ((v + (1ULL << 33)) >> 34) + +-/* Called via elf_link_hash_traverse from ppc64_elf_size_dynamic_sections ++/* Called via elf_link_hash_traverse from ppc64_elf_late_size_sections + to set up space for global entry stubs. These are put in glink, + after the branch table. */ + +@@ -10198,8 +10198,8 @@ size_global_entry_stubs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc64_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc64_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + bfd *dynobj; +@@ -10214,7 +10214,7 @@ ppc64_elf_size_dynamic_sections (bfd *ou + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -1301,7 +1301,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1714,8 +1714,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1729,7 +1729,7 @@ elf_s390_size_dynamic_sections (bfd *out + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3881,7 +3881,7 @@ const struct elf_size_info s390_elf64_si + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf64-sparc.c ++++ b/bfd/elf64-sparc.c +@@ -938,8 +938,8 @@ const struct elf_size_info elf64_sparc_s + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym \ + _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section \ + _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-tilegx.c ++++ b/bfd/elf64-tilegx.c +@@ -106,7 +106,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -2351,8 +2351,7 @@ elf_x86_64_scan_relocs (bfd *abfd, struc + } + + static bool +-elf_x86_64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_x86_64_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -2365,7 +2364,7 @@ elf_x86_64_always_size_sections (bfd *ou + elf_x86_64_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Return the relocation value for @tpoff relocation +@@ -5262,7 +5261,7 @@ elf_x86_64_special_sections[]= + elf_x86_64_reloc_name_lookup + + #define elf_backend_relocs_compatible elf_x86_64_relocs_compatible +-#define elf_backend_always_size_sections elf_x86_64_always_size_sections ++#define elf_backend_early_size_sections elf_x86_64_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections elf_x86_64_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf_x86_64_finish_dynamic_symbol +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6623,8 +6623,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend may have to create some sections regardless of whether + we're dynamic or not. */ +- if (bed->elf_backend_always_size_sections +- && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) ++ if (bed->elf_backend_early_size_sections ++ && !bed->elf_backend_early_size_sections (output_bfd, info)) + return false; + + dynobj = elf_hash_table (info)->dynobj; +@@ -7360,9 +7360,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (dynobj != NULL +- && bed->elf_backend_size_dynamic_sections != NULL +- && ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info)) ++ if (bed->elf_backend_late_size_sections != NULL ++ && !bed->elf_backend_late_size_sections (output_bfd, info)) + return false; + + if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created) +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4127,10 +4127,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -112,7 +112,7 @@ + allocate space for one relocation on the slot. Record the GOT offset + for this symbol. + +- elfNN_aarch64_size_dynamic_sections () ++ elfNN_aarch64_late_size_sections () + + Iterate all input BFDS, look for in the local symbol data structure + constructed earlier for local TLS symbols and allocate them double +@@ -8859,8 +8859,8 @@ elfNN_aarch64_allocate_local_ifunc_dynre + though ! */ + + static bool +-elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_aarch64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_aarch64_link_hash_table *htab; + bfd *dynobj; +@@ -8871,7 +8871,8 @@ elfNN_aarch64_size_dynamic_sections (bfd + htab = elf_aarch64_hash_table ((info)); + dynobj = htab->root.dynobj; + +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -9273,8 +9274,8 @@ elfNN_aarch64_create_small_pltn_entry (s + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_aarch64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_aarch64_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -10009,8 +10010,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_adjust_dynamic_symbol \ + elfNN_aarch64_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_aarch64_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_aarch64_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_aarch64_check_relocs +@@ -10059,8 +10060,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_section_from_shdr \ + elfNN_aarch64_section_from_shdr + +-#define elf_backend_size_dynamic_sections \ +- elfNN_aarch64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_aarch64_late_size_sections + + #define elf_backend_size_info \ + elfNN_aarch64_size_info +--- a/bfd/elfnn-ia64.c ++++ b/bfd/elfnn-ia64.c +@@ -2986,8 +2986,8 @@ elfNN_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; +@@ -2998,8 +2998,9 @@ elfNN_ia64_size_dynamic_sections (bfd *o + if (ia64_info == NULL) + return false; + dynobj = ia64_info->root.dynobj; ++ if (dynobj == NULL) ++ return true; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; +- BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ +@@ -5035,8 +5036,8 @@ ignore_errors (const char *fmt ATTRIBUTE + elfNN_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elfNN_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elfnn-loongarch.c ++++ b/bfd/elfnn-loongarch.c +@@ -1169,8 +1169,8 @@ maybe_set_textrel (struct elf_link_hash_ + } + + static bool +-loongarch_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++loongarch_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1180,7 +1180,8 @@ loongarch_elf_size_dynamic_sections (bfd + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3251,7 +3252,7 @@ loongarch_elf_gc_mark_hook (asection *se + loongarch_elf_create_dynamic_sections + #define elf_backend_check_relocs loongarch_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections ++#define elf_backend_late_size_sections loongarch_elf_late_size_sections + #define elf_backend_relocate_section loongarch_elf_relocate_section + #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -1376,7 +1376,7 @@ allocate_local_ifunc_dynrelocs (void **s + } + + static bool +-riscv_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++riscv_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct riscv_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1386,7 +1386,8 @@ riscv_elf_size_dynamic_sections (bfd *ou + htab = riscv_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5256,7 +5257,7 @@ riscv_elf_merge_symbol_attribute (struct + #define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections + #define elf_backend_check_relocs riscv_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections ++#define elf_backend_late_size_sections riscv_elf_late_size_sections + #define elf_backend_relocate_section riscv_elf_relocate_section + #define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9550,8 +9550,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + check for any mips16 stub sections that we can discard. */ + + bool +-_bfd_mips_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *sect; + struct mips_elf_link_hash_table *htab; +@@ -9894,8 +9894,8 @@ mips_elf_set_plt_sym_value (struct mips_ + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s, *sreldyn; +@@ -9905,7 +9905,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -14824,7 +14825,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14883,7 +14884,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -52,9 +52,9 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_always_size_sections ++extern bool _bfd_mips_elf_early_size_sections + (bfd *, struct bfd_link_info *); +-extern bool _bfd_mips_elf_size_dynamic_sections ++extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, +--- a/bfd/elfxx-sparc.c ++++ b/bfd/elfxx-sparc.c +@@ -2381,8 +2381,8 @@ _bfd_sparc_elf_omit_section_dynsym (bfd + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_sparc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_sparc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct _bfd_sparc_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2392,7 +2392,8 @@ _bfd_sparc_elf_size_dynamic_sections (bf + htab = _bfd_sparc_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-sparc.h ++++ b/bfd/elfxx-sparc.h +@@ -117,7 +117,7 @@ extern bool _bfd_sparc_elf_adjust_dynami + (struct bfd_link_info *, struct elf_link_hash_entry *); + extern bool _bfd_sparc_elf_omit_section_dynsym + (bfd *, struct bfd_link_info *, asection *); +-extern bool _bfd_sparc_elf_size_dynamic_sections ++extern bool _bfd_sparc_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern bool _bfd_sparc_elf_new_section_hook + (bfd *, asection *); +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -493,11 +493,11 @@ + #ifndef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol 0 + #endif +-#ifndef elf_backend_always_size_sections +-#define elf_backend_always_size_sections 0 ++#ifndef elf_backend_early_size_sections ++#define elf_backend_early_size_sections 0 + #endif +-#ifndef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections 0 ++#ifndef elf_backend_late_size_sections ++#define elf_backend_late_size_sections 0 + #endif + #ifndef elf_backend_strip_zero_sized_dynamic_sections + #define elf_backend_strip_zero_sized_dynamic_sections 0 +@@ -853,8 +853,8 @@ static const struct elf_backend_data elf + elf_backend_check_directives, + elf_backend_notice_as_needed, + elf_backend_adjust_dynamic_symbol, +- elf_backend_always_size_sections, +- elf_backend_size_dynamic_sections, ++ elf_backend_early_size_sections, ++ elf_backend_late_size_sections, + elf_backend_strip_zero_sized_dynamic_sections, + elf_backend_init_index_section, + elf_backend_relocate_section, +--- a/bfd/elfxx-tilegx.c ++++ b/bfd/elfxx-tilegx.c +@@ -2430,8 +2430,8 @@ tilegx_elf_omit_section_dynsym (bfd *out + } + + bool +-tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++tilegx_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2441,7 +2441,8 @@ tilegx_elf_size_dynamic_sections (bfd *o + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-tilegx.h ++++ b/bfd/elfxx-tilegx.h +@@ -57,7 +57,7 @@ tilegx_elf_omit_section_dynsym (bfd *, + asection *); + + extern bool +-tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++tilegx_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern int + tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -2002,7 +2002,7 @@ _bfd_elf_x86_valid_reloc_p (asection *in + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_x86_elf_size_dynamic_sections (bfd *output_bfd, ++_bfd_x86_elf_late_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + struct elf_x86_link_hash_table *htab; +@@ -2018,7 +2018,7 @@ _bfd_x86_elf_size_dynamic_sections (bfd + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -2599,8 +2599,8 @@ _bfd_x86_elf_finish_dynamic_sections (bf + + + bool +-_bfd_x86_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_x86_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec = elf_hash_table (info)->tls_sec; + +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -807,13 +807,13 @@ extern bool _bfd_elf_x86_valid_reloc_p + const Elf_Internal_Rela *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, Elf_Internal_Shdr *, bool *); + +-extern bool _bfd_x86_elf_size_dynamic_sections ++extern bool _bfd_x86_elf_late_size_sections + (bfd *, struct bfd_link_info *); + + extern struct elf_x86_link_hash_table *_bfd_x86_elf_finish_dynamic_sections + (bfd *, struct bfd_link_info *); + +-extern bool _bfd_x86_elf_always_size_sections ++extern bool _bfd_x86_elf_early_size_sections + (bfd *, struct bfd_link_info *); + + extern void _bfd_x86_elf_merge_symbol_attribute +@@ -885,8 +885,8 @@ extern void _bfd_x86_elf_link_report_rel + + #define elf_backend_check_relocs \ + _bfd_x86_elf_check_relocs +-#define elf_backend_size_dynamic_sections \ +- _bfd_x86_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_x86_elf_late_size_sections + #define elf_backend_merge_symbol_attribute \ + _bfd_x86_elf_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ +--- a/ld/emultempl/vms.em ++++ b/ld/emultempl/vms.em +@@ -196,10 +196,9 @@ gld${EMULATION_NAME}_before_allocation ( + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (elf_hash_table (&link_info)->dynamic_sections_created +- && bed->elf_backend_size_dynamic_sections +- && ! (*bed->elf_backend_size_dynamic_sections) (link_info.output_bfd, +- &link_info)) ++ if (bed->elf_backend_late_size_sections ++ && !bed->elf_backend_late_size_sections (link_info.output_bfd, ++ &link_info)) + einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); + + before_allocation_default (); diff --git a/toolchain/binutils/patches/2.38/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch b/toolchain/binutils/patches/2.38/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch new file mode 100644 index 0000000000..725d676510 --- /dev/null +++ b/toolchain/binutils/patches/2.38/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch @@ -0,0 +1,218 @@ +From 3c6c32951e292a51ede70b8087bb0308d7dbc4fc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 20:33:32 +1030 +Subject: [PATCH 2/2] PR 30569, delete _bfd_mips_elf_early_size_sections + +PR30569 was triggered by a patch of mine 6540edd52cc0 moving the call +to always_size_sections in bfd_elf_size_dynamic_sections earlier, made +to support the x86 DT_RELR implementation. This broke mips16 code +handling stubs when --export-dynamic is passed to the linker, because +numerous symbols then became dynamic after always_size_sections. The +mips backend fiddles with symbols in its always_size_sections. Maciej +in 902e9fc76a0e had moved the call to always_size_sections to after +the export-dynamic code. Prior to that, Nathan in 04c3a75556c0 moved +it before the exec stack code, back to the start of +bfd_elf_size_dynamic_sections which was where Ian put it originally +in ff12f303355b. So the call has moved around a little. I'm leaving +it where it is, and instead calling mips_elf_check_symbols from +late_size_sections (the old size_dynamic_sections) which is now always +called. In fact, the whole of _bfd_mips_elf_early_size_sections can +be merged into _bfd_mips_elf_late_size_sections. +--- + bfd/elf32-mips.c | 1 - + bfd/elf64-mips.c | 2 -- + bfd/elfn32-mips.c | 1 - + bfd/elfxx-mips.c | 84 +++++++++++++++++++---------------------------- + bfd/elfxx-mips.h | 2 -- + 5 files changed, 34 insertions(+), 56 deletions(-) + +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2526,7 +2526,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4741,8 +4741,6 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections \ +- _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections \ + _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4127,7 +4127,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9545,48 +9545,6 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + return _bfd_elf_adjust_dynamic_copy (info, h, s); + } + +-/* This function is called after all the input files have been read, +- and the input sections have been assigned to output sections. We +- check for any mips16 stub sections that we can discard. */ +- +-bool +-_bfd_mips_elf_early_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) +-{ +- asection *sect; +- struct mips_elf_link_hash_table *htab; +- struct mips_htab_traverse_info hti; +- +- htab = mips_elf_hash_table (info); +- BFD_ASSERT (htab != NULL); +- +- /* The .reginfo section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".reginfo"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- /* The .MIPS.abiflags section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- hti.info = info; +- hti.output_bfd = output_bfd; +- hti.error = false; +- mips_elf_link_hash_traverse (mips_elf_hash_table (info), +- mips_elf_check_symbols, &hti); +- if (hti.error) +- return false; +- +- return true; +-} +- + /* If the link uses a GOT, lay it out and work out its size. */ + + static bool +@@ -9891,7 +9849,8 @@ mips_elf_set_plt_sym_value (struct mips_ + return true; + } + +-/* Set the sizes of the dynamic sections. */ ++/* Set the sizes of the dynamic sections, some mips non-dynamic sections, ++ and check for any mips16 stub sections that we can discard. */ + + bool + _bfd_mips_elf_late_size_sections (bfd *output_bfd, +@@ -9901,14 +9860,39 @@ _bfd_mips_elf_late_size_sections (bfd *o + asection *s, *sreldyn; + bool reltext; + struct mips_elf_link_hash_table *htab; ++ struct mips_htab_traverse_info hti; + + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = elf_hash_table (info)->dynobj; ++ ++ /* The .reginfo section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".reginfo"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf32_External_RegInfo)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ /* The .MIPS.abiflags section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf_External_ABIFlags_v0)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ hti.info = info; ++ hti.output_bfd = output_bfd; ++ hti.error = false; ++ mips_elf_link_hash_traverse (htab, mips_elf_check_symbols, &hti); ++ if (hti.error) ++ return false; ++ ++ dynobj = htab->root.dynobj; + if (dynobj == NULL) + return true; + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -10048,7 +10032,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + else if (bfd_link_executable (info) +- && ! mips_elf_hash_table (info)->use_rld_obj_head ++ && !htab->use_rld_obj_head + && startswith (name, ".rld_map")) + { + /* We add a room for __rld_map. It will be filled in by the +@@ -10057,7 +10041,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + else if (SGI_COMPAT (output_bfd) + && startswith (name, ".compact_rel")) +- s->size += mips_elf_hash_table (info)->compact_rel_size; ++ s->size += htab->compact_rel_size; + else if (s == htab->root.splt) + { + /* If the last PLT entry has a branch delay slot, allocate +@@ -10097,7 +10081,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in _bfd_mips_elf_finish_dynamic_sections, but we +@@ -14825,7 +14809,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14884,7 +14868,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -52,8 +52,6 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_early_size_sections +- (bfd *, struct bfd_link_info *); + extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section diff --git a/toolchain/binutils/patches/2.39/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch b/toolchain/binutils/patches/2.39/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch new file mode 100644 index 0000000000..84b99172f7 --- /dev/null +++ b/toolchain/binutils/patches/2.39/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch @@ -0,0 +1,2172 @@ +From af969b14aedcc0ae27dcefab4327ff2d153dec8b Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 19:25:42 +1030 +Subject: [PATCH 1/2] PR 30569, always call elf_backend_size_dynamic_sections + +This largely mechanical patch is preparation for a followup patch. + +For quite some time I've thought that it would be useful to call +elf_backend_size_dynamic_sections even when no dynamic objects are +seen by the linker. That's what this patch does, with some renaming. +There are no functional changes to the linker, just a move of the +dynobj test in bfd_elf_size_dynamic_sections to target backend +functions, replacing the asserts/aborts already there. No doubt some +of the current always_size_sections functions could be moved to +size_dynamic_sections but I haven't made that change. + +Because both hooks are now always called, I have renamed +always_size_sections to early_size_sections and size_dynamic_sections +to late_size_sections. I condisdered calling late_size_sections plain +size_sections, since this is the usual target dynamic section sizing +hook, but decided that searching the sources for "size_sections" would +then hit early_size_sections and other functions. +--- + bfd/elf-bfd.h | 35 +++++++++++++++++------------------ + bfd/elf-m10300.c | 11 ++++++----- + bfd/elf32-arc.c | 9 +++++---- + bfd/elf32-arm.c | 15 ++++++++------- + bfd/elf32-bfin.c | 31 ++++++++++++++++--------------- + bfd/elf32-cr16.c | 11 ++++++----- + bfd/elf32-cris.c | 13 +++++++------ + bfd/elf32-csky.c | 8 ++++---- + bfd/elf32-frv.c | 23 ++++++++++++----------- + bfd/elf32-hppa.c | 8 ++++---- + bfd/elf32-i386.c | 7 +++---- + bfd/elf32-lm32.c | 15 ++++++++------- + bfd/elf32-m32c.c | 8 ++++---- + bfd/elf32-m32r.c | 11 ++++++----- + bfd/elf32-m68k.c | 16 ++++++++-------- + bfd/elf32-metag.c | 8 ++++---- + bfd/elf32-microblaze.c | 9 +++++---- + bfd/elf32-mips.c | 6 ++---- + bfd/elf32-nds32.c | 9 +++++---- + bfd/elf32-nios2.c | 15 ++++++++------- + bfd/elf32-or1k.c | 9 +++++---- + bfd/elf32-ppc.c | 11 ++++++----- + bfd/elf32-rl78.c | 8 ++++---- + bfd/elf32-s390.c | 10 +++++----- + bfd/elf32-score.c | 35 ++++++++++++++++++----------------- + bfd/elf32-score.h | 4 ++-- + bfd/elf32-score7.c | 13 +++++++------ + bfd/elf32-sh.c | 15 +++++++-------- + bfd/elf32-sparc.c | 3 +-- + bfd/elf32-tic6x.c | 14 +++++++------- + bfd/elf32-tilegx.c | 2 +- + bfd/elf32-tilepro.c | 11 +++++------ + bfd/elf32-vax.c | 16 +++++++--------- + bfd/elf32-xstormy16.c | 8 ++++---- + bfd/elf32-xtensa.c | 13 ++++++------- + bfd/elf64-alpha.c | 19 ++++++++++--------- + bfd/elf64-hppa.c | 11 ++++------- + bfd/elf64-ia64-vms.c | 13 +++++++------ + bfd/elf64-mips.c | 8 ++++---- + bfd/elf64-ppc.c | 12 ++++++------ + bfd/elf64-s390.c | 10 +++++----- + bfd/elf64-sparc.c | 4 ++-- + bfd/elf64-tilegx.c | 2 +- + bfd/elf64-x86-64.c | 7 +++---- + bfd/elflink.c | 9 ++++----- + bfd/elfn32-mips.c | 6 ++---- + bfd/elfnn-aarch64.c | 21 +++++++++++---------- + bfd/elfnn-ia64.c | 11 ++++++----- + bfd/elfnn-kvx.c | 19 +++++++++---------- + bfd/elfnn-loongarch.c | 9 +++++---- + bfd/elfnn-riscv.c | 7 ++++--- + bfd/elfxx-mips.c | 15 ++++++++------- + bfd/elfxx-mips.h | 4 ++-- + bfd/elfxx-sparc.c | 7 ++++--- + bfd/elfxx-sparc.h | 2 +- + bfd/elfxx-target.h | 12 ++++++------ + bfd/elfxx-tilegx.c | 7 ++++--- + bfd/elfxx-tilegx.h | 2 +- + bfd/elfxx-x86.c | 8 ++++---- + bfd/elfxx-x86.h | 8 ++++---- + ld/emultempl/vms.em | 7 +++---- + 61 files changed, 343 insertions(+), 337 deletions(-) + +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1136,7 +1136,7 @@ struct elf_backend_data + /* The ADJUST_DYNAMIC_SYMBOL function is called by the ELF backend + linker for every symbol which is defined by a dynamic object and + referenced by a regular object. This is called after all the +- input files have been seen, but before the SIZE_DYNAMIC_SECTIONS ++ input files have been seen, but before the LATE_SIZE_SECTIONS + function has been called. The hash table entry should be + bfd_link_hash_defined ore bfd_link_hash_defweak, and it should be + defined in a section from a dynamic object. Dynamic object +@@ -1148,24 +1148,23 @@ struct elf_backend_data + bool (*elf_backend_adjust_dynamic_symbol) + (struct bfd_link_info *info, struct elf_link_hash_entry *h); + +- /* The ALWAYS_SIZE_SECTIONS function is called by the backend linker +- after all the linker input files have been seen but before the +- section sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL, but before SIZE_DYNAMIC_SECTIONS. */ +- bool (*elf_backend_always_size_sections) ++ /* The EARLY_SIZE_SECTIONS and LATE_SIZE_SECTIONS functions are ++ called by the backend linker after all linker input files have ++ been seen and sections have been assigned to output sections, but ++ before the section sizes have been set. Both of these functions ++ are called even when no dynamic object is seen by the linker. ++ Between them, they must set the sizes of the dynamic sections and ++ other backend specific sections, and may fill in their contents. ++ Most backends need only use LATE_SIZE_SECTIONS. ++ EARLY_SIZE_SECTIONS is called before --export-dynamic makes some ++ symbols dynamic and before ADJUST_DYNAMIC_SYMBOL processes ++ dynamic symbols, LATE_SIZE_SECTIONS afterwards. The generic ELF ++ linker can handle the .dynsym, .dynstr and .hash sections. ++ Besides those, these functions must handle the .interp section ++ and any other sections created by CREATE_DYNAMIC_SECTIONS. */ ++ bool (*elf_backend_early_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); +- +- /* The SIZE_DYNAMIC_SECTIONS function is called by the ELF backend +- linker after all the linker input files have been seen but before +- the sections sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL has been called on all appropriate symbols. +- It is only called when linking against a dynamic object. It must +- set the sizes of the dynamic sections, and may fill in their +- contents as well. The generic ELF linker can handle the .dynsym, +- .dynstr and .hash sections. This function must handle the +- .interp section and any sections created by the +- CREATE_DYNAMIC_SECTIONS entry point. */ +- bool (*elf_backend_size_dynamic_sections) ++ bool (*elf_backend_late_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); + + /* The STRIP_ZERO_SIZED_DYNAMIC_SECTIONS function is called by the +--- a/bfd/elf-m10300.c ++++ b/bfd/elf-m10300.c +@@ -5003,8 +5003,8 @@ _bfd_mn10300_elf_adjust_dynamic_symbol ( + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_mn10300_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_mn10300_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + struct elf32_mn10300_link_hash_table *htab = elf32_mn10300_hash_table (info); + bfd * dynobj; +@@ -5012,7 +5012,8 @@ _bfd_mn10300_elf_size_dynamic_sections ( + bool relocs; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5499,8 +5500,8 @@ mn10300_elf_mkobject (bfd *abfd) + _bfd_mn10300_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mn10300_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_mn10300_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mn10300_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_mn10300_elf_finish_dynamic_symbol +--- a/bfd/elf32-arc.c ++++ b/bfd/elf32-arc.c +@@ -2702,8 +2702,8 @@ elf_arc_finish_dynamic_sections (bfd * o + + /* Set the sizes of the dynamic sections. */ + static bool +-elf_arc_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_arc_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2711,7 +2711,8 @@ elf_arc_size_dynamic_sections (bfd *outp + struct elf_link_hash_table *htab = elf_hash_table (info); + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3126,7 +3127,7 @@ arc_elf_relax_section (bfd *abfd, asecti + #define elf_backend_finish_dynamic_symbol elf_arc_finish_dynamic_symbol + + #define elf_backend_finish_dynamic_sections elf_arc_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_arc_size_dynamic_sections ++#define elf_backend_late_size_sections elf_arc_late_size_sections + + #define elf_backend_can_gc_sections 1 + #define elf_backend_want_got_plt 1 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -16729,8 +16729,8 @@ bfd_elf32_arm_set_byteswap_code (struct + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info * info) ++elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; +@@ -16743,7 +16743,9 @@ elf32_arm_size_dynamic_sections (bfd * o + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; ++ + check_use_blx (htab); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -17115,8 +17117,7 @@ elf32_arm_size_dynamic_sections (bfd * o + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elf32_arm_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + struct elf32_arm_link_hash_table *htab; +@@ -20283,8 +20284,8 @@ elf32_arm_backend_symbol_processing (bfd + #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections +-#define elf_backend_always_size_sections elf32_arm_always_size_sections ++#define elf_backend_late_size_sections elf32_arm_late_size_sections ++#define elf_backend_early_size_sections elf32_arm_early_size_sections + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_init_file_header elf32_arm_init_file_header + #define elf_backend_reloc_type_class elf32_arm_reloc_type_class +--- a/bfd/elf32-bfin.c ++++ b/bfd/elf32-bfin.c +@@ -4027,8 +4027,8 @@ _bfinfdpic_size_got_plt (bfd *output_bfd + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_bfinfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -4037,7 +4037,8 @@ elf32_bfinfdpic_size_dynamic_sections (b + + htab = elf_hash_table (info); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -4086,7 +4087,7 @@ elf32_bfinfdpic_size_dynamic_sections (b + } + + static bool +-elf32_bfinfdpic_always_size_sections (bfd *output_bfd, ++elf32_bfinfdpic_early_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) +@@ -5124,15 +5125,16 @@ bfin_discard_copies (struct elf_link_has + } + + static bool +-bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++bfin_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5424,8 +5426,7 @@ struct bfd_elf_special_section const elf + #define elf_backend_check_relocs bfin_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + bfin_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- bfin_size_dynamic_sections ++#define elf_backend_late_size_sections bfin_late_size_sections + #define elf_backend_relocate_section bfin_relocate_section + #define elf_backend_finish_dynamic_symbol \ + bfin_finish_dynamic_symbol +@@ -5471,9 +5472,9 @@ struct bfd_elf_special_section const elf + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + bfinfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_bfinfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_bfinfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -5481,9 +5482,9 @@ struct bfd_elf_special_section const elf + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_bfinfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_bfinfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_bfinfdpic_late_size_sections + #undef elf_backend_finish_dynamic_symbol + #define elf_backend_finish_dynamic_symbol \ + elf32_bfinfdpic_finish_dynamic_symbol +--- a/bfd/elf32-cr16.c ++++ b/bfd/elf32-cr16.c +@@ -2381,15 +2381,16 @@ _bfd_cr16_elf_adjust_dynamic_symbol (str + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_cr16_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -2826,8 +2827,8 @@ _bfd_cr16_elf_reloc_type_class (const st + _bfd_cr16_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_cr16_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_cr16_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_cr16_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_cr16_elf_finish_dynamic_symbol +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2527,7 +2527,7 @@ cris_elf_plt_sym_val (bfd_vma i ATTRIBUT + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_cris_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_cris_size_dynamic_sections if no dynamic sections will be ++ or elf_cris_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static bool +@@ -3508,8 +3508,8 @@ cris_elf_check_relocs (bfd *abfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_cris_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_cris_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_cris_link_hash_table * htab; + bfd *dynobj; +@@ -3521,7 +3521,8 @@ elf_cris_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4090,8 +4091,8 @@ elf_cris_got_elt_size (bfd *abfd ATTRIBU + elf_cris_adjust_dynamic_symbol + #define elf_backend_copy_indirect_symbol \ + elf_cris_copy_indirect_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_cris_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf_cris_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_finish_dynamic_symbol \ + elf_cris_finish_dynamic_symbol +--- a/bfd/elf32-csky.c ++++ b/bfd/elf32-csky.c +@@ -1893,8 +1893,8 @@ csky_allocate_dynrelocs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++csky_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct csky_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1907,7 +1907,7 @@ csky_elf_size_dynamic_sections (bfd *out + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- return false; ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5344,7 +5344,7 @@ elf32_csky_obj_attrs_handle_unknown (bfd + /* Dynamic relocate related API. */ + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol csky_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections csky_elf_size_dynamic_sections ++#define elf_backend_late_size_sections csky_elf_late_size_sections + #define elf_backend_finish_dynamic_symbol csky_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections csky_elf_finish_dynamic_sections + #define elf_backend_rela_normal 1 +--- a/bfd/elf32-frv.c ++++ b/bfd/elf32-frv.c +@@ -5423,15 +5423,16 @@ _frvfdpic_size_got_plt (bfd *output_bfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_frvfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + struct _frvfdpic_dynamic_got_plt_info gpinfo; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5472,8 +5473,8 @@ elf32_frvfdpic_size_dynamic_sections (bf + } + + static bool +-elf32_frvfdpic_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -6817,9 +6818,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + frvfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_frvfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_frvfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -6827,9 +6828,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_frvfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_frvfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_frvfdpic_late_size_sections + #undef bfd_elf32_bfd_relax_section + #define bfd_elf32_bfd_relax_section \ + elf32_frvfdpic_relax_section +--- a/bfd/elf32-hppa.c ++++ b/bfd/elf32-hppa.c +@@ -2042,8 +2042,8 @@ clobber_millicode_symbols (struct elf_li + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_hppa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf32_hppa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_hppa_link_hash_table *htab; + bfd *dynobj; +@@ -2057,7 +2057,7 @@ elf32_hppa_size_dynamic_sections (bfd *o + + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4450,7 +4450,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Inte + #define elf_backend_hide_symbol elf32_hppa_hide_symbol + #define elf_backend_finish_dynamic_symbol elf32_hppa_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_hppa_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf32_hppa_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_gc_mark_hook elf32_hppa_gc_mark_hook + #define elf_backend_grok_prstatus elf32_hppa_grok_prstatus +--- a/bfd/elf32-i386.c ++++ b/bfd/elf32-i386.c +@@ -1932,8 +1932,7 @@ elf_i386_scan_relocs (bfd *abfd, + } + + static bool +-elf_i386_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_i386_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -1946,7 +1945,7 @@ elf_i386_always_size_sections (bfd *outp + elf_i386_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Set the correct type for an x86 ELF section. We do this by the +@@ -4443,7 +4442,7 @@ elf_i386_link_setup_gnu_properties (stru + #define bfd_elf32_get_synthetic_symtab elf_i386_get_synthetic_symtab + + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible +-#define elf_backend_always_size_sections elf_i386_always_size_sections ++#define elf_backend_early_size_sections elf_i386_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_fake_sections elf_i386_fake_sections + #define elf_backend_finish_dynamic_sections elf_i386_finish_dynamic_sections +--- a/bfd/elf32-lm32.c ++++ b/bfd/elf32-lm32.c +@@ -1906,8 +1906,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-lm32_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++lm32_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_lm32_link_hash_table *htab; + bfd *dynobj; +@@ -1920,7 +1920,8 @@ lm32_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -2309,7 +2310,7 @@ lm32_elf_create_dynamic_sections (bfd *a + } + + static bool +-lm32_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++lm32_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info)) + { +@@ -2395,7 +2396,7 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #define bfd_elf32_bfd_link_hash_table_create lm32_elf_link_hash_table_create + #define elf_backend_check_relocs lm32_elf_check_relocs + #define elf_backend_reloc_type_class lm32_elf_reloc_type_class +-#define elf_backend_size_dynamic_sections lm32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections lm32_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections lm32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections lm32_elf_finish_dynamic_sections +@@ -2416,8 +2417,8 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #undef elf32_bed + #define elf32_bed elf32_lm32fdpic_bed + +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections lm32_elf_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections lm32_elf_early_size_sections + #undef bfd_elf32_bfd_copy_private_bfd_data + #define bfd_elf32_bfd_copy_private_bfd_data lm32_elf_fdpic_copy_private_bfd_data + +--- a/bfd/elf32-m32c.c ++++ b/bfd/elf32-m32c.c +@@ -773,8 +773,8 @@ m32c_elf_finish_dynamic_sections (bfd *a + } + + static bool +-m32c_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32c_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2131,8 +2131,8 @@ _bfd_m32c_elf_eh_frame_address_size (bfd + #define elf_backend_check_relocs m32c_elf_check_relocs + #define elf_backend_object_p m32c_elf_object_p + #define elf_symbol_leading_char ('_') +-#define elf_backend_always_size_sections \ +- m32c_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ m32c_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + m32c_elf_finish_dynamic_sections + +--- a/bfd/elf32-m32r.c ++++ b/bfd/elf32-m32r.c +@@ -1958,8 +1958,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32r_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -1968,7 +1968,7 @@ m32r_elf_size_dynamic_sections (bfd *out + bfd *ibfd; + + #ifdef DEBUG_PIC +- printf ("m32r_elf_size_dynamic_sections()\n"); ++ printf ("m32r_elf_late_size_sections()\n"); + #endif + + htab = m32r_elf_hash_table (info); +@@ -1976,7 +1976,8 @@ m32r_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3658,7 +3659,7 @@ m32r_elf_reloc_type_class (const struct + + #define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections + #define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +-#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections ++#define elf_backend_late_size_sections m32r_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2934,7 +2934,7 @@ elf_m68k_get_plt_info (bfd *output_bfd) + It's a convenient place to determine the PLT style. */ + + static bool +-elf_m68k_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_m68k_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + /* Bind input BFDs to GOTs and calculate sizes of .got and .rela.got + sections. */ +@@ -3107,15 +3107,16 @@ elf_m68k_adjust_dynamic_symbol (struct b + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_m68k_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_m68k_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -4628,12 +4629,11 @@ elf_m68k_grok_psinfo (bfd *abfd, Elf_Int + #define bfd_elf32_bfd_final_link bfd_elf_final_link + + #define elf_backend_check_relocs elf_m68k_check_relocs +-#define elf_backend_always_size_sections \ +- elf_m68k_always_size_sections ++#define elf_backend_early_size_sections \ ++ elf_m68k_early_size_sections + #define elf_backend_adjust_dynamic_symbol \ + elf_m68k_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_m68k_size_dynamic_sections ++#define elf_backend_late_size_sections elf_m68k_late_size_sections + #define elf_backend_final_write_processing elf_m68k_final_write_processing + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_m68k_relocate_section +--- a/bfd/elf32-metag.c ++++ b/bfd/elf32-metag.c +@@ -2717,8 +2717,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_metag_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_metag_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_metag_link_hash_table *htab; + bfd *dynobj; +@@ -2729,7 +2729,7 @@ elf_metag_size_dynamic_sections (bfd *ou + htab = metag_link_hash_table (info); + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4019,7 +4019,7 @@ elf_metag_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol elf_metag_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol elf_metag_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf_metag_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_metag_size_dynamic_sections ++#define elf_backend_late_size_sections elf_metag_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_init_file_header elf_metag_init_file_header +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2946,8 +2946,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++microblaze_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_mb_link_hash_table *htab; + bfd *dynobj; +@@ -2959,7 +2959,8 @@ microblaze_elf_size_dynamic_sections (bf + return false; + + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3477,7 +3478,7 @@ microblaze_elf_add_symbol_hook (bfd *abf + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_late_size_sections microblaze_elf_late_size_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + + #include "elf32-target.h" +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2525,10 +2525,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-nds32.c ++++ b/bfd/elf32-nds32.c +@@ -4302,8 +4302,8 @@ elf32_nds32_add_dynreloc (bfd *output_bf + /* Set the sizes of the dynamic sections. */ + + static bool +-nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_nds32_link_hash_table *htab; + bfd *dynobj; +@@ -4316,7 +4316,8 @@ nds32_elf_size_dynamic_sections (bfd *ou + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -13984,7 +13985,7 @@ nds32_elf_unify_tls_model (bfd *inbfd, a + #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections nds32_elf_late_size_sections + #define elf_backend_relocate_section nds32_elf_relocate_section + #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook + #define elf_backend_grok_prstatus nds32_elf_grok_prstatus +--- a/bfd/elf32-nios2.c ++++ b/bfd/elf32-nios2.c +@@ -5411,7 +5411,7 @@ nios2_elf32_adjust_dynamic_symbol (struc + return true; + } + +-/* Worker function for nios2_elf32_size_dynamic_sections. */ ++/* Worker function for nios2_elf32_late_size_sections. */ + static bool + adjust_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { +@@ -5438,7 +5438,7 @@ adjust_dynrelocs (struct elf_link_hash_e + return true; + } + +-/* Another worker function for nios2_elf32_size_dynamic_sections. ++/* Another worker function for nios2_elf32_late_size_sections. + Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + static bool +@@ -5673,11 +5673,11 @@ allocate_dynrelocs (struct elf_link_hash + return true; + } + +-/* Implement elf_backend_size_dynamic_sections: ++/* Implement elf_backend_late_size_sections: + Set the sizes of the dynamic sections. */ + static bool +-nios2_elf32_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nios2_elf32_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -5687,7 +5687,8 @@ nios2_elf32_size_dynamic_sections (bfd * + + htab = elf32_nios2_hash_table (info); + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + htab->res_n_size = 0; + if (htab->root.dynamic_sections_created) +@@ -6058,7 +6059,7 @@ const struct bfd_elf_special_section elf + nios2_elf32_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol nios2_elf32_adjust_dynamic_symbol + #define elf_backend_reloc_type_class nios2_elf32_reloc_type_class +-#define elf_backend_size_dynamic_sections nios2_elf32_size_dynamic_sections ++#define elf_backend_late_size_sections nios2_elf32_late_size_sections + #define elf_backend_add_symbol_hook nios2_elf_add_symbol_hook + #define elf_backend_copy_indirect_symbol nios2_elf32_copy_indirect_symbol + #define elf_backend_object_p nios2_elf32_object_p +--- a/bfd/elf32-or1k.c ++++ b/bfd/elf32-or1k.c +@@ -3039,8 +3039,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-or1k_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++or1k_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_or1k_link_hash_table *htab; + bfd *dynobj; +@@ -3053,7 +3053,8 @@ or1k_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -3406,7 +3407,7 @@ or1k_grok_psinfo (bfd *abfd, Elf_Interna + #define elf_backend_copy_indirect_symbol or1k_elf_copy_indirect_symbol + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections or1k_elf_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections or1k_elf_size_dynamic_sections ++#define elf_backend_late_size_sections or1k_elf_late_size_sections + #define elf_backend_adjust_dynamic_symbol or1k_elf_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol or1k_elf_finish_dynamic_symbol + +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -5477,8 +5477,8 @@ static const unsigned char glink_eh_fram + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_elf_link_hash_table *htab; + asection *s; +@@ -5486,11 +5486,12 @@ ppc_elf_size_dynamic_sections (bfd *outp + bfd *ibfd; + + #ifdef DEBUG +- fprintf (stderr, "ppc_elf_size_dynamic_sections called\n"); ++ fprintf (stderr, "ppc_elf_late_size_sections called\n"); + #endif + + htab = ppc_elf_hash_table (info); +- BFD_ASSERT (htab->elf.dynobj != NULL); ++ if (htab->elf.dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -10414,7 +10415,7 @@ ppc_elf_finish_dynamic_sections (bfd *ou + #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol + #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol + #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook +-#define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections ppc_elf_late_size_sections + #define elf_backend_hash_symbol ppc_elf_hash_symbol + #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections +--- a/bfd/elf32-rl78.c ++++ b/bfd/elf32-rl78.c +@@ -1440,8 +1440,8 @@ rl78_elf_finish_dynamic_sections (bfd *a + } + + static bool +-rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++rl78_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2609,8 +2609,8 @@ rl78_elf_relax_section (bfd *abfd, + + #define bfd_elf32_bfd_relax_section rl78_elf_relax_section + #define elf_backend_check_relocs rl78_elf_check_relocs +-#define elf_backend_always_size_sections \ +- rl78_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ rl78_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + rl78_elf_finish_dynamic_sections + +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -1366,7 +1366,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1778,8 +1778,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1790,7 +1790,7 @@ elf_s390_size_dynamic_sections (bfd *out + htab = elf_s390_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3926,7 +3926,7 @@ elf32_s390_merge_private_bfd_data (bfd * + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf32-score.c ++++ b/bfd/elf32-score.c +@@ -1089,7 +1089,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s3_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s3_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + static bool + score_elf_sort_hash_table (struct bfd_link_info *info, +@@ -3160,8 +3160,8 @@ s3_bfd_score_elf_adjust_dynamic_symbol ( + /* This function is called after all the input files have been read, + and the input sections have been assigned to output sections. */ + static bool +-s3_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s3_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3237,14 +3237,15 @@ s3_bfd_score_elf_always_size_sections (b + + /* Set the sizes of the dynamic sections. */ + static bool +-s3_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s3_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3313,7 +3314,7 @@ s3_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s3_bfd_score_elf_always_size_sections() has already done ++ /* s3_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +@@ -4177,22 +4178,22 @@ _bfd_score_elf_adjust_dynamic_symbol (st + } + + static bool +-_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s3_bfd_score_elf_early_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s7_bfd_score_elf_early_size_sections (output_bfd, info); + } + + static bool +-_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s3_bfd_score_elf_late_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s7_bfd_score_elf_late_size_sections (output_bfd, info); + } + + static bool +@@ -4455,10 +4456,10 @@ _bfd_score_elf_common_definition (Elf_In + _bfd_score_elf_section_from_bfd_section + #define elf_backend_adjust_dynamic_symbol \ + _bfd_score_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_score_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_score_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_score_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_score_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections \ + _bfd_score_elf_create_dynamic_sections +--- a/bfd/elf32-score.h ++++ b/bfd/elf32-score.h +@@ -78,10 +78,10 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + struct elf_link_hash_entry *); + + extern bool +-s7_bfd_score_elf_always_size_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_early_size_sections (bfd *, struct bfd_link_info *); + + extern bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern bool + s7_bfd_score_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); +--- a/bfd/elf32-score7.c ++++ b/bfd/elf32-score7.c +@@ -975,7 +975,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s7_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s7_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + + static bool +@@ -2969,8 +2969,8 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + and the input sections have been assigned to output sections. */ + + bool +-s7_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s7_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3047,14 +3047,15 @@ s7_bfd_score_elf_always_size_sections (b + /* Set the sizes of the dynamic sections. */ + + bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s7_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3123,7 +3124,7 @@ s7_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s7_bfd_score_elf_always_size_sections() has already done ++ /* s7_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +--- a/bfd/elf32-sh.c ++++ b/bfd/elf32-sh.c +@@ -2925,7 +2925,7 @@ allocate_dynrelocs (struct elf_link_hash + It's a convenient place to determine the PLT style. */ + + static bool +-sh_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++sh_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + sh_elf_hash_table (info)->plt_info = get_plt_info (output_bfd, + bfd_link_pic (info)); +@@ -2940,8 +2940,8 @@ sh_elf_always_size_sections (bfd *output + /* Set the sizes of the dynamic sections. */ + + static bool +-sh_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++sh_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_sh_link_hash_table *htab; + bfd *dynobj; +@@ -2954,7 +2954,8 @@ sh_elf_size_dynamic_sections (bfd *outpu + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -6589,10 +6590,8 @@ sh_elf_encode_eh_address (bfd *abfd, + sh_elf_link_hash_table_create + #define elf_backend_adjust_dynamic_symbol \ + sh_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- sh_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- sh_elf_size_dynamic_sections ++#define elf_backend_early_size_sections sh_elf_early_size_sections ++#define elf_backend_late_size_sections sh_elf_late_size_sections + #define elf_backend_omit_section_dynsym sh_elf_omit_section_dynsym + #define elf_backend_finish_dynamic_symbol \ + sh_elf_finish_dynamic_symbol +--- a/bfd/elf32-sparc.c ++++ b/bfd/elf32-sparc.c +@@ -248,8 +248,7 @@ elf32_sparc_reloc_type_class (const stru + #define elf_backend_adjust_dynamic_symbol \ + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ + _bfd_sparc_elf_finish_dynamic_symbol +--- a/bfd/elf32-tic6x.c ++++ b/bfd/elf32-tic6x.c +@@ -3160,7 +3160,7 @@ elf32_tic6x_allocate_dynrelocs (struct e + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_tic6x_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf32_tic6x_link_hash_table *htab; + bfd *dynobj; +@@ -3171,7 +3171,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + htab = elf32_tic6x_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3358,7 +3358,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + and the input sections have been assigned to output sections. */ + + static bool +-elf32_tic6x_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (elf32_tic6x_using_dsbt (output_bfd) && !bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -4261,10 +4261,10 @@ elf32_tic6x_write_section (bfd *output_b + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible + #define elf_backend_finish_dynamic_symbol \ + elf32_tic6x_finish_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf32_tic6x_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_tic6x_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf32_tic6x_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_tic6x_late_size_sections + #define elf_backend_finish_dynamic_sections \ + elf32_tic6x_finish_dynamic_sections + #define bfd_elf32_bfd_final_link \ +--- a/bfd/elf32-tilegx.c ++++ b/bfd/elf32-tilegx.c +@@ -105,7 +105,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf32-tilepro.c ++++ b/bfd/elf32-tilepro.c +@@ -2182,11 +2182,9 @@ tilepro_elf_omit_section_dynsym (bfd *ou + #define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + + static bool +-tilepro_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++tilepro_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { +- (void)output_bfd; +- + struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; +@@ -2195,7 +2193,8 @@ tilepro_elf_size_dynamic_sections (bfd * + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3739,7 +3738,7 @@ tilepro_additional_program_headers (bfd + #define elf_backend_check_relocs tilepro_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilepro_elf_late_size_sections + #define elf_backend_relocate_section tilepro_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +--- a/bfd/elf32-vax.c ++++ b/bfd/elf32-vax.c +@@ -36,7 +36,6 @@ static bool elf_vax_check_relocs (bfd *, + asection *, const Elf_Internal_Rela *); + static bool elf_vax_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); +-static bool elf_vax_size_dynamic_sections (bfd *, struct bfd_link_info *); + static int elf_vax_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, +@@ -985,8 +984,8 @@ elf_vax_discard_got_entries (struct elf_ + /* Discard unused dynamic data if this is a static link. */ + + static bool +-elf_vax_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_vax_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -1024,14 +1023,15 @@ elf_vax_always_size_sections (bfd *outpu + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_vax_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_vax_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -1861,10 +1861,8 @@ elf_vax_plt_sym_val (bfd_vma i, const as + #define elf_backend_check_relocs elf_vax_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf_vax_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf_vax_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf_vax_size_dynamic_sections ++#define elf_backend_early_size_sections elf_vax_early_size_sections ++#define elf_backend_late_size_sections elf_vax_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_vax_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-xstormy16.c ++++ b/bfd/elf32-xstormy16.c +@@ -706,8 +706,8 @@ xstormy16_elf_relax_section (bfd *dynobj + } + + static bool +-xstormy16_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++xstormy16_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -1013,8 +1013,8 @@ xstormy16_elf_gc_mark_hook (asection *se + #define elf_backend_relocate_section xstormy16_elf_relocate_section + #define elf_backend_gc_mark_hook xstormy16_elf_gc_mark_hook + #define elf_backend_check_relocs xstormy16_elf_check_relocs +-#define elf_backend_always_size_sections \ +- xstormy16_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ xstormy16_elf_early_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -1568,8 +1568,8 @@ elf_xtensa_allocate_local_got_size (stru + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_xtensa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + bfd *dynobj, *abfd; +@@ -1586,7 +1586,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + srelgot = htab->elf.srelgot; + srelplt = htab->elf.srelplt; + +@@ -1791,8 +1791,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + } + + static bool +-elf_xtensa_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_xtensa_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + asection *tls_sec; +@@ -11551,8 +11550,8 @@ static const struct bfd_elf_special_sect + #define elf_backend_object_p elf_xtensa_object_p + #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class + #define elf_backend_relocate_section elf_xtensa_relocate_section +-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections +-#define elf_backend_always_size_sections elf_xtensa_always_size_sections ++#define elf_backend_late_size_sections elf_xtensa_late_size_sections ++#define elf_backend_early_size_sections elf_xtensa_early_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_special_sections elf_xtensa_special_sections + #define elf_backend_action_discarded elf_xtensa_action_discarded +--- a/bfd/elf64-alpha.c ++++ b/bfd/elf64-alpha.c +@@ -2579,8 +2579,8 @@ elf64_alpha_size_plt_section (struct bfd + } + + static bool +-elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *i; + struct alpha_elf_link_hash_table * htab; +@@ -2806,8 +2806,8 @@ elf64_alpha_size_rela_got_section (struc + /* Set the sizes of the dynamic sections. */ + + static bool +-elf64_alpha_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2819,7 +2819,8 @@ elf64_alpha_size_dynamic_sections (bfd * + return false; + + dynobj = elf_hash_table(info)->dynobj; +- BFD_ASSERT(dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5465,10 +5466,10 @@ static const struct elf_size_info alpha_ + elf64_alpha_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol +-#define elf_backend_always_size_sections \ +- elf64_alpha_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf64_alpha_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf64_alpha_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf64_alpha_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-hppa.c ++++ b/bfd/elf64-hppa.c +@@ -176,9 +176,6 @@ static bool elf64_hppa_adjust_dynamic_sy + static bool elf64_hppa_mark_milli_and_exported_functions + (struct elf_link_hash_entry *, void *); + +-static bool elf64_hppa_size_dynamic_sections +- (bfd *, struct bfd_link_info *); +- + static int elf64_hppa_link_output_symbol_hook + (struct bfd_link_info *, const char *, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); +@@ -1520,7 +1517,7 @@ elf64_hppa_mark_milli_and_exported_funct + the contents of our special sections. */ + + static bool +-elf64_hppa_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf64_hppa_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf64_hppa_link_hash_table *hppa_info; + struct elf64_hppa_allocate_data data; +@@ -1534,7 +1531,8 @@ elf64_hppa_size_dynamic_sections (bfd *o + return false; + + dynobj = hppa_info->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Mark each function this program exports so that we will allocate + space in the .opd section for each function's FPTR. If we are +@@ -3984,8 +3982,7 @@ const struct elf_size_info hppa64_elf_si + #define elf_backend_adjust_dynamic_symbol \ + elf64_hppa_adjust_dynamic_symbol + +-#define elf_backend_size_dynamic_sections \ +- elf64_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf64_hppa_late_size_sections + + #define elf_backend_finish_dynamic_symbol \ + elf64_hppa_finish_dynamic_symbol +--- a/bfd/elf64-ia64-vms.c ++++ b/bfd/elf64-ia64-vms.c +@@ -2590,8 +2590,8 @@ elf64_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elf64_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf64_ia64_allocate_data data; + struct elf64_ia64_link_hash_table *ia64_info; +@@ -2600,11 +2600,12 @@ elf64_ia64_size_dynamic_sections (bfd *o + struct elf_link_hash_table *hash_table; + + hash_table = elf_hash_table (info); +- dynobj = hash_table->dynobj; + ia64_info = elf64_ia64_hash_table (info); + if (ia64_info == NULL) + return false; +- BFD_ASSERT(dynobj != NULL); ++ dynobj = hash_table->dynobj; ++ if (dynobj == NULL) ++ return true; + data.info = info; + + /* Allocate the GOT entries. */ +@@ -5484,8 +5485,8 @@ static const struct elf_size_info elf64_ + elf64_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf64_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf64_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf64_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4739,10 +4739,10 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -118,8 +118,8 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_edit +-#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections ++#define elf_backend_early_size_sections ppc64_elf_edit ++#define elf_backend_late_size_sections ppc64_elf_late_size_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_action_discarded ppc64_elf_action_discarded +@@ -10117,7 +10117,7 @@ allocate_dynrelocs (struct elf_link_hash + ((((v) & 0x3ffff0000ULL) << 16) | (v & 0xffff)) + #define HA34(v) ((v + (1ULL << 33)) >> 34) + +-/* Called via elf_link_hash_traverse from ppc64_elf_size_dynamic_sections ++/* Called via elf_link_hash_traverse from ppc64_elf_late_size_sections + to set up space for global entry stubs. These are put in glink, + after the branch table. */ + +@@ -10194,8 +10194,8 @@ size_global_entry_stubs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc64_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc64_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + bfd *dynobj; +@@ -10210,7 +10210,7 @@ ppc64_elf_size_dynamic_sections (bfd *ou + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -1301,7 +1301,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1714,8 +1714,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1729,7 +1729,7 @@ elf_s390_size_dynamic_sections (bfd *out + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3894,7 +3894,7 @@ const struct elf_size_info s390_elf64_si + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf64-sparc.c ++++ b/bfd/elf64-sparc.c +@@ -938,8 +938,8 @@ const struct elf_size_info elf64_sparc_s + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym \ + _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section \ + _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-tilegx.c ++++ b/bfd/elf64-tilegx.c +@@ -106,7 +106,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -2377,8 +2377,7 @@ elf_x86_64_scan_relocs (bfd *abfd, struc + } + + static bool +-elf_x86_64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_x86_64_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -2391,7 +2390,7 @@ elf_x86_64_always_size_sections (bfd *ou + elf_x86_64_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Return the relocation value for @tpoff relocation +@@ -5284,7 +5283,7 @@ elf_x86_64_special_sections[]= + elf_x86_64_reloc_name_lookup + + #define elf_backend_relocs_compatible elf_x86_64_relocs_compatible +-#define elf_backend_always_size_sections elf_x86_64_always_size_sections ++#define elf_backend_early_size_sections elf_x86_64_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections elf_x86_64_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf_x86_64_finish_dynamic_symbol +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6619,8 +6619,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend may have to create some sections regardless of whether + we're dynamic or not. */ +- if (bed->elf_backend_always_size_sections +- && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) ++ if (bed->elf_backend_early_size_sections ++ && !bed->elf_backend_early_size_sections (output_bfd, info)) + return false; + + dynobj = elf_hash_table (info)->dynobj; +@@ -7400,9 +7400,8 @@ NOTE: This behaviour is deprecated and w + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (dynobj != NULL +- && bed->elf_backend_size_dynamic_sections != NULL +- && ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info)) ++ if (bed->elf_backend_late_size_sections != NULL ++ && !bed->elf_backend_late_size_sections (output_bfd, info)) + return false; + + if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created) +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4125,10 +4125,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -112,7 +112,7 @@ + allocate space for one relocation on the slot. Record the GOT offset + for this symbol. + +- elfNN_aarch64_size_dynamic_sections () ++ elfNN_aarch64_late_size_sections () + + Iterate all input BFDS, look for in the local symbol data structure + constructed earlier for local TLS symbols and allocate them double +@@ -8886,8 +8886,8 @@ elfNN_aarch64_allocate_local_ifunc_dynre + though ! */ + + static bool +-elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_aarch64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_aarch64_link_hash_table *htab; + bfd *dynobj; +@@ -8898,7 +8898,8 @@ elfNN_aarch64_size_dynamic_sections (bfd + htab = elf_aarch64_hash_table ((info)); + dynobj = htab->root.dynobj; + +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -9300,8 +9301,8 @@ elfNN_aarch64_create_small_pltn_entry (s + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_aarch64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_aarch64_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -10036,8 +10037,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_adjust_dynamic_symbol \ + elfNN_aarch64_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_aarch64_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_aarch64_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_aarch64_check_relocs +@@ -10086,8 +10087,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_section_from_shdr \ + elfNN_aarch64_section_from_shdr + +-#define elf_backend_size_dynamic_sections \ +- elfNN_aarch64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_aarch64_late_size_sections + + #define elf_backend_size_info \ + elfNN_aarch64_size_info +--- a/bfd/elfnn-ia64.c ++++ b/bfd/elfnn-ia64.c +@@ -2986,8 +2986,8 @@ elfNN_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; +@@ -2998,8 +2998,9 @@ elfNN_ia64_size_dynamic_sections (bfd *o + if (ia64_info == NULL) + return false; + dynobj = ia64_info->root.dynobj; ++ if (dynobj == NULL) ++ return true; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; +- BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ +@@ -5035,8 +5036,8 @@ ignore_errors (const char *fmt ATTRIBUTE + elfNN_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elfNN_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elfnn-loongarch.c ++++ b/bfd/elfnn-loongarch.c +@@ -1280,8 +1280,8 @@ maybe_set_textrel (struct elf_link_hash_ + } + + static bool +-loongarch_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++loongarch_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1291,7 +1291,8 @@ loongarch_elf_size_dynamic_sections (bfd + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3444,7 +3445,7 @@ elf_loongarch64_hash_symbol (struct elf_ + loongarch_elf_create_dynamic_sections + #define elf_backend_check_relocs loongarch_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections ++#define elf_backend_late_size_sections loongarch_elf_late_size_sections + #define elf_backend_relocate_section loongarch_elf_relocate_section + #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -1376,7 +1376,7 @@ allocate_local_ifunc_dynrelocs (void **s + } + + static bool +-riscv_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++riscv_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct riscv_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1386,7 +1386,8 @@ riscv_elf_size_dynamic_sections (bfd *ou + htab = riscv_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5256,7 +5257,7 @@ riscv_elf_merge_symbol_attribute (struct + #define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections + #define elf_backend_check_relocs riscv_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections ++#define elf_backend_late_size_sections riscv_elf_late_size_sections + #define elf_backend_relocate_section riscv_elf_relocate_section + #define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9559,8 +9559,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + check for any mips16 stub sections that we can discard. */ + + bool +-_bfd_mips_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *sect; + struct mips_elf_link_hash_table *htab; +@@ -9903,8 +9903,8 @@ mips_elf_set_plt_sym_value (struct mips_ + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s, *sreldyn; +@@ -9914,7 +9914,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -14833,7 +14834,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14892,7 +14893,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -52,9 +52,9 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_always_size_sections ++extern bool _bfd_mips_elf_early_size_sections + (bfd *, struct bfd_link_info *); +-extern bool _bfd_mips_elf_size_dynamic_sections ++extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, +--- a/bfd/elfxx-sparc.c ++++ b/bfd/elfxx-sparc.c +@@ -2381,8 +2381,8 @@ _bfd_sparc_elf_omit_section_dynsym (bfd + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_sparc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_sparc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct _bfd_sparc_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2392,7 +2392,8 @@ _bfd_sparc_elf_size_dynamic_sections (bf + htab = _bfd_sparc_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-sparc.h ++++ b/bfd/elfxx-sparc.h +@@ -117,7 +117,7 @@ extern bool _bfd_sparc_elf_adjust_dynami + (struct bfd_link_info *, struct elf_link_hash_entry *); + extern bool _bfd_sparc_elf_omit_section_dynsym + (bfd *, struct bfd_link_info *, asection *); +-extern bool _bfd_sparc_elf_size_dynamic_sections ++extern bool _bfd_sparc_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern bool _bfd_sparc_elf_new_section_hook + (bfd *, asection *); +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -483,11 +483,11 @@ + #ifndef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol 0 + #endif +-#ifndef elf_backend_always_size_sections +-#define elf_backend_always_size_sections 0 ++#ifndef elf_backend_early_size_sections ++#define elf_backend_early_size_sections 0 + #endif +-#ifndef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections 0 ++#ifndef elf_backend_late_size_sections ++#define elf_backend_late_size_sections 0 + #endif + #ifndef elf_backend_strip_zero_sized_dynamic_sections + #define elf_backend_strip_zero_sized_dynamic_sections 0 +@@ -842,8 +842,8 @@ static const struct elf_backend_data elf + elf_backend_check_directives, + elf_backend_notice_as_needed, + elf_backend_adjust_dynamic_symbol, +- elf_backend_always_size_sections, +- elf_backend_size_dynamic_sections, ++ elf_backend_early_size_sections, ++ elf_backend_late_size_sections, + elf_backend_strip_zero_sized_dynamic_sections, + elf_backend_init_index_section, + elf_backend_relocate_section, +--- a/bfd/elfxx-tilegx.c ++++ b/bfd/elfxx-tilegx.c +@@ -2430,8 +2430,8 @@ tilegx_elf_omit_section_dynsym (bfd *out + } + + bool +-tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++tilegx_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2441,7 +2441,8 @@ tilegx_elf_size_dynamic_sections (bfd *o + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-tilegx.h ++++ b/bfd/elfxx-tilegx.h +@@ -57,7 +57,7 @@ tilegx_elf_omit_section_dynsym (bfd *, + asection *); + + extern bool +-tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++tilegx_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern int + tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -2019,7 +2019,7 @@ _bfd_elf_x86_valid_reloc_p (asection *in + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_x86_elf_size_dynamic_sections (bfd *output_bfd, ++_bfd_x86_elf_late_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + struct elf_x86_link_hash_table *htab; +@@ -2035,7 +2035,7 @@ _bfd_x86_elf_size_dynamic_sections (bfd + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -2616,8 +2616,8 @@ _bfd_x86_elf_finish_dynamic_sections (bf + + + bool +-_bfd_x86_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_x86_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec = elf_hash_table (info)->tls_sec; + +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -807,13 +807,13 @@ extern bool _bfd_elf_x86_valid_reloc_p + const Elf_Internal_Rela *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, Elf_Internal_Shdr *, bool *); + +-extern bool _bfd_x86_elf_size_dynamic_sections ++extern bool _bfd_x86_elf_late_size_sections + (bfd *, struct bfd_link_info *); + + extern struct elf_x86_link_hash_table *_bfd_x86_elf_finish_dynamic_sections + (bfd *, struct bfd_link_info *); + +-extern bool _bfd_x86_elf_always_size_sections ++extern bool _bfd_x86_elf_early_size_sections + (bfd *, struct bfd_link_info *); + + extern void _bfd_x86_elf_merge_symbol_attribute +@@ -885,8 +885,8 @@ extern void _bfd_x86_elf_link_report_rel + + #define elf_backend_check_relocs \ + _bfd_x86_elf_check_relocs +-#define elf_backend_size_dynamic_sections \ +- _bfd_x86_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_x86_elf_late_size_sections + #define elf_backend_merge_symbol_attribute \ + _bfd_x86_elf_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ +--- a/ld/emultempl/vms.em ++++ b/ld/emultempl/vms.em +@@ -196,10 +196,9 @@ gld${EMULATION_NAME}_before_allocation ( + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (elf_hash_table (&link_info)->dynamic_sections_created +- && bed->elf_backend_size_dynamic_sections +- && ! (*bed->elf_backend_size_dynamic_sections) (link_info.output_bfd, +- &link_info)) ++ if (bed->elf_backend_late_size_sections ++ && !bed->elf_backend_late_size_sections (link_info.output_bfd, ++ &link_info)) + einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); + + before_allocation_default (); diff --git a/toolchain/binutils/patches/2.39/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch b/toolchain/binutils/patches/2.39/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch new file mode 100644 index 0000000000..f0c0d7a10a --- /dev/null +++ b/toolchain/binutils/patches/2.39/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch @@ -0,0 +1,218 @@ +From 3c6c32951e292a51ede70b8087bb0308d7dbc4fc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 20:33:32 +1030 +Subject: [PATCH 2/2] PR 30569, delete _bfd_mips_elf_early_size_sections + +PR30569 was triggered by a patch of mine 6540edd52cc0 moving the call +to always_size_sections in bfd_elf_size_dynamic_sections earlier, made +to support the x86 DT_RELR implementation. This broke mips16 code +handling stubs when --export-dynamic is passed to the linker, because +numerous symbols then became dynamic after always_size_sections. The +mips backend fiddles with symbols in its always_size_sections. Maciej +in 902e9fc76a0e had moved the call to always_size_sections to after +the export-dynamic code. Prior to that, Nathan in 04c3a75556c0 moved +it before the exec stack code, back to the start of +bfd_elf_size_dynamic_sections which was where Ian put it originally +in ff12f303355b. So the call has moved around a little. I'm leaving +it where it is, and instead calling mips_elf_check_symbols from +late_size_sections (the old size_dynamic_sections) which is now always +called. In fact, the whole of _bfd_mips_elf_early_size_sections can +be merged into _bfd_mips_elf_late_size_sections. +--- + bfd/elf32-mips.c | 1 - + bfd/elf64-mips.c | 2 -- + bfd/elfn32-mips.c | 1 - + bfd/elfxx-mips.c | 84 +++++++++++++++++++---------------------------- + bfd/elfxx-mips.h | 2 -- + 5 files changed, 34 insertions(+), 56 deletions(-) + +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2525,7 +2525,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4739,8 +4739,6 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections \ +- _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections \ + _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4125,7 +4125,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9554,48 +9554,6 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + return _bfd_elf_adjust_dynamic_copy (info, h, s); + } + +-/* This function is called after all the input files have been read, +- and the input sections have been assigned to output sections. We +- check for any mips16 stub sections that we can discard. */ +- +-bool +-_bfd_mips_elf_early_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) +-{ +- asection *sect; +- struct mips_elf_link_hash_table *htab; +- struct mips_htab_traverse_info hti; +- +- htab = mips_elf_hash_table (info); +- BFD_ASSERT (htab != NULL); +- +- /* The .reginfo section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".reginfo"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- /* The .MIPS.abiflags section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- hti.info = info; +- hti.output_bfd = output_bfd; +- hti.error = false; +- mips_elf_link_hash_traverse (mips_elf_hash_table (info), +- mips_elf_check_symbols, &hti); +- if (hti.error) +- return false; +- +- return true; +-} +- + /* If the link uses a GOT, lay it out and work out its size. */ + + static bool +@@ -9900,7 +9858,8 @@ mips_elf_set_plt_sym_value (struct mips_ + return true; + } + +-/* Set the sizes of the dynamic sections. */ ++/* Set the sizes of the dynamic sections, some mips non-dynamic sections, ++ and check for any mips16 stub sections that we can discard. */ + + bool + _bfd_mips_elf_late_size_sections (bfd *output_bfd, +@@ -9910,14 +9869,39 @@ _bfd_mips_elf_late_size_sections (bfd *o + asection *s, *sreldyn; + bool reltext; + struct mips_elf_link_hash_table *htab; ++ struct mips_htab_traverse_info hti; + + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = elf_hash_table (info)->dynobj; ++ ++ /* The .reginfo section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".reginfo"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf32_External_RegInfo)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ /* The .MIPS.abiflags section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf_External_ABIFlags_v0)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ hti.info = info; ++ hti.output_bfd = output_bfd; ++ hti.error = false; ++ mips_elf_link_hash_traverse (htab, mips_elf_check_symbols, &hti); ++ if (hti.error) ++ return false; ++ ++ dynobj = htab->root.dynobj; + if (dynobj == NULL) + return true; + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -10057,7 +10041,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + else if (bfd_link_executable (info) +- && ! mips_elf_hash_table (info)->use_rld_obj_head ++ && !htab->use_rld_obj_head + && startswith (name, ".rld_map")) + { + /* We add a room for __rld_map. It will be filled in by the +@@ -10066,7 +10050,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + else if (SGI_COMPAT (output_bfd) + && startswith (name, ".compact_rel")) +- s->size += mips_elf_hash_table (info)->compact_rel_size; ++ s->size += htab->compact_rel_size; + else if (s == htab->root.splt) + { + /* If the last PLT entry has a branch delay slot, allocate +@@ -10106,7 +10090,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in _bfd_mips_elf_finish_dynamic_sections, but we +@@ -14834,7 +14818,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14893,7 +14877,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -52,8 +52,6 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_early_size_sections +- (bfd *, struct bfd_link_info *); + extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section diff --git a/toolchain/binutils/patches/2.39/039-LoongArch-ld-Fix-relocation-error-of-pcrel.patch b/toolchain/binutils/patches/2.39/039-LoongArch-ld-Fix-relocation-error-of-pcrel.patch index 67e499de67..bf452e566a 100644 --- a/toolchain/binutils/patches/2.39/039-LoongArch-ld-Fix-relocation-error-of-pcrel.patch +++ b/toolchain/binutils/patches/2.39/039-LoongArch-ld-Fix-relocation-error-of-pcrel.patch @@ -23,7 +23,7 @@ Subject: [PATCH 039/160] LoongArch:ld: Fix relocation error of pcrel. --- a/bfd/elfnn-loongarch.c +++ b/bfd/elfnn-loongarch.c -@@ -2341,9 +2341,10 @@ loongarch_elf_relocate_section (bfd *out +@@ -2342,9 +2342,10 @@ loongarch_elf_relocate_section (bfd *out case R_LARCH_SOP_PUSH_PLT_PCREL: unresolved_reloc = false; diff --git a/toolchain/binutils/patches/2.40/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch b/toolchain/binutils/patches/2.40/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch new file mode 100644 index 0000000000..9c7635df44 --- /dev/null +++ b/toolchain/binutils/patches/2.40/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch @@ -0,0 +1,2172 @@ +From af969b14aedcc0ae27dcefab4327ff2d153dec8b Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 19:25:42 +1030 +Subject: [PATCH 1/2] PR 30569, always call elf_backend_size_dynamic_sections + +This largely mechanical patch is preparation for a followup patch. + +For quite some time I've thought that it would be useful to call +elf_backend_size_dynamic_sections even when no dynamic objects are +seen by the linker. That's what this patch does, with some renaming. +There are no functional changes to the linker, just a move of the +dynobj test in bfd_elf_size_dynamic_sections to target backend +functions, replacing the asserts/aborts already there. No doubt some +of the current always_size_sections functions could be moved to +size_dynamic_sections but I haven't made that change. + +Because both hooks are now always called, I have renamed +always_size_sections to early_size_sections and size_dynamic_sections +to late_size_sections. I condisdered calling late_size_sections plain +size_sections, since this is the usual target dynamic section sizing +hook, but decided that searching the sources for "size_sections" would +then hit early_size_sections and other functions. +--- + bfd/elf-bfd.h | 35 +++++++++++++++++------------------ + bfd/elf-m10300.c | 11 ++++++----- + bfd/elf32-arc.c | 9 +++++---- + bfd/elf32-arm.c | 15 ++++++++------- + bfd/elf32-bfin.c | 31 ++++++++++++++++--------------- + bfd/elf32-cr16.c | 11 ++++++----- + bfd/elf32-cris.c | 13 +++++++------ + bfd/elf32-csky.c | 8 ++++---- + bfd/elf32-frv.c | 23 ++++++++++++----------- + bfd/elf32-hppa.c | 8 ++++---- + bfd/elf32-i386.c | 7 +++---- + bfd/elf32-lm32.c | 15 ++++++++------- + bfd/elf32-m32c.c | 8 ++++---- + bfd/elf32-m32r.c | 11 ++++++----- + bfd/elf32-m68k.c | 16 ++++++++-------- + bfd/elf32-metag.c | 8 ++++---- + bfd/elf32-microblaze.c | 9 +++++---- + bfd/elf32-mips.c | 6 ++---- + bfd/elf32-nds32.c | 9 +++++---- + bfd/elf32-nios2.c | 15 ++++++++------- + bfd/elf32-or1k.c | 9 +++++---- + bfd/elf32-ppc.c | 11 ++++++----- + bfd/elf32-rl78.c | 8 ++++---- + bfd/elf32-s390.c | 10 +++++----- + bfd/elf32-score.c | 35 ++++++++++++++++++----------------- + bfd/elf32-score.h | 4 ++-- + bfd/elf32-score7.c | 13 +++++++------ + bfd/elf32-sh.c | 15 +++++++-------- + bfd/elf32-sparc.c | 3 +-- + bfd/elf32-tic6x.c | 14 +++++++------- + bfd/elf32-tilegx.c | 2 +- + bfd/elf32-tilepro.c | 11 +++++------ + bfd/elf32-vax.c | 16 +++++++--------- + bfd/elf32-xstormy16.c | 8 ++++---- + bfd/elf32-xtensa.c | 13 ++++++------- + bfd/elf64-alpha.c | 19 ++++++++++--------- + bfd/elf64-hppa.c | 11 ++++------- + bfd/elf64-ia64-vms.c | 13 +++++++------ + bfd/elf64-mips.c | 8 ++++---- + bfd/elf64-ppc.c | 12 ++++++------ + bfd/elf64-s390.c | 10 +++++----- + bfd/elf64-sparc.c | 4 ++-- + bfd/elf64-tilegx.c | 2 +- + bfd/elf64-x86-64.c | 7 +++---- + bfd/elflink.c | 9 ++++----- + bfd/elfn32-mips.c | 6 ++---- + bfd/elfnn-aarch64.c | 21 +++++++++++---------- + bfd/elfnn-ia64.c | 11 ++++++----- + bfd/elfnn-kvx.c | 19 +++++++++---------- + bfd/elfnn-loongarch.c | 9 +++++---- + bfd/elfnn-riscv.c | 7 ++++--- + bfd/elfxx-mips.c | 15 ++++++++------- + bfd/elfxx-mips.h | 4 ++-- + bfd/elfxx-sparc.c | 7 ++++--- + bfd/elfxx-sparc.h | 2 +- + bfd/elfxx-target.h | 12 ++++++------ + bfd/elfxx-tilegx.c | 7 ++++--- + bfd/elfxx-tilegx.h | 2 +- + bfd/elfxx-x86.c | 8 ++++---- + bfd/elfxx-x86.h | 8 ++++---- + ld/emultempl/vms.em | 7 +++---- + 61 files changed, 343 insertions(+), 337 deletions(-) + +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1173,7 +1173,7 @@ struct elf_backend_data + /* The ADJUST_DYNAMIC_SYMBOL function is called by the ELF backend + linker for every symbol which is defined by a dynamic object and + referenced by a regular object. This is called after all the +- input files have been seen, but before the SIZE_DYNAMIC_SECTIONS ++ input files have been seen, but before the LATE_SIZE_SECTIONS + function has been called. The hash table entry should be + bfd_link_hash_defined ore bfd_link_hash_defweak, and it should be + defined in a section from a dynamic object. Dynamic object +@@ -1185,24 +1185,23 @@ struct elf_backend_data + bool (*elf_backend_adjust_dynamic_symbol) + (struct bfd_link_info *info, struct elf_link_hash_entry *h); + +- /* The ALWAYS_SIZE_SECTIONS function is called by the backend linker +- after all the linker input files have been seen but before the +- section sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL, but before SIZE_DYNAMIC_SECTIONS. */ +- bool (*elf_backend_always_size_sections) ++ /* The EARLY_SIZE_SECTIONS and LATE_SIZE_SECTIONS functions are ++ called by the backend linker after all linker input files have ++ been seen and sections have been assigned to output sections, but ++ before the section sizes have been set. Both of these functions ++ are called even when no dynamic object is seen by the linker. ++ Between them, they must set the sizes of the dynamic sections and ++ other backend specific sections, and may fill in their contents. ++ Most backends need only use LATE_SIZE_SECTIONS. ++ EARLY_SIZE_SECTIONS is called before --export-dynamic makes some ++ symbols dynamic and before ADJUST_DYNAMIC_SYMBOL processes ++ dynamic symbols, LATE_SIZE_SECTIONS afterwards. The generic ELF ++ linker can handle the .dynsym, .dynstr and .hash sections. ++ Besides those, these functions must handle the .interp section ++ and any other sections created by CREATE_DYNAMIC_SECTIONS. */ ++ bool (*elf_backend_early_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); +- +- /* The SIZE_DYNAMIC_SECTIONS function is called by the ELF backend +- linker after all the linker input files have been seen but before +- the sections sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL has been called on all appropriate symbols. +- It is only called when linking against a dynamic object. It must +- set the sizes of the dynamic sections, and may fill in their +- contents as well. The generic ELF linker can handle the .dynsym, +- .dynstr and .hash sections. This function must handle the +- .interp section and any sections created by the +- CREATE_DYNAMIC_SECTIONS entry point. */ +- bool (*elf_backend_size_dynamic_sections) ++ bool (*elf_backend_late_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); + + /* The STRIP_ZERO_SIZED_DYNAMIC_SECTIONS function is called by the +--- a/bfd/elf-m10300.c ++++ b/bfd/elf-m10300.c +@@ -5012,8 +5012,8 @@ _bfd_mn10300_elf_adjust_dynamic_symbol ( + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_mn10300_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_mn10300_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + struct elf32_mn10300_link_hash_table *htab = elf32_mn10300_hash_table (info); + bfd * dynobj; +@@ -5021,7 +5021,8 @@ _bfd_mn10300_elf_size_dynamic_sections ( + bool relocs; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5508,8 +5509,8 @@ mn10300_elf_mkobject (bfd *abfd) + _bfd_mn10300_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mn10300_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_mn10300_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mn10300_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_mn10300_elf_finish_dynamic_symbol +--- a/bfd/elf32-arc.c ++++ b/bfd/elf32-arc.c +@@ -2702,8 +2702,8 @@ elf_arc_finish_dynamic_sections (bfd * o + + /* Set the sizes of the dynamic sections. */ + static bool +-elf_arc_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_arc_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2711,7 +2711,8 @@ elf_arc_size_dynamic_sections (bfd *outp + struct elf_link_hash_table *htab = elf_hash_table (info); + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3126,7 +3127,7 @@ arc_elf_relax_section (bfd *abfd, asecti + #define elf_backend_finish_dynamic_symbol elf_arc_finish_dynamic_symbol + + #define elf_backend_finish_dynamic_sections elf_arc_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_arc_size_dynamic_sections ++#define elf_backend_late_size_sections elf_arc_late_size_sections + + #define elf_backend_can_gc_sections 1 + #define elf_backend_want_got_plt 1 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -16734,8 +16734,8 @@ bfd_elf32_arm_set_byteswap_code (struct + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info * info) ++elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; +@@ -16748,7 +16748,9 @@ elf32_arm_size_dynamic_sections (bfd * o + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; ++ + check_use_blx (htab); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -17120,8 +17122,7 @@ elf32_arm_size_dynamic_sections (bfd * o + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elf32_arm_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + struct elf32_arm_link_hash_table *htab; +@@ -20320,8 +20321,8 @@ elf32_arm_backend_symbol_processing (bfd + #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections +-#define elf_backend_always_size_sections elf32_arm_always_size_sections ++#define elf_backend_late_size_sections elf32_arm_late_size_sections ++#define elf_backend_early_size_sections elf32_arm_early_size_sections + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_init_file_header elf32_arm_init_file_header + #define elf_backend_reloc_type_class elf32_arm_reloc_type_class +--- a/bfd/elf32-bfin.c ++++ b/bfd/elf32-bfin.c +@@ -4027,8 +4027,8 @@ _bfinfdpic_size_got_plt (bfd *output_bfd + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_bfinfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -4037,7 +4037,8 @@ elf32_bfinfdpic_size_dynamic_sections (b + + htab = elf_hash_table (info); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -4086,7 +4087,7 @@ elf32_bfinfdpic_size_dynamic_sections (b + } + + static bool +-elf32_bfinfdpic_always_size_sections (bfd *output_bfd, ++elf32_bfinfdpic_early_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) +@@ -5124,15 +5125,16 @@ bfin_discard_copies (struct elf_link_has + } + + static bool +-bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++bfin_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5424,8 +5426,7 @@ struct bfd_elf_special_section const elf + #define elf_backend_check_relocs bfin_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + bfin_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- bfin_size_dynamic_sections ++#define elf_backend_late_size_sections bfin_late_size_sections + #define elf_backend_relocate_section bfin_relocate_section + #define elf_backend_finish_dynamic_symbol \ + bfin_finish_dynamic_symbol +@@ -5471,9 +5472,9 @@ struct bfd_elf_special_section const elf + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + bfinfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_bfinfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_bfinfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -5481,9 +5482,9 @@ struct bfd_elf_special_section const elf + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_bfinfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_bfinfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_bfinfdpic_late_size_sections + #undef elf_backend_finish_dynamic_symbol + #define elf_backend_finish_dynamic_symbol \ + elf32_bfinfdpic_finish_dynamic_symbol +--- a/bfd/elf32-cr16.c ++++ b/bfd/elf32-cr16.c +@@ -2390,15 +2390,16 @@ _bfd_cr16_elf_adjust_dynamic_symbol (str + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_cr16_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -2835,8 +2836,8 @@ _bfd_cr16_elf_reloc_type_class (const st + _bfd_cr16_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_cr16_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_cr16_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_cr16_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_cr16_elf_finish_dynamic_symbol +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2527,7 +2527,7 @@ cris_elf_plt_sym_val (bfd_vma i ATTRIBUT + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_cris_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_cris_size_dynamic_sections if no dynamic sections will be ++ or elf_cris_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static bool +@@ -3508,8 +3508,8 @@ cris_elf_check_relocs (bfd *abfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_cris_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_cris_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_cris_link_hash_table * htab; + bfd *dynobj; +@@ -3521,7 +3521,8 @@ elf_cris_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4090,8 +4091,8 @@ elf_cris_got_elt_size (bfd *abfd ATTRIBU + elf_cris_adjust_dynamic_symbol + #define elf_backend_copy_indirect_symbol \ + elf_cris_copy_indirect_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_cris_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf_cris_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_finish_dynamic_symbol \ + elf_cris_finish_dynamic_symbol +--- a/bfd/elf32-csky.c ++++ b/bfd/elf32-csky.c +@@ -1893,8 +1893,8 @@ csky_allocate_dynrelocs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++csky_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct csky_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1907,7 +1907,7 @@ csky_elf_size_dynamic_sections (bfd *out + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- return false; ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5344,7 +5344,7 @@ elf32_csky_obj_attrs_handle_unknown (bfd + /* Dynamic relocate related API. */ + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol csky_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections csky_elf_size_dynamic_sections ++#define elf_backend_late_size_sections csky_elf_late_size_sections + #define elf_backend_finish_dynamic_symbol csky_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections csky_elf_finish_dynamic_sections + #define elf_backend_rela_normal 1 +--- a/bfd/elf32-frv.c ++++ b/bfd/elf32-frv.c +@@ -5423,15 +5423,16 @@ _frvfdpic_size_got_plt (bfd *output_bfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_frvfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + struct _frvfdpic_dynamic_got_plt_info gpinfo; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5472,8 +5473,8 @@ elf32_frvfdpic_size_dynamic_sections (bf + } + + static bool +-elf32_frvfdpic_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -6817,9 +6818,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + frvfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_frvfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_frvfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -6827,9 +6828,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_frvfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_frvfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_frvfdpic_late_size_sections + #undef bfd_elf32_bfd_relax_section + #define bfd_elf32_bfd_relax_section \ + elf32_frvfdpic_relax_section +--- a/bfd/elf32-hppa.c ++++ b/bfd/elf32-hppa.c +@@ -2042,8 +2042,8 @@ clobber_millicode_symbols (struct elf_li + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_hppa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf32_hppa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_hppa_link_hash_table *htab; + bfd *dynobj; +@@ -2057,7 +2057,7 @@ elf32_hppa_size_dynamic_sections (bfd *o + + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4450,7 +4450,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Inte + #define elf_backend_hide_symbol elf32_hppa_hide_symbol + #define elf_backend_finish_dynamic_symbol elf32_hppa_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_hppa_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf32_hppa_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_gc_mark_hook elf32_hppa_gc_mark_hook + #define elf_backend_grok_prstatus elf32_hppa_grok_prstatus +--- a/bfd/elf32-i386.c ++++ b/bfd/elf32-i386.c +@@ -1933,8 +1933,7 @@ elf_i386_scan_relocs (bfd *abfd, + } + + static bool +-elf_i386_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_i386_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -1947,7 +1946,7 @@ elf_i386_always_size_sections (bfd *outp + elf_i386_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Set the correct type for an x86 ELF section. We do this by the +@@ -4444,7 +4443,7 @@ elf_i386_link_setup_gnu_properties (stru + #define bfd_elf32_get_synthetic_symtab elf_i386_get_synthetic_symtab + + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible +-#define elf_backend_always_size_sections elf_i386_always_size_sections ++#define elf_backend_early_size_sections elf_i386_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_fake_sections elf_i386_fake_sections + #define elf_backend_finish_dynamic_sections elf_i386_finish_dynamic_sections +--- a/bfd/elf32-lm32.c ++++ b/bfd/elf32-lm32.c +@@ -1906,8 +1906,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-lm32_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++lm32_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_lm32_link_hash_table *htab; + bfd *dynobj; +@@ -1920,7 +1920,8 @@ lm32_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -2309,7 +2310,7 @@ lm32_elf_create_dynamic_sections (bfd *a + } + + static bool +-lm32_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++lm32_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info)) + { +@@ -2395,7 +2396,7 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #define bfd_elf32_bfd_link_hash_table_create lm32_elf_link_hash_table_create + #define elf_backend_check_relocs lm32_elf_check_relocs + #define elf_backend_reloc_type_class lm32_elf_reloc_type_class +-#define elf_backend_size_dynamic_sections lm32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections lm32_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections lm32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections lm32_elf_finish_dynamic_sections +@@ -2416,8 +2417,8 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #undef elf32_bed + #define elf32_bed elf32_lm32fdpic_bed + +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections lm32_elf_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections lm32_elf_early_size_sections + #undef bfd_elf32_bfd_copy_private_bfd_data + #define bfd_elf32_bfd_copy_private_bfd_data lm32_elf_fdpic_copy_private_bfd_data + +--- a/bfd/elf32-m32c.c ++++ b/bfd/elf32-m32c.c +@@ -773,8 +773,8 @@ m32c_elf_finish_dynamic_sections (bfd *a + } + + static bool +-m32c_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32c_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2131,8 +2131,8 @@ _bfd_m32c_elf_eh_frame_address_size (bfd + #define elf_backend_check_relocs m32c_elf_check_relocs + #define elf_backend_object_p m32c_elf_object_p + #define elf_symbol_leading_char ('_') +-#define elf_backend_always_size_sections \ +- m32c_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ m32c_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + m32c_elf_finish_dynamic_sections + +--- a/bfd/elf32-m32r.c ++++ b/bfd/elf32-m32r.c +@@ -1958,8 +1958,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32r_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -1968,7 +1968,7 @@ m32r_elf_size_dynamic_sections (bfd *out + bfd *ibfd; + + #ifdef DEBUG_PIC +- printf ("m32r_elf_size_dynamic_sections()\n"); ++ printf ("m32r_elf_late_size_sections()\n"); + #endif + + htab = m32r_elf_hash_table (info); +@@ -1976,7 +1976,8 @@ m32r_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3658,7 +3659,7 @@ m32r_elf_reloc_type_class (const struct + + #define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections + #define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +-#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections ++#define elf_backend_late_size_sections m32r_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2934,7 +2934,7 @@ elf_m68k_get_plt_info (bfd *output_bfd) + It's a convenient place to determine the PLT style. */ + + static bool +-elf_m68k_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_m68k_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + /* Bind input BFDs to GOTs and calculate sizes of .got and .rela.got + sections. */ +@@ -3107,15 +3107,16 @@ elf_m68k_adjust_dynamic_symbol (struct b + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_m68k_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_m68k_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -4628,12 +4629,11 @@ elf_m68k_grok_psinfo (bfd *abfd, Elf_Int + #define bfd_elf32_bfd_final_link bfd_elf_final_link + + #define elf_backend_check_relocs elf_m68k_check_relocs +-#define elf_backend_always_size_sections \ +- elf_m68k_always_size_sections ++#define elf_backend_early_size_sections \ ++ elf_m68k_early_size_sections + #define elf_backend_adjust_dynamic_symbol \ + elf_m68k_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_m68k_size_dynamic_sections ++#define elf_backend_late_size_sections elf_m68k_late_size_sections + #define elf_backend_final_write_processing elf_m68k_final_write_processing + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_m68k_relocate_section +--- a/bfd/elf32-metag.c ++++ b/bfd/elf32-metag.c +@@ -2717,8 +2717,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_metag_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_metag_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_metag_link_hash_table *htab; + bfd *dynobj; +@@ -2729,7 +2729,7 @@ elf_metag_size_dynamic_sections (bfd *ou + htab = metag_link_hash_table (info); + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4019,7 +4019,7 @@ elf_metag_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol elf_metag_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol elf_metag_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf_metag_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_metag_size_dynamic_sections ++#define elf_backend_late_size_sections elf_metag_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_init_file_header elf_metag_init_file_header +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2946,8 +2946,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++microblaze_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_mb_link_hash_table *htab; + bfd *dynobj; +@@ -2959,7 +2959,8 @@ microblaze_elf_size_dynamic_sections (bf + return false; + + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3477,7 +3478,7 @@ microblaze_elf_add_symbol_hook (bfd *abf + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_late_size_sections microblaze_elf_late_size_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + + #include "elf32-target.h" +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2534,10 +2534,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-nds32.c ++++ b/bfd/elf32-nds32.c +@@ -4302,8 +4302,8 @@ elf32_nds32_add_dynreloc (bfd *output_bf + /* Set the sizes of the dynamic sections. */ + + static bool +-nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_nds32_link_hash_table *htab; + bfd *dynobj; +@@ -4316,7 +4316,8 @@ nds32_elf_size_dynamic_sections (bfd *ou + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -13984,7 +13985,7 @@ nds32_elf_unify_tls_model (bfd *inbfd, a + #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections nds32_elf_late_size_sections + #define elf_backend_relocate_section nds32_elf_relocate_section + #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook + #define elf_backend_grok_prstatus nds32_elf_grok_prstatus +--- a/bfd/elf32-nios2.c ++++ b/bfd/elf32-nios2.c +@@ -5411,7 +5411,7 @@ nios2_elf32_adjust_dynamic_symbol (struc + return true; + } + +-/* Worker function for nios2_elf32_size_dynamic_sections. */ ++/* Worker function for nios2_elf32_late_size_sections. */ + static bool + adjust_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { +@@ -5438,7 +5438,7 @@ adjust_dynrelocs (struct elf_link_hash_e + return true; + } + +-/* Another worker function for nios2_elf32_size_dynamic_sections. ++/* Another worker function for nios2_elf32_late_size_sections. + Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + static bool +@@ -5673,11 +5673,11 @@ allocate_dynrelocs (struct elf_link_hash + return true; + } + +-/* Implement elf_backend_size_dynamic_sections: ++/* Implement elf_backend_late_size_sections: + Set the sizes of the dynamic sections. */ + static bool +-nios2_elf32_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nios2_elf32_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -5687,7 +5687,8 @@ nios2_elf32_size_dynamic_sections (bfd * + + htab = elf32_nios2_hash_table (info); + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + htab->res_n_size = 0; + if (htab->root.dynamic_sections_created) +@@ -6058,7 +6059,7 @@ const struct bfd_elf_special_section elf + nios2_elf32_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol nios2_elf32_adjust_dynamic_symbol + #define elf_backend_reloc_type_class nios2_elf32_reloc_type_class +-#define elf_backend_size_dynamic_sections nios2_elf32_size_dynamic_sections ++#define elf_backend_late_size_sections nios2_elf32_late_size_sections + #define elf_backend_add_symbol_hook nios2_elf_add_symbol_hook + #define elf_backend_copy_indirect_symbol nios2_elf32_copy_indirect_symbol + #define elf_backend_object_p nios2_elf32_object_p +--- a/bfd/elf32-or1k.c ++++ b/bfd/elf32-or1k.c +@@ -3039,8 +3039,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-or1k_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++or1k_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_or1k_link_hash_table *htab; + bfd *dynobj; +@@ -3053,7 +3053,8 @@ or1k_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -3406,7 +3407,7 @@ or1k_grok_psinfo (bfd *abfd, Elf_Interna + #define elf_backend_copy_indirect_symbol or1k_elf_copy_indirect_symbol + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections or1k_elf_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections or1k_elf_size_dynamic_sections ++#define elf_backend_late_size_sections or1k_elf_late_size_sections + #define elf_backend_adjust_dynamic_symbol or1k_elf_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol or1k_elf_finish_dynamic_symbol + +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -5478,8 +5478,8 @@ static const unsigned char glink_eh_fram + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_elf_link_hash_table *htab; + asection *s; +@@ -5487,11 +5487,12 @@ ppc_elf_size_dynamic_sections (bfd *outp + bfd *ibfd; + + #ifdef DEBUG +- fprintf (stderr, "ppc_elf_size_dynamic_sections called\n"); ++ fprintf (stderr, "ppc_elf_late_size_sections called\n"); + #endif + + htab = ppc_elf_hash_table (info); +- BFD_ASSERT (htab->elf.dynobj != NULL); ++ if (htab->elf.dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -10414,7 +10415,7 @@ ppc_elf_finish_dynamic_sections (bfd *ou + #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol + #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol + #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook +-#define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections ppc_elf_late_size_sections + #define elf_backend_hash_symbol ppc_elf_hash_symbol + #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections +--- a/bfd/elf32-rl78.c ++++ b/bfd/elf32-rl78.c +@@ -1440,8 +1440,8 @@ rl78_elf_finish_dynamic_sections (bfd *a + } + + static bool +-rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++rl78_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2609,8 +2609,8 @@ rl78_elf_relax_section (bfd *abfd, + + #define bfd_elf32_bfd_relax_section rl78_elf_relax_section + #define elf_backend_check_relocs rl78_elf_check_relocs +-#define elf_backend_always_size_sections \ +- rl78_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ rl78_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + rl78_elf_finish_dynamic_sections + +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -1366,7 +1366,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1778,8 +1778,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1790,7 +1790,7 @@ elf_s390_size_dynamic_sections (bfd *out + htab = elf_s390_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3926,7 +3926,7 @@ elf32_s390_merge_private_bfd_data (bfd * + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf32-score.c ++++ b/bfd/elf32-score.c +@@ -1089,7 +1089,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s3_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s3_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + static bool + score_elf_sort_hash_table (struct bfd_link_info *info, +@@ -3160,8 +3160,8 @@ s3_bfd_score_elf_adjust_dynamic_symbol ( + /* This function is called after all the input files have been read, + and the input sections have been assigned to output sections. */ + static bool +-s3_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s3_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3237,14 +3237,15 @@ s3_bfd_score_elf_always_size_sections (b + + /* Set the sizes of the dynamic sections. */ + static bool +-s3_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s3_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3313,7 +3314,7 @@ s3_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s3_bfd_score_elf_always_size_sections() has already done ++ /* s3_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +@@ -4177,22 +4178,22 @@ _bfd_score_elf_adjust_dynamic_symbol (st + } + + static bool +-_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s3_bfd_score_elf_early_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s7_bfd_score_elf_early_size_sections (output_bfd, info); + } + + static bool +-_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s3_bfd_score_elf_late_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s7_bfd_score_elf_late_size_sections (output_bfd, info); + } + + static bool +@@ -4455,10 +4456,10 @@ _bfd_score_elf_common_definition (Elf_In + _bfd_score_elf_section_from_bfd_section + #define elf_backend_adjust_dynamic_symbol \ + _bfd_score_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_score_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_score_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_score_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_score_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections \ + _bfd_score_elf_create_dynamic_sections +--- a/bfd/elf32-score.h ++++ b/bfd/elf32-score.h +@@ -78,10 +78,10 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + struct elf_link_hash_entry *); + + extern bool +-s7_bfd_score_elf_always_size_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_early_size_sections (bfd *, struct bfd_link_info *); + + extern bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern bool + s7_bfd_score_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); +--- a/bfd/elf32-score7.c ++++ b/bfd/elf32-score7.c +@@ -975,7 +975,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s7_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s7_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + + static bool +@@ -2969,8 +2969,8 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + and the input sections have been assigned to output sections. */ + + bool +-s7_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s7_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3047,14 +3047,15 @@ s7_bfd_score_elf_always_size_sections (b + /* Set the sizes of the dynamic sections. */ + + bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s7_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3123,7 +3124,7 @@ s7_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s7_bfd_score_elf_always_size_sections() has already done ++ /* s7_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +--- a/bfd/elf32-sh.c ++++ b/bfd/elf32-sh.c +@@ -2925,7 +2925,7 @@ allocate_dynrelocs (struct elf_link_hash + It's a convenient place to determine the PLT style. */ + + static bool +-sh_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++sh_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + sh_elf_hash_table (info)->plt_info = get_plt_info (output_bfd, + bfd_link_pic (info)); +@@ -2940,8 +2940,8 @@ sh_elf_always_size_sections (bfd *output + /* Set the sizes of the dynamic sections. */ + + static bool +-sh_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++sh_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_sh_link_hash_table *htab; + bfd *dynobj; +@@ -2954,7 +2954,8 @@ sh_elf_size_dynamic_sections (bfd *outpu + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -6598,10 +6599,8 @@ sh_elf_encode_eh_address (bfd *abfd, + sh_elf_link_hash_table_create + #define elf_backend_adjust_dynamic_symbol \ + sh_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- sh_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- sh_elf_size_dynamic_sections ++#define elf_backend_early_size_sections sh_elf_early_size_sections ++#define elf_backend_late_size_sections sh_elf_late_size_sections + #define elf_backend_omit_section_dynsym sh_elf_omit_section_dynsym + #define elf_backend_finish_dynamic_symbol \ + sh_elf_finish_dynamic_symbol +--- a/bfd/elf32-sparc.c ++++ b/bfd/elf32-sparc.c +@@ -248,8 +248,7 @@ elf32_sparc_reloc_type_class (const stru + #define elf_backend_adjust_dynamic_symbol \ + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ + _bfd_sparc_elf_finish_dynamic_symbol +--- a/bfd/elf32-tic6x.c ++++ b/bfd/elf32-tic6x.c +@@ -3160,7 +3160,7 @@ elf32_tic6x_allocate_dynrelocs (struct e + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_tic6x_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf32_tic6x_link_hash_table *htab; + bfd *dynobj; +@@ -3171,7 +3171,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + htab = elf32_tic6x_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3358,7 +3358,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + and the input sections have been assigned to output sections. */ + + static bool +-elf32_tic6x_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (elf32_tic6x_using_dsbt (output_bfd) && !bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -4261,10 +4261,10 @@ elf32_tic6x_write_section (bfd *output_b + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible + #define elf_backend_finish_dynamic_symbol \ + elf32_tic6x_finish_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf32_tic6x_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_tic6x_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf32_tic6x_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_tic6x_late_size_sections + #define elf_backend_finish_dynamic_sections \ + elf32_tic6x_finish_dynamic_sections + #define bfd_elf32_bfd_final_link \ +--- a/bfd/elf32-tilegx.c ++++ b/bfd/elf32-tilegx.c +@@ -105,7 +105,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf32-tilepro.c ++++ b/bfd/elf32-tilepro.c +@@ -2182,11 +2182,9 @@ tilepro_elf_omit_section_dynsym (bfd *ou + #define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + + static bool +-tilepro_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++tilepro_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { +- (void)output_bfd; +- + struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; +@@ -2195,7 +2193,8 @@ tilepro_elf_size_dynamic_sections (bfd * + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3739,7 +3738,7 @@ tilepro_additional_program_headers (bfd + #define elf_backend_check_relocs tilepro_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilepro_elf_late_size_sections + #define elf_backend_relocate_section tilepro_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +--- a/bfd/elf32-vax.c ++++ b/bfd/elf32-vax.c +@@ -36,7 +36,6 @@ static bool elf_vax_check_relocs (bfd *, + asection *, const Elf_Internal_Rela *); + static bool elf_vax_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); +-static bool elf_vax_size_dynamic_sections (bfd *, struct bfd_link_info *); + static int elf_vax_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, +@@ -985,8 +984,8 @@ elf_vax_discard_got_entries (struct elf_ + /* Discard unused dynamic data if this is a static link. */ + + static bool +-elf_vax_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_vax_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -1024,14 +1023,15 @@ elf_vax_always_size_sections (bfd *outpu + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_vax_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_vax_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -1861,10 +1861,8 @@ elf_vax_plt_sym_val (bfd_vma i, const as + #define elf_backend_check_relocs elf_vax_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf_vax_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf_vax_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf_vax_size_dynamic_sections ++#define elf_backend_early_size_sections elf_vax_early_size_sections ++#define elf_backend_late_size_sections elf_vax_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_vax_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-xstormy16.c ++++ b/bfd/elf32-xstormy16.c +@@ -706,8 +706,8 @@ xstormy16_elf_relax_section (bfd *dynobj + } + + static bool +-xstormy16_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++xstormy16_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -1013,8 +1013,8 @@ xstormy16_elf_gc_mark_hook (asection *se + #define elf_backend_relocate_section xstormy16_elf_relocate_section + #define elf_backend_gc_mark_hook xstormy16_elf_gc_mark_hook + #define elf_backend_check_relocs xstormy16_elf_check_relocs +-#define elf_backend_always_size_sections \ +- xstormy16_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ xstormy16_elf_early_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -1557,8 +1557,8 @@ elf_xtensa_allocate_local_got_size (stru + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_xtensa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + bfd *dynobj, *abfd; +@@ -1575,7 +1575,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + srelgot = htab->elf.srelgot; + srelplt = htab->elf.srelplt; + +@@ -1780,8 +1780,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + } + + static bool +-elf_xtensa_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_xtensa_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + asection *tls_sec; +@@ -11537,8 +11536,8 @@ static const struct bfd_elf_special_sect + #define elf_backend_object_p elf_xtensa_object_p + #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class + #define elf_backend_relocate_section elf_xtensa_relocate_section +-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections +-#define elf_backend_always_size_sections elf_xtensa_always_size_sections ++#define elf_backend_late_size_sections elf_xtensa_late_size_sections ++#define elf_backend_early_size_sections elf_xtensa_early_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_special_sections elf_xtensa_special_sections + #define elf_backend_action_discarded elf_xtensa_action_discarded +--- a/bfd/elf64-alpha.c ++++ b/bfd/elf64-alpha.c +@@ -2579,8 +2579,8 @@ elf64_alpha_size_plt_section (struct bfd + } + + static bool +-elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *i; + struct alpha_elf_link_hash_table * htab; +@@ -2806,8 +2806,8 @@ elf64_alpha_size_rela_got_section (struc + /* Set the sizes of the dynamic sections. */ + + static bool +-elf64_alpha_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2819,7 +2819,8 @@ elf64_alpha_size_dynamic_sections (bfd * + return false; + + dynobj = elf_hash_table(info)->dynobj; +- BFD_ASSERT(dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5465,10 +5466,10 @@ static const struct elf_size_info alpha_ + elf64_alpha_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol +-#define elf_backend_always_size_sections \ +- elf64_alpha_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf64_alpha_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf64_alpha_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf64_alpha_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-hppa.c ++++ b/bfd/elf64-hppa.c +@@ -176,9 +176,6 @@ static bool elf64_hppa_adjust_dynamic_sy + static bool elf64_hppa_mark_milli_and_exported_functions + (struct elf_link_hash_entry *, void *); + +-static bool elf64_hppa_size_dynamic_sections +- (bfd *, struct bfd_link_info *); +- + static int elf64_hppa_link_output_symbol_hook + (struct bfd_link_info *, const char *, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); +@@ -1520,7 +1517,7 @@ elf64_hppa_mark_milli_and_exported_funct + the contents of our special sections. */ + + static bool +-elf64_hppa_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf64_hppa_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf64_hppa_link_hash_table *hppa_info; + struct elf64_hppa_allocate_data data; +@@ -1534,7 +1531,8 @@ elf64_hppa_size_dynamic_sections (bfd *o + return false; + + dynobj = hppa_info->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Mark each function this program exports so that we will allocate + space in the .opd section for each function's FPTR. If we are +@@ -3984,8 +3982,7 @@ const struct elf_size_info hppa64_elf_si + #define elf_backend_adjust_dynamic_symbol \ + elf64_hppa_adjust_dynamic_symbol + +-#define elf_backend_size_dynamic_sections \ +- elf64_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf64_hppa_late_size_sections + + #define elf_backend_finish_dynamic_symbol \ + elf64_hppa_finish_dynamic_symbol +--- a/bfd/elf64-ia64-vms.c ++++ b/bfd/elf64-ia64-vms.c +@@ -2590,8 +2590,8 @@ elf64_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elf64_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf64_ia64_allocate_data data; + struct elf64_ia64_link_hash_table *ia64_info; +@@ -2600,11 +2600,12 @@ elf64_ia64_size_dynamic_sections (bfd *o + struct elf_link_hash_table *hash_table; + + hash_table = elf_hash_table (info); +- dynobj = hash_table->dynobj; + ia64_info = elf64_ia64_hash_table (info); + if (ia64_info == NULL) + return false; +- BFD_ASSERT(dynobj != NULL); ++ dynobj = hash_table->dynobj; ++ if (dynobj == NULL) ++ return true; + data.info = info; + + /* Allocate the GOT entries. */ +@@ -5484,8 +5485,8 @@ static const struct elf_size_info elf64_ + elf64_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf64_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf64_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf64_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4745,10 +4745,10 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -118,8 +118,8 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_edit +-#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections ++#define elf_backend_early_size_sections ppc64_elf_edit ++#define elf_backend_late_size_sections ppc64_elf_late_size_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_action_discarded ppc64_elf_action_discarded +@@ -10118,7 +10118,7 @@ allocate_dynrelocs (struct elf_link_hash + ((((v) & 0x3ffff0000ULL) << 16) | (v & 0xffff)) + #define HA34(v) ((v + (1ULL << 33)) >> 34) + +-/* Called via elf_link_hash_traverse from ppc64_elf_size_dynamic_sections ++/* Called via elf_link_hash_traverse from ppc64_elf_late_size_sections + to set up space for global entry stubs. These are put in glink, + after the branch table. */ + +@@ -10195,8 +10195,8 @@ size_global_entry_stubs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc64_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc64_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + bfd *dynobj; +@@ -10211,7 +10211,7 @@ ppc64_elf_size_dynamic_sections (bfd *ou + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -1301,7 +1301,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1714,8 +1714,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1729,7 +1729,7 @@ elf_s390_size_dynamic_sections (bfd *out + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3912,7 +3912,7 @@ const struct elf_size_info s390_elf64_si + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf64-sparc.c ++++ b/bfd/elf64-sparc.c +@@ -953,8 +953,8 @@ const struct elf_size_info elf64_sparc_s + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym \ + _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section \ + _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-tilegx.c ++++ b/bfd/elf64-tilegx.c +@@ -106,7 +106,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -2456,8 +2456,7 @@ elf_x86_64_scan_relocs (bfd *abfd, struc + } + + static bool +-elf_x86_64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_x86_64_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -2470,7 +2469,7 @@ elf_x86_64_always_size_sections (bfd *ou + elf_x86_64_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Return the relocation value for @tpoff relocation +@@ -5384,7 +5383,7 @@ elf_x86_64_special_sections[]= + elf_x86_64_reloc_name_lookup + + #define elf_backend_relocs_compatible elf_x86_64_relocs_compatible +-#define elf_backend_always_size_sections elf_x86_64_always_size_sections ++#define elf_backend_early_size_sections elf_x86_64_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections elf_x86_64_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf_x86_64_finish_dynamic_symbol +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6619,8 +6619,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend may have to create some sections regardless of whether + we're dynamic or not. */ +- if (bed->elf_backend_always_size_sections +- && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) ++ if (bed->elf_backend_early_size_sections ++ && !bed->elf_backend_early_size_sections (output_bfd, info)) + return false; + + dynobj = elf_hash_table (info)->dynobj; +@@ -7400,9 +7400,8 @@ NOTE: This behaviour is deprecated and w + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (dynobj != NULL +- && bed->elf_backend_size_dynamic_sections != NULL +- && ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info)) ++ if (bed->elf_backend_late_size_sections != NULL ++ && !bed->elf_backend_late_size_sections (output_bfd, info)) + return false; + + if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created) +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4131,10 +4131,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -112,7 +112,7 @@ + allocate space for one relocation on the slot. Record the GOT offset + for this symbol. + +- elfNN_aarch64_size_dynamic_sections () ++ elfNN_aarch64_late_size_sections () + + Iterate all input BFDS, look for in the local symbol data structure + constructed earlier for local TLS symbols and allocate them double +@@ -8976,8 +8976,8 @@ elfNN_aarch64_allocate_local_ifunc_dynre + though ! */ + + static bool +-elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_aarch64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_aarch64_link_hash_table *htab; + bfd *dynobj; +@@ -8988,7 +8988,8 @@ elfNN_aarch64_size_dynamic_sections (bfd + htab = elf_aarch64_hash_table ((info)); + dynobj = htab->root.dynobj; + +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -9390,8 +9391,8 @@ elfNN_aarch64_create_small_pltn_entry (s + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_aarch64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_aarch64_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -10126,8 +10127,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_adjust_dynamic_symbol \ + elfNN_aarch64_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_aarch64_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_aarch64_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_aarch64_check_relocs +@@ -10182,8 +10183,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_modify_headers \ + elfNN_aarch64_modify_headers + +-#define elf_backend_size_dynamic_sections \ +- elfNN_aarch64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_aarch64_late_size_sections + + #define elf_backend_size_info \ + elfNN_aarch64_size_info +--- a/bfd/elfnn-ia64.c ++++ b/bfd/elfnn-ia64.c +@@ -2986,8 +2986,8 @@ elfNN_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; +@@ -2998,8 +2998,9 @@ elfNN_ia64_size_dynamic_sections (bfd *o + if (ia64_info == NULL) + return false; + dynobj = ia64_info->root.dynobj; ++ if (dynobj == NULL) ++ return true; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; +- BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ +@@ -5035,8 +5036,8 @@ ignore_errors (const char *fmt ATTRIBUTE + elfNN_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elfNN_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elfnn-loongarch.c ++++ b/bfd/elfnn-loongarch.c +@@ -1574,8 +1574,8 @@ maybe_set_textrel (struct elf_link_hash_ + } + + static bool +-loongarch_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++loongarch_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1585,7 +1585,8 @@ loongarch_elf_size_dynamic_sections (bfd + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -4140,7 +4141,7 @@ elf_loongarch64_hash_symbol (struct elf_ + loongarch_elf_create_dynamic_sections + #define elf_backend_check_relocs loongarch_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections ++#define elf_backend_late_size_sections loongarch_elf_late_size_sections + #define elf_backend_relocate_section loongarch_elf_relocate_section + #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -1348,7 +1348,7 @@ allocate_local_ifunc_dynrelocs (void **s + } + + static bool +-riscv_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++riscv_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct riscv_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1358,7 +1358,8 @@ riscv_elf_size_dynamic_sections (bfd *ou + htab = riscv_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5341,7 +5342,7 @@ riscv_elf_merge_symbol_attribute (struct + #define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections + #define elf_backend_check_relocs riscv_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections ++#define elf_backend_late_size_sections riscv_elf_late_size_sections + #define elf_backend_relocate_section riscv_elf_relocate_section + #define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9619,8 +9619,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + check for any mips16 stub sections that we can discard. */ + + bool +-_bfd_mips_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *sect; + struct mips_elf_link_hash_table *htab; +@@ -9963,8 +9963,8 @@ mips_elf_set_plt_sym_value (struct mips_ + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s, *sreldyn; +@@ -9974,7 +9974,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -14899,7 +14900,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14958,7 +14959,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -61,9 +61,9 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_always_size_sections ++extern bool _bfd_mips_elf_early_size_sections + (bfd *, struct bfd_link_info *); +-extern bool _bfd_mips_elf_size_dynamic_sections ++extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, +--- a/bfd/elfxx-sparc.c ++++ b/bfd/elfxx-sparc.c +@@ -2381,8 +2381,8 @@ _bfd_sparc_elf_omit_section_dynsym (bfd + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_sparc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_sparc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct _bfd_sparc_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2392,7 +2392,8 @@ _bfd_sparc_elf_size_dynamic_sections (bf + htab = _bfd_sparc_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-sparc.h ++++ b/bfd/elfxx-sparc.h +@@ -117,7 +117,7 @@ extern bool _bfd_sparc_elf_adjust_dynami + (struct bfd_link_info *, struct elf_link_hash_entry *); + extern bool _bfd_sparc_elf_omit_section_dynsym + (bfd *, struct bfd_link_info *, asection *); +-extern bool _bfd_sparc_elf_size_dynamic_sections ++extern bool _bfd_sparc_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern bool _bfd_sparc_elf_new_section_hook + (bfd *, asection *); +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -487,11 +487,11 @@ + #ifndef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol 0 + #endif +-#ifndef elf_backend_always_size_sections +-#define elf_backend_always_size_sections 0 ++#ifndef elf_backend_early_size_sections ++#define elf_backend_early_size_sections 0 + #endif +-#ifndef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections 0 ++#ifndef elf_backend_late_size_sections ++#define elf_backend_late_size_sections 0 + #endif + #ifndef elf_backend_strip_zero_sized_dynamic_sections + #define elf_backend_strip_zero_sized_dynamic_sections 0 +@@ -849,8 +849,8 @@ static const struct elf_backend_data elf + elf_backend_check_directives, + elf_backend_notice_as_needed, + elf_backend_adjust_dynamic_symbol, +- elf_backend_always_size_sections, +- elf_backend_size_dynamic_sections, ++ elf_backend_early_size_sections, ++ elf_backend_late_size_sections, + elf_backend_strip_zero_sized_dynamic_sections, + elf_backend_init_index_section, + elf_backend_relocate_section, +--- a/bfd/elfxx-tilegx.c ++++ b/bfd/elfxx-tilegx.c +@@ -2430,8 +2430,8 @@ tilegx_elf_omit_section_dynsym (bfd *out + } + + bool +-tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++tilegx_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2441,7 +2441,8 @@ tilegx_elf_size_dynamic_sections (bfd *o + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-tilegx.h ++++ b/bfd/elfxx-tilegx.h +@@ -57,7 +57,7 @@ tilegx_elf_omit_section_dynsym (bfd *, + asection *); + + extern bool +-tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++tilegx_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern int + tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -2225,7 +2225,7 @@ _bfd_elf_x86_valid_reloc_p (asection *in + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_x86_elf_size_dynamic_sections (bfd *output_bfd, ++_bfd_x86_elf_late_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + struct elf_x86_link_hash_table *htab; +@@ -2241,7 +2241,7 @@ _bfd_x86_elf_size_dynamic_sections (bfd + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -2948,8 +2948,8 @@ _bfd_x86_elf_finish_dynamic_sections (bf + + + bool +-_bfd_x86_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_x86_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec = elf_hash_table (info)->tls_sec; + +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -854,13 +854,13 @@ extern bool _bfd_elf_x86_valid_reloc_p + const Elf_Internal_Rela *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, Elf_Internal_Shdr *, bool *); + +-extern bool _bfd_x86_elf_size_dynamic_sections ++extern bool _bfd_x86_elf_late_size_sections + (bfd *, struct bfd_link_info *); + + extern struct elf_x86_link_hash_table *_bfd_x86_elf_finish_dynamic_sections + (bfd *, struct bfd_link_info *); + +-extern bool _bfd_x86_elf_always_size_sections ++extern bool _bfd_x86_elf_early_size_sections + (bfd *, struct bfd_link_info *); + + extern void _bfd_x86_elf_merge_symbol_attribute +@@ -932,8 +932,8 @@ extern void _bfd_x86_elf_link_report_rel + + #define elf_backend_check_relocs \ + _bfd_x86_elf_check_relocs +-#define elf_backend_size_dynamic_sections \ +- _bfd_x86_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_x86_elf_late_size_sections + #define elf_backend_merge_symbol_attribute \ + _bfd_x86_elf_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ +--- a/ld/emultempl/vms.em ++++ b/ld/emultempl/vms.em +@@ -196,10 +196,9 @@ gld${EMULATION_NAME}_before_allocation ( + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (elf_hash_table (&link_info)->dynamic_sections_created +- && bed->elf_backend_size_dynamic_sections +- && ! (*bed->elf_backend_size_dynamic_sections) (link_info.output_bfd, +- &link_info)) ++ if (bed->elf_backend_late_size_sections ++ && !bed->elf_backend_late_size_sections (link_info.output_bfd, ++ &link_info)) + einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); + + before_allocation_default (); diff --git a/toolchain/binutils/patches/2.40/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch b/toolchain/binutils/patches/2.40/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch new file mode 100644 index 0000000000..8e5f1b76c6 --- /dev/null +++ b/toolchain/binutils/patches/2.40/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch @@ -0,0 +1,218 @@ +From 3c6c32951e292a51ede70b8087bb0308d7dbc4fc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 20:33:32 +1030 +Subject: [PATCH 2/2] PR 30569, delete _bfd_mips_elf_early_size_sections + +PR30569 was triggered by a patch of mine 6540edd52cc0 moving the call +to always_size_sections in bfd_elf_size_dynamic_sections earlier, made +to support the x86 DT_RELR implementation. This broke mips16 code +handling stubs when --export-dynamic is passed to the linker, because +numerous symbols then became dynamic after always_size_sections. The +mips backend fiddles with symbols in its always_size_sections. Maciej +in 902e9fc76a0e had moved the call to always_size_sections to after +the export-dynamic code. Prior to that, Nathan in 04c3a75556c0 moved +it before the exec stack code, back to the start of +bfd_elf_size_dynamic_sections which was where Ian put it originally +in ff12f303355b. So the call has moved around a little. I'm leaving +it where it is, and instead calling mips_elf_check_symbols from +late_size_sections (the old size_dynamic_sections) which is now always +called. In fact, the whole of _bfd_mips_elf_early_size_sections can +be merged into _bfd_mips_elf_late_size_sections. +--- + bfd/elf32-mips.c | 1 - + bfd/elf64-mips.c | 2 -- + bfd/elfn32-mips.c | 1 - + bfd/elfxx-mips.c | 84 +++++++++++++++++++---------------------------- + bfd/elfxx-mips.h | 2 -- + 5 files changed, 34 insertions(+), 56 deletions(-) + +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2534,7 +2534,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4745,8 +4745,6 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections \ +- _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections \ + _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4131,7 +4131,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9614,48 +9614,6 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + return _bfd_elf_adjust_dynamic_copy (info, h, s); + } + +-/* This function is called after all the input files have been read, +- and the input sections have been assigned to output sections. We +- check for any mips16 stub sections that we can discard. */ +- +-bool +-_bfd_mips_elf_early_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) +-{ +- asection *sect; +- struct mips_elf_link_hash_table *htab; +- struct mips_htab_traverse_info hti; +- +- htab = mips_elf_hash_table (info); +- BFD_ASSERT (htab != NULL); +- +- /* The .reginfo section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".reginfo"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- /* The .MIPS.abiflags section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- hti.info = info; +- hti.output_bfd = output_bfd; +- hti.error = false; +- mips_elf_link_hash_traverse (mips_elf_hash_table (info), +- mips_elf_check_symbols, &hti); +- if (hti.error) +- return false; +- +- return true; +-} +- + /* If the link uses a GOT, lay it out and work out its size. */ + + static bool +@@ -9960,7 +9918,8 @@ mips_elf_set_plt_sym_value (struct mips_ + return true; + } + +-/* Set the sizes of the dynamic sections. */ ++/* Set the sizes of the dynamic sections, some mips non-dynamic sections, ++ and check for any mips16 stub sections that we can discard. */ + + bool + _bfd_mips_elf_late_size_sections (bfd *output_bfd, +@@ -9970,14 +9929,39 @@ _bfd_mips_elf_late_size_sections (bfd *o + asection *s, *sreldyn; + bool reltext; + struct mips_elf_link_hash_table *htab; ++ struct mips_htab_traverse_info hti; + + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = elf_hash_table (info)->dynobj; ++ ++ /* The .reginfo section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".reginfo"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf32_External_RegInfo)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ /* The .MIPS.abiflags section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf_External_ABIFlags_v0)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ hti.info = info; ++ hti.output_bfd = output_bfd; ++ hti.error = false; ++ mips_elf_link_hash_traverse (htab, mips_elf_check_symbols, &hti); ++ if (hti.error) ++ return false; ++ ++ dynobj = htab->root.dynobj; + if (dynobj == NULL) + return true; + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -10117,7 +10101,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + else if (bfd_link_executable (info) +- && ! mips_elf_hash_table (info)->use_rld_obj_head ++ && !htab->use_rld_obj_head + && startswith (name, ".rld_map")) + { + /* We add a room for __rld_map. It will be filled in by the +@@ -10126,7 +10110,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + else if (SGI_COMPAT (output_bfd) + && startswith (name, ".compact_rel")) +- s->size += mips_elf_hash_table (info)->compact_rel_size; ++ s->size += htab->compact_rel_size; + else if (s == htab->root.splt) + { + /* If the last PLT entry has a branch delay slot, allocate +@@ -10166,7 +10150,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in _bfd_mips_elf_finish_dynamic_sections, but we +@@ -14900,7 +14884,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14959,7 +14943,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -61,8 +61,6 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_early_size_sections +- (bfd *, struct bfd_link_info *); + extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section diff --git a/toolchain/binutils/patches/2.41/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch b/toolchain/binutils/patches/2.41/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch new file mode 100644 index 0000000000..8cb7c041b0 --- /dev/null +++ b/toolchain/binutils/patches/2.41/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch @@ -0,0 +1,2172 @@ +From af969b14aedcc0ae27dcefab4327ff2d153dec8b Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 19:25:42 +1030 +Subject: [PATCH 1/2] PR 30569, always call elf_backend_size_dynamic_sections + +This largely mechanical patch is preparation for a followup patch. + +For quite some time I've thought that it would be useful to call +elf_backend_size_dynamic_sections even when no dynamic objects are +seen by the linker. That's what this patch does, with some renaming. +There are no functional changes to the linker, just a move of the +dynobj test in bfd_elf_size_dynamic_sections to target backend +functions, replacing the asserts/aborts already there. No doubt some +of the current always_size_sections functions could be moved to +size_dynamic_sections but I haven't made that change. + +Because both hooks are now always called, I have renamed +always_size_sections to early_size_sections and size_dynamic_sections +to late_size_sections. I condisdered calling late_size_sections plain +size_sections, since this is the usual target dynamic section sizing +hook, but decided that searching the sources for "size_sections" would +then hit early_size_sections and other functions. +--- + bfd/elf-bfd.h | 35 +++++++++++++++++------------------ + bfd/elf-m10300.c | 11 ++++++----- + bfd/elf32-arc.c | 9 +++++---- + bfd/elf32-arm.c | 15 ++++++++------- + bfd/elf32-bfin.c | 31 ++++++++++++++++--------------- + bfd/elf32-cr16.c | 11 ++++++----- + bfd/elf32-cris.c | 13 +++++++------ + bfd/elf32-csky.c | 8 ++++---- + bfd/elf32-frv.c | 23 ++++++++++++----------- + bfd/elf32-hppa.c | 8 ++++---- + bfd/elf32-i386.c | 7 +++---- + bfd/elf32-lm32.c | 15 ++++++++------- + bfd/elf32-m32c.c | 8 ++++---- + bfd/elf32-m32r.c | 11 ++++++----- + bfd/elf32-m68k.c | 16 ++++++++-------- + bfd/elf32-metag.c | 8 ++++---- + bfd/elf32-microblaze.c | 9 +++++---- + bfd/elf32-mips.c | 6 ++---- + bfd/elf32-nds32.c | 9 +++++---- + bfd/elf32-nios2.c | 15 ++++++++------- + bfd/elf32-or1k.c | 9 +++++---- + bfd/elf32-ppc.c | 11 ++++++----- + bfd/elf32-rl78.c | 8 ++++---- + bfd/elf32-s390.c | 10 +++++----- + bfd/elf32-score.c | 35 ++++++++++++++++++----------------- + bfd/elf32-score.h | 4 ++-- + bfd/elf32-score7.c | 13 +++++++------ + bfd/elf32-sh.c | 15 +++++++-------- + bfd/elf32-sparc.c | 3 +-- + bfd/elf32-tic6x.c | 14 +++++++------- + bfd/elf32-tilegx.c | 2 +- + bfd/elf32-tilepro.c | 11 +++++------ + bfd/elf32-vax.c | 16 +++++++--------- + bfd/elf32-xstormy16.c | 8 ++++---- + bfd/elf32-xtensa.c | 13 ++++++------- + bfd/elf64-alpha.c | 19 ++++++++++--------- + bfd/elf64-hppa.c | 11 ++++------- + bfd/elf64-ia64-vms.c | 13 +++++++------ + bfd/elf64-mips.c | 8 ++++---- + bfd/elf64-ppc.c | 12 ++++++------ + bfd/elf64-s390.c | 10 +++++----- + bfd/elf64-sparc.c | 4 ++-- + bfd/elf64-tilegx.c | 2 +- + bfd/elf64-x86-64.c | 7 +++---- + bfd/elflink.c | 9 ++++----- + bfd/elfn32-mips.c | 6 ++---- + bfd/elfnn-aarch64.c | 21 +++++++++++---------- + bfd/elfnn-ia64.c | 11 ++++++----- + bfd/elfnn-kvx.c | 19 +++++++++---------- + bfd/elfnn-loongarch.c | 9 +++++---- + bfd/elfnn-riscv.c | 7 ++++--- + bfd/elfxx-mips.c | 15 ++++++++------- + bfd/elfxx-mips.h | 4 ++-- + bfd/elfxx-sparc.c | 7 ++++--- + bfd/elfxx-sparc.h | 2 +- + bfd/elfxx-target.h | 12 ++++++------ + bfd/elfxx-tilegx.c | 7 ++++--- + bfd/elfxx-tilegx.h | 2 +- + bfd/elfxx-x86.c | 8 ++++---- + bfd/elfxx-x86.h | 8 ++++---- + ld/emultempl/vms.em | 7 +++---- + 61 files changed, 343 insertions(+), 337 deletions(-) + +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1173,7 +1173,7 @@ struct elf_backend_data + /* The ADJUST_DYNAMIC_SYMBOL function is called by the ELF backend + linker for every symbol which is defined by a dynamic object and + referenced by a regular object. This is called after all the +- input files have been seen, but before the SIZE_DYNAMIC_SECTIONS ++ input files have been seen, but before the LATE_SIZE_SECTIONS + function has been called. The hash table entry should be + bfd_link_hash_defined ore bfd_link_hash_defweak, and it should be + defined in a section from a dynamic object. Dynamic object +@@ -1185,24 +1185,23 @@ struct elf_backend_data + bool (*elf_backend_adjust_dynamic_symbol) + (struct bfd_link_info *info, struct elf_link_hash_entry *h); + +- /* The ALWAYS_SIZE_SECTIONS function is called by the backend linker +- after all the linker input files have been seen but before the +- section sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL, but before SIZE_DYNAMIC_SECTIONS. */ +- bool (*elf_backend_always_size_sections) ++ /* The EARLY_SIZE_SECTIONS and LATE_SIZE_SECTIONS functions are ++ called by the backend linker after all linker input files have ++ been seen and sections have been assigned to output sections, but ++ before the section sizes have been set. Both of these functions ++ are called even when no dynamic object is seen by the linker. ++ Between them, they must set the sizes of the dynamic sections and ++ other backend specific sections, and may fill in their contents. ++ Most backends need only use LATE_SIZE_SECTIONS. ++ EARLY_SIZE_SECTIONS is called before --export-dynamic makes some ++ symbols dynamic and before ADJUST_DYNAMIC_SYMBOL processes ++ dynamic symbols, LATE_SIZE_SECTIONS afterwards. The generic ELF ++ linker can handle the .dynsym, .dynstr and .hash sections. ++ Besides those, these functions must handle the .interp section ++ and any other sections created by CREATE_DYNAMIC_SECTIONS. */ ++ bool (*elf_backend_early_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); +- +- /* The SIZE_DYNAMIC_SECTIONS function is called by the ELF backend +- linker after all the linker input files have been seen but before +- the sections sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL has been called on all appropriate symbols. +- It is only called when linking against a dynamic object. It must +- set the sizes of the dynamic sections, and may fill in their +- contents as well. The generic ELF linker can handle the .dynsym, +- .dynstr and .hash sections. This function must handle the +- .interp section and any sections created by the +- CREATE_DYNAMIC_SECTIONS entry point. */ +- bool (*elf_backend_size_dynamic_sections) ++ bool (*elf_backend_late_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); + + /* The STRIP_ZERO_SIZED_DYNAMIC_SECTIONS function is called by the +--- a/bfd/elf-m10300.c ++++ b/bfd/elf-m10300.c +@@ -5015,8 +5015,8 @@ _bfd_mn10300_elf_adjust_dynamic_symbol ( + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_mn10300_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_mn10300_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + struct elf32_mn10300_link_hash_table *htab = elf32_mn10300_hash_table (info); + bfd * dynobj; +@@ -5024,7 +5024,8 @@ _bfd_mn10300_elf_size_dynamic_sections ( + bool relocs; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5511,8 +5512,8 @@ mn10300_elf_mkobject (bfd *abfd) + _bfd_mn10300_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mn10300_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_mn10300_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mn10300_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_mn10300_elf_finish_dynamic_symbol +--- a/bfd/elf32-arc.c ++++ b/bfd/elf32-arc.c +@@ -2702,8 +2702,8 @@ elf_arc_finish_dynamic_sections (bfd * o + + /* Set the sizes of the dynamic sections. */ + static bool +-elf_arc_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_arc_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2711,7 +2711,8 @@ elf_arc_size_dynamic_sections (bfd *outp + struct elf_link_hash_table *htab = elf_hash_table (info); + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3127,7 +3128,7 @@ arc_elf_relax_section (bfd *abfd, asecti + #define elf_backend_finish_dynamic_symbol elf_arc_finish_dynamic_symbol + + #define elf_backend_finish_dynamic_sections elf_arc_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_arc_size_dynamic_sections ++#define elf_backend_late_size_sections elf_arc_late_size_sections + + #define elf_backend_can_gc_sections 1 + #define elf_backend_want_got_plt 1 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -16751,8 +16751,8 @@ bfd_elf32_arm_set_byteswap_code (struct + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info * info) ++elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; +@@ -16765,7 +16765,9 @@ elf32_arm_size_dynamic_sections (bfd * o + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; ++ + check_use_blx (htab); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -17137,8 +17139,7 @@ elf32_arm_size_dynamic_sections (bfd * o + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elf32_arm_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + struct elf32_arm_link_hash_table *htab; +@@ -20332,8 +20333,8 @@ elf32_arm_backend_symbol_processing (bfd + #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections +-#define elf_backend_always_size_sections elf32_arm_always_size_sections ++#define elf_backend_late_size_sections elf32_arm_late_size_sections ++#define elf_backend_early_size_sections elf32_arm_early_size_sections + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_init_file_header elf32_arm_init_file_header + #define elf_backend_reloc_type_class elf32_arm_reloc_type_class +--- a/bfd/elf32-bfin.c ++++ b/bfd/elf32-bfin.c +@@ -4027,8 +4027,8 @@ _bfinfdpic_size_got_plt (bfd *output_bfd + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_bfinfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -4037,7 +4037,8 @@ elf32_bfinfdpic_size_dynamic_sections (b + + htab = elf_hash_table (info); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -4086,7 +4087,7 @@ elf32_bfinfdpic_size_dynamic_sections (b + } + + static bool +-elf32_bfinfdpic_always_size_sections (bfd *output_bfd, ++elf32_bfinfdpic_early_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) +@@ -5123,15 +5124,16 @@ bfin_discard_copies (struct elf_link_has + } + + static bool +-bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++bfin_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5423,8 +5425,7 @@ struct bfd_elf_special_section const elf + #define elf_backend_check_relocs bfin_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + bfin_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- bfin_size_dynamic_sections ++#define elf_backend_late_size_sections bfin_late_size_sections + #define elf_backend_relocate_section bfin_relocate_section + #define elf_backend_finish_dynamic_symbol \ + bfin_finish_dynamic_symbol +@@ -5470,9 +5471,9 @@ struct bfd_elf_special_section const elf + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + bfinfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_bfinfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_bfinfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -5480,9 +5481,9 @@ struct bfd_elf_special_section const elf + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_bfinfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_bfinfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_bfinfdpic_late_size_sections + #undef elf_backend_finish_dynamic_symbol + #define elf_backend_finish_dynamic_symbol \ + elf32_bfinfdpic_finish_dynamic_symbol +--- a/bfd/elf32-cr16.c ++++ b/bfd/elf32-cr16.c +@@ -2391,15 +2391,16 @@ _bfd_cr16_elf_adjust_dynamic_symbol (str + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_cr16_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -2836,8 +2837,8 @@ _bfd_cr16_elf_reloc_type_class (const st + _bfd_cr16_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_cr16_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_cr16_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_cr16_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_cr16_elf_finish_dynamic_symbol +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2527,7 +2527,7 @@ cris_elf_plt_sym_val (bfd_vma i ATTRIBUT + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_cris_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_cris_size_dynamic_sections if no dynamic sections will be ++ or elf_cris_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static bool +@@ -3508,8 +3508,8 @@ cris_elf_check_relocs (bfd *abfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_cris_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_cris_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_cris_link_hash_table * htab; + bfd *dynobj; +@@ -3521,7 +3521,8 @@ elf_cris_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4090,8 +4091,8 @@ elf_cris_got_elt_size (bfd *abfd ATTRIBU + elf_cris_adjust_dynamic_symbol + #define elf_backend_copy_indirect_symbol \ + elf_cris_copy_indirect_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_cris_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf_cris_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_finish_dynamic_symbol \ + elf_cris_finish_dynamic_symbol +--- a/bfd/elf32-csky.c ++++ b/bfd/elf32-csky.c +@@ -1893,8 +1893,8 @@ csky_allocate_dynrelocs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++csky_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct csky_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1907,7 +1907,7 @@ csky_elf_size_dynamic_sections (bfd *out + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- return false; ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5333,7 +5333,7 @@ elf32_csky_obj_attrs_handle_unknown (bfd + /* Dynamic relocate related API. */ + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol csky_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections csky_elf_size_dynamic_sections ++#define elf_backend_late_size_sections csky_elf_late_size_sections + #define elf_backend_finish_dynamic_symbol csky_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections csky_elf_finish_dynamic_sections + #define elf_backend_rela_normal 1 +--- a/bfd/elf32-frv.c ++++ b/bfd/elf32-frv.c +@@ -5423,15 +5423,16 @@ _frvfdpic_size_got_plt (bfd *output_bfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_frvfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + struct _frvfdpic_dynamic_got_plt_info gpinfo; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5472,8 +5473,8 @@ elf32_frvfdpic_size_dynamic_sections (bf + } + + static bool +-elf32_frvfdpic_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -6817,9 +6818,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + frvfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_frvfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_frvfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -6827,9 +6828,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_frvfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_frvfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_frvfdpic_late_size_sections + #undef bfd_elf32_bfd_relax_section + #define bfd_elf32_bfd_relax_section \ + elf32_frvfdpic_relax_section +--- a/bfd/elf32-hppa.c ++++ b/bfd/elf32-hppa.c +@@ -2042,8 +2042,8 @@ clobber_millicode_symbols (struct elf_li + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_hppa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf32_hppa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_hppa_link_hash_table *htab; + bfd *dynobj; +@@ -2057,7 +2057,7 @@ elf32_hppa_size_dynamic_sections (bfd *o + + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4450,7 +4450,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Inte + #define elf_backend_hide_symbol elf32_hppa_hide_symbol + #define elf_backend_finish_dynamic_symbol elf32_hppa_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_hppa_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf32_hppa_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_gc_mark_hook elf32_hppa_gc_mark_hook + #define elf_backend_grok_prstatus elf32_hppa_grok_prstatus +--- a/bfd/elf32-i386.c ++++ b/bfd/elf32-i386.c +@@ -1947,8 +1947,7 @@ elf_i386_scan_relocs (bfd *abfd, + } + + static bool +-elf_i386_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_i386_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -1961,7 +1960,7 @@ elf_i386_always_size_sections (bfd *outp + elf_i386_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Set the correct type for an x86 ELF section. We do this by the +@@ -4469,7 +4468,7 @@ elf_i386_link_setup_gnu_properties (stru + #define bfd_elf32_get_synthetic_symtab elf_i386_get_synthetic_symtab + + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible +-#define elf_backend_always_size_sections elf_i386_always_size_sections ++#define elf_backend_early_size_sections elf_i386_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_fake_sections elf_i386_fake_sections + #define elf_backend_finish_dynamic_sections elf_i386_finish_dynamic_sections +--- a/bfd/elf32-lm32.c ++++ b/bfd/elf32-lm32.c +@@ -1906,8 +1906,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-lm32_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++lm32_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_lm32_link_hash_table *htab; + bfd *dynobj; +@@ -1920,7 +1920,8 @@ lm32_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -2309,7 +2310,7 @@ lm32_elf_create_dynamic_sections (bfd *a + } + + static bool +-lm32_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++lm32_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info)) + { +@@ -2395,7 +2396,7 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #define bfd_elf32_bfd_link_hash_table_create lm32_elf_link_hash_table_create + #define elf_backend_check_relocs lm32_elf_check_relocs + #define elf_backend_reloc_type_class lm32_elf_reloc_type_class +-#define elf_backend_size_dynamic_sections lm32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections lm32_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections lm32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections lm32_elf_finish_dynamic_sections +@@ -2416,8 +2417,8 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #undef elf32_bed + #define elf32_bed elf32_lm32fdpic_bed + +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections lm32_elf_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections lm32_elf_early_size_sections + #undef bfd_elf32_bfd_copy_private_bfd_data + #define bfd_elf32_bfd_copy_private_bfd_data lm32_elf_fdpic_copy_private_bfd_data + +--- a/bfd/elf32-m32c.c ++++ b/bfd/elf32-m32c.c +@@ -773,8 +773,8 @@ m32c_elf_finish_dynamic_sections (bfd *a + } + + static bool +-m32c_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32c_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2132,8 +2132,8 @@ _bfd_m32c_elf_eh_frame_address_size (bfd + #define elf_backend_check_relocs m32c_elf_check_relocs + #define elf_backend_object_p m32c_elf_object_p + #define elf_symbol_leading_char ('_') +-#define elf_backend_always_size_sections \ +- m32c_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ m32c_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + m32c_elf_finish_dynamic_sections + +--- a/bfd/elf32-m32r.c ++++ b/bfd/elf32-m32r.c +@@ -1958,8 +1958,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32r_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -1968,7 +1968,7 @@ m32r_elf_size_dynamic_sections (bfd *out + bfd *ibfd; + + #ifdef DEBUG_PIC +- printf ("m32r_elf_size_dynamic_sections()\n"); ++ printf ("m32r_elf_late_size_sections()\n"); + #endif + + htab = m32r_elf_hash_table (info); +@@ -1976,7 +1976,8 @@ m32r_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3658,7 +3659,7 @@ m32r_elf_reloc_type_class (const struct + + #define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections + #define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +-#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections ++#define elf_backend_late_size_sections m32r_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2934,7 +2934,7 @@ elf_m68k_get_plt_info (bfd *output_bfd) + It's a convenient place to determine the PLT style. */ + + static bool +-elf_m68k_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_m68k_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + /* Bind input BFDs to GOTs and calculate sizes of .got and .rela.got + sections. */ +@@ -3107,15 +3107,16 @@ elf_m68k_adjust_dynamic_symbol (struct b + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_m68k_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_m68k_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -4628,12 +4629,11 @@ elf_m68k_grok_psinfo (bfd *abfd, Elf_Int + #define bfd_elf32_bfd_final_link bfd_elf_final_link + + #define elf_backend_check_relocs elf_m68k_check_relocs +-#define elf_backend_always_size_sections \ +- elf_m68k_always_size_sections ++#define elf_backend_early_size_sections \ ++ elf_m68k_early_size_sections + #define elf_backend_adjust_dynamic_symbol \ + elf_m68k_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_m68k_size_dynamic_sections ++#define elf_backend_late_size_sections elf_m68k_late_size_sections + #define elf_backend_final_write_processing elf_m68k_final_write_processing + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_m68k_relocate_section +--- a/bfd/elf32-metag.c ++++ b/bfd/elf32-metag.c +@@ -2717,8 +2717,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_metag_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_metag_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_metag_link_hash_table *htab; + bfd *dynobj; +@@ -2729,7 +2729,7 @@ elf_metag_size_dynamic_sections (bfd *ou + htab = metag_link_hash_table (info); + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4019,7 +4019,7 @@ elf_metag_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol elf_metag_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol elf_metag_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf_metag_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_metag_size_dynamic_sections ++#define elf_backend_late_size_sections elf_metag_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_init_file_header elf_metag_init_file_header +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2946,8 +2946,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++microblaze_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_mb_link_hash_table *htab; + bfd *dynobj; +@@ -2959,7 +2959,8 @@ microblaze_elf_size_dynamic_sections (bf + return false; + + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3477,7 +3478,7 @@ microblaze_elf_add_symbol_hook (bfd *abf + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_late_size_sections microblaze_elf_late_size_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + + #include "elf32-target.h" +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2537,10 +2537,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-nds32.c ++++ b/bfd/elf32-nds32.c +@@ -4302,8 +4302,8 @@ elf32_nds32_add_dynreloc (bfd *output_bf + /* Set the sizes of the dynamic sections. */ + + static bool +-nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_nds32_link_hash_table *htab; + bfd *dynobj; +@@ -4316,7 +4316,8 @@ nds32_elf_size_dynamic_sections (bfd *ou + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -13984,7 +13985,7 @@ nds32_elf_unify_tls_model (bfd *inbfd, a + #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections nds32_elf_late_size_sections + #define elf_backend_relocate_section nds32_elf_relocate_section + #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook + #define elf_backend_grok_prstatus nds32_elf_grok_prstatus +--- a/bfd/elf32-nios2.c ++++ b/bfd/elf32-nios2.c +@@ -5405,7 +5405,7 @@ nios2_elf32_adjust_dynamic_symbol (struc + return true; + } + +-/* Worker function for nios2_elf32_size_dynamic_sections. */ ++/* Worker function for nios2_elf32_late_size_sections. */ + static bool + adjust_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { +@@ -5432,7 +5432,7 @@ adjust_dynrelocs (struct elf_link_hash_e + return true; + } + +-/* Another worker function for nios2_elf32_size_dynamic_sections. ++/* Another worker function for nios2_elf32_late_size_sections. + Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + static bool +@@ -5667,11 +5667,11 @@ allocate_dynrelocs (struct elf_link_hash + return true; + } + +-/* Implement elf_backend_size_dynamic_sections: ++/* Implement elf_backend_late_size_sections: + Set the sizes of the dynamic sections. */ + static bool +-nios2_elf32_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nios2_elf32_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -5681,7 +5681,8 @@ nios2_elf32_size_dynamic_sections (bfd * + + htab = elf32_nios2_hash_table (info); + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + htab->res_n_size = 0; + if (htab->root.dynamic_sections_created) +@@ -6052,7 +6053,7 @@ const struct bfd_elf_special_section elf + nios2_elf32_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol nios2_elf32_adjust_dynamic_symbol + #define elf_backend_reloc_type_class nios2_elf32_reloc_type_class +-#define elf_backend_size_dynamic_sections nios2_elf32_size_dynamic_sections ++#define elf_backend_late_size_sections nios2_elf32_late_size_sections + #define elf_backend_add_symbol_hook nios2_elf_add_symbol_hook + #define elf_backend_copy_indirect_symbol nios2_elf32_copy_indirect_symbol + #define elf_backend_object_p nios2_elf32_object_p +--- a/bfd/elf32-or1k.c ++++ b/bfd/elf32-or1k.c +@@ -3047,8 +3047,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-or1k_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++or1k_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_or1k_link_hash_table *htab; + bfd *dynobj; +@@ -3061,7 +3061,8 @@ or1k_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -3414,7 +3415,7 @@ or1k_grok_psinfo (bfd *abfd, Elf_Interna + #define elf_backend_copy_indirect_symbol or1k_elf_copy_indirect_symbol + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections or1k_elf_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections or1k_elf_size_dynamic_sections ++#define elf_backend_late_size_sections or1k_elf_late_size_sections + #define elf_backend_adjust_dynamic_symbol or1k_elf_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol or1k_elf_finish_dynamic_symbol + +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -5481,8 +5481,8 @@ static const unsigned char glink_eh_fram + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_elf_link_hash_table *htab; + asection *s; +@@ -5490,11 +5490,12 @@ ppc_elf_size_dynamic_sections (bfd *outp + bfd *ibfd; + + #ifdef DEBUG +- fprintf (stderr, "ppc_elf_size_dynamic_sections called\n"); ++ fprintf (stderr, "ppc_elf_late_size_sections called\n"); + #endif + + htab = ppc_elf_hash_table (info); +- BFD_ASSERT (htab->elf.dynobj != NULL); ++ if (htab->elf.dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -10418,7 +10419,7 @@ ppc_elf_finish_dynamic_sections (bfd *ou + #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol + #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol + #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook +-#define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections ppc_elf_late_size_sections + #define elf_backend_hash_symbol ppc_elf_hash_symbol + #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections +--- a/bfd/elf32-rl78.c ++++ b/bfd/elf32-rl78.c +@@ -1440,8 +1440,8 @@ rl78_elf_finish_dynamic_sections (bfd *a + } + + static bool +-rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++rl78_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2610,8 +2610,8 @@ rl78_elf_relax_section (bfd *abfd, + + #define bfd_elf32_bfd_relax_section rl78_elf_relax_section + #define elf_backend_check_relocs rl78_elf_check_relocs +-#define elf_backend_always_size_sections \ +- rl78_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ rl78_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + rl78_elf_finish_dynamic_sections + +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -1366,7 +1366,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1778,8 +1778,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1790,7 +1790,7 @@ elf_s390_size_dynamic_sections (bfd *out + htab = elf_s390_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3926,7 +3926,7 @@ elf32_s390_merge_private_bfd_data (bfd * + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf32-score.c ++++ b/bfd/elf32-score.c +@@ -1089,7 +1089,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s3_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s3_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + static bool + score_elf_sort_hash_table (struct bfd_link_info *info, +@@ -3160,8 +3160,8 @@ s3_bfd_score_elf_adjust_dynamic_symbol ( + /* This function is called after all the input files have been read, + and the input sections have been assigned to output sections. */ + static bool +-s3_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s3_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3237,14 +3237,15 @@ s3_bfd_score_elf_always_size_sections (b + + /* Set the sizes of the dynamic sections. */ + static bool +-s3_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s3_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3313,7 +3314,7 @@ s3_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s3_bfd_score_elf_always_size_sections() has already done ++ /* s3_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +@@ -4177,22 +4178,22 @@ _bfd_score_elf_adjust_dynamic_symbol (st + } + + static bool +-_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s3_bfd_score_elf_early_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s7_bfd_score_elf_early_size_sections (output_bfd, info); + } + + static bool +-_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s3_bfd_score_elf_late_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s7_bfd_score_elf_late_size_sections (output_bfd, info); + } + + static bool +@@ -4455,10 +4456,10 @@ _bfd_score_elf_common_definition (Elf_In + _bfd_score_elf_section_from_bfd_section + #define elf_backend_adjust_dynamic_symbol \ + _bfd_score_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_score_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_score_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_score_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_score_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections \ + _bfd_score_elf_create_dynamic_sections +--- a/bfd/elf32-score.h ++++ b/bfd/elf32-score.h +@@ -78,10 +78,10 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + struct elf_link_hash_entry *); + + extern bool +-s7_bfd_score_elf_always_size_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_early_size_sections (bfd *, struct bfd_link_info *); + + extern bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern bool + s7_bfd_score_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); +--- a/bfd/elf32-score7.c ++++ b/bfd/elf32-score7.c +@@ -975,7 +975,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s7_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s7_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + + static bool +@@ -2969,8 +2969,8 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + and the input sections have been assigned to output sections. */ + + bool +-s7_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s7_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3047,14 +3047,15 @@ s7_bfd_score_elf_always_size_sections (b + /* Set the sizes of the dynamic sections. */ + + bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s7_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3123,7 +3124,7 @@ s7_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s7_bfd_score_elf_always_size_sections() has already done ++ /* s7_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +--- a/bfd/elf32-sh.c ++++ b/bfd/elf32-sh.c +@@ -2927,7 +2927,7 @@ allocate_dynrelocs (struct elf_link_hash + It's a convenient place to determine the PLT style. */ + + static bool +-sh_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++sh_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + sh_elf_hash_table (info)->plt_info = get_plt_info (output_bfd, + bfd_link_pic (info)); +@@ -2942,8 +2942,8 @@ sh_elf_always_size_sections (bfd *output + /* Set the sizes of the dynamic sections. */ + + static bool +-sh_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++sh_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_sh_link_hash_table *htab; + bfd *dynobj; +@@ -2956,7 +2956,8 @@ sh_elf_size_dynamic_sections (bfd *outpu + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -6602,10 +6603,8 @@ sh_elf_encode_eh_address (bfd *abfd, + sh_elf_link_hash_table_create + #define elf_backend_adjust_dynamic_symbol \ + sh_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- sh_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- sh_elf_size_dynamic_sections ++#define elf_backend_early_size_sections sh_elf_early_size_sections ++#define elf_backend_late_size_sections sh_elf_late_size_sections + #define elf_backend_omit_section_dynsym sh_elf_omit_section_dynsym + #define elf_backend_finish_dynamic_symbol \ + sh_elf_finish_dynamic_symbol +--- a/bfd/elf32-sparc.c ++++ b/bfd/elf32-sparc.c +@@ -248,8 +248,7 @@ elf32_sparc_reloc_type_class (const stru + #define elf_backend_adjust_dynamic_symbol \ + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ + _bfd_sparc_elf_finish_dynamic_symbol +--- a/bfd/elf32-tic6x.c ++++ b/bfd/elf32-tic6x.c +@@ -3160,7 +3160,7 @@ elf32_tic6x_allocate_dynrelocs (struct e + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_tic6x_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf32_tic6x_link_hash_table *htab; + bfd *dynobj; +@@ -3171,7 +3171,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + htab = elf32_tic6x_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3358,7 +3358,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + and the input sections have been assigned to output sections. */ + + static bool +-elf32_tic6x_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (elf32_tic6x_using_dsbt (output_bfd) && !bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -4261,10 +4261,10 @@ elf32_tic6x_write_section (bfd *output_b + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible + #define elf_backend_finish_dynamic_symbol \ + elf32_tic6x_finish_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf32_tic6x_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_tic6x_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf32_tic6x_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_tic6x_late_size_sections + #define elf_backend_finish_dynamic_sections \ + elf32_tic6x_finish_dynamic_sections + #define bfd_elf32_bfd_final_link \ +--- a/bfd/elf32-tilegx.c ++++ b/bfd/elf32-tilegx.c +@@ -105,7 +105,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf32-tilepro.c ++++ b/bfd/elf32-tilepro.c +@@ -2182,11 +2182,9 @@ tilepro_elf_omit_section_dynsym (bfd *ou + #define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + + static bool +-tilepro_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++tilepro_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { +- (void)output_bfd; +- + struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; +@@ -2195,7 +2193,8 @@ tilepro_elf_size_dynamic_sections (bfd * + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3739,7 +3738,7 @@ tilepro_additional_program_headers (bfd + #define elf_backend_check_relocs tilepro_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilepro_elf_late_size_sections + #define elf_backend_relocate_section tilepro_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +--- a/bfd/elf32-vax.c ++++ b/bfd/elf32-vax.c +@@ -36,7 +36,6 @@ static bool elf_vax_check_relocs (bfd *, + asection *, const Elf_Internal_Rela *); + static bool elf_vax_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); +-static bool elf_vax_size_dynamic_sections (bfd *, struct bfd_link_info *); + static int elf_vax_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, +@@ -985,8 +984,8 @@ elf_vax_discard_got_entries (struct elf_ + /* Discard unused dynamic data if this is a static link. */ + + static bool +-elf_vax_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_vax_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -1024,14 +1023,15 @@ elf_vax_always_size_sections (bfd *outpu + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_vax_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_vax_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -1861,10 +1861,8 @@ elf_vax_plt_sym_val (bfd_vma i, const as + #define elf_backend_check_relocs elf_vax_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf_vax_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf_vax_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf_vax_size_dynamic_sections ++#define elf_backend_early_size_sections elf_vax_early_size_sections ++#define elf_backend_late_size_sections elf_vax_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_vax_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-xstormy16.c ++++ b/bfd/elf32-xstormy16.c +@@ -706,8 +706,8 @@ xstormy16_elf_relax_section (bfd *dynobj + } + + static bool +-xstormy16_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++xstormy16_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -1013,8 +1013,8 @@ xstormy16_elf_gc_mark_hook (asection *se + #define elf_backend_relocate_section xstormy16_elf_relocate_section + #define elf_backend_gc_mark_hook xstormy16_elf_gc_mark_hook + #define elf_backend_check_relocs xstormy16_elf_check_relocs +-#define elf_backend_always_size_sections \ +- xstormy16_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ xstormy16_elf_early_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -1557,8 +1557,8 @@ elf_xtensa_allocate_local_got_size (stru + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_xtensa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + bfd *dynobj, *abfd; +@@ -1575,7 +1575,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + srelgot = htab->elf.srelgot; + srelplt = htab->elf.srelplt; + +@@ -1780,8 +1780,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + } + + static bool +-elf_xtensa_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_xtensa_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + asection *tls_sec; +@@ -11544,8 +11543,8 @@ static const struct bfd_elf_special_sect + #define elf_backend_object_p elf_xtensa_object_p + #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class + #define elf_backend_relocate_section elf_xtensa_relocate_section +-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections +-#define elf_backend_always_size_sections elf_xtensa_always_size_sections ++#define elf_backend_late_size_sections elf_xtensa_late_size_sections ++#define elf_backend_early_size_sections elf_xtensa_early_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_special_sections elf_xtensa_special_sections + #define elf_backend_action_discarded elf_xtensa_action_discarded +--- a/bfd/elf64-alpha.c ++++ b/bfd/elf64-alpha.c +@@ -2562,8 +2562,8 @@ elf64_alpha_size_plt_section (struct bfd + } + + static bool +-elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *i; + struct alpha_elf_link_hash_table * htab; +@@ -2789,8 +2789,8 @@ elf64_alpha_size_rela_got_section (struc + /* Set the sizes of the dynamic sections. */ + + static bool +-elf64_alpha_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2802,7 +2802,8 @@ elf64_alpha_size_dynamic_sections (bfd * + return false; + + dynobj = elf_hash_table(info)->dynobj; +- BFD_ASSERT(dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5448,10 +5449,10 @@ static const struct elf_size_info alpha_ + elf64_alpha_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol +-#define elf_backend_always_size_sections \ +- elf64_alpha_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf64_alpha_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf64_alpha_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf64_alpha_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-hppa.c ++++ b/bfd/elf64-hppa.c +@@ -176,9 +176,6 @@ static bool elf64_hppa_adjust_dynamic_sy + static bool elf64_hppa_mark_milli_and_exported_functions + (struct elf_link_hash_entry *, void *); + +-static bool elf64_hppa_size_dynamic_sections +- (bfd *, struct bfd_link_info *); +- + static int elf64_hppa_link_output_symbol_hook + (struct bfd_link_info *, const char *, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); +@@ -1520,7 +1517,7 @@ elf64_hppa_mark_milli_and_exported_funct + the contents of our special sections. */ + + static bool +-elf64_hppa_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf64_hppa_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf64_hppa_link_hash_table *hppa_info; + struct elf64_hppa_allocate_data data; +@@ -1534,7 +1531,8 @@ elf64_hppa_size_dynamic_sections (bfd *o + return false; + + dynobj = hppa_info->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Mark each function this program exports so that we will allocate + space in the .opd section for each function's FPTR. If we are +@@ -3984,8 +3982,7 @@ const struct elf_size_info hppa64_elf_si + #define elf_backend_adjust_dynamic_symbol \ + elf64_hppa_adjust_dynamic_symbol + +-#define elf_backend_size_dynamic_sections \ +- elf64_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf64_hppa_late_size_sections + + #define elf_backend_finish_dynamic_symbol \ + elf64_hppa_finish_dynamic_symbol +--- a/bfd/elf64-ia64-vms.c ++++ b/bfd/elf64-ia64-vms.c +@@ -2591,8 +2591,8 @@ elf64_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elf64_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf64_ia64_allocate_data data; + struct elf64_ia64_link_hash_table *ia64_info; +@@ -2601,11 +2601,12 @@ elf64_ia64_size_dynamic_sections (bfd *o + struct elf_link_hash_table *hash_table; + + hash_table = elf_hash_table (info); +- dynobj = hash_table->dynobj; + ia64_info = elf64_ia64_hash_table (info); + if (ia64_info == NULL) + return false; +- BFD_ASSERT(dynobj != NULL); ++ dynobj = hash_table->dynobj; ++ if (dynobj == NULL) ++ return true; + data.info = info; + + /* Allocate the GOT entries. */ +@@ -5485,8 +5486,8 @@ static const struct elf_size_info elf64_ + elf64_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf64_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf64_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf64_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4748,10 +4748,10 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -119,8 +119,8 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_edit +-#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections ++#define elf_backend_early_size_sections ppc64_elf_edit ++#define elf_backend_late_size_sections ppc64_elf_late_size_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_action_discarded ppc64_elf_action_discarded +@@ -10138,7 +10138,7 @@ allocate_dynrelocs (struct elf_link_hash + ((((v) & 0x3ffff0000ULL) << 16) | (v & 0xffff)) + #define HA34(v) ((v + (1ULL << 33)) >> 34) + +-/* Called via elf_link_hash_traverse from ppc64_elf_size_dynamic_sections ++/* Called via elf_link_hash_traverse from ppc64_elf_late_size_sections + to set up space for global entry stubs. These are put in glink, + after the branch table. */ + +@@ -10215,8 +10215,8 @@ size_global_entry_stubs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc64_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc64_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + bfd *dynobj; +@@ -10231,7 +10231,7 @@ ppc64_elf_size_dynamic_sections (bfd *ou + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -1301,7 +1301,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1714,8 +1714,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1729,7 +1729,7 @@ elf_s390_size_dynamic_sections (bfd *out + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3912,7 +3912,7 @@ const struct elf_size_info s390_elf64_si + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf64-sparc.c ++++ b/bfd/elf64-sparc.c +@@ -953,8 +953,8 @@ const struct elf_size_info elf64_sparc_s + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym \ + _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section \ + _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-tilegx.c ++++ b/bfd/elf64-tilegx.c +@@ -106,7 +106,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -2468,8 +2468,7 @@ elf_x86_64_scan_relocs (bfd *abfd, struc + } + + static bool +-elf_x86_64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_x86_64_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -2482,7 +2481,7 @@ elf_x86_64_always_size_sections (bfd *ou + elf_x86_64_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Return the relocation value for @tpoff relocation +@@ -5413,7 +5412,7 @@ elf_x86_64_special_sections[]= + elf_x86_64_reloc_name_lookup + + #define elf_backend_relocs_compatible elf_x86_64_relocs_compatible +-#define elf_backend_always_size_sections elf_x86_64_always_size_sections ++#define elf_backend_early_size_sections elf_x86_64_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections elf_x86_64_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf_x86_64_finish_dynamic_symbol +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6648,8 +6648,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend may have to create some sections regardless of whether + we're dynamic or not. */ +- if (bed->elf_backend_always_size_sections +- && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) ++ if (bed->elf_backend_early_size_sections ++ && !bed->elf_backend_early_size_sections (output_bfd, info)) + return false; + + dynobj = elf_hash_table (info)->dynobj; +@@ -7429,9 +7429,8 @@ NOTE: This behaviour is deprecated and w + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (dynobj != NULL +- && bed->elf_backend_size_dynamic_sections != NULL +- && ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info)) ++ if (bed->elf_backend_late_size_sections != NULL ++ && !bed->elf_backend_late_size_sections (output_bfd, info)) + return false; + + if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created) +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4138,10 +4138,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -112,7 +112,7 @@ + allocate space for one relocation on the slot. Record the GOT offset + for this symbol. + +- elfNN_aarch64_size_dynamic_sections () ++ elfNN_aarch64_late_size_sections () + + Iterate all input BFDS, look for in the local symbol data structure + constructed earlier for local TLS symbols and allocate them double +@@ -9144,8 +9144,8 @@ elfNN_aarch64_allocate_local_ifunc_dynre + though ! */ + + static bool +-elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_aarch64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_aarch64_link_hash_table *htab; + bfd *dynobj; +@@ -9156,7 +9156,8 @@ elfNN_aarch64_size_dynamic_sections (bfd + htab = elf_aarch64_hash_table ((info)); + dynobj = htab->root.dynobj; + +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -9558,8 +9559,8 @@ elfNN_aarch64_create_small_pltn_entry (s + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_aarch64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_aarch64_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -10292,8 +10293,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_adjust_dynamic_symbol \ + elfNN_aarch64_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_aarch64_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_aarch64_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_aarch64_check_relocs +@@ -10348,8 +10349,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_modify_headers \ + elfNN_aarch64_modify_headers + +-#define elf_backend_size_dynamic_sections \ +- elfNN_aarch64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_aarch64_late_size_sections + + #define elf_backend_size_info \ + elfNN_aarch64_size_info +--- a/bfd/elfnn-ia64.c ++++ b/bfd/elfnn-ia64.c +@@ -2987,8 +2987,8 @@ elfNN_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; +@@ -2999,8 +2999,9 @@ elfNN_ia64_size_dynamic_sections (bfd *o + if (ia64_info == NULL) + return false; + dynobj = ia64_info->root.dynobj; ++ if (dynobj == NULL) ++ return true; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; +- BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ +@@ -5036,8 +5037,8 @@ ignore_errors (const char *fmt ATTRIBUTE + elfNN_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elfNN_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elfnn-loongarch.c ++++ b/bfd/elfnn-loongarch.c +@@ -1581,8 +1581,8 @@ maybe_set_textrel (struct elf_link_hash_ + } + + static bool +-loongarch_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++loongarch_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1592,7 +1592,8 @@ loongarch_elf_size_dynamic_sections (bfd + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -4651,7 +4652,7 @@ elf_loongarch64_hash_symbol (struct elf_ + loongarch_elf_create_dynamic_sections + #define elf_backend_check_relocs loongarch_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections ++#define elf_backend_late_size_sections loongarch_elf_late_size_sections + #define elf_backend_relocate_section loongarch_elf_relocate_section + #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -1485,7 +1485,7 @@ allocate_local_ifunc_dynrelocs (void **s + } + + static bool +-riscv_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++riscv_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct riscv_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1495,7 +1495,8 @@ riscv_elf_size_dynamic_sections (bfd *ou + htab = riscv_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5540,7 +5541,7 @@ riscv_elf_merge_symbol_attribute (struct + #define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections + #define elf_backend_check_relocs riscv_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections ++#define elf_backend_late_size_sections riscv_elf_late_size_sections + #define elf_backend_relocate_section riscv_elf_relocate_section + #define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9644,8 +9644,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + check for any mips16 stub sections that we can discard. */ + + bool +-_bfd_mips_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *sect; + struct mips_elf_link_hash_table *htab; +@@ -9988,8 +9988,8 @@ mips_elf_set_plt_sym_value (struct mips_ + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s, *sreldyn; +@@ -9999,7 +9999,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -14933,7 +14934,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14992,7 +14993,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -67,9 +67,9 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_always_size_sections ++extern bool _bfd_mips_elf_early_size_sections + (bfd *, struct bfd_link_info *); +-extern bool _bfd_mips_elf_size_dynamic_sections ++extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, +--- a/bfd/elfxx-sparc.c ++++ b/bfd/elfxx-sparc.c +@@ -2381,8 +2381,8 @@ _bfd_sparc_elf_omit_section_dynsym (bfd + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_sparc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_sparc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct _bfd_sparc_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2392,7 +2392,8 @@ _bfd_sparc_elf_size_dynamic_sections (bf + htab = _bfd_sparc_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-sparc.h ++++ b/bfd/elfxx-sparc.h +@@ -117,7 +117,7 @@ extern bool _bfd_sparc_elf_adjust_dynami + (struct bfd_link_info *, struct elf_link_hash_entry *); + extern bool _bfd_sparc_elf_omit_section_dynsym + (bfd *, struct bfd_link_info *, asection *); +-extern bool _bfd_sparc_elf_size_dynamic_sections ++extern bool _bfd_sparc_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern bool _bfd_sparc_elf_new_section_hook + (bfd *, asection *); +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -487,11 +487,11 @@ + #ifndef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol 0 + #endif +-#ifndef elf_backend_always_size_sections +-#define elf_backend_always_size_sections 0 ++#ifndef elf_backend_early_size_sections ++#define elf_backend_early_size_sections 0 + #endif +-#ifndef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections 0 ++#ifndef elf_backend_late_size_sections ++#define elf_backend_late_size_sections 0 + #endif + #ifndef elf_backend_strip_zero_sized_dynamic_sections + #define elf_backend_strip_zero_sized_dynamic_sections 0 +@@ -849,8 +849,8 @@ static const struct elf_backend_data elf + elf_backend_check_directives, + elf_backend_notice_as_needed, + elf_backend_adjust_dynamic_symbol, +- elf_backend_always_size_sections, +- elf_backend_size_dynamic_sections, ++ elf_backend_early_size_sections, ++ elf_backend_late_size_sections, + elf_backend_strip_zero_sized_dynamic_sections, + elf_backend_init_index_section, + elf_backend_relocate_section, +--- a/bfd/elfxx-tilegx.c ++++ b/bfd/elfxx-tilegx.c +@@ -2430,8 +2430,8 @@ tilegx_elf_omit_section_dynsym (bfd *out + } + + bool +-tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++tilegx_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2441,7 +2441,8 @@ tilegx_elf_size_dynamic_sections (bfd *o + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-tilegx.h ++++ b/bfd/elfxx-tilegx.h +@@ -57,7 +57,7 @@ tilegx_elf_omit_section_dynsym (bfd *, + asection *); + + extern bool +-tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++tilegx_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern int + tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -2241,7 +2241,7 @@ _bfd_elf_x86_valid_reloc_p (asection *in + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_x86_elf_size_dynamic_sections (bfd *output_bfd, ++_bfd_x86_elf_late_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + struct elf_x86_link_hash_table *htab; +@@ -2257,7 +2257,7 @@ _bfd_x86_elf_size_dynamic_sections (bfd + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -2964,8 +2964,8 @@ _bfd_x86_elf_finish_dynamic_sections (bf + + + bool +-_bfd_x86_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_x86_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec = elf_hash_table (info)->tls_sec; + +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -847,13 +847,13 @@ extern bool _bfd_elf_x86_valid_reloc_p + const Elf_Internal_Rela *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, Elf_Internal_Shdr *, bool *); + +-extern bool _bfd_x86_elf_size_dynamic_sections ++extern bool _bfd_x86_elf_late_size_sections + (bfd *, struct bfd_link_info *); + + extern struct elf_x86_link_hash_table *_bfd_x86_elf_finish_dynamic_sections + (bfd *, struct bfd_link_info *); + +-extern bool _bfd_x86_elf_always_size_sections ++extern bool _bfd_x86_elf_early_size_sections + (bfd *, struct bfd_link_info *); + + extern void _bfd_x86_elf_merge_symbol_attribute +@@ -925,8 +925,8 @@ extern void _bfd_x86_elf_link_report_rel + + #define elf_backend_check_relocs \ + _bfd_x86_elf_check_relocs +-#define elf_backend_size_dynamic_sections \ +- _bfd_x86_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_x86_elf_late_size_sections + #define elf_backend_merge_symbol_attribute \ + _bfd_x86_elf_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ +--- a/ld/emultempl/vms.em ++++ b/ld/emultempl/vms.em +@@ -196,10 +196,9 @@ gld${EMULATION_NAME}_before_allocation ( + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (elf_hash_table (&link_info)->dynamic_sections_created +- && bed->elf_backend_size_dynamic_sections +- && ! (*bed->elf_backend_size_dynamic_sections) (link_info.output_bfd, +- &link_info)) ++ if (bed->elf_backend_late_size_sections ++ && !bed->elf_backend_late_size_sections (link_info.output_bfd, ++ &link_info)) + einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); + + before_allocation_default (); diff --git a/toolchain/binutils/patches/2.41/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch b/toolchain/binutils/patches/2.41/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch new file mode 100644 index 0000000000..6d47db5f2e --- /dev/null +++ b/toolchain/binutils/patches/2.41/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch @@ -0,0 +1,218 @@ +From 3c6c32951e292a51ede70b8087bb0308d7dbc4fc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 20:33:32 +1030 +Subject: [PATCH 2/2] PR 30569, delete _bfd_mips_elf_early_size_sections + +PR30569 was triggered by a patch of mine 6540edd52cc0 moving the call +to always_size_sections in bfd_elf_size_dynamic_sections earlier, made +to support the x86 DT_RELR implementation. This broke mips16 code +handling stubs when --export-dynamic is passed to the linker, because +numerous symbols then became dynamic after always_size_sections. The +mips backend fiddles with symbols in its always_size_sections. Maciej +in 902e9fc76a0e had moved the call to always_size_sections to after +the export-dynamic code. Prior to that, Nathan in 04c3a75556c0 moved +it before the exec stack code, back to the start of +bfd_elf_size_dynamic_sections which was where Ian put it originally +in ff12f303355b. So the call has moved around a little. I'm leaving +it where it is, and instead calling mips_elf_check_symbols from +late_size_sections (the old size_dynamic_sections) which is now always +called. In fact, the whole of _bfd_mips_elf_early_size_sections can +be merged into _bfd_mips_elf_late_size_sections. +--- + bfd/elf32-mips.c | 1 - + bfd/elf64-mips.c | 2 -- + bfd/elfn32-mips.c | 1 - + bfd/elfxx-mips.c | 84 +++++++++++++++++++---------------------------- + bfd/elfxx-mips.h | 2 -- + 5 files changed, 34 insertions(+), 56 deletions(-) + +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2537,7 +2537,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4748,8 +4748,6 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections \ +- _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections \ + _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4138,7 +4138,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9639,48 +9639,6 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + return _bfd_elf_adjust_dynamic_copy (info, h, s); + } + +-/* This function is called after all the input files have been read, +- and the input sections have been assigned to output sections. We +- check for any mips16 stub sections that we can discard. */ +- +-bool +-_bfd_mips_elf_early_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) +-{ +- asection *sect; +- struct mips_elf_link_hash_table *htab; +- struct mips_htab_traverse_info hti; +- +- htab = mips_elf_hash_table (info); +- BFD_ASSERT (htab != NULL); +- +- /* The .reginfo section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".reginfo"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- /* The .MIPS.abiflags section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- hti.info = info; +- hti.output_bfd = output_bfd; +- hti.error = false; +- mips_elf_link_hash_traverse (mips_elf_hash_table (info), +- mips_elf_check_symbols, &hti); +- if (hti.error) +- return false; +- +- return true; +-} +- + /* If the link uses a GOT, lay it out and work out its size. */ + + static bool +@@ -9985,7 +9943,8 @@ mips_elf_set_plt_sym_value (struct mips_ + return true; + } + +-/* Set the sizes of the dynamic sections. */ ++/* Set the sizes of the dynamic sections, some mips non-dynamic sections, ++ and check for any mips16 stub sections that we can discard. */ + + bool + _bfd_mips_elf_late_size_sections (bfd *output_bfd, +@@ -9995,14 +9954,39 @@ _bfd_mips_elf_late_size_sections (bfd *o + asection *s, *sreldyn; + bool reltext; + struct mips_elf_link_hash_table *htab; ++ struct mips_htab_traverse_info hti; + + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = elf_hash_table (info)->dynobj; ++ ++ /* The .reginfo section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".reginfo"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf32_External_RegInfo)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ /* The .MIPS.abiflags section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf_External_ABIFlags_v0)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ hti.info = info; ++ hti.output_bfd = output_bfd; ++ hti.error = false; ++ mips_elf_link_hash_traverse (htab, mips_elf_check_symbols, &hti); ++ if (hti.error) ++ return false; ++ ++ dynobj = htab->root.dynobj; + if (dynobj == NULL) + return true; + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -10142,7 +10126,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + else if (bfd_link_executable (info) +- && ! mips_elf_hash_table (info)->use_rld_obj_head ++ && !htab->use_rld_obj_head + && startswith (name, ".rld_map")) + { + /* We add a room for __rld_map. It will be filled in by the +@@ -10151,7 +10135,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + else if (SGI_COMPAT (output_bfd) + && startswith (name, ".compact_rel")) +- s->size += mips_elf_hash_table (info)->compact_rel_size; ++ s->size += htab->compact_rel_size; + else if (s == htab->root.splt) + { + /* If the last PLT entry has a branch delay slot, allocate +@@ -10191,7 +10175,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in _bfd_mips_elf_finish_dynamic_sections, but we +@@ -14934,7 +14918,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14993,7 +14977,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -67,8 +67,6 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_early_size_sections +- (bfd *, struct bfd_link_info *); + extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section diff --git a/toolchain/binutils/patches/2.42/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch b/toolchain/binutils/patches/2.42/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch new file mode 100644 index 0000000000..96f3971f6d --- /dev/null +++ b/toolchain/binutils/patches/2.42/001-PR-30569-always-call-elf_backend_size_dynamic_sectio.patch @@ -0,0 +1,2228 @@ +From af969b14aedcc0ae27dcefab4327ff2d153dec8b Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 19:25:42 +1030 +Subject: [PATCH 1/2] PR 30569, always call elf_backend_size_dynamic_sections + +This largely mechanical patch is preparation for a followup patch. + +For quite some time I've thought that it would be useful to call +elf_backend_size_dynamic_sections even when no dynamic objects are +seen by the linker. That's what this patch does, with some renaming. +There are no functional changes to the linker, just a move of the +dynobj test in bfd_elf_size_dynamic_sections to target backend +functions, replacing the asserts/aborts already there. No doubt some +of the current always_size_sections functions could be moved to +size_dynamic_sections but I haven't made that change. + +Because both hooks are now always called, I have renamed +always_size_sections to early_size_sections and size_dynamic_sections +to late_size_sections. I condisdered calling late_size_sections plain +size_sections, since this is the usual target dynamic section sizing +hook, but decided that searching the sources for "size_sections" would +then hit early_size_sections and other functions. +--- + bfd/elf-bfd.h | 35 +++++++++++++++++------------------ + bfd/elf-m10300.c | 11 ++++++----- + bfd/elf32-arc.c | 9 +++++---- + bfd/elf32-arm.c | 15 ++++++++------- + bfd/elf32-bfin.c | 31 ++++++++++++++++--------------- + bfd/elf32-cr16.c | 11 ++++++----- + bfd/elf32-cris.c | 13 +++++++------ + bfd/elf32-csky.c | 8 ++++---- + bfd/elf32-frv.c | 23 ++++++++++++----------- + bfd/elf32-hppa.c | 8 ++++---- + bfd/elf32-i386.c | 7 +++---- + bfd/elf32-lm32.c | 15 ++++++++------- + bfd/elf32-m32c.c | 8 ++++---- + bfd/elf32-m32r.c | 11 ++++++----- + bfd/elf32-m68k.c | 16 ++++++++-------- + bfd/elf32-metag.c | 8 ++++---- + bfd/elf32-microblaze.c | 9 +++++---- + bfd/elf32-mips.c | 6 ++---- + bfd/elf32-nds32.c | 9 +++++---- + bfd/elf32-nios2.c | 15 ++++++++------- + bfd/elf32-or1k.c | 9 +++++---- + bfd/elf32-ppc.c | 11 ++++++----- + bfd/elf32-rl78.c | 8 ++++---- + bfd/elf32-s390.c | 10 +++++----- + bfd/elf32-score.c | 35 ++++++++++++++++++----------------- + bfd/elf32-score.h | 4 ++-- + bfd/elf32-score7.c | 13 +++++++------ + bfd/elf32-sh.c | 15 +++++++-------- + bfd/elf32-sparc.c | 3 +-- + bfd/elf32-tic6x.c | 14 +++++++------- + bfd/elf32-tilegx.c | 2 +- + bfd/elf32-tilepro.c | 11 +++++------ + bfd/elf32-vax.c | 16 +++++++--------- + bfd/elf32-xstormy16.c | 8 ++++---- + bfd/elf32-xtensa.c | 13 ++++++------- + bfd/elf64-alpha.c | 19 ++++++++++--------- + bfd/elf64-hppa.c | 11 ++++------- + bfd/elf64-ia64-vms.c | 13 +++++++------ + bfd/elf64-mips.c | 8 ++++---- + bfd/elf64-ppc.c | 12 ++++++------ + bfd/elf64-s390.c | 10 +++++----- + bfd/elf64-sparc.c | 4 ++-- + bfd/elf64-tilegx.c | 2 +- + bfd/elf64-x86-64.c | 7 +++---- + bfd/elflink.c | 9 ++++----- + bfd/elfn32-mips.c | 6 ++---- + bfd/elfnn-aarch64.c | 21 +++++++++++---------- + bfd/elfnn-ia64.c | 11 ++++++----- + bfd/elfnn-kvx.c | 19 +++++++++---------- + bfd/elfnn-loongarch.c | 9 +++++---- + bfd/elfnn-riscv.c | 7 ++++--- + bfd/elfxx-mips.c | 15 ++++++++------- + bfd/elfxx-mips.h | 4 ++-- + bfd/elfxx-sparc.c | 7 ++++--- + bfd/elfxx-sparc.h | 2 +- + bfd/elfxx-target.h | 12 ++++++------ + bfd/elfxx-tilegx.c | 7 ++++--- + bfd/elfxx-tilegx.h | 2 +- + bfd/elfxx-x86.c | 8 ++++---- + bfd/elfxx-x86.h | 8 ++++---- + ld/emultempl/vms.em | 7 +++---- + 61 files changed, 343 insertions(+), 337 deletions(-) + +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1187,7 +1187,7 @@ struct elf_backend_data + /* The ADJUST_DYNAMIC_SYMBOL function is called by the ELF backend + linker for every symbol which is defined by a dynamic object and + referenced by a regular object. This is called after all the +- input files have been seen, but before the SIZE_DYNAMIC_SECTIONS ++ input files have been seen, but before the LATE_SIZE_SECTIONS + function has been called. The hash table entry should be + bfd_link_hash_defined ore bfd_link_hash_defweak, and it should be + defined in a section from a dynamic object. Dynamic object +@@ -1199,24 +1199,23 @@ struct elf_backend_data + bool (*elf_backend_adjust_dynamic_symbol) + (struct bfd_link_info *info, struct elf_link_hash_entry *h); + +- /* The ALWAYS_SIZE_SECTIONS function is called by the backend linker +- after all the linker input files have been seen but before the +- section sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL, but before SIZE_DYNAMIC_SECTIONS. */ +- bool (*elf_backend_always_size_sections) ++ /* The EARLY_SIZE_SECTIONS and LATE_SIZE_SECTIONS functions are ++ called by the backend linker after all linker input files have ++ been seen and sections have been assigned to output sections, but ++ before the section sizes have been set. Both of these functions ++ are called even when no dynamic object is seen by the linker. ++ Between them, they must set the sizes of the dynamic sections and ++ other backend specific sections, and may fill in their contents. ++ Most backends need only use LATE_SIZE_SECTIONS. ++ EARLY_SIZE_SECTIONS is called before --export-dynamic makes some ++ symbols dynamic and before ADJUST_DYNAMIC_SYMBOL processes ++ dynamic symbols, LATE_SIZE_SECTIONS afterwards. The generic ELF ++ linker can handle the .dynsym, .dynstr and .hash sections. ++ Besides those, these functions must handle the .interp section ++ and any other sections created by CREATE_DYNAMIC_SECTIONS. */ ++ bool (*elf_backend_early_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); +- +- /* The SIZE_DYNAMIC_SECTIONS function is called by the ELF backend +- linker after all the linker input files have been seen but before +- the sections sizes have been set. This is called after +- ADJUST_DYNAMIC_SYMBOL has been called on all appropriate symbols. +- It is only called when linking against a dynamic object. It must +- set the sizes of the dynamic sections, and may fill in their +- contents as well. The generic ELF linker can handle the .dynsym, +- .dynstr and .hash sections. This function must handle the +- .interp section and any sections created by the +- CREATE_DYNAMIC_SECTIONS entry point. */ +- bool (*elf_backend_size_dynamic_sections) ++ bool (*elf_backend_late_size_sections) + (bfd *output_bfd, struct bfd_link_info *info); + + /* The STRIP_ZERO_SIZED_DYNAMIC_SECTIONS function is called by the +--- a/bfd/elf-m10300.c ++++ b/bfd/elf-m10300.c +@@ -5015,8 +5015,8 @@ _bfd_mn10300_elf_adjust_dynamic_symbol ( + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_mn10300_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_mn10300_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + struct elf32_mn10300_link_hash_table *htab = elf32_mn10300_hash_table (info); + bfd * dynobj; +@@ -5024,7 +5024,8 @@ _bfd_mn10300_elf_size_dynamic_sections ( + bool relocs; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5511,8 +5512,8 @@ mn10300_elf_mkobject (bfd *abfd) + _bfd_mn10300_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mn10300_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_mn10300_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mn10300_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_mn10300_elf_finish_dynamic_symbol +--- a/bfd/elf32-arc.c ++++ b/bfd/elf32-arc.c +@@ -2715,8 +2715,8 @@ elf_arc_finish_dynamic_sections (bfd * o + + /* Set the sizes of the dynamic sections. */ + static bool +-elf_arc_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_arc_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2724,7 +2724,8 @@ elf_arc_size_dynamic_sections (bfd *outp + struct elf_link_hash_table *htab = elf_hash_table (info); + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3140,7 +3141,7 @@ arc_elf_relax_section (bfd *abfd, asecti + #define elf_backend_finish_dynamic_symbol elf_arc_finish_dynamic_symbol + + #define elf_backend_finish_dynamic_sections elf_arc_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_arc_size_dynamic_sections ++#define elf_backend_late_size_sections elf_arc_late_size_sections + + #define elf_backend_can_gc_sections 1 + #define elf_backend_want_got_plt 1 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -16752,8 +16752,8 @@ bfd_elf32_arm_set_byteswap_code (struct + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info * info) ++elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; +@@ -16766,7 +16766,9 @@ elf32_arm_size_dynamic_sections (bfd * o + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; ++ + check_use_blx (htab); + + if (elf_hash_table (info)->dynamic_sections_created) +@@ -17138,8 +17140,7 @@ elf32_arm_size_dynamic_sections (bfd * o + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elf32_arm_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + struct elf32_arm_link_hash_table *htab; +@@ -20341,8 +20342,8 @@ elf32_arm_backend_symbol_processing (bfd + #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections +-#define elf_backend_always_size_sections elf32_arm_always_size_sections ++#define elf_backend_late_size_sections elf32_arm_late_size_sections ++#define elf_backend_early_size_sections elf32_arm_early_size_sections + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_init_file_header elf32_arm_init_file_header + #define elf_backend_reloc_type_class elf32_arm_reloc_type_class +--- a/bfd/elf32-bfin.c ++++ b/bfd/elf32-bfin.c +@@ -4027,8 +4027,8 @@ _bfinfdpic_size_got_plt (bfd *output_bfd + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_bfinfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_bfinfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -4037,7 +4037,8 @@ elf32_bfinfdpic_size_dynamic_sections (b + + htab = elf_hash_table (info); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -4086,7 +4087,7 @@ elf32_bfinfdpic_size_dynamic_sections (b + } + + static bool +-elf32_bfinfdpic_always_size_sections (bfd *output_bfd, ++elf32_bfinfdpic_early_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) +@@ -5123,15 +5124,16 @@ bfin_discard_copies (struct elf_link_has + } + + static bool +-bfin_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++bfin_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5423,8 +5425,7 @@ struct bfd_elf_special_section const elf + #define elf_backend_check_relocs bfin_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + bfin_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- bfin_size_dynamic_sections ++#define elf_backend_late_size_sections bfin_late_size_sections + #define elf_backend_relocate_section bfin_relocate_section + #define elf_backend_finish_dynamic_symbol \ + bfin_finish_dynamic_symbol +@@ -5470,9 +5471,9 @@ struct bfd_elf_special_section const elf + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + bfinfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_bfinfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_bfinfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -5480,9 +5481,9 @@ struct bfd_elf_special_section const elf + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_bfinfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_bfinfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_bfinfdpic_late_size_sections + #undef elf_backend_finish_dynamic_symbol + #define elf_backend_finish_dynamic_symbol \ + elf32_bfinfdpic_finish_dynamic_symbol +--- a/bfd/elf32-cr16.c ++++ b/bfd/elf32-cr16.c +@@ -2391,15 +2391,16 @@ _bfd_cr16_elf_adjust_dynamic_symbol (str + /* Set the sizes of the dynamic sections. */ + + static bool +-_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd, +- struct bfd_link_info * info) ++_bfd_cr16_elf_late_size_sections (bfd * output_bfd, ++ struct bfd_link_info * info) + { + bfd * dynobj; + asection * s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -2836,8 +2837,8 @@ _bfd_cr16_elf_reloc_type_class (const st + _bfd_cr16_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol \ + _bfd_cr16_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- _bfd_cr16_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_cr16_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_symbol \ + _bfd_cr16_elf_finish_dynamic_symbol +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2527,7 +2527,7 @@ cris_elf_plt_sym_val (bfd_vma i ATTRIBUT + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_cris_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_cris_size_dynamic_sections if no dynamic sections will be ++ or elf_cris_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static bool +@@ -3508,8 +3508,8 @@ cris_elf_check_relocs (bfd *abfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_cris_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_cris_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_cris_link_hash_table * htab; + bfd *dynobj; +@@ -3521,7 +3521,8 @@ elf_cris_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4090,8 +4091,8 @@ elf_cris_got_elt_size (bfd *abfd ATTRIBU + elf_cris_adjust_dynamic_symbol + #define elf_backend_copy_indirect_symbol \ + elf_cris_copy_indirect_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_cris_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf_cris_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_finish_dynamic_symbol \ + elf_cris_finish_dynamic_symbol +--- a/bfd/elf32-csky.c ++++ b/bfd/elf32-csky.c +@@ -1893,8 +1893,8 @@ csky_allocate_dynrelocs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-csky_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++csky_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct csky_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1907,7 +1907,7 @@ csky_elf_size_dynamic_sections (bfd *out + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- return false; ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5333,7 +5333,7 @@ elf32_csky_obj_attrs_handle_unknown (bfd + /* Dynamic relocate related API. */ + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_adjust_dynamic_symbol csky_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections csky_elf_size_dynamic_sections ++#define elf_backend_late_size_sections csky_elf_late_size_sections + #define elf_backend_finish_dynamic_symbol csky_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections csky_elf_finish_dynamic_sections + #define elf_backend_rela_normal 1 +--- a/bfd/elf32-frv.c ++++ b/bfd/elf32-frv.c +@@ -5423,15 +5423,16 @@ _frvfdpic_size_got_plt (bfd *output_bfd, + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_frvfdpic_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + struct _frvfdpic_dynamic_got_plt_info gpinfo; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5472,8 +5473,8 @@ elf32_frvfdpic_size_dynamic_sections (bf + } + + static bool +-elf32_frvfdpic_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf32_frvfdpic_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -6817,9 +6818,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef bfd_elf32_bfd_link_hash_table_create + #define bfd_elf32_bfd_link_hash_table_create \ + frvfdpic_elf_link_hash_table_create +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections \ +- elf32_frvfdpic_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections \ ++ elf32_frvfdpic_early_size_sections + + #undef elf_backend_create_dynamic_sections + #define elf_backend_create_dynamic_sections \ +@@ -6827,9 +6828,9 @@ elf32_frv_grok_psinfo (bfd *abfd, Elf_In + #undef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol \ + elf32_frvfdpic_adjust_dynamic_symbol +-#undef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_frvfdpic_size_dynamic_sections ++#undef elf_backend_late_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_frvfdpic_late_size_sections + #undef bfd_elf32_bfd_relax_section + #define bfd_elf32_bfd_relax_section \ + elf32_frvfdpic_relax_section +--- a/bfd/elf32-hppa.c ++++ b/bfd/elf32-hppa.c +@@ -2042,8 +2042,8 @@ clobber_millicode_symbols (struct elf_li + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_hppa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf32_hppa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_hppa_link_hash_table *htab; + bfd *dynobj; +@@ -2057,7 +2057,7 @@ elf32_hppa_size_dynamic_sections (bfd *o + + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4452,7 +4452,7 @@ elf32_hppa_elf_get_symbol_type (Elf_Inte + #define elf_backend_hide_symbol elf32_hppa_hide_symbol + #define elf_backend_finish_dynamic_symbol elf32_hppa_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf32_hppa_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf32_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf32_hppa_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_gc_mark_hook elf32_hppa_gc_mark_hook + #define elf_backend_grok_prstatus elf32_hppa_grok_prstatus +--- a/bfd/elf32-i386.c ++++ b/bfd/elf32-i386.c +@@ -1957,8 +1957,7 @@ elf_i386_scan_relocs (bfd *abfd, + } + + static bool +-elf_i386_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_i386_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -1971,7 +1970,7 @@ elf_i386_always_size_sections (bfd *outp + elf_i386_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Set the correct type for an x86 ELF section. We do this by the +@@ -4479,7 +4478,7 @@ elf_i386_link_setup_gnu_properties (stru + #define bfd_elf32_get_synthetic_symtab elf_i386_get_synthetic_symtab + + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible +-#define elf_backend_always_size_sections elf_i386_always_size_sections ++#define elf_backend_early_size_sections elf_i386_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_fake_sections elf_i386_fake_sections + #define elf_backend_finish_dynamic_sections elf_i386_finish_dynamic_sections +--- a/bfd/elf32-lm32.c ++++ b/bfd/elf32-lm32.c +@@ -1906,8 +1906,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-lm32_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++lm32_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct elf_lm32_link_hash_table *htab; + bfd *dynobj; +@@ -1920,7 +1920,8 @@ lm32_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -2309,7 +2310,7 @@ lm32_elf_create_dynamic_sections (bfd *a + } + + static bool +-lm32_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++lm32_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (!bfd_link_relocatable (info)) + { +@@ -2395,7 +2396,7 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #define bfd_elf32_bfd_link_hash_table_create lm32_elf_link_hash_table_create + #define elf_backend_check_relocs lm32_elf_check_relocs + #define elf_backend_reloc_type_class lm32_elf_reloc_type_class +-#define elf_backend_size_dynamic_sections lm32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections lm32_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections lm32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections lm32_elf_finish_dynamic_sections +@@ -2416,8 +2417,8 @@ lm32_elf_fdpic_copy_private_bfd_data (bf + #undef elf32_bed + #define elf32_bed elf32_lm32fdpic_bed + +-#undef elf_backend_always_size_sections +-#define elf_backend_always_size_sections lm32_elf_always_size_sections ++#undef elf_backend_early_size_sections ++#define elf_backend_early_size_sections lm32_elf_early_size_sections + #undef bfd_elf32_bfd_copy_private_bfd_data + #define bfd_elf32_bfd_copy_private_bfd_data lm32_elf_fdpic_copy_private_bfd_data + +--- a/bfd/elf32-m32c.c ++++ b/bfd/elf32-m32c.c +@@ -773,8 +773,8 @@ m32c_elf_finish_dynamic_sections (bfd *a + } + + static bool +-m32c_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32c_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2132,8 +2132,8 @@ _bfd_m32c_elf_eh_frame_address_size (bfd + #define elf_backend_check_relocs m32c_elf_check_relocs + #define elf_backend_object_p m32c_elf_object_p + #define elf_symbol_leading_char ('_') +-#define elf_backend_always_size_sections \ +- m32c_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ m32c_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + m32c_elf_finish_dynamic_sections + +--- a/bfd/elf32-m32r.c ++++ b/bfd/elf32-m32r.c +@@ -1958,8 +1958,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-m32r_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++m32r_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_link_hash_table *htab; + bfd *dynobj; +@@ -1968,7 +1968,7 @@ m32r_elf_size_dynamic_sections (bfd *out + bfd *ibfd; + + #ifdef DEBUG_PIC +- printf ("m32r_elf_size_dynamic_sections()\n"); ++ printf ("m32r_elf_late_size_sections()\n"); + #endif + + htab = m32r_elf_hash_table (info); +@@ -1976,7 +1976,8 @@ m32r_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->dynamic_sections_created) + { +@@ -3658,7 +3659,7 @@ m32r_elf_reloc_type_class (const struct + + #define elf_backend_create_dynamic_sections m32r_elf_create_dynamic_sections + #define bfd_elf32_bfd_link_hash_table_create m32r_elf_link_hash_table_create +-#define elf_backend_size_dynamic_sections m32r_elf_size_dynamic_sections ++#define elf_backend_late_size_sections m32r_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections m32r_elf_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol m32r_elf_adjust_dynamic_symbol +--- a/bfd/elf32-m68k.c ++++ b/bfd/elf32-m68k.c +@@ -2934,7 +2934,7 @@ elf_m68k_get_plt_info (bfd *output_bfd) + It's a convenient place to determine the PLT style. */ + + static bool +-elf_m68k_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_m68k_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + /* Bind input BFDs to GOTs and calculate sizes of .got and .rela.got + sections. */ +@@ -3107,15 +3107,16 @@ elf_m68k_adjust_dynamic_symbol (struct b + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_m68k_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_m68k_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -4628,12 +4629,11 @@ elf_m68k_grok_psinfo (bfd *abfd, Elf_Int + #define bfd_elf32_bfd_final_link bfd_elf_final_link + + #define elf_backend_check_relocs elf_m68k_check_relocs +-#define elf_backend_always_size_sections \ +- elf_m68k_always_size_sections ++#define elf_backend_early_size_sections \ ++ elf_m68k_early_size_sections + #define elf_backend_adjust_dynamic_symbol \ + elf_m68k_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf_m68k_size_dynamic_sections ++#define elf_backend_late_size_sections elf_m68k_late_size_sections + #define elf_backend_final_write_processing elf_m68k_final_write_processing + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_m68k_relocate_section +--- a/bfd/elf32-metag.c ++++ b/bfd/elf32-metag.c +@@ -2717,8 +2717,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_metag_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_metag_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_metag_link_hash_table *htab; + bfd *dynobj; +@@ -2729,7 +2729,7 @@ elf_metag_size_dynamic_sections (bfd *ou + htab = metag_link_hash_table (info); + dynobj = htab->etab.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->etab.dynamic_sections_created) + { +@@ -4019,7 +4019,7 @@ elf_metag_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol elf_metag_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol elf_metag_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections elf_metag_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections elf_metag_size_dynamic_sections ++#define elf_backend_late_size_sections elf_metag_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_init_file_header elf_metag_init_file_header +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2966,8 +2966,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++microblaze_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf32_mb_link_hash_table *htab; + bfd *dynobj; +@@ -2979,7 +2979,8 @@ microblaze_elf_size_dynamic_sections (bf + return false; + + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3497,7 +3498,7 @@ microblaze_elf_add_symbol_hook (bfd *abf + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_late_size_sections microblaze_elf_late_size_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + + #include "elf32-target.h" +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2537,10 +2537,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-nds32.c ++++ b/bfd/elf32-nds32.c +@@ -4302,8 +4302,8 @@ elf32_nds32_add_dynreloc (bfd *output_bf + /* Set the sizes of the dynamic sections. */ + + static bool +-nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nds32_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_nds32_link_hash_table *htab; + bfd *dynobj; +@@ -4316,7 +4316,8 @@ nds32_elf_size_dynamic_sections (bfd *ou + return false; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -13984,7 +13985,7 @@ nds32_elf_unify_tls_model (bfd *inbfd, a + #define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol +-#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections ++#define elf_backend_late_size_sections nds32_elf_late_size_sections + #define elf_backend_relocate_section nds32_elf_relocate_section + #define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook + #define elf_backend_grok_prstatus nds32_elf_grok_prstatus +--- a/bfd/elf32-nios2.c ++++ b/bfd/elf32-nios2.c +@@ -5405,7 +5405,7 @@ nios2_elf32_adjust_dynamic_symbol (struc + return true; + } + +-/* Worker function for nios2_elf32_size_dynamic_sections. */ ++/* Worker function for nios2_elf32_late_size_sections. */ + static bool + adjust_dynrelocs (struct elf_link_hash_entry *h, void *inf) + { +@@ -5432,7 +5432,7 @@ adjust_dynrelocs (struct elf_link_hash_e + return true; + } + +-/* Another worker function for nios2_elf32_size_dynamic_sections. ++/* Another worker function for nios2_elf32_late_size_sections. + Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + static bool +@@ -5667,11 +5667,11 @@ allocate_dynrelocs (struct elf_link_hash + return true; + } + +-/* Implement elf_backend_size_dynamic_sections: ++/* Implement elf_backend_late_size_sections: + Set the sizes of the dynamic sections. */ + static bool +-nios2_elf32_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++nios2_elf32_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -5681,7 +5681,8 @@ nios2_elf32_size_dynamic_sections (bfd * + + htab = elf32_nios2_hash_table (info); + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + htab->res_n_size = 0; + if (htab->root.dynamic_sections_created) +@@ -6052,7 +6053,7 @@ const struct bfd_elf_special_section elf + nios2_elf32_finish_dynamic_sections + #define elf_backend_adjust_dynamic_symbol nios2_elf32_adjust_dynamic_symbol + #define elf_backend_reloc_type_class nios2_elf32_reloc_type_class +-#define elf_backend_size_dynamic_sections nios2_elf32_size_dynamic_sections ++#define elf_backend_late_size_sections nios2_elf32_late_size_sections + #define elf_backend_add_symbol_hook nios2_elf_add_symbol_hook + #define elf_backend_copy_indirect_symbol nios2_elf32_copy_indirect_symbol + #define elf_backend_object_p nios2_elf32_object_p +--- a/bfd/elf32-or1k.c ++++ b/bfd/elf32-or1k.c +@@ -3047,8 +3047,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-or1k_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++or1k_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_or1k_link_hash_table *htab; + bfd *dynobj; +@@ -3061,7 +3061,8 @@ or1k_elf_size_dynamic_sections (bfd *out + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -3414,7 +3415,7 @@ or1k_grok_psinfo (bfd *abfd, Elf_Interna + #define elf_backend_copy_indirect_symbol or1k_elf_copy_indirect_symbol + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections or1k_elf_finish_dynamic_sections +-#define elf_backend_size_dynamic_sections or1k_elf_size_dynamic_sections ++#define elf_backend_late_size_sections or1k_elf_late_size_sections + #define elf_backend_adjust_dynamic_symbol or1k_elf_adjust_dynamic_symbol + #define elf_backend_finish_dynamic_symbol or1k_elf_finish_dynamic_symbol + +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -5479,8 +5479,8 @@ static const unsigned char glink_eh_fram + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_elf_link_hash_table *htab; + asection *s; +@@ -5488,11 +5488,12 @@ ppc_elf_size_dynamic_sections (bfd *outp + bfd *ibfd; + + #ifdef DEBUG +- fprintf (stderr, "ppc_elf_size_dynamic_sections called\n"); ++ fprintf (stderr, "ppc_elf_late_size_sections called\n"); + #endif + + htab = ppc_elf_hash_table (info); +- BFD_ASSERT (htab->elf.dynobj != NULL); ++ if (htab->elf.dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -10433,7 +10434,7 @@ ppc_elf_finish_dynamic_sections (bfd *ou + #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol + #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol + #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook +-#define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections ppc_elf_late_size_sections + #define elf_backend_hash_symbol ppc_elf_hash_symbol + #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections +--- a/bfd/elf32-rl78.c ++++ b/bfd/elf32-rl78.c +@@ -1440,8 +1440,8 @@ rl78_elf_finish_dynamic_sections (bfd *a + } + + static bool +-rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++rl78_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -2610,8 +2610,8 @@ rl78_elf_relax_section (bfd *abfd, + + #define bfd_elf32_bfd_relax_section rl78_elf_relax_section + #define elf_backend_check_relocs rl78_elf_check_relocs +-#define elf_backend_always_size_sections \ +- rl78_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ rl78_elf_early_size_sections + #define elf_backend_finish_dynamic_sections \ + rl78_elf_finish_dynamic_sections + +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -1366,7 +1366,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1778,8 +1778,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1790,7 +1790,7 @@ elf_s390_size_dynamic_sections (bfd *out + htab = elf_s390_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3926,7 +3926,7 @@ elf32_s390_merge_private_bfd_data (bfd * + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf32-score.c ++++ b/bfd/elf32-score.c +@@ -1089,7 +1089,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s3_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s3_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + static bool + score_elf_sort_hash_table (struct bfd_link_info *info, +@@ -3160,8 +3160,8 @@ s3_bfd_score_elf_adjust_dynamic_symbol ( + /* This function is called after all the input files have been read, + and the input sections have been assigned to output sections. */ + static bool +-s3_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s3_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3237,14 +3237,15 @@ s3_bfd_score_elf_always_size_sections (b + + /* Set the sizes of the dynamic sections. */ + static bool +-s3_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s3_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3313,7 +3314,7 @@ s3_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s3_bfd_score_elf_always_size_sections() has already done ++ /* s3_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +@@ -4177,22 +4178,22 @@ _bfd_score_elf_adjust_dynamic_symbol (st + } + + static bool +-_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s3_bfd_score_elf_early_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_always_size_sections (output_bfd, info); ++ return s7_bfd_score_elf_early_size_sections (output_bfd, info); + } + + static bool +-_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (bfd_get_mach (output_bfd) == bfd_mach_score3) +- return s3_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s3_bfd_score_elf_late_size_sections (output_bfd, info); + else +- return s7_bfd_score_elf_size_dynamic_sections (output_bfd, info); ++ return s7_bfd_score_elf_late_size_sections (output_bfd, info); + } + + static bool +@@ -4455,10 +4456,10 @@ _bfd_score_elf_common_definition (Elf_In + _bfd_score_elf_section_from_bfd_section + #define elf_backend_adjust_dynamic_symbol \ + _bfd_score_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_score_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_score_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_score_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_score_elf_late_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_create_dynamic_sections \ + _bfd_score_elf_create_dynamic_sections +--- a/bfd/elf32-score.h ++++ b/bfd/elf32-score.h +@@ -78,10 +78,10 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + struct elf_link_hash_entry *); + + extern bool +-s7_bfd_score_elf_always_size_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_early_size_sections (bfd *, struct bfd_link_info *); + + extern bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++s7_bfd_score_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern bool + s7_bfd_score_elf_create_dynamic_sections (bfd *, struct bfd_link_info *); +--- a/bfd/elf32-score7.c ++++ b/bfd/elf32-score7.c +@@ -975,7 +975,7 @@ score_elf_got_info (bfd *abfd, asection + appear towards the end. This reduces the amount of GOT space + required. MAX_LOCAL is used to set the number of local symbols + known to be in the dynamic symbol table. During +- s7_bfd_score_elf_size_dynamic_sections, this value is 1. Afterward, the ++ s7_bfd_score_elf_late_size_sections, this value is 1. Afterward, the + section symbols are added and the count is higher. */ + + static bool +@@ -2969,8 +2969,8 @@ s7_bfd_score_elf_adjust_dynamic_symbol ( + and the input sections have been assigned to output sections. */ + + bool +-s7_bfd_score_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++s7_bfd_score_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -3047,14 +3047,15 @@ s7_bfd_score_elf_always_size_sections (b + /* Set the sizes of the dynamic sections. */ + + bool +-s7_bfd_score_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++s7_bfd_score_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool reltext; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3123,7 +3124,7 @@ s7_bfd_score_elf_size_dynamic_sections ( + } + else if (startswith (name, ".got")) + { +- /* s7_bfd_score_elf_always_size_sections() has already done ++ /* s7_bfd_score_elf_early_size_sections() has already done + most of the work, but some symbols may have been mapped + to versions that we must now resolve in the got_entries + hash tables. */ +--- a/bfd/elf32-sh.c ++++ b/bfd/elf32-sh.c +@@ -2927,7 +2927,7 @@ allocate_dynrelocs (struct elf_link_hash + It's a convenient place to determine the PLT style. */ + + static bool +-sh_elf_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++sh_elf_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + sh_elf_hash_table (info)->plt_info = get_plt_info (output_bfd, + bfd_link_pic (info)); +@@ -2942,8 +2942,8 @@ sh_elf_always_size_sections (bfd *output + /* Set the sizes of the dynamic sections. */ + + static bool +-sh_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++sh_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_sh_link_hash_table *htab; + bfd *dynobj; +@@ -2956,7 +2956,8 @@ sh_elf_size_dynamic_sections (bfd *outpu + return false; + + dynobj = htab->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -6600,10 +6601,8 @@ sh_elf_encode_eh_address (bfd *abfd, + sh_elf_link_hash_table_create + #define elf_backend_adjust_dynamic_symbol \ + sh_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- sh_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- sh_elf_size_dynamic_sections ++#define elf_backend_early_size_sections sh_elf_early_size_sections ++#define elf_backend_late_size_sections sh_elf_late_size_sections + #define elf_backend_omit_section_dynsym sh_elf_omit_section_dynsym + #define elf_backend_finish_dynamic_symbol \ + sh_elf_finish_dynamic_symbol +--- a/bfd/elf32-sparc.c ++++ b/bfd/elf32-sparc.c +@@ -248,8 +248,7 @@ elf32_sparc_reloc_type_class (const stru + #define elf_backend_adjust_dynamic_symbol \ + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ + _bfd_sparc_elf_finish_dynamic_symbol +--- a/bfd/elf32-tic6x.c ++++ b/bfd/elf32-tic6x.c +@@ -3160,7 +3160,7 @@ elf32_tic6x_allocate_dynrelocs (struct e + /* Set the sizes of the dynamic sections. */ + + static bool +-elf32_tic6x_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf32_tic6x_link_hash_table *htab; + bfd *dynobj; +@@ -3171,7 +3171,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + htab = elf32_tic6x_hash_table (info); + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3358,7 +3358,7 @@ elf32_tic6x_size_dynamic_sections (bfd * + and the input sections have been assigned to output sections. */ + + static bool +-elf32_tic6x_always_size_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf32_tic6x_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + if (elf32_tic6x_using_dsbt (output_bfd) && !bfd_link_relocatable (info) + && !bfd_elf_stack_segment_size (output_bfd, info, +@@ -4261,10 +4261,10 @@ elf32_tic6x_write_section (bfd *output_b + #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible + #define elf_backend_finish_dynamic_symbol \ + elf32_tic6x_finish_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf32_tic6x_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf32_tic6x_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf32_tic6x_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf32_tic6x_late_size_sections + #define elf_backend_finish_dynamic_sections \ + elf32_tic6x_finish_dynamic_sections + #define bfd_elf32_bfd_final_link \ +--- a/bfd/elf32-tilegx.c ++++ b/bfd/elf32-tilegx.c +@@ -105,7 +105,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf32-tilepro.c ++++ b/bfd/elf32-tilepro.c +@@ -2182,11 +2182,9 @@ tilepro_elf_omit_section_dynsym (bfd *ou + #define ELF32_DYNAMIC_INTERPRETER "/lib/ld.so.1" + + static bool +-tilepro_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++tilepro_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { +- (void)output_bfd; +- + struct elf_link_hash_table *htab; + bfd *dynobj; + asection *s; +@@ -2195,7 +2193,8 @@ tilepro_elf_size_dynamic_sections (bfd * + htab = tilepro_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -3739,7 +3738,7 @@ tilepro_additional_program_headers (bfd + #define elf_backend_check_relocs tilepro_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilepro_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilepro_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilepro_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilepro_elf_late_size_sections + #define elf_backend_relocate_section tilepro_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilepro_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilepro_elf_finish_dynamic_sections +--- a/bfd/elf32-vax.c ++++ b/bfd/elf32-vax.c +@@ -36,7 +36,6 @@ static bool elf_vax_check_relocs (bfd *, + asection *, const Elf_Internal_Rela *); + static bool elf_vax_adjust_dynamic_symbol (struct bfd_link_info *, + struct elf_link_hash_entry *); +-static bool elf_vax_size_dynamic_sections (bfd *, struct bfd_link_info *); + static int elf_vax_relocate_section (bfd *, struct bfd_link_info *, + bfd *, asection *, bfd_byte *, + Elf_Internal_Rela *, +@@ -985,8 +984,8 @@ elf_vax_discard_got_entries (struct elf_ + /* Discard unused dynamic data if this is a static link. */ + + static bool +-elf_vax_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_vax_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -1024,14 +1023,15 @@ elf_vax_always_size_sections (bfd *outpu + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_vax_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf_vax_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; + bool relocs; + + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -1861,10 +1861,8 @@ elf_vax_plt_sym_val (bfd_vma i, const as + #define elf_backend_check_relocs elf_vax_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf_vax_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- elf_vax_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf_vax_size_dynamic_sections ++#define elf_backend_early_size_sections elf_vax_early_size_sections ++#define elf_backend_late_size_sections elf_vax_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section elf_vax_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf32-xstormy16.c ++++ b/bfd/elf32-xstormy16.c +@@ -706,8 +706,8 @@ xstormy16_elf_relax_section (bfd *dynobj + } + + static bool +-xstormy16_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++xstormy16_elf_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *splt; +@@ -1013,8 +1013,8 @@ xstormy16_elf_gc_mark_hook (asection *se + #define elf_backend_relocate_section xstormy16_elf_relocate_section + #define elf_backend_gc_mark_hook xstormy16_elf_gc_mark_hook + #define elf_backend_check_relocs xstormy16_elf_check_relocs +-#define elf_backend_always_size_sections \ +- xstormy16_elf_always_size_sections ++#define elf_backend_early_size_sections \ ++ xstormy16_elf_early_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_finish_dynamic_sections \ +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -1557,8 +1557,8 @@ elf_xtensa_allocate_local_got_size (stru + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_xtensa_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + bfd *dynobj, *abfd; +@@ -1575,7 +1575,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + + dynobj = elf_hash_table (info)->dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + srelgot = htab->elf.srelgot; + srelplt = htab->elf.srelplt; + +@@ -1780,8 +1780,7 @@ elf_xtensa_size_dynamic_sections (bfd *o + } + + static bool +-elf_xtensa_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_xtensa_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf_xtensa_link_hash_table *htab; + asection *tls_sec; +@@ -11544,8 +11543,8 @@ static const struct bfd_elf_special_sect + #define elf_backend_object_p elf_xtensa_object_p + #define elf_backend_reloc_type_class elf_xtensa_reloc_type_class + #define elf_backend_relocate_section elf_xtensa_relocate_section +-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections +-#define elf_backend_always_size_sections elf_xtensa_always_size_sections ++#define elf_backend_late_size_sections elf_xtensa_late_size_sections ++#define elf_backend_early_size_sections elf_xtensa_early_size_sections + #define elf_backend_omit_section_dynsym _bfd_elf_omit_section_dynsym_all + #define elf_backend_special_sections elf_xtensa_special_sections + #define elf_backend_action_discarded elf_xtensa_action_discarded +--- a/bfd/elf64-alpha.c ++++ b/bfd/elf64-alpha.c +@@ -2562,8 +2562,8 @@ elf64_alpha_size_plt_section (struct bfd + } + + static bool +-elf64_alpha_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_early_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *i; + struct alpha_elf_link_hash_table * htab; +@@ -2789,8 +2789,8 @@ elf64_alpha_size_rela_got_section (struc + /* Set the sizes of the dynamic sections. */ + + static bool +-elf64_alpha_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_alpha_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s; +@@ -2802,7 +2802,8 @@ elf64_alpha_size_dynamic_sections (bfd * + return false; + + dynobj = elf_hash_table(info)->dynobj; +- BFD_ASSERT(dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5448,10 +5449,10 @@ static const struct elf_size_info alpha_ + elf64_alpha_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ + elf64_alpha_copy_indirect_symbol +-#define elf_backend_always_size_sections \ +- elf64_alpha_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- elf64_alpha_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ elf64_alpha_early_size_sections ++#define elf_backend_late_size_sections \ ++ elf64_alpha_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-hppa.c ++++ b/bfd/elf64-hppa.c +@@ -176,9 +176,6 @@ static bool elf64_hppa_adjust_dynamic_sy + static bool elf64_hppa_mark_milli_and_exported_functions + (struct elf_link_hash_entry *, void *); + +-static bool elf64_hppa_size_dynamic_sections +- (bfd *, struct bfd_link_info *); +- + static int elf64_hppa_link_output_symbol_hook + (struct bfd_link_info *, const char *, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); +@@ -1520,7 +1517,7 @@ elf64_hppa_mark_milli_and_exported_funct + the contents of our special sections. */ + + static bool +-elf64_hppa_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++elf64_hppa_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct elf64_hppa_link_hash_table *hppa_info; + struct elf64_hppa_allocate_data data; +@@ -1534,7 +1531,8 @@ elf64_hppa_size_dynamic_sections (bfd *o + return false; + + dynobj = hppa_info->root.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + /* Mark each function this program exports so that we will allocate + space in the .opd section for each function's FPTR. If we are +@@ -3984,8 +3982,7 @@ const struct elf_size_info hppa64_elf_si + #define elf_backend_adjust_dynamic_symbol \ + elf64_hppa_adjust_dynamic_symbol + +-#define elf_backend_size_dynamic_sections \ +- elf64_hppa_size_dynamic_sections ++#define elf_backend_late_size_sections elf64_hppa_late_size_sections + + #define elf_backend_finish_dynamic_symbol \ + elf64_hppa_finish_dynamic_symbol +--- a/bfd/elf64-ia64-vms.c ++++ b/bfd/elf64-ia64-vms.c +@@ -2591,8 +2591,8 @@ elf64_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elf64_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf64_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf64_ia64_allocate_data data; + struct elf64_ia64_link_hash_table *ia64_info; +@@ -2601,11 +2601,12 @@ elf64_ia64_size_dynamic_sections (bfd *o + struct elf_link_hash_table *hash_table; + + hash_table = elf_hash_table (info); +- dynobj = hash_table->dynobj; + ia64_info = elf64_ia64_hash_table (info); + if (ia64_info == NULL) + return false; +- BFD_ASSERT(dynobj != NULL); ++ dynobj = hash_table->dynobj; ++ if (dynobj == NULL) ++ return true; + data.info = info; + + /* Allocate the GOT entries. */ +@@ -5488,8 +5489,8 @@ static const struct elf_size_info elf64_ + elf64_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elf64_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elf64_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elf64_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4748,10 +4748,10 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections \ ++ _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections \ ++ _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-ppc.c ++++ b/bfd/elf64-ppc.c +@@ -119,8 +119,8 @@ static bfd_vma opd_entry_value + #define elf_backend_adjust_dynamic_symbol ppc64_elf_adjust_dynamic_symbol + #define elf_backend_hide_symbol ppc64_elf_hide_symbol + #define elf_backend_maybe_function_sym ppc64_elf_maybe_function_sym +-#define elf_backend_always_size_sections ppc64_elf_edit +-#define elf_backend_size_dynamic_sections ppc64_elf_size_dynamic_sections ++#define elf_backend_early_size_sections ppc64_elf_edit ++#define elf_backend_late_size_sections ppc64_elf_late_size_sections + #define elf_backend_hash_symbol ppc64_elf_hash_symbol + #define elf_backend_init_index_section _bfd_elf_init_2_index_sections + #define elf_backend_action_discarded ppc64_elf_action_discarded +@@ -10148,7 +10148,7 @@ allocate_dynrelocs (struct elf_link_hash + ((((v) & 0x3ffff0000ULL) << 16) | (v & 0xffff)) + #define HA34(v) ((v + (1ULL << 33)) >> 34) + +-/* Called via elf_link_hash_traverse from ppc64_elf_size_dynamic_sections ++/* Called via elf_link_hash_traverse from ppc64_elf_late_size_sections + to set up space for global entry stubs. These are put in glink, + after the branch table. */ + +@@ -10225,8 +10225,8 @@ size_global_entry_stubs (struct elf_link + /* Set the sizes of the dynamic sections. */ + + static bool +-ppc64_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++ppc64_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct ppc_link_hash_table *htab; + bfd *dynobj; +@@ -10241,7 +10241,7 @@ ppc64_elf_size_dynamic_sections (bfd *ou + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -1301,7 +1301,7 @@ elf_s390_gc_mark_hook (asection *sec, + entry but we found we will not create any. Called when we find we will + not have any PLT for this symbol, by for example + elf_s390_adjust_dynamic_symbol when we're doing a proper dynamic link, +- or elf_s390_size_dynamic_sections if no dynamic sections will be ++ or elf_s390_late_size_sections if no dynamic sections will be + created (we're only linking static objects). */ + + static void +@@ -1714,8 +1714,8 @@ allocate_dynrelocs (struct elf_link_hash + /* Set the sizes of the dynamic sections. */ + + static bool +-elf_s390_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elf_s390_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_s390_link_hash_table *htab; + bfd *dynobj; +@@ -1729,7 +1729,7 @@ elf_s390_size_dynamic_sections (bfd *out + + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -3912,7 +3912,7 @@ const struct elf_size_info s390_elf64_si + #define elf_backend_gc_mark_hook elf_s390_gc_mark_hook + #define elf_backend_reloc_type_class elf_s390_reloc_type_class + #define elf_backend_relocate_section elf_s390_relocate_section +-#define elf_backend_size_dynamic_sections elf_s390_size_dynamic_sections ++#define elf_backend_late_size_sections elf_s390_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_grok_prstatus elf_s390_grok_prstatus + #define elf_backend_grok_psinfo elf_s390_grok_psinfo +--- a/bfd/elf64-sparc.c ++++ b/bfd/elf64-sparc.c +@@ -953,8 +953,8 @@ const struct elf_size_info elf64_sparc_s + _bfd_sparc_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym \ + _bfd_sparc_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections \ +- _bfd_sparc_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_sparc_elf_late_size_sections + #define elf_backend_relocate_section \ + _bfd_sparc_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elf64-tilegx.c ++++ b/bfd/elf64-tilegx.c +@@ -106,7 +106,7 @@ tilegx_elf_grok_psinfo (bfd *abfd, Elf_I + #define elf_backend_check_relocs tilegx_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol tilegx_elf_adjust_dynamic_symbol + #define elf_backend_omit_section_dynsym tilegx_elf_omit_section_dynsym +-#define elf_backend_size_dynamic_sections tilegx_elf_size_dynamic_sections ++#define elf_backend_late_size_sections tilegx_elf_late_size_sections + #define elf_backend_relocate_section tilegx_elf_relocate_section + #define elf_backend_finish_dynamic_symbol tilegx_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections tilegx_elf_finish_dynamic_sections +--- a/bfd/elf64-x86-64.c ++++ b/bfd/elf64-x86-64.c +@@ -2549,8 +2549,7 @@ elf_x86_64_scan_relocs (bfd *abfd, struc + } + + static bool +-elf_x86_64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elf_x86_64_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + bfd *abfd; + +@@ -2563,7 +2562,7 @@ elf_x86_64_always_size_sections (bfd *ou + elf_x86_64_scan_relocs)) + return false; + +- return _bfd_x86_elf_always_size_sections (output_bfd, info); ++ return _bfd_x86_elf_early_size_sections (output_bfd, info); + } + + /* Return the relocation value for @tpoff relocation +@@ -5638,7 +5637,7 @@ elf_x86_64_special_sections[]= + elf_x86_64_reloc_name_lookup + + #define elf_backend_relocs_compatible elf_x86_64_relocs_compatible +-#define elf_backend_always_size_sections elf_x86_64_always_size_sections ++#define elf_backend_early_size_sections elf_x86_64_early_size_sections + #define elf_backend_create_dynamic_sections _bfd_elf_create_dynamic_sections + #define elf_backend_finish_dynamic_sections elf_x86_64_finish_dynamic_sections + #define elf_backend_finish_dynamic_symbol elf_x86_64_finish_dynamic_symbol +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6676,8 +6676,8 @@ bfd_elf_size_dynamic_sections (bfd *outp + + /* The backend may have to create some sections regardless of whether + we're dynamic or not. */ +- if (bed->elf_backend_always_size_sections +- && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) ++ if (bed->elf_backend_early_size_sections ++ && !bed->elf_backend_early_size_sections (output_bfd, info)) + return false; + + dynobj = elf_hash_table (info)->dynobj; +@@ -7483,9 +7483,8 @@ NOTE: This behaviour is deprecated and w + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (dynobj != NULL +- && bed->elf_backend_size_dynamic_sections != NULL +- && ! (*bed->elf_backend_size_dynamic_sections) (output_bfd, info)) ++ if (bed->elf_backend_late_size_sections != NULL ++ && !bed->elf_backend_late_size_sections (output_bfd, info)) + return false; + + if (dynobj != NULL && elf_hash_table (info)->dynamic_sections_created) +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4138,10 +4138,8 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_always_size_sections \ +- _bfd_mips_elf_always_size_sections +-#define elf_backend_size_dynamic_sections \ +- _bfd_mips_elf_size_dynamic_sections ++#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections ++#define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section + #define elf_backend_finish_dynamic_symbol \ +--- a/bfd/elfnn-aarch64.c ++++ b/bfd/elfnn-aarch64.c +@@ -112,7 +112,7 @@ + allocate space for one relocation on the slot. Record the GOT offset + for this symbol. + +- elfNN_aarch64_size_dynamic_sections () ++ elfNN_aarch64_late_size_sections () + + Iterate all input BFDS, look for in the local symbol data structure + constructed earlier for local TLS symbols and allocate them double +@@ -9175,8 +9175,8 @@ elfNN_aarch64_allocate_local_ifunc_dynre + though ! */ + + static bool +-elfNN_aarch64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_aarch64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_aarch64_link_hash_table *htab; + bfd *dynobj; +@@ -9187,7 +9187,8 @@ elfNN_aarch64_size_dynamic_sections (bfd + htab = elf_aarch64_hash_table ((info)); + dynobj = htab->root.dynobj; + +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -9589,8 +9590,8 @@ elfNN_aarch64_create_small_pltn_entry (s + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_aarch64_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_aarch64_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -10323,8 +10324,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_adjust_dynamic_symbol \ + elfNN_aarch64_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_aarch64_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_aarch64_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_aarch64_check_relocs +@@ -10379,8 +10380,8 @@ const struct elf_size_info elfNN_aarch64 + #define elf_backend_modify_headers \ + elfNN_aarch64_modify_headers + +-#define elf_backend_size_dynamic_sections \ +- elfNN_aarch64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_aarch64_late_size_sections + + #define elf_backend_size_info \ + elfNN_aarch64_size_info +--- a/bfd/elfnn-ia64.c ++++ b/bfd/elfnn-ia64.c +@@ -2987,8 +2987,8 @@ elfNN_ia64_adjust_dynamic_symbol (struct + } + + static bool +-elfNN_ia64_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_ia64_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elfNN_ia64_allocate_data data; + struct elfNN_ia64_link_hash_table *ia64_info; +@@ -2999,8 +2999,9 @@ elfNN_ia64_size_dynamic_sections (bfd *o + if (ia64_info == NULL) + return false; + dynobj = ia64_info->root.dynobj; ++ if (dynobj == NULL) ++ return true; + ia64_info->self_dtpmod_offset = (bfd_vma) -1; +- BFD_ASSERT(dynobj != NULL); + data.info = info; + + /* Set the contents of the .interp section to the interpreter. */ +@@ -5036,8 +5037,8 @@ ignore_errors (const char *fmt ATTRIBUTE + elfNN_ia64_check_relocs + #define elf_backend_adjust_dynamic_symbol \ + elfNN_ia64_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections \ +- elfNN_ia64_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_ia64_late_size_sections + #define elf_backend_omit_section_dynsym \ + _bfd_elf_omit_section_dynsym_all + #define elf_backend_relocate_section \ +--- a/bfd/elfnn-kvx.c ++++ b/bfd/elfnn-kvx.c +@@ -4033,8 +4033,8 @@ kvx_readonly_dynrelocs (struct elf_link_ + /* This is the most important function of all . Innocuosly named + though ! */ + static bool +-elfNN_kvx_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++elfNN_kvx_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct elf_kvx_link_hash_table *htab; + bfd *dynobj; +@@ -4044,8 +4044,8 @@ elfNN_kvx_size_dynamic_sections (bfd *ou + + htab = elf_kvx_hash_table ((info)); + dynobj = htab->root.dynobj; +- +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->root.dynamic_sections_created) + { +@@ -4359,8 +4359,7 @@ elfNN_kvx_create_small_pltn_entry (struc + _TLS_MODULE_BASE_, if needed. */ + + static bool +-elfNN_kvx_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++elfNN_kvx_early_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + asection *tls_sec; + +@@ -4715,8 +4714,8 @@ elfNN_kvx_plt_sym_val (bfd_vma i, const + #define elf_backend_adjust_dynamic_symbol \ + elfNN_kvx_adjust_dynamic_symbol + +-#define elf_backend_always_size_sections \ +- elfNN_kvx_always_size_sections ++#define elf_backend_early_size_sections \ ++ elfNN_kvx_early_size_sections + + #define elf_backend_check_relocs \ + elfNN_kvx_check_relocs +@@ -4759,8 +4758,8 @@ elfNN_kvx_plt_sym_val (bfd_vma i, const + #define elf_backend_reloc_type_class \ + elfNN_kvx_reloc_type_class + +-#define elf_backend_size_dynamic_sections \ +- elfNN_kvx_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ elfNN_kvx_late_size_sections + + #define elf_backend_can_refcount 1 + #define elf_backend_can_gc_sections 1 +--- a/bfd/elfnn-loongarch.c ++++ b/bfd/elfnn-loongarch.c +@@ -1731,8 +1731,8 @@ maybe_set_textrel (struct elf_link_hash_ + } + + static bool +-loongarch_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++loongarch_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1742,7 +1742,8 @@ loongarch_elf_size_dynamic_sections (bfd + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (htab->elf.dynamic_sections_created) + { +@@ -5340,7 +5341,7 @@ elf_loongarch64_hash_symbol (struct elf_ + loongarch_elf_create_dynamic_sections + #define elf_backend_check_relocs loongarch_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections ++#define elf_backend_late_size_sections loongarch_elf_late_size_sections + #define elf_backend_relocate_section loongarch_elf_relocate_section + #define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol + #define elf_backend_output_arch_local_syms \ +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -1482,7 +1482,7 @@ allocate_local_ifunc_dynrelocs (void **s + } + + static bool +-riscv_elf_size_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info) ++riscv_elf_late_size_sections (bfd *output_bfd, struct bfd_link_info *info) + { + struct riscv_elf_link_hash_table *htab; + bfd *dynobj; +@@ -1492,7 +1492,8 @@ riscv_elf_size_dynamic_sections (bfd *ou + htab = riscv_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -5570,7 +5571,7 @@ riscv_elf_merge_symbol_attribute (struct + #define elf_backend_create_dynamic_sections riscv_elf_create_dynamic_sections + #define elf_backend_check_relocs riscv_elf_check_relocs + #define elf_backend_adjust_dynamic_symbol riscv_elf_adjust_dynamic_symbol +-#define elf_backend_size_dynamic_sections riscv_elf_size_dynamic_sections ++#define elf_backend_late_size_sections riscv_elf_late_size_sections + #define elf_backend_relocate_section riscv_elf_relocate_section + #define elf_backend_finish_dynamic_symbol riscv_elf_finish_dynamic_symbol + #define elf_backend_finish_dynamic_sections riscv_elf_finish_dynamic_sections +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9649,8 +9649,8 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + check for any mips16 stub sections that we can discard. */ + + bool +-_bfd_mips_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *sect; + struct mips_elf_link_hash_table *htab; +@@ -9993,8 +9993,8 @@ mips_elf_set_plt_sym_value (struct mips_ + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_mips_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_mips_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + bfd *dynobj; + asection *s, *sreldyn; +@@ -10004,7 +10004,8 @@ _bfd_mips_elf_size_dynamic_sections (bfd + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = elf_hash_table (info)->dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +@@ -14938,7 +14939,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14997,7 +14998,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_always_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_early_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -67,9 +67,9 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_always_size_sections ++extern bool _bfd_mips_elf_early_size_sections + (bfd *, struct bfd_link_info *); +-extern bool _bfd_mips_elf_size_dynamic_sections ++extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section + (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, +--- a/bfd/elfxx-sparc.c ++++ b/bfd/elfxx-sparc.c +@@ -2381,8 +2381,8 @@ _bfd_sparc_elf_omit_section_dynsym (bfd + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_sparc_elf_size_dynamic_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_sparc_elf_late_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + struct _bfd_sparc_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2392,7 +2392,8 @@ _bfd_sparc_elf_size_dynamic_sections (bf + htab = _bfd_sparc_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-sparc.h ++++ b/bfd/elfxx-sparc.h +@@ -117,7 +117,7 @@ extern bool _bfd_sparc_elf_adjust_dynami + (struct bfd_link_info *, struct elf_link_hash_entry *); + extern bool _bfd_sparc_elf_omit_section_dynsym + (bfd *, struct bfd_link_info *, asection *); +-extern bool _bfd_sparc_elf_size_dynamic_sections ++extern bool _bfd_sparc_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern bool _bfd_sparc_elf_new_section_hook + (bfd *, asection *); +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -487,11 +487,11 @@ + #ifndef elf_backend_adjust_dynamic_symbol + #define elf_backend_adjust_dynamic_symbol 0 + #endif +-#ifndef elf_backend_always_size_sections +-#define elf_backend_always_size_sections 0 ++#ifndef elf_backend_early_size_sections ++#define elf_backend_early_size_sections 0 + #endif +-#ifndef elf_backend_size_dynamic_sections +-#define elf_backend_size_dynamic_sections 0 ++#ifndef elf_backend_late_size_sections ++#define elf_backend_late_size_sections 0 + #endif + #ifndef elf_backend_strip_zero_sized_dynamic_sections + #define elf_backend_strip_zero_sized_dynamic_sections 0 +@@ -853,8 +853,8 @@ static const struct elf_backend_data elf + elf_backend_check_directives, + elf_backend_notice_as_needed, + elf_backend_adjust_dynamic_symbol, +- elf_backend_always_size_sections, +- elf_backend_size_dynamic_sections, ++ elf_backend_early_size_sections, ++ elf_backend_late_size_sections, + elf_backend_strip_zero_sized_dynamic_sections, + elf_backend_init_index_section, + elf_backend_relocate_section, +--- a/bfd/elfxx-tilegx.c ++++ b/bfd/elfxx-tilegx.c +@@ -2430,8 +2430,8 @@ tilegx_elf_omit_section_dynsym (bfd *out + } + + bool +-tilegx_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, +- struct bfd_link_info *info) ++tilegx_elf_late_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) + { + struct tilegx_elf_link_hash_table *htab; + bfd *dynobj; +@@ -2441,7 +2441,8 @@ tilegx_elf_size_dynamic_sections (bfd *o + htab = tilegx_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; +- BFD_ASSERT (dynobj != NULL); ++ if (dynobj == NULL) ++ return true; + + if (elf_hash_table (info)->dynamic_sections_created) + { +--- a/bfd/elfxx-tilegx.h ++++ b/bfd/elfxx-tilegx.h +@@ -57,7 +57,7 @@ tilegx_elf_omit_section_dynsym (bfd *, + asection *); + + extern bool +-tilegx_elf_size_dynamic_sections (bfd *, struct bfd_link_info *); ++tilegx_elf_late_size_sections (bfd *, struct bfd_link_info *); + + extern int + tilegx_elf_relocate_section (bfd *, struct bfd_link_info *, +--- a/bfd/elfxx-x86.c ++++ b/bfd/elfxx-x86.c +@@ -2241,7 +2241,7 @@ _bfd_elf_x86_valid_reloc_p (asection *in + /* Set the sizes of the dynamic sections. */ + + bool +-_bfd_x86_elf_size_dynamic_sections (bfd *output_bfd, ++_bfd_x86_elf_late_size_sections (bfd *output_bfd, + struct bfd_link_info *info) + { + struct elf_x86_link_hash_table *htab; +@@ -2257,7 +2257,7 @@ _bfd_x86_elf_size_dynamic_sections (bfd + return false; + dynobj = htab->elf.dynobj; + if (dynobj == NULL) +- abort (); ++ return true; + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ +@@ -3003,8 +3003,8 @@ _bfd_x86_elf_finish_dynamic_sections (bf + + + bool +-_bfd_x86_elf_always_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) ++_bfd_x86_elf_early_size_sections (bfd *output_bfd, ++ struct bfd_link_info *info) + { + asection *tls_sec = elf_hash_table (info)->tls_sec; + +--- a/bfd/elfxx-x86.h ++++ b/bfd/elfxx-x86.h +@@ -850,13 +850,13 @@ extern bool _bfd_elf_x86_valid_reloc_p + const Elf_Internal_Rela *, struct elf_link_hash_entry *, + Elf_Internal_Sym *, Elf_Internal_Shdr *, bool *); + +-extern bool _bfd_x86_elf_size_dynamic_sections ++extern bool _bfd_x86_elf_late_size_sections + (bfd *, struct bfd_link_info *); + + extern struct elf_x86_link_hash_table *_bfd_x86_elf_finish_dynamic_sections + (bfd *, struct bfd_link_info *); + +-extern bool _bfd_x86_elf_always_size_sections ++extern bool _bfd_x86_elf_early_size_sections + (bfd *, struct bfd_link_info *); + + extern void _bfd_x86_elf_merge_symbol_attribute +@@ -928,8 +928,8 @@ extern void _bfd_x86_elf_link_report_rel + + #define elf_backend_check_relocs \ + _bfd_x86_elf_check_relocs +-#define elf_backend_size_dynamic_sections \ +- _bfd_x86_elf_size_dynamic_sections ++#define elf_backend_late_size_sections \ ++ _bfd_x86_elf_late_size_sections + #define elf_backend_merge_symbol_attribute \ + _bfd_x86_elf_merge_symbol_attribute + #define elf_backend_copy_indirect_symbol \ +--- a/ld/emultempl/vms.em ++++ b/ld/emultempl/vms.em +@@ -197,10 +197,9 @@ gld${EMULATION_NAME}_before_allocation ( + + /* The backend must work out the sizes of all the other dynamic + sections. */ +- if (elf_hash_table (&link_info)->dynamic_sections_created +- && bed->elf_backend_size_dynamic_sections +- && ! (*bed->elf_backend_size_dynamic_sections) (link_info.output_bfd, +- &link_info)) ++ if (bed->elf_backend_late_size_sections ++ && !bed->elf_backend_late_size_sections (link_info.output_bfd, ++ &link_info)) + einfo (_("%F%P: failed to set dynamic section sizes: %E\n")); + + before_allocation_default (); diff --git a/toolchain/binutils/patches/2.42/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch b/toolchain/binutils/patches/2.42/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch new file mode 100644 index 0000000000..49381a4fa9 --- /dev/null +++ b/toolchain/binutils/patches/2.42/002-PR-30569-delete-_bfd_mips_elf_early_size_sections.patch @@ -0,0 +1,218 @@ +From 3c6c32951e292a51ede70b8087bb0308d7dbc4fc Mon Sep 17 00:00:00 2001 +From: Alan Modra +Date: Thu, 28 Mar 2024 20:33:32 +1030 +Subject: [PATCH 2/2] PR 30569, delete _bfd_mips_elf_early_size_sections + +PR30569 was triggered by a patch of mine 6540edd52cc0 moving the call +to always_size_sections in bfd_elf_size_dynamic_sections earlier, made +to support the x86 DT_RELR implementation. This broke mips16 code +handling stubs when --export-dynamic is passed to the linker, because +numerous symbols then became dynamic after always_size_sections. The +mips backend fiddles with symbols in its always_size_sections. Maciej +in 902e9fc76a0e had moved the call to always_size_sections to after +the export-dynamic code. Prior to that, Nathan in 04c3a75556c0 moved +it before the exec stack code, back to the start of +bfd_elf_size_dynamic_sections which was where Ian put it originally +in ff12f303355b. So the call has moved around a little. I'm leaving +it where it is, and instead calling mips_elf_check_symbols from +late_size_sections (the old size_dynamic_sections) which is now always +called. In fact, the whole of _bfd_mips_elf_early_size_sections can +be merged into _bfd_mips_elf_late_size_sections. +--- + bfd/elf32-mips.c | 1 - + bfd/elf64-mips.c | 2 -- + bfd/elfn32-mips.c | 1 - + bfd/elfxx-mips.c | 84 +++++++++++++++++++---------------------------- + bfd/elfxx-mips.h | 2 -- + 5 files changed, 34 insertions(+), 56 deletions(-) + +--- a/bfd/elf32-mips.c ++++ b/bfd/elf32-mips.c +@@ -2537,7 +2537,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elf64-mips.c ++++ b/bfd/elf64-mips.c +@@ -4748,8 +4748,6 @@ const struct elf_size_info mips_elf64_si + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections \ +- _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections \ + _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section +--- a/bfd/elfn32-mips.c ++++ b/bfd/elfn32-mips.c +@@ -4138,7 +4138,6 @@ static const struct ecoff_debug_swap mip + #define elf_backend_get_target_dtag _bfd_mips_elf_get_target_dtag + #define elf_backend_adjust_dynamic_symbol \ + _bfd_mips_elf_adjust_dynamic_symbol +-#define elf_backend_early_size_sections _bfd_mips_elf_early_size_sections + #define elf_backend_late_size_sections _bfd_mips_elf_late_size_sections + #define elf_backend_init_index_section _bfd_elf_init_1_index_section + #define elf_backend_relocate_section _bfd_mips_elf_relocate_section +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -9644,48 +9644,6 @@ _bfd_mips_elf_adjust_dynamic_symbol (str + return _bfd_elf_adjust_dynamic_copy (info, h, s); + } + +-/* This function is called after all the input files have been read, +- and the input sections have been assigned to output sections. We +- check for any mips16 stub sections that we can discard. */ +- +-bool +-_bfd_mips_elf_early_size_sections (bfd *output_bfd, +- struct bfd_link_info *info) +-{ +- asection *sect; +- struct mips_elf_link_hash_table *htab; +- struct mips_htab_traverse_info hti; +- +- htab = mips_elf_hash_table (info); +- BFD_ASSERT (htab != NULL); +- +- /* The .reginfo section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".reginfo"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf32_External_RegInfo)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- /* The .MIPS.abiflags section has a fixed size. */ +- sect = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); +- if (sect != NULL) +- { +- bfd_set_section_size (sect, sizeof (Elf_External_ABIFlags_v0)); +- sect->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; +- } +- +- hti.info = info; +- hti.output_bfd = output_bfd; +- hti.error = false; +- mips_elf_link_hash_traverse (mips_elf_hash_table (info), +- mips_elf_check_symbols, &hti); +- if (hti.error) +- return false; +- +- return true; +-} +- + /* If the link uses a GOT, lay it out and work out its size. */ + + static bool +@@ -9990,7 +9948,8 @@ mips_elf_set_plt_sym_value (struct mips_ + return true; + } + +-/* Set the sizes of the dynamic sections. */ ++/* Set the sizes of the dynamic sections, some mips non-dynamic sections, ++ and check for any mips16 stub sections that we can discard. */ + + bool + _bfd_mips_elf_late_size_sections (bfd *output_bfd, +@@ -10000,14 +9959,39 @@ _bfd_mips_elf_late_size_sections (bfd *o + asection *s, *sreldyn; + bool reltext; + struct mips_elf_link_hash_table *htab; ++ struct mips_htab_traverse_info hti; + + htab = mips_elf_hash_table (info); + BFD_ASSERT (htab != NULL); +- dynobj = elf_hash_table (info)->dynobj; ++ ++ /* The .reginfo section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".reginfo"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf32_External_RegInfo)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ /* The .MIPS.abiflags section has a fixed size. */ ++ s = bfd_get_section_by_name (output_bfd, ".MIPS.abiflags"); ++ if (s != NULL) ++ { ++ bfd_set_section_size (s, sizeof (Elf_External_ABIFlags_v0)); ++ s->flags |= SEC_FIXED_SIZE | SEC_HAS_CONTENTS; ++ } ++ ++ hti.info = info; ++ hti.output_bfd = output_bfd; ++ hti.error = false; ++ mips_elf_link_hash_traverse (htab, mips_elf_check_symbols, &hti); ++ if (hti.error) ++ return false; ++ ++ dynobj = htab->root.dynobj; + if (dynobj == NULL) + return true; + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) +@@ -10147,7 +10131,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + else if (bfd_link_executable (info) +- && ! mips_elf_hash_table (info)->use_rld_obj_head ++ && !htab->use_rld_obj_head + && startswith (name, ".rld_map")) + { + /* We add a room for __rld_map. It will be filled in by the +@@ -10156,7 +10140,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + else if (SGI_COMPAT (output_bfd) + && startswith (name, ".compact_rel")) +- s->size += mips_elf_hash_table (info)->compact_rel_size; ++ s->size += htab->compact_rel_size; + else if (s == htab->root.splt) + { + /* If the last PLT entry has a branch delay slot, allocate +@@ -10196,7 +10180,7 @@ _bfd_mips_elf_late_size_sections (bfd *o + } + } + +- if (elf_hash_table (info)->dynamic_sections_created) ++ if (htab->root.dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in _bfd_mips_elf_finish_dynamic_sections, but we +@@ -14939,7 +14923,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf_External_ABIFlags_v0)); + + /* Skip this section later on (I don't think this currently +@@ -14998,7 +14982,7 @@ _bfd_mips_elf_final_link (bfd *abfd, str + input_section->flags &= ~SEC_HAS_CONTENTS; + } + +- /* Size has been set in _bfd_mips_elf_early_size_sections. */ ++ /* Size has been set in _bfd_mips_elf_late_size_sections. */ + BFD_ASSERT(o->size == sizeof (Elf32_External_RegInfo)); + + /* Skip this section later on (I don't think this currently +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -67,8 +67,6 @@ extern bool _bfd_mips_elf_check_relocs + (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *); + extern bool _bfd_mips_elf_adjust_dynamic_symbol + (struct bfd_link_info *, struct elf_link_hash_entry *); +-extern bool _bfd_mips_elf_early_size_sections +- (bfd *, struct bfd_link_info *); + extern bool _bfd_mips_elf_late_size_sections + (bfd *, struct bfd_link_info *); + extern int _bfd_mips_elf_relocate_section From 9309cfe37a06b86f8a8172e186b9c651a468bdb9 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:09:03 +0100 Subject: [PATCH 10/31] kernel/ipq40xx: Create kernel files for v6.6 (from v6.1) This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Christian Marangi --- target/linux/ipq40xx/{config-6.1 => config-6.6} | 0 ...6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch | 0 ...-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch | 0 .../004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch | 0 .../100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch | 0 .../104-clk-fix-apss-cpu-overclocking.patch | 0 .../301-arm-compressed-add-appended-DTB-section.patch | 0 .../302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch | 0 ...400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch | 0 .../401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch | 0 .../422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch | 0 ...444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch | 0 .../700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch | 0 .../701-net-dsa-add-out-of-band-tagging-protocol.patch | 0 .../702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch | 0 ...703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch | 0 .../704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch | 0 ...705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch | 0 .../706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch | 0 .../707-arm-dts-ipq4019-add-switch-node.patch | 0 .../709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch | 0 .../710-arm-dts-ipq4019-QCA807x-properties.patch | 0 .../711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch | 0 .../850-soc-add-qualcomm-syscon.patch | 0 ...910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch | 0 .../{patches-6.1 => patches-6.6}/998-lantiq-atm-hacks.patch | 0 .../999-atm-mpoa-intel-dsl-phy-support.patch | 0 27 files changed, 0 insertions(+), 0 deletions(-) rename target/linux/ipq40xx/{config-6.1 => config-6.6} (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/104-clk-fix-apss-cpu-overclocking.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/301-arm-compressed-add-appended-DTB-section.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/701-net-dsa-add-out-of-band-tagging-protocol.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/707-arm-dts-ipq4019-add-switch-node.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/710-arm-dts-ipq4019-QCA807x-properties.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/850-soc-add-qualcomm-syscon.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/998-lantiq-atm-hacks.patch (100%) rename target/linux/ipq40xx/{patches-6.1 => patches-6.6}/999-atm-mpoa-intel-dsl-phy-support.patch (100%) diff --git a/target/linux/ipq40xx/config-6.1 b/target/linux/ipq40xx/config-6.6 similarity index 100% rename from target/linux/ipq40xx/config-6.1 rename to target/linux/ipq40xx/config-6.6 diff --git a/target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch b/target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch rename to target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch diff --git a/target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch b/target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch rename to target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch diff --git a/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch b/target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch rename to target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch diff --git a/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch b/target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch rename to target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch diff --git a/target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch b/target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch rename to target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch diff --git a/target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch b/target/linux/ipq40xx/patches-6.6/301-arm-compressed-add-appended-DTB-section.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch rename to target/linux/ipq40xx/patches-6.6/301-arm-compressed-add-appended-DTB-section.patch diff --git a/target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch b/target/linux/ipq40xx/patches-6.6/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch rename to target/linux/ipq40xx/patches-6.6/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch diff --git a/target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch b/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch rename to target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch diff --git a/target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch b/target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch rename to target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch diff --git a/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch b/target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch rename to target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch diff --git a/target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch b/target/linux/ipq40xx/patches-6.6/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch rename to target/linux/ipq40xx/patches-6.6/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch diff --git a/target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch b/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch rename to target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch diff --git a/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch b/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch rename to target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch diff --git a/target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch b/target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch rename to target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch diff --git a/target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch b/target/linux/ipq40xx/patches-6.6/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch rename to target/linux/ipq40xx/patches-6.6/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch diff --git a/target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch b/target/linux/ipq40xx/patches-6.6/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch rename to target/linux/ipq40xx/patches-6.6/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch diff --git a/target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch b/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch rename to target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch diff --git a/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch rename to target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch diff --git a/target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch rename to target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch diff --git a/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch b/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch rename to target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch diff --git a/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch rename to target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch diff --git a/target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch b/target/linux/ipq40xx/patches-6.6/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch rename to target/linux/ipq40xx/patches-6.6/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch diff --git a/target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch rename to target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch diff --git a/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch b/target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch rename to target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch diff --git a/target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch b/target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch rename to target/linux/ipq40xx/patches-6.6/998-lantiq-atm-hacks.patch diff --git a/target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch b/target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch similarity index 100% rename from target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch rename to target/linux/ipq40xx/patches-6.6/999-atm-mpoa-intel-dsl-phy-support.patch From 2265413bbf4e49f2961ef9daac8637c0ec0075c4 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:09:07 +0100 Subject: [PATCH 11/31] kernel/ipq40xx: Restore kernel files for v6.1 This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html for the original discussion. Signed-off-by: Christian Marangi --- target/linux/ipq40xx/config-6.1 | 540 +++++ ...k-qcom-ipq4019-add-missing-networkin.patch | 30 + ...pq4019-add-missing-networking-resets.patch | 30 + ...are-qcom_scm-disable-SDI-if-required.patch | 83 + ...RM-dts-qcom-ipq4019-add-label-to-SCM.patch | 24 + .../104-clk-fix-apss-cpu-overclocking.patch | 115 + ...-compressed-add-appended-DTB-section.patch | 48 + ...d-set-ipq40xx-watchdog-to-allow-boot.patch | 66 + ...msm-use-sdhci_set_clock-instead-of-s.patch | 24 + ...m-comment-unused-sdhci_msm_set_clock.patch | 108 + ...e-qcom-scm-fix-SCM-cold-boot-address.patch | 138 ++ ...-add-support-for-Toshiba-TC58NVG0S3H.patch | 29 + ...introduce-the-Qualcomm-IPQESS-driver.patch | 2025 +++++++++++++++++ ...dsa-add-out-of-band-tagging-protocol.patch | 238 ++ ...-Add-out-of-band-DSA-tagging-support.patch | 173 ++ ...ess-release-IRQ-s-on-network-device-.patch | 75 + ...qess-enable-threaded-NAPI-by-default.patch | 49 + ...4019-Add-description-for-the-IPQESS-.patch | 78 + ...-add-IPQ4019-built-in-switch-support.patch | 1132 +++++++++ .../707-arm-dts-ipq4019-add-switch-node.patch | 98 + ...pq4019-add-QCA8075-PHY-Package-nodes.patch | 67 + ...0-arm-dts-ipq4019-QCA807x-properties.patch | 25 + ...ualcomm-ipqess-fix-TX-timeout-errors.patch | 64 + .../850-soc-add-qualcomm-syscon.patch | 175 ++ ...qcom_scm-Clear-download-bit-during-r.patch | 27 + .../patches-6.1/998-lantiq-atm-hacks.patch | 43 + .../999-atm-mpoa-intel-dsl-phy-support.patch | 137 ++ 27 files changed, 5641 insertions(+) create mode 100644 target/linux/ipq40xx/config-6.1 create mode 100644 target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch create mode 100644 target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch create mode 100644 target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch create mode 100644 target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch create mode 100644 target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch create mode 100644 target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch create mode 100644 target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch create mode 100644 target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch create mode 100644 target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch create mode 100644 target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch create mode 100644 target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch create mode 100644 target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch create mode 100644 target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch create mode 100644 target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch create mode 100644 target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch create mode 100644 target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch create mode 100644 target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch create mode 100644 target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch create mode 100644 target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch create mode 100644 target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch create mode 100644 target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch create mode 100644 target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch create mode 100644 target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch create mode 100644 target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch create mode 100644 target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch create mode 100644 target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch diff --git a/target/linux/ipq40xx/config-6.1 b/target/linux/ipq40xx/config-6.1 new file mode 100644 index 0000000000..f14dd0a474 --- /dev/null +++ b/target/linux/ipq40xx/config-6.1 @@ -0,0 +1,540 @@ +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_APQ_GCC_8084 is not set +# CONFIG_APQ_MMCC_8084 is not set +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_IPQ40XX=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +# CONFIG_ARCH_MDM9615 is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_ARCH_MSM8909 is not set +# CONFIG_ARCH_MSM8916 is not set +# CONFIG_ARCH_MSM8960 is not set +# CONFIG_ARCH_MSM8974 is not set +# CONFIG_ARCH_MSM8X60 is not set +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_QCOM=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +# CONFIG_ARM_ATAG_DTB_COMPAT is not set +CONFIG_ARM_CPUIDLE=y +# CONFIG_ARM_CPU_TOPOLOGY is not set +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_GROUP_RELOCS=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_QCOM_CPUFREQ_HW is not set +# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set +# CONFIG_ARM_QCOM_SPM_CPUIDLE is not set +# CONFIG_ARM_SMMU is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_AT803X_PHY=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BCH=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CLKSRC_QCOM=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE_PARTITION=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_QCOM=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRC8=y +CONFIG_CRYPTO_AES_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +CONFIG_CRYPTO_BLAKE2S_ARM=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_QCE=y +# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set +# CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL is not set +# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set +CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER=y +CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y +CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512 +CONFIG_CRYPTO_DEV_QCOM_RNG=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CURRENT_POINTER_IN_TPIDRURO=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MISC=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EEPROM_AT24=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_EXTCON=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_WATCHDOG=y +CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y +CONFIG_GRO_CELLS=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OPTEE=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +# CONFIG_I2C_QCOM_CCI is not set +CONFIG_I2C_QUP=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_SUPPORT=y +# CONFIG_IPQ_APSS_PLL is not set +CONFIG_IPQ_GCC_4019=y +# CONFIG_IPQ_GCC_6018 is not set +# CONFIG_IPQ_GCC_806X is not set +# CONFIG_IPQ_GCC_8074 is not set +# CONFIG_IPQ_LCC_806X is not set +CONFIG_IRQCHIP=y +CONFIG_IRQSTACKS=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +# CONFIG_KPSS_XCC is not set +# CONFIG_KRAITCC is not set +CONFIG_LED_TRIGGER_PHY=y +CONFIG_LEDS_LP5523=y +CONFIG_LEDS_LP5562=y +CONFIG_LEDS_LP55XX_COMMON=y +CONFIG_LEDS_TLC591XX=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_GPIO=y +CONFIG_MDIO_IPQ4019=y +# CONFIG_MDM_GCC_9615 is not set +# CONFIG_MDM_LCC_9615 is not set +CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_HI6421_SPMI is not set +# CONFIG_MFD_QCOM_RPM is not set +# CONFIG_MFD_SPMI_PMIC is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_MSM=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MSM_GCC_8660 is not set +# CONFIG_MSM_GCC_8909 is not set +# CONFIG_MSM_GCC_8916 is not set +# CONFIG_MSM_GCC_8939 is not set +# CONFIG_MSM_GCC_8960 is not set +# CONFIG_MSM_GCC_8974 is not set +# CONFIG_MSM_GCC_8976 is not set +# CONFIG_MSM_GCC_8994 is not set +# CONFIG_MSM_GCC_8996 is not set +# CONFIG_MSM_GCC_8998 is not set +# CONFIG_MSM_GPUCC_8998 is not set +# CONFIG_MSM_LCC_8960 is not set +# CONFIG_MSM_MMCC_8960 is not set +# CONFIG_MSM_MMCC_8974 is not set +# CONFIG_MSM_MMCC_8996 is not set +# CONFIG_MSM_MMCC_8998 is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_BCH=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_QCOM=y +# CONFIG_MTD_QCOMSMEM_PARTS is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MTD_SPLIT_WRGG_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_QCA8K_IPQ4019=y +CONFIG_NET_DSA_TAG_OOB=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVMEM_QCOM_QFPROM=y +# CONFIG_NVMEM_QCOM_SEC_QFPROM is not set +# CONFIG_NVMEM_SPMI_SDAM is not set +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OPTEE=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_QCOM=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +# CONFIG_PHY_QCOM_APQ8064_SATA is not set +# CONFIG_PHY_QCOM_EDP is not set +CONFIG_PHY_QCOM_IPQ4019_USB=y +# CONFIG_PHY_QCOM_IPQ806X_SATA is not set +# CONFIG_PHY_QCOM_IPQ806X_USB is not set +# CONFIG_PHY_QCOM_PCIE2 is not set +# CONFIG_PHY_QCOM_QMP is not set +# CONFIG_PHY_QCOM_QUSB2 is not set +# CONFIG_PHY_QCOM_USB_HS_28NM is not set +# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set +# CONFIG_PHY_QCOM_USB_SS is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_APQ8064 is not set +# CONFIG_PINCTRL_APQ8084 is not set +CONFIG_PINCTRL_IPQ4019=y +# CONFIG_PINCTRL_IPQ8064 is not set +# CONFIG_PINCTRL_MDM9615 is not set +CONFIG_PINCTRL_MSM=y +# CONFIG_PINCTRL_MSM8226 is not set +# CONFIG_PINCTRL_MSM8660 is not set +# CONFIG_PINCTRL_MSM8909 is not set +# CONFIG_PINCTRL_MSM8916 is not set +# CONFIG_PINCTRL_MSM8960 is not set +# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set +# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set +# CONFIG_PINCTRL_SDX65 is not set +CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_MSM=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QCA807X_PHY=y +# CONFIG_QCM_DISPCC_2290 is not set +# CONFIG_QCM_GCC_2290 is not set +CONFIG_QCOM_A53PLL=y +# CONFIG_QCOM_ADM is not set +CONFIG_QCOM_BAM_DMA=y +# CONFIG_QCOM_COMMAND_DB is not set +# CONFIG_QCOM_CPR is not set +# CONFIG_QCOM_EBI2 is not set +# CONFIG_QCOM_GENI_SE is not set +# CONFIG_QCOM_GSBI is not set +# CONFIG_QCOM_HFPLL is not set +# CONFIG_QCOM_ICC_BWMON is not set +# CONFIG_QCOM_IOMMU is not set +CONFIG_QCOM_IPQ4019_ESS_EDMA=y +# CONFIG_QCOM_LLCC is not set +# CONFIG_QCOM_OCMEM is not set +# CONFIG_QCOM_PDC is not set +# CONFIG_QCOM_RMTFS_MEM is not set +# CONFIG_QCOM_RPMH is not set +CONFIG_QCOM_SCM=y +# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set +CONFIG_QCOM_SMEM=y +# CONFIG_QCOM_SMSM is not set +# CONFIG_QCOM_SOCINFO is not set +# CONFIG_QCOM_SPM is not set +# CONFIG_QCOM_STATS is not set +CONFIG_QCOM_TCSR=y +# CONFIG_QCOM_TSENS is not set +CONFIG_QCOM_WDT=y +# CONFIG_QCS_GCC_404 is not set +# CONFIG_QCS_Q6SSTOP_404 is not set +# CONFIG_QCS_TURING_404 is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_QCOM_LABIBB is not set +# CONFIG_REGULATOR_QCOM_SPMI is not set +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +CONFIG_REGULATOR_VCTRL=y +CONFIG_REGULATOR_VQMMC_IPQ4019=y +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_QCOM_AOSS is not set +# CONFIG_RESET_QCOM_PDC is not set +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_OPTEE is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SC_CAMCC_7280 is not set +# CONFIG_SC_DISPCC_7180 is not set +# CONFIG_SC_GCC_7180 is not set +# CONFIG_SC_GCC_8280XP is not set +# CONFIG_SC_GPUCC_7180 is not set +# CONFIG_SC_LPASSCC_7280 is not set +# CONFIG_SC_LPASS_CORECC_7180 is not set +# CONFIG_SC_LPASS_CORECC_7280 is not set +# CONFIG_SC_MSS_7180 is not set +# CONFIG_SC_VIDEOCC_7180 is not set +# CONFIG_SDM_CAMCC_845 is not set +# CONFIG_SDM_DISPCC_845 is not set +# CONFIG_SDM_GCC_660 is not set +# CONFIG_SDM_GCC_845 is not set +# CONFIG_SDM_GPUCC_845 is not set +# CONFIG_SDM_LPASSCC_845 is not set +# CONFIG_SDM_VIDEOCC_845 is not set +# CONFIG_SDX_GCC_65 is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SKB_EXTENSIONS=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +# CONFIG_SM_CAMCC_8450 is not set +# CONFIG_SM_GCC_8150 is not set +# CONFIG_SM_GCC_8250 is not set +# CONFIG_SM_GCC_8450 is not set +# CONFIG_SM_GPUCC_6350 is not set +# CONFIG_SM_GPUCC_8150 is not set +# CONFIG_SM_GPUCC_8250 is not set +# CONFIG_SM_GPUCC_8350 is not set +# CONFIG_SM_VIDEOCC_8150 is not set +# CONFIG_SM_VIDEOCC_8250 is not set +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_QUP=y +CONFIG_SPMI=y +# CONFIG_SPMI_HISI3670 is not set +CONFIG_SPMI_MSM_PMIC_ARB=y +# CONFIG_SPMI_PMIC_CLKDIV is not set +CONFIG_SRCU=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TEE=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch b/target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch new file mode 100644 index 0000000000..87feaf79f8 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch @@ -0,0 +1,30 @@ +From be59072c6eeb7535bf9a339fb9d5a8bfae17ac22 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Mon, 14 Aug 2023 12:40:23 +0200 +Subject: [PATCH] dt-bindings: clock: qcom: ipq4019: add missing networking + resets + +Add bindings for the missing networking resets found in IPQ4019 GCC. + +Signed-off-by: Robert Marko +Acked-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr +Signed-off-by: Bjorn Andersson +--- + include/dt-bindings/clock/qcom,gcc-ipq4019.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h ++++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h +@@ -165,5 +165,11 @@ + #define GCC_QDSS_BCR 69 + #define GCC_MPM_BCR 70 + #define GCC_SPDM_BCR 71 ++#define ESS_MAC1_ARES 72 ++#define ESS_MAC2_ARES 73 ++#define ESS_MAC3_ARES 74 ++#define ESS_MAC4_ARES 75 ++#define ESS_MAC5_ARES 76 ++#define ESS_PSGMII_ARES 77 + + #endif diff --git a/target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch b/target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch new file mode 100644 index 0000000000..70b278c803 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch @@ -0,0 +1,30 @@ +From 20014461691efc9e274c3870357152db7f091820 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Mon, 14 Aug 2023 12:40:24 +0200 +Subject: [PATCH] clk: qcom: gcc-ipq4019: add missing networking resets + +IPQ4019 has more networking related resets that will be required for future +wired networking support, so lets add them. + +Signed-off-by: Robert Marko +Link: https://lore.kernel.org/r/20230814104119.96858-2-robert.marko@sartura.hr +Signed-off-by: Bjorn Andersson +--- + drivers/clk/qcom/gcc-ipq4019.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/clk/qcom/gcc-ipq4019.c ++++ b/drivers/clk/qcom/gcc-ipq4019.c +@@ -1707,6 +1707,12 @@ static const struct qcom_reset_map gcc_i + [GCC_TCSR_BCR] = {0x22000, 0}, + [GCC_MPM_BCR] = {0x24000, 0}, + [GCC_SPDM_BCR] = {0x25000, 0}, ++ [ESS_MAC1_ARES] = {0x1200C, 0}, ++ [ESS_MAC2_ARES] = {0x1200C, 1}, ++ [ESS_MAC3_ARES] = {0x1200C, 2}, ++ [ESS_MAC4_ARES] = {0x1200C, 3}, ++ [ESS_MAC5_ARES] = {0x1200C, 4}, ++ [ESS_PSGMII_ARES] = {0x1200C, 5}, + }; + + static const struct regmap_config gcc_ipq4019_regmap_config = { diff --git a/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch new file mode 100644 index 0000000000..ae7e9f97c0 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch @@ -0,0 +1,83 @@ +From ff4aa3bc98258a240b9bbab53fd8d2fb8184c485 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Wed, 16 Aug 2023 18:45:39 +0200 +Subject: [PATCH] firmware: qcom_scm: disable SDI if required + +IPQ5018 has SDI (Secure Debug Image) enabled by TZ by default, and that +means that WDT being asserted or just trying to reboot will hang the board +in the debug mode and only pulling the power and repowering will help. +Some IPQ4019 boards like Google WiFI have it enabled as well. + +Luckily, SDI can be disabled via an SCM call. + +So, lets use the boolean DT property to identify boards that have SDI +enabled by default and use the SCM call to disable SDI during SCM probe. +It is important to disable it as soon as possible as we might have a WDT +assertion at any time which would then leave the board in debug mode, +thus disabling it during SCM removal is not enough. + +Signed-off-by: Robert Marko +Reviewed-by: Guru Das Srinagesh +Link: https://lore.kernel.org/r/20230816164641.3371878-2-robimarko@gmail.com +Signed-off-by: Bjorn Andersson +--- + drivers/firmware/qcom_scm.c | 30 ++++++++++++++++++++++++++++++ + drivers/firmware/qcom_scm.h | 1 + + 2 files changed, 31 insertions(+) + +--- a/drivers/firmware/qcom_scm.c ++++ b/drivers/firmware/qcom_scm.c +@@ -407,6 +407,29 @@ int qcom_scm_set_remote_state(u32 state, + } + EXPORT_SYMBOL(qcom_scm_set_remote_state); + ++static int qcom_scm_disable_sdi(void) ++{ ++ int ret; ++ struct qcom_scm_desc desc = { ++ .svc = QCOM_SCM_SVC_BOOT, ++ .cmd = QCOM_SCM_BOOT_SDI_CONFIG, ++ .args[0] = 1, /* Disable watchdog debug */ ++ .args[1] = 0, /* Disable SDI */ ++ .arginfo = QCOM_SCM_ARGS(2), ++ .owner = ARM_SMCCC_OWNER_SIP, ++ }; ++ struct qcom_scm_res res; ++ ++ ret = qcom_scm_clk_enable(); ++ if (ret) ++ return ret; ++ ret = qcom_scm_call(__scm->dev, &desc, &res); ++ ++ qcom_scm_clk_disable(); ++ ++ return ret ? : res.result[0]; ++} ++ + static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) + { + struct qcom_scm_desc desc = { +@@ -1411,6 +1434,13 @@ static int qcom_scm_probe(struct platfor + + __get_convention(); + ++ ++ /* ++ * Disable SDI if indicated by DT that it is enabled by default. ++ */ ++ if (of_property_read_bool(pdev->dev.of_node, "qcom,sdi-enabled")) ++ qcom_scm_disable_sdi(); ++ + /* + * If requested enable "download mode", from this point on warmboot + * will cause the boot stages to enter download mode, unless +--- a/drivers/firmware/qcom_scm.h ++++ b/drivers/firmware/qcom_scm.h +@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device + #define QCOM_SCM_SVC_BOOT 0x01 + #define QCOM_SCM_BOOT_SET_ADDR 0x01 + #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 ++#define QCOM_SCM_BOOT_SDI_CONFIG 0x09 + #define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10 + #define QCOM_SCM_BOOT_SET_ADDR_MC 0x11 + #define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a diff --git a/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch b/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch new file mode 100644 index 0000000000..8b9352e6f1 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch @@ -0,0 +1,24 @@ +From ea9fba16d972becc84cd2a82d25030975dc609a5 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 30 Sep 2023 13:09:27 +0200 +Subject: [PATCH] ARM: dts: qcom: ipq4019: add label to SCM + +Some IPQ4019 boards require SDI to be disabled by adding a property to the +SCM node, so lets make that easy by adding a label to the SCM node. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -155,7 +155,7 @@ + }; + + firmware { +- scm { ++ scm: scm { + compatible = "qcom,scm-ipq4019", "qcom,scm"; + }; + }; diff --git a/target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch b/target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch new file mode 100644 index 0000000000..2de03f7ae0 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/104-clk-fix-apss-cpu-overclocking.patch @@ -0,0 +1,115 @@ +From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001 +From: Christian Lamparter +Date: Sun, 11 Mar 2018 14:41:31 +0100 +Subject: [PATCH 2/2] clk: fix apss cpu overclocking + +There's an interaction issue between the clk changes:" +clk: qcom: ipq4019: Add the apss cpu pll divider clock node +clk: qcom: ipq4019: remove fixed clocks and add pll clocks +" and the cpufreq-dt. + +cpufreq-dt is now spamming the kernel-log with the following: + +[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP +for freq 761142857 (-34) + +This only happens on certain devices like the Compex WPJ428 +and AVM FritzBox!4040. However, other devices like the Asus +RT-AC58U and Meraki MR33 work just fine. + +The issue stem from the fact that all higher CPU-Clocks +are achieved by switching the clock-parent to the P_DDRPLLAPSS +(ddrpllapss). Which is set by Qualcomm's proprietary bootcode +as part of the DDR calibration. + +For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked +at round 533 MHz (ddrpllsdcc = 190285714 Hz). + +whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is +clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz). + +This patch attempts to fix the issue by modifying +clk_cpu_div_round_rate(), clk_cpu_div_set_rate(), clk_cpu_div_recalc_rate() +to use a new qcom_find_freq_close() function, which returns the closest +matching frequency, instead of the next higher. This way, the SoC in +the FB4040 (with its max clock speed of 710.4 MHz) will no longer +try to overclock to 761 MHz. + +Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node") +Signed-off-by: Christian Lamparter +Signed-off-by: John Crispin +--- + drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++--- + 1 file changed, 31 insertions(+), 3 deletions(-) + +--- a/drivers/clk/qcom/gcc-ipq4019.c ++++ b/drivers/clk/qcom/gcc-ipq4019.c +@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe + .reg = 0x2f020, + }; + ++ ++const struct freq_tbl *qcom_find_freq_close(const struct freq_tbl *f, ++ unsigned long rate) ++{ ++ const struct freq_tbl *last = NULL; ++ ++ for ( ; f->freq; f++) { ++ if (rate == f->freq) ++ return f; ++ ++ if (f->freq > rate) { ++ if (!last || ++ (f->freq - rate) < (rate - last->freq)) ++ return f; ++ else ++ return last; ++ } ++ last = f; ++ } ++ ++ return last; ++} ++ + /* + * Round rate function for APSS CPU PLL Clock divider. + * It looks up the frequency table and returns the next higher frequency +@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc + struct clk_hw *p_hw; + const struct freq_tbl *f; + +- f = qcom_find_freq(pll->freq_tbl, rate); ++ f = qcom_find_freq_close(pll->freq_tbl, rate); + if (!f) + return -EINVAL; + +@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c + const struct freq_tbl *f; + u32 mask; + +- f = qcom_find_freq(pll->freq_tbl, rate); ++ f = qcom_find_freq_close(pll->freq_tbl, rate); + if (!f) + return -EINVAL; + +@@ -1304,6 +1327,7 @@ static unsigned long + clk_cpu_div_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) + { ++ const struct freq_tbl *f; + struct clk_fepll *pll = to_clk_fepll(hw); + u32 cdiv, pre_div; + u64 rate; +@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h + rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2; + do_div(rate, pre_div); + +- return rate; ++ f = qcom_find_freq_close(pll->freq_tbl, rate); ++ if (!f) ++ return rate; ++ ++ return f->freq; + }; + + static const struct clk_ops clk_regmap_cpu_div_ops = { diff --git a/target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch b/target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch new file mode 100644 index 0000000000..0448574e7e --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/301-arm-compressed-add-appended-DTB-section.patch @@ -0,0 +1,48 @@ +From 0843a61d6913bdac8889eb048ed89f7903059787 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Fri, 30 Oct 2020 13:36:31 +0100 +Subject: [PATCH] arm: compressed: add appended DTB section + +This adds a appended_dtb section to the ARM decompressor +linker script. + +This allows using the existing ARM zImage appended DTB support for +appending a DTB to the raw ELF kernel. + +Its size is set to 1MB max to match the zImage appended DTB size limit. + +To use it to pass the DTB to the kernel, objcopy is used: + +objcopy --set-section-flags=.appended_dtb=alloc,contents \ + --update-section=.appended_dtb=.dtb vmlinux + +This is based off the following patch: +https://github.com/openwrt/openwrt/commit/c063e27e02a9dcac0e7f5877fb154e58fa3e1a69 + +Signed-off-by: Robert Marko +--- + arch/arm/boot/compressed/vmlinux.lds.S | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/compressed/vmlinux.lds.S ++++ b/arch/arm/boot/compressed/vmlinux.lds.S +@@ -103,6 +103,13 @@ SECTIONS + + _edata = .; + ++ .appended_dtb : { ++ /* leave space for appended DTB */ ++ . += 0x100000; ++ } ++ ++ _edata_dtb = .; ++ + /* + * The image_end section appears after any additional loadable sections + * that the linker may decide to insert in the binary image. Having +@@ -140,4 +147,4 @@ SECTIONS + + ARM_ASSERTS + } +-ASSERT(_edata_real == _edata, "error: zImage file size is incorrect"); ++ASSERT(_edata_real == _edata_dtb, "error: zImage file size is incorrect"); diff --git a/target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch b/target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch new file mode 100644 index 0000000000..4939c56470 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch @@ -0,0 +1,66 @@ +From 11d6a6128a5a07c429941afc202b6e62a19771be Mon Sep 17 00:00:00 2001 +From: John Thomson +Date: Fri, 23 Oct 2020 19:42:36 +1000 +Subject: [PATCH 2/2] arm: compressed: set ipq40xx watchdog to allow boot + +For IPQ40XX systems where the SoC watchdog is activated before linux, +the watchdog timer may be too small for linux to finish uncompress, +boot, and watchdog management start. +If the watchdog is enabled, set the timeout for it to 30 seconds. +The functionality and offsets were copied from: +drivers/watchdog/qcom-wdt.c qcom_wdt_set_timeout & qcom_wdt_start +The watchdog memory address was taken from: +arch/arm/boot/dts/qcom-ipq4019.dtsi + +This was required on Mikrotik IPQ40XX consumer hardware using Mikrotik's +RouterBoot bootloader. + +Signed-off-by: John Thomson +--- + arch/arm/boot/compressed/head.S | 35 +++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +--- a/arch/arm/boot/compressed/head.S ++++ b/arch/arm/boot/compressed/head.S +@@ -620,6 +620,41 @@ not_relocated: mov r0, #0 + bic r4, r4, #1 + blne cache_on + ++/* Set the Qualcom IPQ40xx watchdog timeout to 30 seconds ++ * if it is enabled, so that there is time for kernel ++ * to decompress, boot, and take over the watchdog. ++ * data and functionality from drivers/watchdog/qcom-wdt.c ++ * address from arch/arm/boot/dts/qcom-ipq4019.dtsi ++ */ ++#ifdef CONFIG_ARCH_IPQ40XX ++watchdog_set: ++ /* offsets: ++ * 0x04 reset (=1 resets countdown) ++ * 0x08 enable (=0 disables) ++ * 0x0c status (=1 when SoC was reset by watchdog) ++ * 0x10 bark (=timeout warning in ticks) ++ * 0x14 bite (=timeout reset in ticks) ++ * clock rate is 1<<15 hertz ++ */ ++ .equ watchdog, 0x0b017000 @Store watchdog base address ++ movw r0, #:lower16:watchdog ++ movt r0, #:upper16:watchdog ++ ldr r1, [r0, #0x08] @Get enabled? ++ cmp r1, #1 @If not enabled, do not change ++ bne watchdog_finished ++ mov r1, #0 ++ str r1, [r0, #0x08] @Disable the watchdog ++ mov r1, #1 ++ str r1, [r0, #0x04] @Pet the watchdog ++ mov r1, #30 @30 seconds timeout ++ lsl r1, r1, #15 @converted to ticks ++ str r1, [r0, #0x10] @Set the bark timeout ++ str r1, [r0, #0x14] @Set the bite timeout ++ mov r1, #1 ++ str r1, [r0, #0x08] @Enable the watchdog ++watchdog_finished: ++#endif /* CONFIG_ARCH_IPQ40XX */ ++ + /* + * The C runtime environment should now be setup sufficiently. + * Set up some pointers, and start decompressing. diff --git a/target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch b/target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch new file mode 100644 index 0000000000..bf36164aed --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch @@ -0,0 +1,24 @@ +From f63ea127643a605da97090ce585fdd7c2d17fa42 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Mon, 14 Dec 2020 13:35:35 +0100 +Subject: [PATCH] mmc: sdhci-msm: use sdhci_set_clock + +When using sdhci_msm_set_clock clock setting will fail, so lets +use the generic sdhci_set_clock. + +Signed-off-by: Robert Marko +--- + drivers/mmc/host/sdhci-msm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mmc/host/sdhci-msm.c ++++ b/drivers/mmc/host/sdhci-msm.c +@@ -2451,7 +2451,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat + + static const struct sdhci_ops sdhci_msm_ops = { + .reset = sdhci_msm_reset, +- .set_clock = sdhci_msm_set_clock, ++ .set_clock = sdhci_set_clock, + .get_min_clock = sdhci_msm_get_min_clock, + .get_max_clock = sdhci_msm_get_max_clock, + .set_bus_width = sdhci_set_bus_width, diff --git a/target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch b/target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch new file mode 100644 index 0000000000..b297600171 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch @@ -0,0 +1,108 @@ +From 28edd829133766eb3cefaf2e49d3ee701968061b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 9 May 2023 01:57:17 +0200 +Subject: [PATCH] mmc: sdhci-msm: comment unused sdhci_msm_set_clock + +comment unused sdhci_msm_set_clock and __sdhci_msm_set_clock as due to some +current problem, we are forced to use sdhci_set_clock. + +Signed-off-by: Christian Marangi +--- + drivers/mmc/host/sdhci-msm.c | 86 ++++++++++++++++++------------------ + 1 file changed, 43 insertions(+), 43 deletions(-) + +--- a/drivers/mmc/host/sdhci-msm.c ++++ b/drivers/mmc/host/sdhci-msm.c +@@ -1751,49 +1751,49 @@ static unsigned int sdhci_msm_get_min_cl + return SDHCI_MSM_MIN_CLOCK; + } + +-/* +- * __sdhci_msm_set_clock - sdhci_msm clock control. +- * +- * Description: +- * MSM controller does not use internal divider and +- * instead directly control the GCC clock as per +- * HW recommendation. +- **/ +-static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- u16 clk; +- +- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); +- +- if (clock == 0) +- return; +- +- /* +- * MSM controller do not use clock divider. +- * Thus read SDHCI_CLOCK_CONTROL and only enable +- * clock with no divider value programmed. +- */ +- clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); +- sdhci_enable_clk(host, clk); +-} +- +-/* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */ +-static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); +- struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); +- +- if (!clock) { +- host->mmc->actual_clock = msm_host->clk_rate = 0; +- goto out; +- } +- +- sdhci_msm_hc_select_mode(host); +- +- msm_set_clock_rate_for_bus_mode(host, clock); +-out: +- __sdhci_msm_set_clock(host, clock); +-} ++// /* ++// * __sdhci_msm_set_clock - sdhci_msm clock control. ++// * ++// * Description: ++// * MSM controller does not use internal divider and ++// * instead directly control the GCC clock as per ++// * HW recommendation. ++// **/ ++// static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) ++// { ++// u16 clk; ++ ++// sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); ++ ++// if (clock == 0) ++// return; ++ ++// /* ++// * MSM controller do not use clock divider. ++// * Thus read SDHCI_CLOCK_CONTROL and only enable ++// * clock with no divider value programmed. ++// */ ++// clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); ++// sdhci_enable_clk(host, clk); ++// } ++ ++// /* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */ ++// static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) ++// { ++// struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); ++// struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); ++ ++// if (!clock) { ++// host->mmc->actual_clock = msm_host->clk_rate = 0; ++// goto out; ++// } ++ ++// sdhci_msm_hc_select_mode(host); ++ ++// msm_set_clock_rate_for_bus_mode(host, clock); ++// out: ++// __sdhci_msm_set_clock(host, clock); ++// } + + /*****************************************************************************\ + * * diff --git a/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch b/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch new file mode 100644 index 0000000000..cb06ff353c --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch @@ -0,0 +1,138 @@ +From aaa675f07e781e248fcf169ce9a917b48bc2cc9b Mon Sep 17 00:00:00 2001 +From: Brian Norris +Date: Fri, 28 Jul 2023 12:06:23 +0200 +Subject: [PATCH 3/3] firmware: qcom: scm: fix SCM cold boot address + +This effectively reverts upstream Linux commit 13e77747800e ("firmware: +qcom: scm: Use atomic SCM for cold boot"), because Google WiFi boot +firmwares don't support the atomic variant. + +This fixes SMP support for Google WiFi. + +Signed-off-by: Brian Norris +--- + drivers/firmware/qcom_scm-legacy.c | 62 +++++++++++++++++++++++++----- + drivers/firmware/qcom_scm.c | 11 ++++++ + 2 files changed, 63 insertions(+), 10 deletions(-) + +--- a/drivers/firmware/qcom_scm-legacy.c ++++ b/drivers/firmware/qcom_scm-legacy.c +@@ -13,6 +13,9 @@ + #include + #include + ++#include ++#include ++ + #include "qcom_scm.h" + + static DEFINE_MUTEX(qcom_scm_lock); +@@ -117,6 +120,25 @@ static void __scm_legacy_do(const struct + } while (res->a0 == QCOM_SCM_INTERRUPTED); + } + ++static void qcom_scm_inv_range(unsigned long start, unsigned long end) ++{ ++ u32 cacheline_size, ctr; ++ ++ asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); ++ cacheline_size = 4 << ((ctr >> 16) & 0xf); ++ ++ start = round_down(start, cacheline_size); ++ end = round_up(end, cacheline_size); ++ outer_inv_range(start, end); ++ while (start < end) { ++ asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start) ++ : "memory"); ++ start += cacheline_size; ++ } ++ dsb(); ++ isb(); ++} ++ + /** + * scm_legacy_call() - Sends a command to the SCM and waits for the command to + * finish processing. +@@ -163,10 +185,16 @@ int scm_legacy_call(struct device *dev, + + rsp = scm_legacy_command_to_response(cmd); + +- cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE); +- if (dma_mapping_error(dev, cmd_phys)) { +- kfree(cmd); +- return -ENOMEM; ++ if (dev) { ++ cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE); ++ if (dma_mapping_error(dev, cmd_phys)) { ++ kfree(cmd); ++ return -ENOMEM; ++ } ++ } else { ++ cmd_phys = virt_to_phys(cmd); ++ __cpuc_flush_dcache_area(cmd, alloc_len); ++ outer_flush_range(cmd_phys, cmd_phys + alloc_len); + } + + smc.args[0] = 1; +@@ -182,13 +210,26 @@ int scm_legacy_call(struct device *dev, + goto out; + + do { +- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len, +- sizeof(*rsp), DMA_FROM_DEVICE); ++ if (dev) { ++ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + ++ cmd_len, sizeof(*rsp), ++ DMA_FROM_DEVICE); ++ } else { ++ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + ++ cmd_len; ++ qcom_scm_inv_range(start, start + sizeof(*rsp)); ++ } + } while (!rsp->is_complete); + +- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len + +- le32_to_cpu(rsp->buf_offset), +- resp_len, DMA_FROM_DEVICE); ++ if (dev) { ++ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len + ++ le32_to_cpu(rsp->buf_offset), ++ resp_len, DMA_FROM_DEVICE); ++ } else { ++ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + cmd_len + ++ le32_to_cpu(rsp->buf_offset); ++ qcom_scm_inv_range(start, start + resp_len); ++ } + + if (res) { + res_buf = scm_legacy_get_response_buffer(rsp); +@@ -196,7 +237,8 @@ int scm_legacy_call(struct device *dev, + res->result[i] = le32_to_cpu(res_buf[i]); + } + out: +- dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE); ++ if (dev) ++ dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE); + kfree(cmd); + return ret; + } +--- a/drivers/firmware/qcom_scm.c ++++ b/drivers/firmware/qcom_scm.c +@@ -312,6 +312,17 @@ static int qcom_scm_set_boot_addr(void * + desc.args[0] = flags; + desc.args[1] = virt_to_phys(entry); + ++ /* ++ * Factory firmware doesn't support the atomic variant. Non-atomic SCMs ++ * require ugly DMA invalidation support that was dropped upstream a ++ * while ago. For more info, see: ++ * ++ * [RFC] qcom_scm: IPQ4019 firmware does not support atomic API? ++ * https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/ ++ */ ++ if (of_machine_is_compatible("google,wifi")) ++ return qcom_scm_call(__scm ? __scm->dev : NULL, &desc, NULL); ++ + return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL); + } + diff --git a/target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch b/target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch new file mode 100644 index 0000000000..91919b2894 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/444-mtd-nand-rawnand-add-support-for-Toshiba-TC58NVG0S3H.patch @@ -0,0 +1,29 @@ +From 35ca7e3e6ccd120d694a3425f37fc6374ad2e11e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Andreas=20B=C3=B6hler?= +Date: Wed, 20 Apr 2022 12:08:38 +0200 +Subject: [PATCH] mtd: rawnand: add support for Toshiba TC58NVG0S3HTA00 + NAND flash +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Toshiba TC58NVG0S3HTA00 is detected with 64 byte OOB while the flash +has 128 bytes OOB. This adds a static NAND ID entry to correct this. + +Tested on FRITZ!Box 7530 flashed with OpenWrt. + +Signed-off-by: Andreas Böhler +(changed id_len to 8, added comment about possible counterfeits) +--- +--- a/drivers/mtd/nand/raw/nand_ids.c ++++ b/drivers/mtd/nand/raw/nand_ids.c +@@ -29,6 +29,9 @@ struct nand_flash_dev nand_flash_ids[] = + {"TC58NVG0S3E 1G 3.3V 8-bit", + { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} }, + SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), }, ++ {"TC58NVG0S3HTA00 1G 3.3V 8-bit", /* possibly counterfeit chip - see commit */ ++ { .id = {0x98, 0xf1, 0x80, 0x15} }, /* should be more bytes */ ++ SZ_2K, SZ_128, SZ_128K, 0, 8, 128, NAND_ECC_INFO(8, SZ_512), }, + {"TC58NVG2S0F 4G 3.3V 8-bit", + { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} }, + SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) }, diff --git a/target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch b/target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch new file mode 100644 index 0000000000..be12bfcd21 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch @@ -0,0 +1,2025 @@ +From 76e25c1f46456416ba5358be8a0677f1ab8196b6 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 4 Nov 2022 18:41:48 +0100 +Subject: [PATCH] net: ipqess: introduce the Qualcomm IPQESS driver + +The Qualcomm IPQESS controller is a simple 1G Ethernet controller found +on the IPQ4019 chip. This controller has some specificities, in that the +IPQ4019 platform that includes that controller also has an internal +switch, based on the QCA8K IP. + +It is connected to that switch through an internal link, and doesn't +expose directly any external interface, hence it only supports the +PHY_INTERFACE_MODE_INTERNAL for now. + +It has 16 RX and TX queues, with a very basic RSS fanout configured at +init time. + +Signed-off-by: Maxime Chevallier +--- + MAINTAINERS | 7 + + drivers/net/ethernet/qualcomm/Kconfig | 11 + + drivers/net/ethernet/qualcomm/Makefile | 2 + + drivers/net/ethernet/qualcomm/ipqess/Makefile | 8 + + drivers/net/ethernet/qualcomm/ipqess/ipqess.c | 1246 +++++++++++++++++ + drivers/net/ethernet/qualcomm/ipqess/ipqess.h | 518 +++++++ + .../ethernet/qualcomm/ipqess/ipqess_ethtool.c | 164 +++ + 7 files changed, 1956 insertions(+) + create mode 100644 drivers/net/ethernet/qualcomm/ipqess/Makefile + create mode 100644 drivers/net/ethernet/qualcomm/ipqess/ipqess.c + create mode 100644 drivers/net/ethernet/qualcomm/ipqess/ipqess.h + create mode 100644 drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -17075,6 +17075,13 @@ L: netdev@vger.kernel.org + S: Maintained + F: drivers/net/ethernet/qualcomm/emac/ + ++QUALCOMM IPQESS ETHERNET DRIVER ++M: Maxime Chevallier ++L: netdev@vger.kernel.org ++S: Maintained ++F: Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml ++F: drivers/net/ethernet/qualcomm/ipqess/ ++ + QUALCOMM ETHQOS ETHERNET DRIVER + M: Vinod Koul + R: Bhupesh Sharma +--- a/drivers/net/ethernet/qualcomm/Kconfig ++++ b/drivers/net/ethernet/qualcomm/Kconfig +@@ -60,6 +60,17 @@ config QCOM_EMAC + low power, Receive-Side Scaling (RSS), and IEEE 1588-2008 + Precision Clock Synchronization Protocol. + ++config QCOM_IPQ4019_ESS_EDMA ++ tristate "Qualcomm Atheros IPQ4019 ESS EDMA support" ++ depends on (OF && ARCH_QCOM) || COMPILE_TEST ++ select PHYLINK ++ help ++ This driver supports the Qualcomm Atheros IPQ40xx built-in ++ ESS EDMA ethernet controller. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called ipqess. ++ + source "drivers/net/ethernet/qualcomm/rmnet/Kconfig" + + endif # NET_VENDOR_QUALCOMM +--- a/drivers/net/ethernet/qualcomm/Makefile ++++ b/drivers/net/ethernet/qualcomm/Makefile +@@ -11,4 +11,6 @@ qcauart-objs := qca_uart.o + + obj-y += emac/ + ++obj-$(CONFIG_QCOM_IPQ4019_ESS_EDMA) += ipqess/ ++ + obj-$(CONFIG_RMNET) += rmnet/ +--- /dev/null ++++ b/drivers/net/ethernet/qualcomm/ipqess/Makefile +@@ -0,0 +1,8 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++# ++# Makefile for the IPQ ESS driver ++# ++ ++obj-$(CONFIG_QCOM_IPQ4019_ESS_EDMA) += ipq_ess.o ++ ++ipq_ess-objs := ipqess.o ipqess_ethtool.o +--- /dev/null ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c +@@ -0,0 +1,1246 @@ ++// SPDX-License-Identifier: GPL-2.0 OR ISC ++/* Copyright (c) 2014 - 2017, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2017 - 2018, John Crispin ++ * Copyright (c) 2018 - 2019, Christian Lamparter ++ * Copyright (c) 2020 - 2021, Gabor Juhos ++ * Copyright (c) 2021 - 2022, Maxime Chevallier ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ipqess.h" ++ ++#define IPQESS_RRD_SIZE 16 ++#define IPQESS_NEXT_IDX(X, Y) (((X) + 1) & ((Y) - 1)) ++#define IPQESS_TX_DMA_BUF_LEN 0x3fff ++ ++static void ipqess_w32(struct ipqess *ess, u32 reg, u32 val) ++{ ++ writel(val, ess->hw_addr + reg); ++} ++ ++static u32 ipqess_r32(struct ipqess *ess, u16 reg) ++{ ++ return readl(ess->hw_addr + reg); ++} ++ ++static void ipqess_m32(struct ipqess *ess, u32 mask, u32 val, u16 reg) ++{ ++ u32 _val = ipqess_r32(ess, reg); ++ ++ _val &= ~mask; ++ _val |= val; ++ ++ ipqess_w32(ess, reg, _val); ++} ++ ++void ipqess_update_hw_stats(struct ipqess *ess) ++{ ++ u32 *p; ++ u32 stat; ++ int i; ++ ++ lockdep_assert_held(&ess->stats_lock); ++ ++ p = (u32 *)&ess->ipqess_stats; ++ for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) { ++ stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_PKT_Q(i)); ++ *p += stat; ++ p++; ++ } ++ ++ for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) { ++ stat = ipqess_r32(ess, IPQESS_REG_TX_STAT_BYTE_Q(i)); ++ *p += stat; ++ p++; ++ } ++ ++ for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) { ++ stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_PKT_Q(i)); ++ *p += stat; ++ p++; ++ } ++ ++ for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) { ++ stat = ipqess_r32(ess, IPQESS_REG_RX_STAT_BYTE_Q(i)); ++ *p += stat; ++ p++; ++ } ++} ++ ++static int ipqess_tx_ring_alloc(struct ipqess *ess) ++{ ++ struct device *dev = &ess->pdev->dev; ++ int i; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ struct ipqess_tx_ring *tx_ring = &ess->tx_ring[i]; ++ size_t size; ++ u32 idx; ++ ++ tx_ring->ess = ess; ++ tx_ring->ring_id = i; ++ tx_ring->idx = i * 4; ++ tx_ring->count = IPQESS_TX_RING_SIZE; ++ tx_ring->nq = netdev_get_tx_queue(ess->netdev, i); ++ ++ size = sizeof(struct ipqess_buf) * IPQESS_TX_RING_SIZE; ++ tx_ring->buf = devm_kzalloc(dev, size, GFP_KERNEL); ++ if (!tx_ring->buf) ++ return -ENOMEM; ++ ++ size = sizeof(struct ipqess_tx_desc) * IPQESS_TX_RING_SIZE; ++ tx_ring->hw_desc = dmam_alloc_coherent(dev, size, &tx_ring->dma, ++ GFP_KERNEL); ++ if (!tx_ring->hw_desc) ++ return -ENOMEM; ++ ++ ipqess_w32(ess, IPQESS_REG_TPD_BASE_ADDR_Q(tx_ring->idx), ++ (u32)tx_ring->dma); ++ ++ idx = ipqess_r32(ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx)); ++ idx >>= IPQESS_TPD_CONS_IDX_SHIFT; /* need u32 here */ ++ idx &= 0xffff; ++ tx_ring->head = idx; ++ tx_ring->tail = idx; ++ ++ ipqess_m32(ess, IPQESS_TPD_PROD_IDX_MASK << IPQESS_TPD_PROD_IDX_SHIFT, ++ idx, IPQESS_REG_TPD_IDX_Q(tx_ring->idx)); ++ ipqess_w32(ess, IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx), idx); ++ ipqess_w32(ess, IPQESS_REG_TPD_RING_SIZE, IPQESS_TX_RING_SIZE); ++ } ++ ++ return 0; ++} ++ ++static int ipqess_tx_unmap_and_free(struct device *dev, struct ipqess_buf *buf) ++{ ++ int len = 0; ++ ++ if (buf->flags & IPQESS_DESC_SINGLE) ++ dma_unmap_single(dev, buf->dma, buf->length, DMA_TO_DEVICE); ++ else if (buf->flags & IPQESS_DESC_PAGE) ++ dma_unmap_page(dev, buf->dma, buf->length, DMA_TO_DEVICE); ++ ++ if (buf->flags & IPQESS_DESC_LAST) { ++ len = buf->skb->len; ++ dev_kfree_skb_any(buf->skb); ++ } ++ ++ buf->flags = 0; ++ ++ return len; ++} ++ ++static void ipqess_tx_ring_free(struct ipqess *ess) ++{ ++ int i; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ int j; ++ ++ if (ess->tx_ring[i].hw_desc) ++ continue; ++ ++ for (j = 0; j < IPQESS_TX_RING_SIZE; j++) { ++ struct ipqess_buf *buf = &ess->tx_ring[i].buf[j]; ++ ++ ipqess_tx_unmap_and_free(&ess->pdev->dev, buf); ++ } ++ ++ ess->tx_ring[i].buf = NULL; ++ } ++} ++ ++static int ipqess_rx_buf_prepare(struct ipqess_buf *buf, ++ struct ipqess_rx_ring *rx_ring) ++{ ++ memset(buf->skb->data, 0, sizeof(struct ipqess_rx_desc)); ++ ++ buf->dma = dma_map_single(rx_ring->ppdev, buf->skb->data, ++ IPQESS_RX_HEAD_BUFF_SIZE, DMA_FROM_DEVICE); ++ if (dma_mapping_error(rx_ring->ppdev, buf->dma)) { ++ dev_kfree_skb_any(buf->skb); ++ buf->skb = NULL; ++ return -EFAULT; ++ } ++ ++ buf->length = IPQESS_RX_HEAD_BUFF_SIZE; ++ rx_ring->hw_desc[rx_ring->head] = (struct ipqess_rx_desc *)buf->dma; ++ rx_ring->head = (rx_ring->head + 1) % IPQESS_RX_RING_SIZE; ++ ++ ipqess_m32(rx_ring->ess, IPQESS_RFD_PROD_IDX_BITS, ++ (rx_ring->head + IPQESS_RX_RING_SIZE - 1) % IPQESS_RX_RING_SIZE, ++ IPQESS_REG_RFD_IDX_Q(rx_ring->idx)); ++ ++ return 0; ++} ++ ++/* locking is handled by the caller */ ++static int ipqess_rx_buf_alloc_napi(struct ipqess_rx_ring *rx_ring) ++{ ++ struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head]; ++ ++ buf->skb = napi_alloc_skb(&rx_ring->napi_rx, IPQESS_RX_HEAD_BUFF_SIZE); ++ if (!buf->skb) ++ return -ENOMEM; ++ ++ return ipqess_rx_buf_prepare(buf, rx_ring); ++} ++ ++static int ipqess_rx_buf_alloc(struct ipqess_rx_ring *rx_ring) ++{ ++ struct ipqess_buf *buf = &rx_ring->buf[rx_ring->head]; ++ ++ buf->skb = netdev_alloc_skb_ip_align(rx_ring->ess->netdev, ++ IPQESS_RX_HEAD_BUFF_SIZE); ++ ++ if (!buf->skb) ++ return -ENOMEM; ++ ++ return ipqess_rx_buf_prepare(buf, rx_ring); ++} ++ ++static void ipqess_refill_work(struct work_struct *work) ++{ ++ struct ipqess_rx_ring_refill *rx_refill = container_of(work, ++ struct ipqess_rx_ring_refill, refill_work); ++ struct ipqess_rx_ring *rx_ring = rx_refill->rx_ring; ++ int refill = 0; ++ ++ /* don't let this loop by accident. */ ++ while (atomic_dec_and_test(&rx_ring->refill_count)) { ++ napi_disable(&rx_ring->napi_rx); ++ if (ipqess_rx_buf_alloc(rx_ring)) { ++ refill++; ++ dev_dbg(rx_ring->ppdev, ++ "Not all buffers were reallocated"); ++ } ++ napi_enable(&rx_ring->napi_rx); ++ } ++ ++ if (atomic_add_return(refill, &rx_ring->refill_count)) ++ schedule_work(&rx_refill->refill_work); ++} ++ ++static int ipqess_rx_ring_alloc(struct ipqess *ess) ++{ ++ int i; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ int j; ++ ++ ess->rx_ring[i].ess = ess; ++ ess->rx_ring[i].ppdev = &ess->pdev->dev; ++ ess->rx_ring[i].ring_id = i; ++ ess->rx_ring[i].idx = i * 2; ++ ++ ess->rx_ring[i].buf = devm_kzalloc(&ess->pdev->dev, ++ sizeof(struct ipqess_buf) * IPQESS_RX_RING_SIZE, ++ GFP_KERNEL); ++ ++ if (!ess->rx_ring[i].buf) ++ return -ENOMEM; ++ ++ ess->rx_ring[i].hw_desc = ++ dmam_alloc_coherent(&ess->pdev->dev, ++ sizeof(struct ipqess_rx_desc) * IPQESS_RX_RING_SIZE, ++ &ess->rx_ring[i].dma, GFP_KERNEL); ++ ++ if (!ess->rx_ring[i].hw_desc) ++ return -ENOMEM; ++ ++ for (j = 0; j < IPQESS_RX_RING_SIZE; j++) ++ if (ipqess_rx_buf_alloc(&ess->rx_ring[i]) < 0) ++ return -ENOMEM; ++ ++ ess->rx_refill[i].rx_ring = &ess->rx_ring[i]; ++ INIT_WORK(&ess->rx_refill[i].refill_work, ipqess_refill_work); ++ ++ ipqess_w32(ess, IPQESS_REG_RFD_BASE_ADDR_Q(ess->rx_ring[i].idx), ++ (u32)(ess->rx_ring[i].dma)); ++ } ++ ++ ipqess_w32(ess, IPQESS_REG_RX_DESC0, ++ (IPQESS_RX_HEAD_BUFF_SIZE << IPQESS_RX_BUF_SIZE_SHIFT) | ++ (IPQESS_RX_RING_SIZE << IPQESS_RFD_RING_SIZE_SHIFT)); ++ ++ return 0; ++} ++ ++static void ipqess_rx_ring_free(struct ipqess *ess) ++{ ++ int i; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ int j; ++ ++ cancel_work_sync(&ess->rx_refill[i].refill_work); ++ atomic_set(&ess->rx_ring[i].refill_count, 0); ++ ++ for (j = 0; j < IPQESS_RX_RING_SIZE; j++) { ++ dma_unmap_single(&ess->pdev->dev, ++ ess->rx_ring[i].buf[j].dma, ++ ess->rx_ring[i].buf[j].length, ++ DMA_FROM_DEVICE); ++ dev_kfree_skb_any(ess->rx_ring[i].buf[j].skb); ++ } ++ } ++} ++ ++static struct net_device_stats *ipqess_get_stats(struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ spin_lock(&ess->stats_lock); ++ ipqess_update_hw_stats(ess); ++ spin_unlock(&ess->stats_lock); ++ ++ return &ess->stats; ++} ++ ++static int ipqess_rx_poll(struct ipqess_rx_ring *rx_ring, int budget) ++{ ++ u32 length = 0, num_desc, tail, rx_ring_tail; ++ int done = 0; ++ ++ rx_ring_tail = rx_ring->tail; ++ ++ tail = ipqess_r32(rx_ring->ess, IPQESS_REG_RFD_IDX_Q(rx_ring->idx)); ++ tail >>= IPQESS_RFD_CONS_IDX_SHIFT; ++ tail &= IPQESS_RFD_CONS_IDX_MASK; ++ ++ while (done < budget) { ++ struct ipqess_rx_desc *rd; ++ struct sk_buff *skb; ++ ++ if (rx_ring_tail == tail) ++ break; ++ ++ dma_unmap_single(rx_ring->ppdev, ++ rx_ring->buf[rx_ring_tail].dma, ++ rx_ring->buf[rx_ring_tail].length, ++ DMA_FROM_DEVICE); ++ ++ skb = xchg(&rx_ring->buf[rx_ring_tail].skb, NULL); ++ rd = (struct ipqess_rx_desc *)skb->data; ++ rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE); ++ ++ /* Check if RRD is valid */ ++ if (!(rd->rrd7 & cpu_to_le16(IPQESS_RRD_DESC_VALID))) { ++ num_desc = 1; ++ dev_kfree_skb_any(skb); ++ goto skip; ++ } ++ ++ num_desc = le16_to_cpu(rd->rrd1) & IPQESS_RRD_NUM_RFD_MASK; ++ length = le16_to_cpu(rd->rrd6) & IPQESS_RRD_PKT_SIZE_MASK; ++ ++ skb_reserve(skb, IPQESS_RRD_SIZE); ++ if (num_desc > 1) { ++ struct sk_buff *skb_prev = NULL; ++ int size_remaining; ++ int i; ++ ++ skb->data_len = 0; ++ skb->tail += (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE); ++ skb->len = length; ++ skb->truesize = length; ++ size_remaining = length - (IPQESS_RX_HEAD_BUFF_SIZE - IPQESS_RRD_SIZE); ++ ++ for (i = 1; i < num_desc; i++) { ++ struct sk_buff *skb_temp = rx_ring->buf[rx_ring_tail].skb; ++ ++ dma_unmap_single(rx_ring->ppdev, ++ rx_ring->buf[rx_ring_tail].dma, ++ rx_ring->buf[rx_ring_tail].length, ++ DMA_FROM_DEVICE); ++ ++ skb_put(skb_temp, min(size_remaining, IPQESS_RX_HEAD_BUFF_SIZE)); ++ if (skb_prev) ++ skb_prev->next = rx_ring->buf[rx_ring_tail].skb; ++ else ++ skb_shinfo(skb)->frag_list = rx_ring->buf[rx_ring_tail].skb; ++ skb_prev = rx_ring->buf[rx_ring_tail].skb; ++ rx_ring->buf[rx_ring_tail].skb->next = NULL; ++ ++ skb->data_len += rx_ring->buf[rx_ring_tail].skb->len; ++ size_remaining -= rx_ring->buf[rx_ring_tail].skb->len; ++ ++ rx_ring_tail = IPQESS_NEXT_IDX(rx_ring_tail, IPQESS_RX_RING_SIZE); ++ } ++ ++ } else { ++ skb_put(skb, length); ++ } ++ ++ skb->dev = rx_ring->ess->netdev; ++ skb->protocol = eth_type_trans(skb, rx_ring->ess->netdev); ++ skb_record_rx_queue(skb, rx_ring->ring_id); ++ ++ if (rd->rrd6 & cpu_to_le16(IPQESS_RRD_CSUM_FAIL_MASK)) ++ skb_checksum_none_assert(skb); ++ else ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ ++ if (rd->rrd7 & cpu_to_le16(IPQESS_RRD_CVLAN)) ++ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ++ le16_to_cpu(rd->rrd4)); ++ else if (rd->rrd1 & cpu_to_le16(IPQESS_RRD_SVLAN)) ++ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), ++ le16_to_cpu(rd->rrd4)); ++ ++ napi_gro_receive(&rx_ring->napi_rx, skb); ++ ++ rx_ring->ess->stats.rx_packets++; ++ rx_ring->ess->stats.rx_bytes += length; ++ ++ done++; ++skip: ++ ++ num_desc += atomic_xchg(&rx_ring->refill_count, 0); ++ while (num_desc) { ++ if (ipqess_rx_buf_alloc_napi(rx_ring)) { ++ num_desc = atomic_add_return(num_desc, ++ &rx_ring->refill_count); ++ if (num_desc >= DIV_ROUND_UP(IPQESS_RX_RING_SIZE * 4, 7)) ++ schedule_work(&rx_ring->ess->rx_refill[rx_ring->ring_id].refill_work); ++ break; ++ } ++ num_desc--; ++ } ++ } ++ ++ ipqess_w32(rx_ring->ess, IPQESS_REG_RX_SW_CONS_IDX_Q(rx_ring->idx), ++ rx_ring_tail); ++ rx_ring->tail = rx_ring_tail; ++ ++ return done; ++} ++ ++static int ipqess_tx_complete(struct ipqess_tx_ring *tx_ring, int budget) ++{ ++ int total = 0, ret; ++ int done = 0; ++ u32 tail; ++ ++ tail = ipqess_r32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx)); ++ tail >>= IPQESS_TPD_CONS_IDX_SHIFT; ++ tail &= IPQESS_TPD_CONS_IDX_MASK; ++ ++ do { ++ ret = ipqess_tx_unmap_and_free(&tx_ring->ess->pdev->dev, ++ &tx_ring->buf[tx_ring->tail]); ++ tx_ring->tail = IPQESS_NEXT_IDX(tx_ring->tail, tx_ring->count); ++ ++ total += ret; ++ } while ((++done < budget) && (tx_ring->tail != tail)); ++ ++ ipqess_w32(tx_ring->ess, IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx), ++ tx_ring->tail); ++ ++ if (netif_tx_queue_stopped(tx_ring->nq)) { ++ netdev_dbg(tx_ring->ess->netdev, "waking up tx queue %d\n", ++ tx_ring->idx); ++ netif_tx_wake_queue(tx_ring->nq); ++ } ++ ++ netdev_tx_completed_queue(tx_ring->nq, done, total); ++ ++ return done; ++} ++ ++static int ipqess_tx_napi(struct napi_struct *napi, int budget) ++{ ++ struct ipqess_tx_ring *tx_ring = container_of(napi, struct ipqess_tx_ring, ++ napi_tx); ++ int work_done = 0; ++ u32 tx_status; ++ ++ tx_status = ipqess_r32(tx_ring->ess, IPQESS_REG_TX_ISR); ++ tx_status &= BIT(tx_ring->idx); ++ ++ work_done = ipqess_tx_complete(tx_ring, budget); ++ ++ ipqess_w32(tx_ring->ess, IPQESS_REG_TX_ISR, tx_status); ++ ++ if (likely(work_done < budget)) { ++ if (napi_complete_done(napi, work_done)) ++ ipqess_w32(tx_ring->ess, ++ IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1); ++ } ++ ++ return work_done; ++} ++ ++static int ipqess_rx_napi(struct napi_struct *napi, int budget) ++{ ++ struct ipqess_rx_ring *rx_ring = container_of(napi, struct ipqess_rx_ring, ++ napi_rx); ++ struct ipqess *ess = rx_ring->ess; ++ u32 rx_mask = BIT(rx_ring->idx); ++ int remaining_budget = budget; ++ int rx_done; ++ u32 status; ++ ++ do { ++ ipqess_w32(ess, IPQESS_REG_RX_ISR, rx_mask); ++ rx_done = ipqess_rx_poll(rx_ring, remaining_budget); ++ remaining_budget -= rx_done; ++ ++ status = ipqess_r32(ess, IPQESS_REG_RX_ISR); ++ } while (remaining_budget > 0 && (status & rx_mask)); ++ ++ if (remaining_budget <= 0) ++ return budget; ++ ++ if (napi_complete_done(napi, budget - remaining_budget)) ++ ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx), 0x1); ++ ++ return budget - remaining_budget; ++} ++ ++static irqreturn_t ipqess_interrupt_tx(int irq, void *priv) ++{ ++ struct ipqess_tx_ring *tx_ring = (struct ipqess_tx_ring *)priv; ++ ++ if (likely(napi_schedule_prep(&tx_ring->napi_tx))) { ++ __napi_schedule(&tx_ring->napi_tx); ++ ipqess_w32(tx_ring->ess, IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), ++ 0x0); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t ipqess_interrupt_rx(int irq, void *priv) ++{ ++ struct ipqess_rx_ring *rx_ring = (struct ipqess_rx_ring *)priv; ++ ++ if (likely(napi_schedule_prep(&rx_ring->napi_rx))) { ++ __napi_schedule(&rx_ring->napi_rx); ++ ipqess_w32(rx_ring->ess, IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx), ++ 0x0); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void ipqess_irq_enable(struct ipqess *ess) ++{ ++ int i; ++ ++ ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff); ++ ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff); ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 1); ++ ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 1); ++ } ++} ++ ++static void ipqess_irq_disable(struct ipqess *ess) ++{ ++ int i; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(ess->rx_ring[i].idx), 0); ++ ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(ess->tx_ring[i].idx), 0); ++ } ++} ++ ++static int __init ipqess_init(struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ struct device_node *of_node = ess->pdev->dev.of_node; ++ int ret; ++ ++ ret = of_get_ethdev_address(of_node, netdev); ++ if (ret) ++ eth_hw_addr_random(netdev); ++ ++ return phylink_of_phy_connect(ess->phylink, of_node, 0); ++} ++ ++static void ipqess_uninit(struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ phylink_disconnect_phy(ess->phylink); ++} ++ ++static int ipqess_open(struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ int i, err; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ int qid; ++ ++ qid = ess->tx_ring[i].idx; ++ err = devm_request_irq(&netdev->dev, ess->tx_irq[qid], ++ ipqess_interrupt_tx, 0, ++ ess->tx_irq_names[qid], ++ &ess->tx_ring[i]); ++ if (err) ++ return err; ++ ++ qid = ess->rx_ring[i].idx; ++ err = devm_request_irq(&netdev->dev, ess->rx_irq[qid], ++ ipqess_interrupt_rx, 0, ++ ess->rx_irq_names[qid], ++ &ess->rx_ring[i]); ++ if (err) ++ return err; ++ ++ napi_enable(&ess->tx_ring[i].napi_tx); ++ napi_enable(&ess->rx_ring[i].napi_rx); ++ } ++ ++ ipqess_irq_enable(ess); ++ phylink_start(ess->phylink); ++ netif_tx_start_all_queues(netdev); ++ ++ return 0; ++} ++ ++static int ipqess_stop(struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ int i; ++ ++ netif_tx_stop_all_queues(netdev); ++ phylink_stop(ess->phylink); ++ ipqess_irq_disable(ess); ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ napi_disable(&ess->tx_ring[i].napi_tx); ++ napi_disable(&ess->rx_ring[i].napi_rx); ++ } ++ ++ return 0; ++} ++ ++static int ipqess_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ return phylink_mii_ioctl(ess->phylink, ifr, cmd); ++} ++ ++static u16 ipqess_tx_desc_available(struct ipqess_tx_ring *tx_ring) ++{ ++ u16 count = 0; ++ ++ if (tx_ring->tail <= tx_ring->head) ++ count = IPQESS_TX_RING_SIZE; ++ ++ count += tx_ring->tail - tx_ring->head - 1; ++ ++ return count; ++} ++ ++static int ipqess_cal_txd_req(struct sk_buff *skb) ++{ ++ int tpds; ++ ++ /* one TPD for the header, and one for each fragments */ ++ tpds = 1 + skb_shinfo(skb)->nr_frags; ++ if (skb_is_gso(skb) && skb_is_gso_v6(skb)) { ++ /* for LSOv2 one extra TPD is needed */ ++ tpds++; ++ } ++ ++ return tpds; ++} ++ ++static struct ipqess_buf *ipqess_get_tx_buffer(struct ipqess_tx_ring *tx_ring, ++ struct ipqess_tx_desc *desc) ++{ ++ return &tx_ring->buf[desc - tx_ring->hw_desc]; ++} ++ ++static struct ipqess_tx_desc *ipqess_tx_desc_next(struct ipqess_tx_ring *tx_ring) ++{ ++ struct ipqess_tx_desc *desc; ++ ++ desc = &tx_ring->hw_desc[tx_ring->head]; ++ tx_ring->head = IPQESS_NEXT_IDX(tx_ring->head, tx_ring->count); ++ ++ return desc; ++} ++ ++static void ipqess_rollback_tx(struct ipqess *eth, ++ struct ipqess_tx_desc *first_desc, int ring_id) ++{ ++ struct ipqess_tx_ring *tx_ring = ð->tx_ring[ring_id]; ++ struct ipqess_tx_desc *desc = NULL; ++ struct ipqess_buf *buf; ++ u16 start_index, index; ++ ++ start_index = first_desc - tx_ring->hw_desc; ++ ++ index = start_index; ++ while (index != tx_ring->head) { ++ desc = &tx_ring->hw_desc[index]; ++ buf = &tx_ring->buf[index]; ++ ipqess_tx_unmap_and_free(ð->pdev->dev, buf); ++ memset(desc, 0, sizeof(*desc)); ++ if (++index == tx_ring->count) ++ index = 0; ++ } ++ tx_ring->head = start_index; ++} ++ ++static int ipqess_tx_map_and_fill(struct ipqess_tx_ring *tx_ring, ++ struct sk_buff *skb) ++{ ++ struct ipqess_tx_desc *desc = NULL, *first_desc = NULL; ++ u32 word1 = 0, word3 = 0, lso_word1 = 0, svlan_tag = 0; ++ struct platform_device *pdev = tx_ring->ess->pdev; ++ struct ipqess_buf *buf = NULL; ++ u16 len; ++ int i; ++ ++ if (skb_is_gso(skb)) { ++ if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) { ++ lso_word1 |= IPQESS_TPD_IPV4_EN; ++ ip_hdr(skb)->check = 0; ++ tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, ++ ip_hdr(skb)->daddr, ++ 0, IPPROTO_TCP, 0); ++ } else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) { ++ lso_word1 |= IPQESS_TPD_LSO_V2_EN; ++ ipv6_hdr(skb)->payload_len = 0; ++ tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, ++ &ipv6_hdr(skb)->daddr, ++ 0, IPPROTO_TCP, 0); ++ } ++ ++ lso_word1 |= IPQESS_TPD_LSO_EN | ++ ((skb_shinfo(skb)->gso_size & IPQESS_TPD_MSS_MASK) << ++ IPQESS_TPD_MSS_SHIFT) | ++ (skb_transport_offset(skb) << IPQESS_TPD_HDR_SHIFT); ++ } else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { ++ u8 css, cso; ++ ++ cso = skb_checksum_start_offset(skb); ++ css = cso + skb->csum_offset; ++ ++ word1 |= (IPQESS_TPD_CUSTOM_CSUM_EN); ++ word1 |= (cso >> 1) << IPQESS_TPD_HDR_SHIFT; ++ word1 |= ((css >> 1) << IPQESS_TPD_CUSTOM_CSUM_SHIFT); ++ } ++ ++ if (skb_vlan_tag_present(skb)) { ++ switch (skb->vlan_proto) { ++ case htons(ETH_P_8021Q): ++ word3 |= BIT(IPQESS_TX_INS_CVLAN); ++ word3 |= skb_vlan_tag_get(skb) << IPQESS_TX_CVLAN_TAG_SHIFT; ++ break; ++ case htons(ETH_P_8021AD): ++ word1 |= BIT(IPQESS_TX_INS_SVLAN); ++ svlan_tag = skb_vlan_tag_get(skb); ++ break; ++ default: ++ dev_err(&pdev->dev, "no ctag or stag present\n"); ++ goto vlan_tag_error; ++ } ++ } ++ ++ if (eth_type_vlan(skb->protocol)) ++ word1 |= IPQESS_TPD_VLAN_TAGGED; ++ ++ if (skb->protocol == htons(ETH_P_PPP_SES)) ++ word1 |= IPQESS_TPD_PPPOE_EN; ++ ++ len = skb_headlen(skb); ++ ++ first_desc = ipqess_tx_desc_next(tx_ring); ++ desc = first_desc; ++ if (lso_word1 & IPQESS_TPD_LSO_V2_EN) { ++ desc->addr = cpu_to_le32(skb->len); ++ desc->word1 = cpu_to_le32(word1 | lso_word1); ++ desc->svlan_tag = cpu_to_le16(svlan_tag); ++ desc->word3 = cpu_to_le32(word3); ++ desc = ipqess_tx_desc_next(tx_ring); ++ } ++ ++ buf = ipqess_get_tx_buffer(tx_ring, desc); ++ buf->length = len; ++ buf->dma = dma_map_single(&pdev->dev, skb->data, len, DMA_TO_DEVICE); ++ ++ if (dma_mapping_error(&pdev->dev, buf->dma)) ++ goto dma_error; ++ ++ desc->addr = cpu_to_le32(buf->dma); ++ desc->len = cpu_to_le16(len); ++ ++ buf->flags |= IPQESS_DESC_SINGLE; ++ desc->word1 = cpu_to_le32(word1 | lso_word1); ++ desc->svlan_tag = cpu_to_le16(svlan_tag); ++ desc->word3 = cpu_to_le32(word3); ++ ++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ++ skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; ++ ++ len = skb_frag_size(frag); ++ desc = ipqess_tx_desc_next(tx_ring); ++ buf = ipqess_get_tx_buffer(tx_ring, desc); ++ buf->length = len; ++ buf->flags |= IPQESS_DESC_PAGE; ++ buf->dma = skb_frag_dma_map(&pdev->dev, frag, 0, len, ++ DMA_TO_DEVICE); ++ ++ if (dma_mapping_error(&pdev->dev, buf->dma)) ++ goto dma_error; ++ ++ desc->addr = cpu_to_le32(buf->dma); ++ desc->len = cpu_to_le16(len); ++ desc->svlan_tag = cpu_to_le16(svlan_tag); ++ desc->word1 = cpu_to_le32(word1 | lso_word1); ++ desc->word3 = cpu_to_le32(word3); ++ } ++ desc->word1 |= cpu_to_le32(1 << IPQESS_TPD_EOP_SHIFT); ++ buf->skb = skb; ++ buf->flags |= IPQESS_DESC_LAST; ++ ++ return 0; ++ ++dma_error: ++ ipqess_rollback_tx(tx_ring->ess, first_desc, tx_ring->ring_id); ++ dev_err(&pdev->dev, "TX DMA map failed\n"); ++ ++vlan_tag_error: ++ return -ENOMEM; ++} ++ ++static void ipqess_kick_tx(struct ipqess_tx_ring *tx_ring) ++{ ++ /* Ensure that all TPDs has been written completely */ ++ dma_wmb(); ++ ++ /* update software producer index */ ++ ipqess_w32(tx_ring->ess, IPQESS_REG_TPD_IDX_Q(tx_ring->idx), ++ tx_ring->head); ++} ++ ++static netdev_tx_t ipqess_xmit(struct sk_buff *skb, struct net_device *netdev) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ struct ipqess_tx_ring *tx_ring; ++ int avail; ++ int tx_num; ++ int ret; ++ ++ tx_ring = &ess->tx_ring[skb_get_queue_mapping(skb)]; ++ tx_num = ipqess_cal_txd_req(skb); ++ avail = ipqess_tx_desc_available(tx_ring); ++ if (avail < tx_num) { ++ netdev_dbg(netdev, ++ "stopping tx queue %d, avail=%d req=%d im=%x\n", ++ tx_ring->idx, avail, tx_num, ++ ipqess_r32(tx_ring->ess, ++ IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx))); ++ netif_tx_stop_queue(tx_ring->nq); ++ ipqess_w32(tx_ring->ess, IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), 0x1); ++ ipqess_kick_tx(tx_ring); ++ return NETDEV_TX_BUSY; ++ } ++ ++ ret = ipqess_tx_map_and_fill(tx_ring, skb); ++ if (ret) { ++ dev_kfree_skb_any(skb); ++ ess->stats.tx_errors++; ++ goto err_out; ++ } ++ ++ ess->stats.tx_packets++; ++ ess->stats.tx_bytes += skb->len; ++ netdev_tx_sent_queue(tx_ring->nq, skb->len); ++ ++ if (!netdev_xmit_more() || netif_xmit_stopped(tx_ring->nq)) ++ ipqess_kick_tx(tx_ring); ++ ++err_out: ++ return NETDEV_TX_OK; ++} ++ ++static int ipqess_set_mac_address(struct net_device *netdev, void *p) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ const char *macaddr = netdev->dev_addr; ++ int ret = eth_mac_addr(netdev, p); ++ ++ if (ret) ++ return ret; ++ ++ ipqess_w32(ess, IPQESS_REG_MAC_CTRL1, (macaddr[0] << 8) | macaddr[1]); ++ ipqess_w32(ess, IPQESS_REG_MAC_CTRL0, ++ (macaddr[2] << 24) | (macaddr[3] << 16) | (macaddr[4] << 8) | ++ macaddr[5]); ++ ++ return 0; ++} ++ ++static void ipqess_tx_timeout(struct net_device *netdev, unsigned int txq_id) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ struct ipqess_tx_ring *tr = &ess->tx_ring[txq_id]; ++ ++ netdev_warn(netdev, "TX timeout on queue %d\n", tr->idx); ++} ++ ++static const struct net_device_ops ipqess_axi_netdev_ops = { ++ .ndo_init = ipqess_init, ++ .ndo_uninit = ipqess_uninit, ++ .ndo_open = ipqess_open, ++ .ndo_stop = ipqess_stop, ++ .ndo_do_ioctl = ipqess_do_ioctl, ++ .ndo_start_xmit = ipqess_xmit, ++ .ndo_get_stats = ipqess_get_stats, ++ .ndo_set_mac_address = ipqess_set_mac_address, ++ .ndo_tx_timeout = ipqess_tx_timeout, ++}; ++ ++static void ipqess_hw_stop(struct ipqess *ess) ++{ ++ int i; ++ ++ /* disable all RX queue IRQs */ ++ for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) ++ ipqess_w32(ess, IPQESS_REG_RX_INT_MASK_Q(i), 0); ++ ++ /* disable all TX queue IRQs */ ++ for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) ++ ipqess_w32(ess, IPQESS_REG_TX_INT_MASK_Q(i), 0); ++ ++ /* disable all other IRQs */ ++ ipqess_w32(ess, IPQESS_REG_MISC_IMR, 0); ++ ipqess_w32(ess, IPQESS_REG_WOL_IMR, 0); ++ ++ /* clear the IRQ status registers */ ++ ipqess_w32(ess, IPQESS_REG_RX_ISR, 0xff); ++ ipqess_w32(ess, IPQESS_REG_TX_ISR, 0xffff); ++ ipqess_w32(ess, IPQESS_REG_MISC_ISR, 0x1fff); ++ ipqess_w32(ess, IPQESS_REG_WOL_ISR, 0x1); ++ ipqess_w32(ess, IPQESS_REG_WOL_CTRL, 0); ++ ++ /* disable RX and TX queues */ ++ ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, 0, IPQESS_REG_RXQ_CTRL); ++ ipqess_m32(ess, IPQESS_TXQ_CTRL_TXQ_EN, 0, IPQESS_REG_TXQ_CTRL); ++} ++ ++static int ipqess_hw_init(struct ipqess *ess) ++{ ++ int i, err; ++ u32 tmp; ++ ++ ipqess_hw_stop(ess); ++ ++ ipqess_m32(ess, BIT(IPQESS_INTR_SW_IDX_W_TYP_SHIFT), ++ IPQESS_INTR_SW_IDX_W_TYPE << IPQESS_INTR_SW_IDX_W_TYP_SHIFT, ++ IPQESS_REG_INTR_CTRL); ++ ++ /* enable IRQ delay slot */ ++ ipqess_w32(ess, IPQESS_REG_IRQ_MODRT_TIMER_INIT, ++ (IPQESS_TX_IMT << IPQESS_IRQ_MODRT_TX_TIMER_SHIFT) | ++ (IPQESS_RX_IMT << IPQESS_IRQ_MODRT_RX_TIMER_SHIFT)); ++ ++ /* Set Customer and Service VLAN TPIDs */ ++ ipqess_w32(ess, IPQESS_REG_VLAN_CFG, ++ (ETH_P_8021Q << IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT) | ++ (ETH_P_8021AD << IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT)); ++ ++ /* Configure the TX Queue bursting */ ++ ipqess_w32(ess, IPQESS_REG_TXQ_CTRL, ++ (IPQESS_TPD_BURST << IPQESS_TXQ_NUM_TPD_BURST_SHIFT) | ++ (IPQESS_TXF_BURST << IPQESS_TXQ_TXF_BURST_NUM_SHIFT) | ++ IPQESS_TXQ_CTRL_TPD_BURST_EN); ++ ++ /* Set RSS type */ ++ ipqess_w32(ess, IPQESS_REG_RSS_TYPE, ++ IPQESS_RSS_TYPE_IPV4TCP | IPQESS_RSS_TYPE_IPV6_TCP | ++ IPQESS_RSS_TYPE_IPV4_UDP | IPQESS_RSS_TYPE_IPV6UDP | ++ IPQESS_RSS_TYPE_IPV4 | IPQESS_RSS_TYPE_IPV6); ++ ++ /* Set RFD ring burst and threshold */ ++ ipqess_w32(ess, IPQESS_REG_RX_DESC1, ++ (IPQESS_RFD_BURST << IPQESS_RXQ_RFD_BURST_NUM_SHIFT) | ++ (IPQESS_RFD_THR << IPQESS_RXQ_RFD_PF_THRESH_SHIFT) | ++ (IPQESS_RFD_LTHR << IPQESS_RXQ_RFD_LOW_THRESH_SHIFT)); ++ ++ /* Set Rx FIFO ++ * - threshold to start to DMA data to host ++ */ ++ ipqess_w32(ess, IPQESS_REG_RXQ_CTRL, ++ IPQESS_FIFO_THRESH_128_BYTE | IPQESS_RXQ_CTRL_RMV_VLAN); ++ ++ err = ipqess_rx_ring_alloc(ess); ++ if (err) ++ return err; ++ ++ err = ipqess_tx_ring_alloc(ess); ++ if (err) ++ goto err_rx_ring_free; ++ ++ /* Load all of ring base addresses above into the dma engine */ ++ ipqess_m32(ess, 0, BIT(IPQESS_LOAD_PTR_SHIFT), IPQESS_REG_TX_SRAM_PART); ++ ++ /* Disable TX FIFO low watermark and high watermark */ ++ ipqess_w32(ess, IPQESS_REG_TXF_WATER_MARK, 0); ++ ++ /* Configure RSS indirection table. ++ * 128 hash will be configured in the following ++ * pattern: hash{0,1,2,3} = {Q0,Q2,Q4,Q6} respectively ++ * and so on ++ */ ++ for (i = 0; i < IPQESS_NUM_IDT; i++) ++ ipqess_w32(ess, IPQESS_REG_RSS_IDT(i), IPQESS_RSS_IDT_VALUE); ++ ++ /* Configure load balance mapping table. ++ * 4 table entry will be configured according to the ++ * following pattern: load_balance{0,1,2,3} = {Q0,Q1,Q3,Q4} ++ * respectively. ++ */ ++ ipqess_w32(ess, IPQESS_REG_LB_RING, IPQESS_LB_REG_VALUE); ++ ++ /* Configure Virtual queue for Tx rings */ ++ ipqess_w32(ess, IPQESS_REG_VQ_CTRL0, IPQESS_VQ_REG_VALUE); ++ ipqess_w32(ess, IPQESS_REG_VQ_CTRL1, IPQESS_VQ_REG_VALUE); ++ ++ /* Configure Max AXI Burst write size to 128 bytes*/ ++ ipqess_w32(ess, IPQESS_REG_AXIW_CTRL_MAXWRSIZE, ++ IPQESS_AXIW_MAXWRSIZE_VALUE); ++ ++ /* Enable TX queues */ ++ ipqess_m32(ess, 0, IPQESS_TXQ_CTRL_TXQ_EN, IPQESS_REG_TXQ_CTRL); ++ ++ /* Enable RX queues */ ++ tmp = 0; ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) ++ tmp |= IPQESS_RXQ_CTRL_EN(ess->rx_ring[i].idx); ++ ++ ipqess_m32(ess, IPQESS_RXQ_CTRL_EN_MASK, tmp, IPQESS_REG_RXQ_CTRL); ++ ++ return 0; ++ ++err_rx_ring_free: ++ ++ ipqess_rx_ring_free(ess); ++ return err; ++} ++ ++static void ipqess_mac_config(struct phylink_config *config, unsigned int mode, ++ const struct phylink_link_state *state) ++{ ++ /* Nothing to do, use fixed Internal mode */ ++} ++ ++static void ipqess_mac_link_down(struct phylink_config *config, ++ unsigned int mode, ++ phy_interface_t interface) ++{ ++ /* Nothing to do, use fixed Internal mode */ ++} ++ ++static void ipqess_mac_link_up(struct phylink_config *config, ++ struct phy_device *phy, unsigned int mode, ++ phy_interface_t interface, ++ int speed, int duplex, ++ bool tx_pause, bool rx_pause) ++{ ++ /* Nothing to do, use fixed Internal mode */ ++} ++ ++static struct phylink_mac_ops ipqess_phylink_mac_ops = { ++ .validate = phylink_generic_validate, ++ .mac_config = ipqess_mac_config, ++ .mac_link_up = ipqess_mac_link_up, ++ .mac_link_down = ipqess_mac_link_down, ++}; ++ ++static void ipqess_reset(struct ipqess *ess) ++{ ++ reset_control_assert(ess->ess_rst); ++ ++ mdelay(10); ++ ++ reset_control_deassert(ess->ess_rst); ++ ++ /* Waiting for all inner tables to be flushed and reinitialized. ++ * This takes between 5 and 10 ms ++ */ ++ ++ mdelay(10); ++} ++ ++static int ipqess_axi_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct net_device *netdev; ++ phy_interface_t phy_mode; ++ struct ipqess *ess; ++ int i, err = 0; ++ ++ netdev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(*ess), ++ IPQESS_NETDEV_QUEUES, ++ IPQESS_NETDEV_QUEUES); ++ if (!netdev) ++ return -ENOMEM; ++ ++ ess = netdev_priv(netdev); ++ ess->netdev = netdev; ++ ess->pdev = pdev; ++ spin_lock_init(&ess->stats_lock); ++ SET_NETDEV_DEV(netdev, &pdev->dev); ++ platform_set_drvdata(pdev, netdev); ++ ++ ess->hw_addr = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); ++ if (IS_ERR(ess->hw_addr)) ++ return PTR_ERR(ess->hw_addr); ++ ++ err = of_get_phy_mode(np, &phy_mode); ++ if (err) { ++ dev_err(&pdev->dev, "incorrect phy-mode\n"); ++ return err; ++ } ++ ++ ess->ess_clk = devm_clk_get(&pdev->dev, NULL); ++ if (!IS_ERR(ess->ess_clk)) ++ clk_prepare_enable(ess->ess_clk); ++ ++ ess->ess_rst = devm_reset_control_get(&pdev->dev, NULL); ++ if (IS_ERR(ess->ess_rst)) ++ goto err_clk; ++ ++ ipqess_reset(ess); ++ ++ ess->phylink_config.dev = &netdev->dev; ++ ess->phylink_config.type = PHYLINK_NETDEV; ++ ess->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | ++ MAC_100 | MAC_1000FD; ++ ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ ess->phylink_config.supported_interfaces); ++ ++ ess->phylink = phylink_create(&ess->phylink_config, ++ of_fwnode_handle(np), phy_mode, ++ &ipqess_phylink_mac_ops); ++ if (IS_ERR(ess->phylink)) { ++ err = PTR_ERR(ess->phylink); ++ goto err_clk; ++ } ++ ++ for (i = 0; i < IPQESS_MAX_TX_QUEUE; i++) { ++ ess->tx_irq[i] = platform_get_irq(pdev, i); ++ scnprintf(ess->tx_irq_names[i], sizeof(ess->tx_irq_names[i]), ++ "%s:txq%d", pdev->name, i); ++ } ++ ++ for (i = 0; i < IPQESS_MAX_RX_QUEUE; i++) { ++ ess->rx_irq[i] = platform_get_irq(pdev, i + IPQESS_MAX_TX_QUEUE); ++ scnprintf(ess->rx_irq_names[i], sizeof(ess->rx_irq_names[i]), ++ "%s:rxq%d", pdev->name, i); ++ } ++ ++ netdev->netdev_ops = &ipqess_axi_netdev_ops; ++ netdev->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM | ++ NETIF_F_HW_VLAN_CTAG_RX | ++ NETIF_F_HW_VLAN_CTAG_TX | ++ NETIF_F_TSO | NETIF_F_GRO | NETIF_F_SG; ++ /* feature change is not supported yet */ ++ netdev->hw_features = 0; ++ netdev->vlan_features = NETIF_F_HW_CSUM | NETIF_F_SG | NETIF_F_RXCSUM | ++ NETIF_F_TSO | ++ NETIF_F_GRO; ++ netdev->watchdog_timeo = 5 * HZ; ++ netdev->base_addr = (u32)ess->hw_addr; ++ netdev->max_mtu = 9000; ++ netdev->gso_max_segs = IPQESS_TX_RING_SIZE / 2; ++ ++ ipqess_set_ethtool_ops(netdev); ++ ++ err = ipqess_hw_init(ess); ++ if (err) ++ goto err_phylink; ++ ++ for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ netif_napi_add_tx(netdev, &ess->tx_ring[i].napi_tx, ipqess_tx_napi); ++ netif_napi_add(netdev, &ess->rx_ring[i].napi_rx, ipqess_rx_napi); ++ } ++ ++ err = register_netdev(netdev); ++ if (err) ++ goto err_hw_stop; ++ ++ return 0; ++ ++err_hw_stop: ++ ipqess_hw_stop(ess); ++ ++ ipqess_tx_ring_free(ess); ++ ipqess_rx_ring_free(ess); ++err_phylink: ++ phylink_destroy(ess->phylink); ++ ++err_clk: ++ clk_disable_unprepare(ess->ess_clk); ++ ++ return err; ++} ++ ++static int ipqess_axi_remove(struct platform_device *pdev) ++{ ++ const struct net_device *netdev = platform_get_drvdata(pdev); ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ unregister_netdev(ess->netdev); ++ ipqess_hw_stop(ess); ++ ++ ipqess_tx_ring_free(ess); ++ ipqess_rx_ring_free(ess); ++ ++ phylink_destroy(ess->phylink); ++ clk_disable_unprepare(ess->ess_clk); ++ ++ return 0; ++} ++ ++static const struct of_device_id ipqess_of_mtable[] = { ++ {.compatible = "qcom,ipq4019-ess-edma" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ipqess_of_mtable); ++ ++static struct platform_driver ipqess_axi_driver = { ++ .driver = { ++ .name = "ipqess-edma", ++ .of_match_table = ipqess_of_mtable, ++ }, ++ .probe = ipqess_axi_probe, ++ .remove = ipqess_axi_remove, ++}; ++ ++module_platform_driver(ipqess_axi_driver); ++ ++MODULE_AUTHOR("Qualcomm Atheros Inc"); ++MODULE_AUTHOR("John Crispin "); ++MODULE_AUTHOR("Christian Lamparter "); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_AUTHOR("Maxime Chevallier "); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.h +@@ -0,0 +1,518 @@ ++/* SPDX-License-Identifier: (GPL-2.0 OR ISC) */ ++/* Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2017 - 2018, John Crispin ++ * Copyright (c) 2018 - 2019, Christian Lamparter ++ * Copyright (c) 2020 - 2021, Gabor Juhos ++ * Copyright (c) 2021 - 2022, Maxime Chevallier ++ * ++ */ ++ ++#ifndef _IPQESS_H_ ++#define _IPQESS_H_ ++ ++#define IPQESS_NETDEV_QUEUES 4 ++ ++#define IPQESS_TPD_EOP_SHIFT 31 ++ ++#define IPQESS_PORT_ID_SHIFT 12 ++#define IPQESS_PORT_ID_MASK 0x7 ++ ++/* tpd word 3 bit 18-28 */ ++#define IPQESS_TPD_PORT_BITMAP_SHIFT 18 ++ ++#define IPQESS_TPD_FROM_CPU_SHIFT 25 ++ ++#define IPQESS_RX_RING_SIZE 128 ++#define IPQESS_RX_HEAD_BUFF_SIZE 1540 ++#define IPQESS_TX_RING_SIZE 128 ++#define IPQESS_MAX_RX_QUEUE 8 ++#define IPQESS_MAX_TX_QUEUE 16 ++ ++/* Configurations */ ++#define IPQESS_INTR_CLEAR_TYPE 0 ++#define IPQESS_INTR_SW_IDX_W_TYPE 0 ++#define IPQESS_FIFO_THRESH_TYPE 0 ++#define IPQESS_RSS_TYPE 0 ++#define IPQESS_RX_IMT 0x0020 ++#define IPQESS_TX_IMT 0x0050 ++#define IPQESS_TPD_BURST 5 ++#define IPQESS_TXF_BURST 0x100 ++#define IPQESS_RFD_BURST 8 ++#define IPQESS_RFD_THR 16 ++#define IPQESS_RFD_LTHR 0 ++ ++/* Flags used in transmit direction */ ++#define IPQESS_DESC_LAST 0x1 ++#define IPQESS_DESC_SINGLE 0x2 ++#define IPQESS_DESC_PAGE 0x4 ++ ++struct ipqess_statistics { ++ u32 tx_q0_pkt; ++ u32 tx_q1_pkt; ++ u32 tx_q2_pkt; ++ u32 tx_q3_pkt; ++ u32 tx_q4_pkt; ++ u32 tx_q5_pkt; ++ u32 tx_q6_pkt; ++ u32 tx_q7_pkt; ++ u32 tx_q8_pkt; ++ u32 tx_q9_pkt; ++ u32 tx_q10_pkt; ++ u32 tx_q11_pkt; ++ u32 tx_q12_pkt; ++ u32 tx_q13_pkt; ++ u32 tx_q14_pkt; ++ u32 tx_q15_pkt; ++ u32 tx_q0_byte; ++ u32 tx_q1_byte; ++ u32 tx_q2_byte; ++ u32 tx_q3_byte; ++ u32 tx_q4_byte; ++ u32 tx_q5_byte; ++ u32 tx_q6_byte; ++ u32 tx_q7_byte; ++ u32 tx_q8_byte; ++ u32 tx_q9_byte; ++ u32 tx_q10_byte; ++ u32 tx_q11_byte; ++ u32 tx_q12_byte; ++ u32 tx_q13_byte; ++ u32 tx_q14_byte; ++ u32 tx_q15_byte; ++ u32 rx_q0_pkt; ++ u32 rx_q1_pkt; ++ u32 rx_q2_pkt; ++ u32 rx_q3_pkt; ++ u32 rx_q4_pkt; ++ u32 rx_q5_pkt; ++ u32 rx_q6_pkt; ++ u32 rx_q7_pkt; ++ u32 rx_q0_byte; ++ u32 rx_q1_byte; ++ u32 rx_q2_byte; ++ u32 rx_q3_byte; ++ u32 rx_q4_byte; ++ u32 rx_q5_byte; ++ u32 rx_q6_byte; ++ u32 rx_q7_byte; ++ u32 tx_desc_error; ++}; ++ ++struct ipqess_tx_desc { ++ __le16 len; ++ __le16 svlan_tag; ++ __le32 word1; ++ __le32 addr; ++ __le32 word3; ++} __aligned(16) __packed; ++ ++struct ipqess_rx_desc { ++ __le16 rrd0; ++ __le16 rrd1; ++ __le16 rrd2; ++ __le16 rrd3; ++ __le16 rrd4; ++ __le16 rrd5; ++ __le16 rrd6; ++ __le16 rrd7; ++} __aligned(16) __packed; ++ ++struct ipqess_buf { ++ struct sk_buff *skb; ++ dma_addr_t dma; ++ u32 flags; ++ u16 length; ++}; ++ ++struct ipqess_tx_ring { ++ struct napi_struct napi_tx; ++ u32 idx; ++ int ring_id; ++ struct ipqess *ess; ++ struct netdev_queue *nq; ++ struct ipqess_tx_desc *hw_desc; ++ struct ipqess_buf *buf; ++ dma_addr_t dma; ++ u16 count; ++ u16 head; ++ u16 tail; ++}; ++ ++struct ipqess_rx_ring { ++ struct napi_struct napi_rx; ++ u32 idx; ++ int ring_id; ++ struct ipqess *ess; ++ struct device *ppdev; ++ struct ipqess_rx_desc **hw_desc; ++ struct ipqess_buf *buf; ++ dma_addr_t dma; ++ u16 head; ++ u16 tail; ++ atomic_t refill_count; ++}; ++ ++struct ipqess_rx_ring_refill { ++ struct ipqess_rx_ring *rx_ring; ++ struct work_struct refill_work; ++}; ++ ++#define IPQESS_IRQ_NAME_LEN 32 ++ ++struct ipqess { ++ struct net_device *netdev; ++ void __iomem *hw_addr; ++ ++ struct clk *ess_clk; ++ struct reset_control *ess_rst; ++ ++ struct ipqess_rx_ring rx_ring[IPQESS_NETDEV_QUEUES]; ++ ++ struct platform_device *pdev; ++ struct phylink *phylink; ++ struct phylink_config phylink_config; ++ struct ipqess_tx_ring tx_ring[IPQESS_NETDEV_QUEUES]; ++ ++ struct ipqess_statistics ipqess_stats; ++ ++ /* Protects stats */ ++ spinlock_t stats_lock; ++ struct net_device_stats stats; ++ ++ struct ipqess_rx_ring_refill rx_refill[IPQESS_NETDEV_QUEUES]; ++ u32 tx_irq[IPQESS_MAX_TX_QUEUE]; ++ char tx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN]; ++ u32 rx_irq[IPQESS_MAX_RX_QUEUE]; ++ char rx_irq_names[IPQESS_MAX_TX_QUEUE][IPQESS_IRQ_NAME_LEN]; ++}; ++ ++void ipqess_set_ethtool_ops(struct net_device *netdev); ++void ipqess_update_hw_stats(struct ipqess *ess); ++ ++/* register definition */ ++#define IPQESS_REG_MAS_CTRL 0x0 ++#define IPQESS_REG_TIMEOUT_CTRL 0x004 ++#define IPQESS_REG_DBG0 0x008 ++#define IPQESS_REG_DBG1 0x00C ++#define IPQESS_REG_SW_CTRL0 0x100 ++#define IPQESS_REG_SW_CTRL1 0x104 ++ ++/* Interrupt Status Register */ ++#define IPQESS_REG_RX_ISR 0x200 ++#define IPQESS_REG_TX_ISR 0x208 ++#define IPQESS_REG_MISC_ISR 0x210 ++#define IPQESS_REG_WOL_ISR 0x218 ++ ++#define IPQESS_MISC_ISR_RX_URG_Q(x) (1 << (x)) ++ ++#define IPQESS_MISC_ISR_AXIR_TIMEOUT 0x00000100 ++#define IPQESS_MISC_ISR_AXIR_ERR 0x00000200 ++#define IPQESS_MISC_ISR_TXF_DEAD 0x00000400 ++#define IPQESS_MISC_ISR_AXIW_ERR 0x00000800 ++#define IPQESS_MISC_ISR_AXIW_TIMEOUT 0x00001000 ++ ++#define IPQESS_WOL_ISR 0x00000001 ++ ++/* Interrupt Mask Register */ ++#define IPQESS_REG_MISC_IMR 0x214 ++#define IPQESS_REG_WOL_IMR 0x218 ++ ++#define IPQESS_RX_IMR_NORMAL_MASK 0x1 ++#define IPQESS_TX_IMR_NORMAL_MASK 0x1 ++#define IPQESS_MISC_IMR_NORMAL_MASK 0x80001FFF ++#define IPQESS_WOL_IMR_NORMAL_MASK 0x1 ++ ++/* Edma receive consumer index */ ++#define IPQESS_REG_RX_SW_CONS_IDX_Q(x) (0x220 + ((x) << 2)) /* x is the queue id */ ++ ++/* Edma transmit consumer index */ ++#define IPQESS_REG_TX_SW_CONS_IDX_Q(x) (0x240 + ((x) << 2)) /* x is the queue id */ ++ ++/* IRQ Moderator Initial Timer Register */ ++#define IPQESS_REG_IRQ_MODRT_TIMER_INIT 0x280 ++#define IPQESS_IRQ_MODRT_TIMER_MASK 0xFFFF ++#define IPQESS_IRQ_MODRT_RX_TIMER_SHIFT 0 ++#define IPQESS_IRQ_MODRT_TX_TIMER_SHIFT 16 ++ ++/* Interrupt Control Register */ ++#define IPQESS_REG_INTR_CTRL 0x284 ++#define IPQESS_INTR_CLR_TYP_SHIFT 0 ++#define IPQESS_INTR_SW_IDX_W_TYP_SHIFT 1 ++#define IPQESS_INTR_CLEAR_TYPE_W1 0 ++#define IPQESS_INTR_CLEAR_TYPE_R 1 ++ ++/* RX Interrupt Mask Register */ ++#define IPQESS_REG_RX_INT_MASK_Q(x) (0x300 + ((x) << 2)) /* x = queue id */ ++ ++/* TX Interrupt mask register */ ++#define IPQESS_REG_TX_INT_MASK_Q(x) (0x340 + ((x) << 2)) /* x = queue id */ ++ ++/* Load Ptr Register ++ * Software sets this bit after the initialization of the head and tail ++ */ ++#define IPQESS_REG_TX_SRAM_PART 0x400 ++#define IPQESS_LOAD_PTR_SHIFT 16 ++ ++/* TXQ Control Register */ ++#define IPQESS_REG_TXQ_CTRL 0x404 ++#define IPQESS_TXQ_CTRL_IP_OPTION_EN 0x10 ++#define IPQESS_TXQ_CTRL_TXQ_EN 0x20 ++#define IPQESS_TXQ_CTRL_ENH_MODE 0x40 ++#define IPQESS_TXQ_CTRL_LS_8023_EN 0x80 ++#define IPQESS_TXQ_CTRL_TPD_BURST_EN 0x100 ++#define IPQESS_TXQ_CTRL_LSO_BREAK_EN 0x200 ++#define IPQESS_TXQ_NUM_TPD_BURST_MASK 0xF ++#define IPQESS_TXQ_TXF_BURST_NUM_MASK 0xFFFF ++#define IPQESS_TXQ_NUM_TPD_BURST_SHIFT 0 ++#define IPQESS_TXQ_TXF_BURST_NUM_SHIFT 16 ++ ++#define IPQESS_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */ ++#define IPQESS_TXF_WATER_MARK_MASK 0x0FFF ++#define IPQESS_TXF_LOW_WATER_MARK_SHIFT 0 ++#define IPQESS_TXF_HIGH_WATER_MARK_SHIFT 16 ++#define IPQESS_TXQ_CTRL_BURST_MODE_EN 0x80000000 ++ ++/* WRR Control Register */ ++#define IPQESS_REG_WRR_CTRL_Q0_Q3 0x40c ++#define IPQESS_REG_WRR_CTRL_Q4_Q7 0x410 ++#define IPQESS_REG_WRR_CTRL_Q8_Q11 0x414 ++#define IPQESS_REG_WRR_CTRL_Q12_Q15 0x418 ++ ++/* Weight round robin(WRR), it takes queue as input, and computes ++ * starting bits where we need to write the weight for a particular ++ * queue ++ */ ++#define IPQESS_WRR_SHIFT(x) (((x) * 5) % 20) ++ ++/* Tx Descriptor Control Register */ ++#define IPQESS_REG_TPD_RING_SIZE 0x41C ++#define IPQESS_TPD_RING_SIZE_SHIFT 0 ++#define IPQESS_TPD_RING_SIZE_MASK 0xFFFF ++ ++/* Transmit descriptor base address */ ++#define IPQESS_REG_TPD_BASE_ADDR_Q(x) (0x420 + ((x) << 2)) /* x = queue id */ ++ ++/* TPD Index Register */ ++#define IPQESS_REG_TPD_IDX_Q(x) (0x460 + ((x) << 2)) /* x = queue id */ ++ ++#define IPQESS_TPD_PROD_IDX_BITS 0x0000FFFF ++#define IPQESS_TPD_CONS_IDX_BITS 0xFFFF0000 ++#define IPQESS_TPD_PROD_IDX_MASK 0xFFFF ++#define IPQESS_TPD_CONS_IDX_MASK 0xFFFF ++#define IPQESS_TPD_PROD_IDX_SHIFT 0 ++#define IPQESS_TPD_CONS_IDX_SHIFT 16 ++ ++/* TX Virtual Queue Mapping Control Register */ ++#define IPQESS_REG_VQ_CTRL0 0x4A0 ++#define IPQESS_REG_VQ_CTRL1 0x4A4 ++ ++/* Virtual QID shift, it takes queue as input, and computes ++ * Virtual QID position in virtual qid control register ++ */ ++#define IPQESS_VQ_ID_SHIFT(i) (((i) * 3) % 24) ++ ++/* Virtual Queue Default Value */ ++#define IPQESS_VQ_REG_VALUE 0x240240 ++ ++/* Tx side Port Interface Control Register */ ++#define IPQESS_REG_PORT_CTRL 0x4A8 ++#define IPQESS_PAD_EN_SHIFT 15 ++ ++/* Tx side VLAN Configuration Register */ ++#define IPQESS_REG_VLAN_CFG 0x4AC ++ ++#define IPQESS_VLAN_CFG_SVLAN_TPID_SHIFT 0 ++#define IPQESS_VLAN_CFG_SVLAN_TPID_MASK 0xffff ++#define IPQESS_VLAN_CFG_CVLAN_TPID_SHIFT 16 ++#define IPQESS_VLAN_CFG_CVLAN_TPID_MASK 0xffff ++ ++#define IPQESS_TX_CVLAN 16 ++#define IPQESS_TX_INS_CVLAN 17 ++#define IPQESS_TX_CVLAN_TAG_SHIFT 0 ++ ++#define IPQESS_TX_SVLAN 14 ++#define IPQESS_TX_INS_SVLAN 15 ++#define IPQESS_TX_SVLAN_TAG_SHIFT 16 ++ ++/* Tx Queue Packet Statistic Register */ ++#define IPQESS_REG_TX_STAT_PKT_Q(x) (0x700 + ((x) << 3)) /* x = queue id */ ++ ++#define IPQESS_TX_STAT_PKT_MASK 0xFFFFFF ++ ++/* Tx Queue Byte Statistic Register */ ++#define IPQESS_REG_TX_STAT_BYTE_Q(x) (0x704 + ((x) << 3)) /* x = queue id */ ++ ++/* Load Balance Based Ring Offset Register */ ++#define IPQESS_REG_LB_RING 0x800 ++#define IPQESS_LB_RING_ENTRY_MASK 0xff ++#define IPQESS_LB_RING_ID_MASK 0x7 ++#define IPQESS_LB_RING_PROFILE_ID_MASK 0x3 ++#define IPQESS_LB_RING_ENTRY_BIT_OFFSET 8 ++#define IPQESS_LB_RING_ID_OFFSET 0 ++#define IPQESS_LB_RING_PROFILE_ID_OFFSET 3 ++#define IPQESS_LB_REG_VALUE 0x6040200 ++ ++/* Load Balance Priority Mapping Register */ ++#define IPQESS_REG_LB_PRI_START 0x804 ++#define IPQESS_REG_LB_PRI_END 0x810 ++#define IPQESS_LB_PRI_REG_INC 4 ++#define IPQESS_LB_PRI_ENTRY_BIT_OFFSET 4 ++#define IPQESS_LB_PRI_ENTRY_MASK 0xf ++ ++/* RSS Priority Mapping Register */ ++#define IPQESS_REG_RSS_PRI 0x820 ++#define IPQESS_RSS_PRI_ENTRY_MASK 0xf ++#define IPQESS_RSS_RING_ID_MASK 0x7 ++#define IPQESS_RSS_PRI_ENTRY_BIT_OFFSET 4 ++ ++/* RSS Indirection Register */ ++#define IPQESS_REG_RSS_IDT(x) (0x840 + ((x) << 2)) /* x = No. of indirection table */ ++#define IPQESS_NUM_IDT 16 ++#define IPQESS_RSS_IDT_VALUE 0x64206420 ++ ++/* Default RSS Ring Register */ ++#define IPQESS_REG_DEF_RSS 0x890 ++#define IPQESS_DEF_RSS_MASK 0x7 ++ ++/* RSS Hash Function Type Register */ ++#define IPQESS_REG_RSS_TYPE 0x894 ++#define IPQESS_RSS_TYPE_NONE 0x01 ++#define IPQESS_RSS_TYPE_IPV4TCP 0x02 ++#define IPQESS_RSS_TYPE_IPV6_TCP 0x04 ++#define IPQESS_RSS_TYPE_IPV4_UDP 0x08 ++#define IPQESS_RSS_TYPE_IPV6UDP 0x10 ++#define IPQESS_RSS_TYPE_IPV4 0x20 ++#define IPQESS_RSS_TYPE_IPV6 0x40 ++#define IPQESS_RSS_HASH_MODE_MASK 0x7f ++ ++#define IPQESS_REG_RSS_HASH_VALUE 0x8C0 ++ ++#define IPQESS_REG_RSS_TYPE_RESULT 0x8C4 ++ ++#define IPQESS_HASH_TYPE_START 0 ++#define IPQESS_HASH_TYPE_END 5 ++#define IPQESS_HASH_TYPE_SHIFT 12 ++ ++#define IPQESS_RFS_FLOW_ENTRIES 1024 ++#define IPQESS_RFS_FLOW_ENTRIES_MASK (IPQESS_RFS_FLOW_ENTRIES - 1) ++#define IPQESS_RFS_EXPIRE_COUNT_PER_CALL 128 ++ ++/* RFD Base Address Register */ ++#define IPQESS_REG_RFD_BASE_ADDR_Q(x) (0x950 + ((x) << 2)) /* x = queue id */ ++ ++/* RFD Index Register */ ++#define IPQESS_REG_RFD_IDX_Q(x) (0x9B0 + ((x) << 2)) /* x = queue id */ ++ ++#define IPQESS_RFD_PROD_IDX_BITS 0x00000FFF ++#define IPQESS_RFD_CONS_IDX_BITS 0x0FFF0000 ++#define IPQESS_RFD_PROD_IDX_MASK 0xFFF ++#define IPQESS_RFD_CONS_IDX_MASK 0xFFF ++#define IPQESS_RFD_PROD_IDX_SHIFT 0 ++#define IPQESS_RFD_CONS_IDX_SHIFT 16 ++ ++/* Rx Descriptor Control Register */ ++#define IPQESS_REG_RX_DESC0 0xA10 ++#define IPQESS_RFD_RING_SIZE_MASK 0xFFF ++#define IPQESS_RX_BUF_SIZE_MASK 0xFFFF ++#define IPQESS_RFD_RING_SIZE_SHIFT 0 ++#define IPQESS_RX_BUF_SIZE_SHIFT 16 ++ ++#define IPQESS_REG_RX_DESC1 0xA14 ++#define IPQESS_RXQ_RFD_BURST_NUM_MASK 0x3F ++#define IPQESS_RXQ_RFD_PF_THRESH_MASK 0x1F ++#define IPQESS_RXQ_RFD_LOW_THRESH_MASK 0xFFF ++#define IPQESS_RXQ_RFD_BURST_NUM_SHIFT 0 ++#define IPQESS_RXQ_RFD_PF_THRESH_SHIFT 8 ++#define IPQESS_RXQ_RFD_LOW_THRESH_SHIFT 16 ++ ++/* RXQ Control Register */ ++#define IPQESS_REG_RXQ_CTRL 0xA18 ++#define IPQESS_FIFO_THRESH_TYPE_SHIF 0 ++#define IPQESS_FIFO_THRESH_128_BYTE 0x0 ++#define IPQESS_FIFO_THRESH_64_BYTE 0x1 ++#define IPQESS_RXQ_CTRL_RMV_VLAN 0x00000002 ++#define IPQESS_RXQ_CTRL_EN_MASK GENMASK(15, 8) ++#define IPQESS_RXQ_CTRL_EN(__qid) BIT(8 + (__qid)) ++ ++/* AXI Burst Size Config */ ++#define IPQESS_REG_AXIW_CTRL_MAXWRSIZE 0xA1C ++#define IPQESS_AXIW_MAXWRSIZE_VALUE 0x0 ++ ++/* Rx Statistics Register */ ++#define IPQESS_REG_RX_STAT_BYTE_Q(x) (0xA30 + ((x) << 2)) /* x = queue id */ ++#define IPQESS_REG_RX_STAT_PKT_Q(x) (0xA50 + ((x) << 2)) /* x = queue id */ ++ ++/* WoL Pattern Length Register */ ++#define IPQESS_REG_WOL_PATTERN_LEN0 0xC00 ++#define IPQESS_WOL_PT_LEN_MASK 0xFF ++#define IPQESS_WOL_PT0_LEN_SHIFT 0 ++#define IPQESS_WOL_PT1_LEN_SHIFT 8 ++#define IPQESS_WOL_PT2_LEN_SHIFT 16 ++#define IPQESS_WOL_PT3_LEN_SHIFT 24 ++ ++#define IPQESS_REG_WOL_PATTERN_LEN1 0xC04 ++#define IPQESS_WOL_PT4_LEN_SHIFT 0 ++#define IPQESS_WOL_PT5_LEN_SHIFT 8 ++#define IPQESS_WOL_PT6_LEN_SHIFT 16 ++ ++/* WoL Control Register */ ++#define IPQESS_REG_WOL_CTRL 0xC08 ++#define IPQESS_WOL_WK_EN 0x00000001 ++#define IPQESS_WOL_MG_EN 0x00000002 ++#define IPQESS_WOL_PT0_EN 0x00000004 ++#define IPQESS_WOL_PT1_EN 0x00000008 ++#define IPQESS_WOL_PT2_EN 0x00000010 ++#define IPQESS_WOL_PT3_EN 0x00000020 ++#define IPQESS_WOL_PT4_EN 0x00000040 ++#define IPQESS_WOL_PT5_EN 0x00000080 ++#define IPQESS_WOL_PT6_EN 0x00000100 ++ ++/* MAC Control Register */ ++#define IPQESS_REG_MAC_CTRL0 0xC20 ++#define IPQESS_REG_MAC_CTRL1 0xC24 ++ ++/* WoL Pattern Register */ ++#define IPQESS_REG_WOL_PATTERN_START 0x5000 ++#define IPQESS_PATTERN_PART_REG_OFFSET 0x40 ++ ++/* TX descriptor fields */ ++#define IPQESS_TPD_HDR_SHIFT 0 ++#define IPQESS_TPD_PPPOE_EN 0x00000100 ++#define IPQESS_TPD_IP_CSUM_EN 0x00000200 ++#define IPQESS_TPD_TCP_CSUM_EN 0x0000400 ++#define IPQESS_TPD_UDP_CSUM_EN 0x00000800 ++#define IPQESS_TPD_CUSTOM_CSUM_EN 0x00000C00 ++#define IPQESS_TPD_LSO_EN 0x00001000 ++#define IPQESS_TPD_LSO_V2_EN 0x00002000 ++/* The VLAN_TAGGED bit is not used in the publicly available ++ * drivers. The definition has been stolen from the Atheros ++ * 'alx' driver (drivers/net/ethernet/atheros/alx/hw.h). It ++ * seems that it has the same meaning in regard to the EDMA ++ * hardware. ++ */ ++#define IPQESS_TPD_VLAN_TAGGED 0x00004000 ++#define IPQESS_TPD_IPV4_EN 0x00010000 ++#define IPQESS_TPD_MSS_MASK 0x1FFF ++#define IPQESS_TPD_MSS_SHIFT 18 ++#define IPQESS_TPD_CUSTOM_CSUM_SHIFT 18 ++ ++/* RRD descriptor fields */ ++#define IPQESS_RRD_NUM_RFD_MASK 0x000F ++#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF ++#define IPQESS_RRD_SRC_PORT_NUM_MASK 0x4000 ++#define IPQESS_RRD_SVLAN 0x8000 ++#define IPQESS_RRD_FLOW_COOKIE_MASK 0x07FF ++ ++#define IPQESS_RRD_PKT_SIZE_MASK 0x3FFF ++#define IPQESS_RRD_CSUM_FAIL_MASK 0xC000 ++#define IPQESS_RRD_CVLAN 0x0001 ++#define IPQESS_RRD_DESC_VALID 0x8000 ++ ++#define IPQESS_RRD_PRIORITY_SHIFT 4 ++#define IPQESS_RRD_PRIORITY_MASK 0x7 ++#define IPQESS_RRD_PORT_TYPE_SHIFT 7 ++#define IPQESS_RRD_PORT_TYPE_MASK 0x1F ++ ++#define IPQESS_RRD_PORT_ID_MASK 0x7000 ++ ++#endif +--- /dev/null ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess_ethtool.c +@@ -0,0 +1,164 @@ ++// SPDX-License-Identifier: GPL-2.0 OR ISC ++/* Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2017 - 2018, John Crispin ++ * Copyright (c) 2021 - 2022, Maxime Chevallier ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "ipqess.h" ++ ++struct ipqess_ethtool_stats { ++ u8 string[ETH_GSTRING_LEN]; ++ u32 offset; ++}; ++ ++#define IPQESS_STAT(m) offsetof(struct ipqess_statistics, m) ++#define DRVINFO_LEN 32 ++ ++static const struct ipqess_ethtool_stats ipqess_stats[] = { ++ {"tx_q0_pkt", IPQESS_STAT(tx_q0_pkt)}, ++ {"tx_q1_pkt", IPQESS_STAT(tx_q1_pkt)}, ++ {"tx_q2_pkt", IPQESS_STAT(tx_q2_pkt)}, ++ {"tx_q3_pkt", IPQESS_STAT(tx_q3_pkt)}, ++ {"tx_q4_pkt", IPQESS_STAT(tx_q4_pkt)}, ++ {"tx_q5_pkt", IPQESS_STAT(tx_q5_pkt)}, ++ {"tx_q6_pkt", IPQESS_STAT(tx_q6_pkt)}, ++ {"tx_q7_pkt", IPQESS_STAT(tx_q7_pkt)}, ++ {"tx_q8_pkt", IPQESS_STAT(tx_q8_pkt)}, ++ {"tx_q9_pkt", IPQESS_STAT(tx_q9_pkt)}, ++ {"tx_q10_pkt", IPQESS_STAT(tx_q10_pkt)}, ++ {"tx_q11_pkt", IPQESS_STAT(tx_q11_pkt)}, ++ {"tx_q12_pkt", IPQESS_STAT(tx_q12_pkt)}, ++ {"tx_q13_pkt", IPQESS_STAT(tx_q13_pkt)}, ++ {"tx_q14_pkt", IPQESS_STAT(tx_q14_pkt)}, ++ {"tx_q15_pkt", IPQESS_STAT(tx_q15_pkt)}, ++ {"tx_q0_byte", IPQESS_STAT(tx_q0_byte)}, ++ {"tx_q1_byte", IPQESS_STAT(tx_q1_byte)}, ++ {"tx_q2_byte", IPQESS_STAT(tx_q2_byte)}, ++ {"tx_q3_byte", IPQESS_STAT(tx_q3_byte)}, ++ {"tx_q4_byte", IPQESS_STAT(tx_q4_byte)}, ++ {"tx_q5_byte", IPQESS_STAT(tx_q5_byte)}, ++ {"tx_q6_byte", IPQESS_STAT(tx_q6_byte)}, ++ {"tx_q7_byte", IPQESS_STAT(tx_q7_byte)}, ++ {"tx_q8_byte", IPQESS_STAT(tx_q8_byte)}, ++ {"tx_q9_byte", IPQESS_STAT(tx_q9_byte)}, ++ {"tx_q10_byte", IPQESS_STAT(tx_q10_byte)}, ++ {"tx_q11_byte", IPQESS_STAT(tx_q11_byte)}, ++ {"tx_q12_byte", IPQESS_STAT(tx_q12_byte)}, ++ {"tx_q13_byte", IPQESS_STAT(tx_q13_byte)}, ++ {"tx_q14_byte", IPQESS_STAT(tx_q14_byte)}, ++ {"tx_q15_byte", IPQESS_STAT(tx_q15_byte)}, ++ {"rx_q0_pkt", IPQESS_STAT(rx_q0_pkt)}, ++ {"rx_q1_pkt", IPQESS_STAT(rx_q1_pkt)}, ++ {"rx_q2_pkt", IPQESS_STAT(rx_q2_pkt)}, ++ {"rx_q3_pkt", IPQESS_STAT(rx_q3_pkt)}, ++ {"rx_q4_pkt", IPQESS_STAT(rx_q4_pkt)}, ++ {"rx_q5_pkt", IPQESS_STAT(rx_q5_pkt)}, ++ {"rx_q6_pkt", IPQESS_STAT(rx_q6_pkt)}, ++ {"rx_q7_pkt", IPQESS_STAT(rx_q7_pkt)}, ++ {"rx_q0_byte", IPQESS_STAT(rx_q0_byte)}, ++ {"rx_q1_byte", IPQESS_STAT(rx_q1_byte)}, ++ {"rx_q2_byte", IPQESS_STAT(rx_q2_byte)}, ++ {"rx_q3_byte", IPQESS_STAT(rx_q3_byte)}, ++ {"rx_q4_byte", IPQESS_STAT(rx_q4_byte)}, ++ {"rx_q5_byte", IPQESS_STAT(rx_q5_byte)}, ++ {"rx_q6_byte", IPQESS_STAT(rx_q6_byte)}, ++ {"rx_q7_byte", IPQESS_STAT(rx_q7_byte)}, ++ {"tx_desc_error", IPQESS_STAT(tx_desc_error)}, ++}; ++ ++static int ipqess_get_strset_count(struct net_device *netdev, int sset) ++{ ++ switch (sset) { ++ case ETH_SS_STATS: ++ return ARRAY_SIZE(ipqess_stats); ++ default: ++ netdev_dbg(netdev, "%s: Unsupported string set", __func__); ++ return -EOPNOTSUPP; ++ } ++} ++ ++static void ipqess_get_strings(struct net_device *netdev, u32 stringset, ++ u8 *data) ++{ ++ u8 *p = data; ++ u32 i; ++ ++ switch (stringset) { ++ case ETH_SS_STATS: ++ for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++) ++ ethtool_puts(&p, ipqess_stats[i].string); ++ break; ++ } ++} ++ ++static void ipqess_get_ethtool_stats(struct net_device *netdev, ++ struct ethtool_stats *stats, ++ uint64_t *data) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ u32 *essstats = (u32 *)&ess->ipqess_stats; ++ int i; ++ ++ spin_lock(&ess->stats_lock); ++ ++ ipqess_update_hw_stats(ess); ++ ++ for (i = 0; i < ARRAY_SIZE(ipqess_stats); i++) ++ data[i] = *(u32 *)(essstats + (ipqess_stats[i].offset / sizeof(u32))); ++ ++ spin_unlock(&ess->stats_lock); ++} ++ ++static void ipqess_get_drvinfo(struct net_device *dev, ++ struct ethtool_drvinfo *info) ++{ ++ strscpy(info->driver, "qca_ipqess", DRVINFO_LEN); ++ strscpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN); ++} ++ ++static int ipqess_get_link_ksettings(struct net_device *netdev, ++ struct ethtool_link_ksettings *cmd) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ return phylink_ethtool_ksettings_get(ess->phylink, cmd); ++} ++ ++static int ipqess_set_link_ksettings(struct net_device *netdev, ++ const struct ethtool_link_ksettings *cmd) ++{ ++ struct ipqess *ess = netdev_priv(netdev); ++ ++ return phylink_ethtool_ksettings_set(ess->phylink, cmd); ++} ++ ++static void ipqess_get_ringparam(struct net_device *netdev, ++ struct ethtool_ringparam *ring, ++ struct kernel_ethtool_ringparam *kernel_ering, ++ struct netlink_ext_ack *extack) ++{ ++ ring->tx_max_pending = IPQESS_TX_RING_SIZE; ++ ring->rx_max_pending = IPQESS_RX_RING_SIZE; ++} ++ ++static const struct ethtool_ops ipqesstool_ops = { ++ .get_drvinfo = &ipqess_get_drvinfo, ++ .get_link = ðtool_op_get_link, ++ .get_link_ksettings = &ipqess_get_link_ksettings, ++ .set_link_ksettings = &ipqess_set_link_ksettings, ++ .get_strings = &ipqess_get_strings, ++ .get_sset_count = &ipqess_get_strset_count, ++ .get_ethtool_stats = &ipqess_get_ethtool_stats, ++ .get_ringparam = ipqess_get_ringparam, ++}; ++ ++void ipqess_set_ethtool_ops(struct net_device *netdev) ++{ ++ netdev->ethtool_ops = &ipqesstool_ops; ++} diff --git a/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch b/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch new file mode 100644 index 0000000000..68d1a2e23b --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/701-net-dsa-add-out-of-band-tagging-protocol.patch @@ -0,0 +1,238 @@ +From a32e16b3c2fc1954ad6e09737439f60e5890278e Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 4 Nov 2022 18:41:49 +0100 +Subject: [PATCH] net: dsa: add out-of-band tagging protocol + +This tagging protocol is designed for the situation where the link +between the MAC and the Switch is designed such that the Destination +Port, which is usually embedded in some part of the Ethernet Header, is +sent out-of-band, and isn't present at all in the Ethernet frame. + +This can happen when the MAC and Switch are tightly integrated on an +SoC, as is the case with the Qualcomm IPQ4019 for example, where the DSA +tag is inserted directly into the DMA descriptors. In that case, +the MAC driver is responsible for sending the tag to the switch using +the out-of-band medium. To do so, the MAC driver needs to have the +information of the destination port for that skb. + +Add a new tagging protocol based on SKB extensions to convey the +information about the destination port to the MAC driver + +Signed-off-by: Maxime Chevallier +--- + Documentation/networking/dsa/dsa.rst | 13 +++++++- + MAINTAINERS | 1 + + include/linux/dsa/oob.h | 16 +++++++++ + include/linux/skbuff.h | 3 ++ + include/net/dsa.h | 2 ++ + net/core/skbuff.c | 10 ++++++ + net/dsa/Kconfig | 9 +++++ + net/dsa/Makefile | 1 + + net/dsa/tag_oob.c | 49 ++++++++++++++++++++++++++++ + 9 files changed, 103 insertions(+), 1 deletion(-) + create mode 100644 include/linux/dsa/oob.h + create mode 100644 net/dsa/tag_oob.c + +--- a/Documentation/networking/dsa/dsa.rst ++++ b/Documentation/networking/dsa/dsa.rst +@@ -66,7 +66,8 @@ Switch tagging protocols + ------------------------ + + DSA supports many vendor-specific tagging protocols, one software-defined +-tagging protocol, and a tag-less mode as well (``DSA_TAG_PROTO_NONE``). ++tagging protocol, a tag-less mode as well (``DSA_TAG_PROTO_NONE``) and an ++out-of-band tagging protocol (``DSA_TAG_PROTO_OOB``). + + The exact format of the tag protocol is vendor specific, but in general, they + all contain something which: +@@ -217,6 +218,16 @@ receive all frames regardless of the val + setting the ``promisc_on_master`` property of the ``struct dsa_device_ops``. + Note that this assumes a DSA-unaware master driver, which is the norm. + ++Some SoCs have a tight integration between the conduit network interface and the ++embedded switch, such that the DSA tag isn't transmitted in the packet data, ++but through another media, using so-called out-of-band tagging. In that case, ++the host MAC driver is in charge of transmitting the tag to the switch. ++An example is the IPQ4019 SoC, that transmits the tag between the ipqess ++ethernet controller and the qca8k switch using the DMA descriptor. In that ++configuration, tag-chaining is permitted, but the OOB tag will always be the ++top-most switch in the tree. The tagger (``DSA_TAG_PROTO_OOB``) uses skb ++extensions to transmit the tag to and from the MAC driver. ++ + Master network devices + ---------------------- + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -17081,6 +17081,7 @@ L: netdev@vger.kernel.org + S: Maintained + F: Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml + F: drivers/net/ethernet/qualcomm/ipqess/ ++F: net/dsa/tag_oob.c + + QUALCOMM ETHQOS ETHERNET DRIVER + M: Vinod Koul +--- /dev/null ++++ b/include/linux/dsa/oob.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0-only ++ * Copyright (C) 2022 Maxime Chevallier ++ */ ++ ++#ifndef _NET_DSA_OOB_H ++#define _NET_DSA_OOB_H ++ ++#include ++ ++struct dsa_oob_tag_info { ++ u16 port; ++}; ++ ++int dsa_oob_tag_push(struct sk_buff *skb, struct dsa_oob_tag_info *ti); ++int dsa_oob_tag_pop(struct sk_buff *skb, struct dsa_oob_tag_info *ti); ++#endif +--- a/include/linux/skbuff.h ++++ b/include/linux/skbuff.h +@@ -4588,6 +4588,9 @@ enum skb_ext_id { + #if IS_ENABLED(CONFIG_MCTP_FLOWS) + SKB_EXT_MCTP, + #endif ++#if IS_ENABLED(CONFIG_NET_DSA_TAG_OOB) ++ SKB_EXT_DSA_OOB, ++#endif + SKB_EXT_NUM, /* must be last */ + }; + +--- a/include/net/dsa.h ++++ b/include/net/dsa.h +@@ -55,6 +55,7 @@ struct phylink_link_state; + #define DSA_TAG_PROTO_RTL8_4T_VALUE 25 + #define DSA_TAG_PROTO_RZN1_A5PSW_VALUE 26 + #define DSA_TAG_PROTO_LAN937X_VALUE 27 ++#define DSA_TAG_PROTO_OOB_VALUE 28 + + enum dsa_tag_protocol { + DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, +@@ -85,6 +86,7 @@ enum dsa_tag_protocol { + DSA_TAG_PROTO_RTL8_4T = DSA_TAG_PROTO_RTL8_4T_VALUE, + DSA_TAG_PROTO_RZN1_A5PSW = DSA_TAG_PROTO_RZN1_A5PSW_VALUE, + DSA_TAG_PROTO_LAN937X = DSA_TAG_PROTO_LAN937X_VALUE, ++ DSA_TAG_PROTO_OOB = DSA_TAG_PROTO_OOB_VALUE, + }; + + struct dsa_switch; +--- a/net/core/skbuff.c ++++ b/net/core/skbuff.c +@@ -62,8 +62,12 @@ + #include + #include + #include ++#ifdef CONFIG_NET_DSA_TAG_OOB ++#include ++#endif + + #include ++#include + #include + #include + #include +@@ -4517,6 +4521,9 @@ static const u8 skb_ext_type_len[] = { + #if IS_ENABLED(CONFIG_MCTP_FLOWS) + [SKB_EXT_MCTP] = SKB_EXT_CHUNKSIZEOF(struct mctp_flow), + #endif ++#if IS_ENABLED(CONFIG_NET_DSA_TAG_OOB) ++ [SKB_EXT_DSA_OOB] = SKB_EXT_CHUNKSIZEOF(struct dsa_oob_tag_info), ++#endif + }; + + static __always_inline unsigned int skb_ext_total_length(void) +@@ -4537,6 +4544,9 @@ static __always_inline unsigned int skb_ + #if IS_ENABLED(CONFIG_MCTP_FLOWS) + skb_ext_type_len[SKB_EXT_MCTP] + + #endif ++#if IS_ENABLED(CONFIG_NET_DSA_TAG_OOB) ++ skb_ext_type_len[SKB_EXT_DSA_OOB] + ++#endif + 0; + } + +--- a/net/dsa/Kconfig ++++ b/net/dsa/Kconfig +@@ -113,6 +113,15 @@ config NET_DSA_TAG_OCELOT_8021Q + this mode, less TCAM resources (VCAP IS1, IS2, ES0) are available for + use with tc-flower. + ++config NET_DSA_TAG_OOB ++ select SKB_EXTENSIONS ++ tristate "Tag driver for Out-of-band tagging drivers" ++ help ++ Say Y or M if you want to enable support for pairs of embedded ++ switches and host MAC drivers which perform demultiplexing and ++ packet steering to ports using out of band metadata processed ++ by the DSA master, rather than tags present in the packets. ++ + config NET_DSA_TAG_QCA + tristate "Tag driver for Qualcomm Atheros QCA8K switches" + help +--- a/net/dsa/Makefile ++++ b/net/dsa/Makefile +@@ -22,6 +22,7 @@ obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag + obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o + obj-$(CONFIG_NET_DSA_TAG_OCELOT) += tag_ocelot.o + obj-$(CONFIG_NET_DSA_TAG_OCELOT_8021Q) += tag_ocelot_8021q.o ++obj-$(CONFIG_NET_DSA_TAG_OOB) += tag_oob.o + obj-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o + obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o + obj-$(CONFIG_NET_DSA_TAG_RTL8_4) += tag_rtl8_4.o +--- /dev/null ++++ b/net/dsa/tag_oob.c +@@ -0,0 +1,49 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++ ++/* Copyright (c) 2022, Maxime Chevallier */ ++ ++#include ++#include ++#include ++ ++#include "dsa_priv.h" ++ ++static struct sk_buff *oob_tag_xmit(struct sk_buff *skb, ++ struct net_device *dev) ++{ ++ struct dsa_oob_tag_info *tag_info = skb_ext_add(skb, SKB_EXT_DSA_OOB); ++ struct dsa_port *dp = dsa_slave_to_port(dev); ++ ++ tag_info->port = dp->index; ++ ++ return skb; ++} ++ ++static struct sk_buff *oob_tag_rcv(struct sk_buff *skb, ++ struct net_device *dev) ++{ ++ struct dsa_oob_tag_info *tag_info = skb_ext_find(skb, SKB_EXT_DSA_OOB); ++ ++ if (!tag_info) ++ return NULL; ++ ++ skb->dev = dsa_master_find_slave(dev, 0, tag_info->port); ++ if (!skb->dev) ++ return NULL; ++ ++ return skb; ++} ++ ++static const struct dsa_device_ops oob_tag_dsa_ops = { ++ .name = "oob", ++ .proto = DSA_TAG_PROTO_OOB, ++ .xmit = oob_tag_xmit, ++ .rcv = oob_tag_rcv, ++}; ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("DSA tag driver for out-of-band tagging"); ++MODULE_AUTHOR("Maxime Chevallier "); ++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OOB); ++ ++module_dsa_tag_driver(oob_tag_dsa_ops); diff --git a/target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch b/target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch new file mode 100644 index 0000000000..ac0718ba2c --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch @@ -0,0 +1,173 @@ +From 4975e2b3f1d37bba04f262784cef0d5b7e0a30a4 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 4 Nov 2022 18:41:50 +0100 +Subject: [PATCH] net: ipqess: Add out-of-band DSA tagging support + +On the IPQ4019, there's an 5 ports switch connected to the CPU through +the IPQESS Ethernet controller. The way the DSA tag is sent-out to that +switch is through the DMA descriptor, due to how tightly it is +integrated with the switch. + +We use the out-of-band tagging protocol by getting the source +port from the descriptor, push it into the skb extensions, and have the +tagger pull it to infer the destination netdev. The reverse process is +done on the TX side, where the driver pulls the tag from the skb and +builds the descriptor accordingly. + +Signed-off-by: Maxime Chevallier +--- + drivers/net/ethernet/qualcomm/Kconfig | 1 + + drivers/net/ethernet/qualcomm/ipqess/ipqess.c | 64 ++++++++++++++++++- + drivers/net/ethernet/qualcomm/ipqess/ipqess.h | 4 ++ + 3 files changed, 68 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/qualcomm/Kconfig ++++ b/drivers/net/ethernet/qualcomm/Kconfig +@@ -64,6 +64,7 @@ config QCOM_IPQ4019_ESS_EDMA + tristate "Qualcomm Atheros IPQ4019 ESS EDMA support" + depends on (OF && ARCH_QCOM) || COMPILE_TEST + select PHYLINK ++ select NET_DSA_TAG_OOB + help + This driver supports the Qualcomm Atheros IPQ40xx built-in + ESS EDMA ethernet controller. +--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.c ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c +@@ -9,6 +9,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -22,6 +23,7 @@ + #include + #include + #include ++#include + #include + + #include "ipqess.h" +@@ -327,6 +329,7 @@ static int ipqess_rx_poll(struct ipqess_ + tail &= IPQESS_RFD_CONS_IDX_MASK; + + while (done < budget) { ++ struct dsa_oob_tag_info *tag_info; + struct ipqess_rx_desc *rd; + struct sk_buff *skb; + +@@ -406,6 +409,12 @@ static int ipqess_rx_poll(struct ipqess_ + __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), + le16_to_cpu(rd->rrd4)); + ++ if (likely(rx_ring->ess->dsa_ports)) { ++ tag_info = skb_ext_add(skb, SKB_EXT_DSA_OOB); ++ tag_info->port = FIELD_GET(IPQESS_RRD_PORT_ID_MASK, ++ le16_to_cpu(rd->rrd1)); ++ } ++ + napi_gro_receive(&rx_ring->napi_rx, skb); + + rx_ring->ess->stats.rx_packets++; +@@ -706,6 +715,23 @@ static void ipqess_rollback_tx(struct ip + tx_ring->head = start_index; + } + ++static void ipqess_process_dsa_tag_sh(struct ipqess *ess, struct sk_buff *skb, ++ u32 *word3) ++{ ++ struct dsa_oob_tag_info *tag_info; ++ ++ if (unlikely(!ess->dsa_ports)) ++ return; ++ ++ tag_info = skb_ext_find(skb, SKB_EXT_DSA_OOB); ++ if (!tag_info) ++ return; ++ ++ *word3 |= tag_info->port << IPQESS_TPD_PORT_BITMAP_SHIFT; ++ *word3 |= BIT(IPQESS_TPD_FROM_CPU_SHIFT); ++ *word3 |= 0x3e << IPQESS_TPD_PORT_BITMAP_SHIFT; ++} ++ + static int ipqess_tx_map_and_fill(struct ipqess_tx_ring *tx_ring, + struct sk_buff *skb) + { +@@ -716,6 +742,8 @@ static int ipqess_tx_map_and_fill(struct + u16 len; + int i; + ++ ipqess_process_dsa_tag_sh(tx_ring->ess, skb, &word3); ++ + if (skb_is_gso(skb)) { + if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) { + lso_word1 |= IPQESS_TPD_IPV4_EN; +@@ -917,6 +945,33 @@ static const struct net_device_ops ipqes + .ndo_tx_timeout = ipqess_tx_timeout, + }; + ++static int ipqess_netdevice_event(struct notifier_block *nb, ++ unsigned long event, void *ptr) ++{ ++ struct ipqess *ess = container_of(nb, struct ipqess, netdev_notifier); ++ struct net_device *dev = netdev_notifier_info_to_dev(ptr); ++ struct netdev_notifier_changeupper_info *info; ++ ++ if (dev != ess->netdev) ++ return NOTIFY_DONE; ++ ++ switch (event) { ++ case NETDEV_CHANGEUPPER: ++ info = ptr; ++ ++ if (!dsa_slave_dev_check(info->upper_dev)) ++ return NOTIFY_DONE; ++ ++ if (info->linking) ++ ess->dsa_ports++; ++ else ++ ess->dsa_ports--; ++ ++ return NOTIFY_DONE; ++ } ++ return NOTIFY_OK; ++} ++ + static void ipqess_hw_stop(struct ipqess *ess) + { + int i; +@@ -1184,12 +1239,19 @@ static int ipqess_axi_probe(struct platf + netif_napi_add(netdev, &ess->rx_ring[i].napi_rx, ipqess_rx_napi); + } + +- err = register_netdev(netdev); ++ ess->netdev_notifier.notifier_call = ipqess_netdevice_event; ++ err = register_netdevice_notifier(&ess->netdev_notifier); + if (err) + goto err_hw_stop; + ++ err = register_netdev(netdev); ++ if (err) ++ goto err_notifier_unregister; ++ + return 0; + ++err_notifier_unregister: ++ unregister_netdevice_notifier(&ess->netdev_notifier); + err_hw_stop: + ipqess_hw_stop(ess); + +--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.h ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.h +@@ -171,6 +171,10 @@ struct ipqess { + struct platform_device *pdev; + struct phylink *phylink; + struct phylink_config phylink_config; ++ ++ struct notifier_block netdev_notifier; ++ int dsa_ports; ++ + struct ipqess_tx_ring tx_ring[IPQESS_NETDEV_QUEUES]; + + struct ipqess_statistics ipqess_stats; diff --git a/target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch b/target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch new file mode 100644 index 0000000000..bd890e5c71 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/703-net-qualcomm-ipqess-release-IRQ-s-on-network-device-.patch @@ -0,0 +1,75 @@ +From 5f15f7f170c76220dfd36cb9037d7848d1fc4aaf Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 15 Aug 2023 14:30:50 +0200 +Subject: [PATCH] net: qualcomm: ipqess: release IRQ-s on network device stop + +Currently, IPQESS driver is obtaining the IRQ-s during ndo_open, but they +are never freed as they are device managed. + +However, it is not enough for them to be released when device is removed +as the same network device can be stopped and started multiple times which +on the second start would lead to IRQ request to fail with -EBUSY as they +have already been requested before and are not of the shared type with: +[ 34.480769] ipqess-edma c080000.ethernet eth0: Link is Down +[ 34.488070] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.488131] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.494527] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.502892] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.508137] qca8k-ipq4019 c000000.switch lan1: failed to open master eth0 +[ 34.518966] br-lan: port 1(lan1) entered blocking state +[ 34.525165] br-lan: port 1(lan1) entered disabled state +[ 34.530633] device lan1 entered promiscuous mode +[ 34.548598] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.548660] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.553111] qca8k-ipq4019 c000000.switch lan2: failed to open master eth0 +[ 34.563841] br-lan: port 2(lan2) entered blocking state +[ 34.570083] br-lan: port 2(lan2) entered disabled state +[ 34.575530] device lan2 entered promiscuous mode +[ 34.587067] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.587132] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.591579] qca8k-ipq4019 c000000.switch lan3: failed to open master eth0 +[ 34.602451] br-lan: port 3(lan3) entered blocking state +[ 34.608496] br-lan: port 3(lan3) entered disabled state +[ 34.614084] device lan3 entered promiscuous mode +[ 34.626405] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.626468] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.630871] qca8k-ipq4019 c000000.switch lan4: failed to open master eth0 +[ 34.641689] br-lan: port 4(lan4) entered blocking state +[ 34.647834] br-lan: port 4(lan4) entered disabled state +[ 34.653455] device lan4 entered promiscuous mode +[ 34.667282] ipqess-edma c080000.ethernet eth0: ipqess_open +[ 34.667364] genirq: Flags mismatch irq 37. 00000001 (c080000.ethernet:txq0) vs. 00000001 (c080000.ethernet:txq0) +[ 34.671830] qca8k-ipq4019 c000000.switch wan: failed to open master eth0 + +So, lets free the IRQ-s on ndo_stop after stopping NAPI and HW IRQ-s. + +Signed-off-by: Robert Marko +--- + drivers/net/ethernet/qualcomm/ipqess/ipqess.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.c ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c +@@ -636,9 +636,22 @@ static int ipqess_stop(struct net_device + netif_tx_stop_all_queues(netdev); + phylink_stop(ess->phylink); + ipqess_irq_disable(ess); ++ + for (i = 0; i < IPQESS_NETDEV_QUEUES; i++) { ++ int qid; ++ + napi_disable(&ess->tx_ring[i].napi_tx); + napi_disable(&ess->rx_ring[i].napi_rx); ++ ++ qid = ess->tx_ring[i].idx; ++ devm_free_irq(&netdev->dev, ++ ess->tx_irq[qid], ++ &ess->tx_ring[i]); ++ ++ qid = ess->rx_ring[i].idx; ++ devm_free_irq(&netdev->dev, ++ ess->rx_irq[qid], ++ &ess->rx_ring[i]); + } + + return 0; diff --git a/target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch b/target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch new file mode 100644 index 0000000000..cd58677284 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/704-net-qualcomm-ipqess-enable-threaded-NAPI-by-default.patch @@ -0,0 +1,49 @@ +From 9fa4a57a65e270e4d579cace4de5c438f46c7d12 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 15 Aug 2023 14:38:44 +0200 +Subject: [PATCH] net: qualcomm: ipqess: enable threaded NAPI by default + +Threaded NAPI provides a nice performance boost, so lets enable it by +default. + +We do however need to move the __napi_schedule() after HW IRQ has been +cleared in order to avoid concurency issues. + +Signed-off-by: Robert Marko +--- + drivers/net/ethernet/qualcomm/ipqess/ipqess.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.c ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c +@@ -530,9 +530,9 @@ static irqreturn_t ipqess_interrupt_tx(i + struct ipqess_tx_ring *tx_ring = (struct ipqess_tx_ring *)priv; + + if (likely(napi_schedule_prep(&tx_ring->napi_tx))) { +- __napi_schedule(&tx_ring->napi_tx); + ipqess_w32(tx_ring->ess, IPQESS_REG_TX_INT_MASK_Q(tx_ring->idx), + 0x0); ++ __napi_schedule(&tx_ring->napi_tx); + } + + return IRQ_HANDLED; +@@ -543,9 +543,9 @@ static irqreturn_t ipqess_interrupt_rx(i + struct ipqess_rx_ring *rx_ring = (struct ipqess_rx_ring *)priv; + + if (likely(napi_schedule_prep(&rx_ring->napi_rx))) { +- __napi_schedule(&rx_ring->napi_rx); + ipqess_w32(rx_ring->ess, IPQESS_REG_RX_INT_MASK_Q(rx_ring->idx), + 0x0); ++ __napi_schedule(&rx_ring->napi_rx); + } + + return IRQ_HANDLED; +@@ -1261,6 +1261,8 @@ static int ipqess_axi_probe(struct platf + if (err) + goto err_notifier_unregister; + ++ dev_set_threaded(netdev, true); ++ + return 0; + + err_notifier_unregister: diff --git a/target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch b/target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch new file mode 100644 index 0000000000..27bdebdb93 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch @@ -0,0 +1,78 @@ +From 5b71dbb867680887d47954ce1cc145cb747cbce6 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 4 Nov 2022 18:41:51 +0100 +Subject: [PATCH] ARM: dts: qcom: ipq4019: Add description for the IPQESS + Ethernet controller + +The Qualcomm IPQ4019 includes an internal 5 ports switch, which is +connected to the CPU through the internal IPQESS Ethernet controller. + +Add support for this internal interface, which is internally connected to a +modified version of the QCA8K Ethernet switch. + +This Ethernet controller only support a specific internal interface mode +for connection to the switch. + +Signed-off-by: Maxime Chevallier +Reviewed-by: Krzysztof Kozlowski +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -594,6 +594,54 @@ + status = "disabled"; + }; + ++ gmac: ethernet@c080000 { ++ compatible = "qcom,ipq4019-ess-edma"; ++ reg = <0xc080000 0x8000>; ++ resets = <&gcc ESS_RESET>; ++ reset-names = "ess"; ++ clocks = <&gcc GCC_ESS_CLK>; ++ clock-names = "ess"; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ phy-mode = "internal"; ++ status = "disabled"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ + mdio: mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; diff --git a/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch new file mode 100644 index 0000000000..992884cf31 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch @@ -0,0 +1,1132 @@ +From a38126870488398932e017dd9d76174b4aadbbbb Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 10 Sep 2022 15:46:09 +0200 +Subject: [PATCH] net: dsa: qca8k: add IPQ4019 built-in switch support + +Qualcomm IPQ40xx SoC-s have a variant of QCA8337N switch built-in. + +It shares most of the stuff with its external counterpart, however it is +modified for the SoC. +Namely, it doesn't have second CPU port (Port 6), so it has 6 ports +instead of 7. +It also has no built-in PHY-s but rather requires external PSGMII based +companion PHY-s (QCA8072 and QCA8075) for which it first needs to carry +out calibration before using them. +PSGMII has a SoC built-in PHY that is used to connect to the PHY-s which +unfortunately requires some magic values as the datasheet doesnt document +the bits that are being set or the register at all. + +Since its built-in it is MMIO like other peripherals and doesn't have its +own MDIO bus but depends on the SoC provided one. + +CPU connection is at Port 0 and it uses some kind of a internal connection +and no traditional RGMII/SGMII. + +It also doesn't use in-band tagging like other qca8k switches so a out of +band based tagger is used. + +Signed-off-by: Robert Marko +--- + drivers/net/dsa/qca/Kconfig | 8 + + drivers/net/dsa/qca/Makefile | 1 + + drivers/net/dsa/qca/qca8k-common.c | 6 +- + drivers/net/dsa/qca/qca8k-ipq4019.c | 948 ++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 56 ++ + 5 files changed, 1016 insertions(+), 3 deletions(-) + create mode 100644 drivers/net/dsa/qca/qca8k-ipq4019.c + +--- a/drivers/net/dsa/qca/Kconfig ++++ b/drivers/net/dsa/qca/Kconfig +@@ -23,3 +23,11 @@ config NET_DSA_QCA8K_LEDS_SUPPORT + help + This enabled support for LEDs present on the Qualcomm Atheros + QCA8K Ethernet switch chips. ++ ++config NET_DSA_QCA8K_IPQ4019 ++ tristate "Qualcomm Atheros IPQ4019 Ethernet switch support" ++ select NET_DSA_TAG_OOB ++ select REGMAP_MMIO ++ help ++ This enables support for the switch built-into Qualcomm Atheros ++ IPQ4019 SoCs. +--- a/drivers/net/dsa/qca/Makefile ++++ b/drivers/net/dsa/qca/Makefile +@@ -5,3 +5,4 @@ qca8k-y += qca8k-common.o qca8k-8xxx. + ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT + qca8k-y += qca8k-leds.o + endif ++obj-$(CONFIG_NET_DSA_QCA8K_IPQ4019) += qca8k-ipq4019.o qca8k-common.o +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -412,7 +412,7 @@ static int qca8k_vlan_del(struct qca8k_p + + /* Check if we're the last member to be removed */ + del = true; +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ for (i = 0; i < priv->ds->num_ports; i++) { + mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); + + if ((reg & mask) != mask) { +@@ -653,7 +653,7 @@ int qca8k_port_bridge_join(struct dsa_sw + cpu_port = dsa_to_port(ds, port)->cpu_dp->index; + port_mask = BIT(cpu_port); + +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ for (i = 0; i < ds->num_ports; i++) { + if (dsa_is_cpu_port(ds, i)) + continue; + if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge)) +@@ -685,7 +685,7 @@ void qca8k_port_bridge_leave(struct dsa_ + + cpu_port = dsa_to_port(ds, port)->cpu_dp->index; + +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ for (i = 0; i < ds->num_ports; i++) { + if (dsa_is_cpu_port(ds, i)) + continue; + if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge)) +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k-ipq4019.c +@@ -0,0 +1,948 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2009 Felix Fietkau ++ * Copyright (C) 2011-2012, 2020-2021 Gabor Juhos ++ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2016 John Crispin ++ * Copyright (c) 2022 Robert Marko ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "qca8k.h" ++ ++static struct regmap_config qca8k_ipq4019_regmap_config = { ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++ .max_register = 0x16ac, /* end MIB - Port6 range */ ++ .rd_table = &qca8k_readable_table, ++}; ++ ++static struct regmap_config qca8k_ipq4019_psgmii_phy_regmap_config = { ++ .name = "psgmii-phy", ++ .reg_bits = 32, ++ .val_bits = 32, ++ .reg_stride = 4, ++ .max_register = 0x7fc, ++}; ++ ++static enum dsa_tag_protocol ++qca8k_ipq4019_get_tag_protocol(struct dsa_switch *ds, int port, ++ enum dsa_tag_protocol mp) ++{ ++ return DSA_TAG_PROTO_OOB; ++} ++ ++static struct phylink_pcs * ++qca8k_ipq4019_phylink_mac_select_pcs(struct dsa_switch *ds, int port, ++ phy_interface_t interface) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ struct phylink_pcs *pcs = NULL; ++ ++ switch (interface) { ++ case PHY_INTERFACE_MODE_PSGMII: ++ switch (port) { ++ case 0: ++ pcs = &priv->pcs_port_0.pcs; ++ break; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ return pcs; ++} ++ ++static int qca8k_ipq4019_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ return 0; ++} ++ ++static void qca8k_ipq4019_pcs_an_restart(struct phylink_pcs *pcs) ++{ ++} ++ ++static struct qca8k_pcs *pcs_to_qca8k_pcs(struct phylink_pcs *pcs) ++{ ++ return container_of(pcs, struct qca8k_pcs, pcs); ++} ++ ++static void qca8k_ipq4019_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)->priv; ++ int port = pcs_to_qca8k_pcs(pcs)->port; ++ u32 reg; ++ int ret; ++ ++ ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), ®); ++ if (ret < 0) { ++ state->link = false; ++ return; ++ } ++ ++ state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); ++ state->an_complete = state->link; ++ state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL : ++ DUPLEX_HALF; ++ ++ switch (reg & QCA8K_PORT_STATUS_SPEED) { ++ case QCA8K_PORT_STATUS_SPEED_10: ++ state->speed = SPEED_10; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_100: ++ state->speed = SPEED_100; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_1000: ++ state->speed = SPEED_1000; ++ break; ++ default: ++ state->speed = SPEED_UNKNOWN; ++ break; ++ } ++ ++ if (reg & QCA8K_PORT_STATUS_RXFLOW) ++ state->pause |= MLO_PAUSE_RX; ++ if (reg & QCA8K_PORT_STATUS_TXFLOW) ++ state->pause |= MLO_PAUSE_TX; ++} ++ ++static const struct phylink_pcs_ops qca8k_pcs_ops = { ++ .pcs_get_state = qca8k_ipq4019_pcs_get_state, ++ .pcs_config = qca8k_ipq4019_pcs_config, ++ .pcs_an_restart = qca8k_ipq4019_pcs_an_restart, ++}; ++ ++static void qca8k_ipq4019_setup_pcs(struct qca8k_priv *priv, ++ struct qca8k_pcs *qpcs, ++ int port) ++{ ++ qpcs->pcs.ops = &qca8k_pcs_ops; ++ ++ /* We don't have interrupts for link changes, so we need to poll */ ++ qpcs->pcs.poll = true; ++ qpcs->priv = priv; ++ qpcs->port = port; ++} ++ ++static void qca8k_ipq4019_phylink_get_caps(struct dsa_switch *ds, int port, ++ struct phylink_config *config) ++{ ++ switch (port) { ++ case 0: /* CPU port */ ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ config->supported_interfaces); ++ break; ++ ++ case 1: ++ case 2: ++ case 3: ++ __set_bit(PHY_INTERFACE_MODE_PSGMII, ++ config->supported_interfaces); ++ break; ++ case 4: ++ case 5: ++ phy_interface_set_rgmii(config->supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_PSGMII, ++ config->supported_interfaces); ++ break; ++ } ++ ++ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | ++ MAC_10 | MAC_100 | MAC_1000FD; ++ ++ config->legacy_pre_march2020 = false; ++} ++ ++static void ++qca8k_phylink_ipq4019_mac_link_down(struct dsa_switch *ds, int port, ++ unsigned int mode, ++ phy_interface_t interface) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++} ++ ++static void ++qca8k_phylink_ipq4019_mac_link_up(struct dsa_switch *ds, int port, ++ unsigned int mode, phy_interface_t interface, ++ struct phy_device *phydev, int speed, ++ int duplex, bool tx_pause, bool rx_pause) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ ++ if (phylink_autoneg_inband(mode)) { ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ } else { ++ switch (speed) { ++ case SPEED_10: ++ reg = QCA8K_PORT_STATUS_SPEED_10; ++ break; ++ case SPEED_100: ++ reg = QCA8K_PORT_STATUS_SPEED_100; ++ break; ++ case SPEED_1000: ++ reg = QCA8K_PORT_STATUS_SPEED_1000; ++ break; ++ default: ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ break; ++ } ++ ++ if (duplex == DUPLEX_FULL) ++ reg |= QCA8K_PORT_STATUS_DUPLEX; ++ ++ if (rx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_RXFLOW; ++ ++ if (tx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_TXFLOW; ++ } ++ ++ reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); ++} ++ ++static int psgmii_vco_calibrate(struct qca8k_priv *priv) ++{ ++ int val, ret; ++ ++ if (!priv->psgmii_ethphy) { ++ dev_err(priv->dev, "PSGMII eth PHY missing, calibration failed!\n"); ++ return -ENODEV; ++ } ++ ++ /* Fix PSGMII RX 20bit */ ++ ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b); ++ /* Reset PHY PSGMII */ ++ ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x1b); ++ /* Release PHY PSGMII reset */ ++ ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5b); ++ ++ /* Poll for VCO PLL calibration finish - Malibu(QCA8075) */ ++ ret = phy_read_mmd_poll_timeout(priv->psgmii_ethphy, ++ MDIO_MMD_PMAPMD, ++ 0x28, val, ++ (val & BIT(0)), ++ 10000, 1000000, ++ false); ++ if (ret) { ++ dev_err(priv->dev, "QCA807x PSGMII VCO calibration PLL not ready\n"); ++ return ret; ++ } ++ mdelay(50); ++ ++ /* Freeze PSGMII RX CDR */ ++ ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x2230); ++ ++ /* Start PSGMIIPHY VCO PLL calibration */ ++ ret = regmap_set_bits(priv->psgmii, ++ PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1, ++ PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART); ++ ++ /* Poll for PSGMIIPHY PLL calibration finish - Dakota(IPQ40xx) */ ++ ret = regmap_read_poll_timeout(priv->psgmii, ++ PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2, ++ val, val & PSGMIIPHY_REG_PLL_VCO_CALIB_READY, ++ 10000, 1000000); ++ if (ret) { ++ dev_err(priv->dev, "IPQ PSGMIIPHY VCO calibration PLL not ready\n"); ++ return ret; ++ } ++ mdelay(50); ++ ++ /* Release PSGMII RX CDR */ ++ ret = phy_write(priv->psgmii_ethphy, MII_RESV2, 0x3230); ++ /* Release PSGMII RX 20bit */ ++ ret = phy_write(priv->psgmii_ethphy, MII_BMCR, 0x5f); ++ mdelay(200); ++ ++ return ret; ++} ++ ++static void ++qca8k_switch_port_loopback_on_off(struct qca8k_priv *priv, int port, int on) ++{ ++ u32 val = QCA8K_PORT_LOOKUP_LOOPBACK_EN; ++ ++ if (on == 0) ++ val = 0; ++ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LOOPBACK_EN, val); ++} ++ ++static int ++qca8k_wait_for_phy_link_state(struct phy_device *phy, int need_status) ++{ ++ int a; ++ u16 status; ++ ++ for (a = 0; a < 100; a++) { ++ status = phy_read(phy, MII_QCA8075_SSTATUS); ++ status &= QCA8075_PHY_SPEC_STATUS_LINK; ++ status = !!status; ++ if (status == need_status) ++ return 0; ++ mdelay(8); ++ } ++ ++ return -1; ++} ++ ++static void ++qca8k_phy_loopback_on_off(struct qca8k_priv *priv, struct phy_device *phy, ++ int sw_port, int on) ++{ ++ if (on) { ++ phy_write(phy, MII_BMCR, BMCR_ANENABLE | BMCR_RESET); ++ phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN); ++ qca8k_wait_for_phy_link_state(phy, 0); ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0); ++ phy_write(phy, MII_BMCR, ++ BMCR_SPEED1000 | ++ BMCR_FULLDPLX | ++ BMCR_LOOPBACK); ++ qca8k_wait_for_phy_link_state(phy, 1); ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), ++ QCA8K_PORT_STATUS_SPEED_1000 | ++ QCA8K_PORT_STATUS_TXMAC | ++ QCA8K_PORT_STATUS_RXMAC | ++ QCA8K_PORT_STATUS_DUPLEX); ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port), ++ QCA8K_PORT_LOOKUP_STATE_FORWARD, ++ QCA8K_PORT_LOOKUP_STATE_FORWARD); ++ } else { /* off */ ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(sw_port), 0); ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(sw_port), ++ QCA8K_PORT_LOOKUP_STATE_DISABLED, ++ QCA8K_PORT_LOOKUP_STATE_DISABLED); ++ phy_write(phy, MII_BMCR, BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_RESET); ++ /* turn off the power of the phys - so that unused ++ ports do not raise links */ ++ phy_modify(phy, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN); ++ } ++} ++ ++static void ++qca8k_phy_pkt_gen_prep(struct qca8k_priv *priv, struct phy_device *phy, ++ int pkts_num, int on) ++{ ++ if (on) { ++ /* enable CRC checker and packets counters */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0); ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, ++ QCA8075_MMD7_CNT_FRAME_CHK_EN | QCA8075_MMD7_CNT_SELFCLR); ++ qca8k_wait_for_phy_link_state(phy, 1); ++ /* packet number */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, pkts_num); ++ /* pkt size - 1504 bytes + 20 bytes */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_SIZE, 1504); ++ } else { /* off */ ++ /* packet number */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_PKT_NUMB, 0); ++ /* disable CRC checker and packet counter */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_CRC_AND_PKTS_COUNT, 0); ++ /* disable traffic gen */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL, 0); ++ } ++} ++ ++static void ++qca8k_wait_for_phy_pkt_gen_fin(struct qca8k_priv *priv, struct phy_device *phy) ++{ ++ int val; ++ /* wait for all traffic end: 4096(pkt num)*1524(size)*8ns(125MHz)=49938us */ ++ phy_read_mmd_poll_timeout(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL, ++ val, !(val & QCA8075_MMD7_PKT_GEN_INPROGR), ++ 50000, 1000000, true); ++} ++ ++static void ++qca8k_start_phy_pkt_gen(struct phy_device *phy) ++{ ++ /* start traffic gen */ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_PKT_GEN_CTRL, ++ QCA8075_MMD7_PKT_GEN_START | QCA8075_MMD7_PKT_GEN_INPROGR); ++} ++ ++static int ++qca8k_start_all_phys_pkt_gens(struct qca8k_priv *priv) ++{ ++ struct phy_device *phy; ++ phy = phy_device_create(priv->bus, QCA8075_MDIO_BRDCST_PHY_ADDR, ++ 0, 0, NULL); ++ if (!phy) { ++ dev_err(priv->dev, "unable to create mdio broadcast PHY(0x%x)\n", ++ QCA8075_MDIO_BRDCST_PHY_ADDR); ++ return -ENODEV; ++ } ++ ++ qca8k_start_phy_pkt_gen(phy); ++ ++ phy_device_free(phy); ++ return 0; ++} ++ ++static int ++qca8k_get_phy_pkt_gen_test_result(struct phy_device *phy, int pkts_num) ++{ ++ u32 tx_ok, tx_error; ++ u32 rx_ok, rx_error; ++ u32 tx_ok_high16; ++ u32 rx_ok_high16; ++ u32 tx_all_ok, rx_all_ok; ++ ++ /* check counters */ ++ tx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_LO); ++ tx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_RECV_CNT_HI); ++ tx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_EG_FRAME_ERR_CNT); ++ rx_ok = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_LO); ++ rx_ok_high16 = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_RECV_CNT_HI); ++ rx_error = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_IG_FRAME_ERR_CNT); ++ tx_all_ok = tx_ok + (tx_ok_high16 << 16); ++ rx_all_ok = rx_ok + (rx_ok_high16 << 16); ++ ++ if (tx_all_ok < pkts_num) ++ return -1; ++ if(rx_all_ok < pkts_num) ++ return -2; ++ if(tx_error) ++ return -3; ++ if(rx_error) ++ return -4; ++ return 0; /* test is ok */ ++} ++ ++static ++void qca8k_phy_broadcast_write_on_off(struct qca8k_priv *priv, ++ struct phy_device *phy, int on) ++{ ++ u32 val; ++ ++ val = phy_read_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE); ++ ++ if (on == 0) ++ val &= ~QCA8075_MMD7_MDIO_BRDCST_WRITE_EN; ++ else ++ val |= QCA8075_MMD7_MDIO_BRDCST_WRITE_EN; ++ ++ phy_write_mmd(phy, MDIO_MMD_AN, QCA8075_MMD7_MDIO_BRDCST_WRITE, val); ++} ++ ++static int ++qca8k_test_dsa_port_for_errors(struct qca8k_priv *priv, struct phy_device *phy, ++ int port, int test_phase) ++{ ++ int res = 0; ++ const int test_pkts_num = QCA8075_PKT_GEN_PKTS_COUNT; ++ ++ if (test_phase == 1) { /* start test preps */ ++ qca8k_phy_loopback_on_off(priv, phy, port, 1); ++ qca8k_switch_port_loopback_on_off(priv, port, 1); ++ qca8k_phy_broadcast_write_on_off(priv, phy, 1); ++ qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 1); ++ } else if (test_phase == 2) { ++ /* wait for test results, collect it and cleanup */ ++ qca8k_wait_for_phy_pkt_gen_fin(priv, phy); ++ res = qca8k_get_phy_pkt_gen_test_result(phy, test_pkts_num); ++ qca8k_phy_pkt_gen_prep(priv, phy, test_pkts_num, 0); ++ qca8k_phy_broadcast_write_on_off(priv, phy, 0); ++ qca8k_switch_port_loopback_on_off(priv, port, 0); ++ qca8k_phy_loopback_on_off(priv, phy, port, 0); ++ } ++ ++ return res; ++} ++ ++static int ++qca8k_do_dsa_sw_ports_self_test(struct qca8k_priv *priv, int parallel_test) ++{ ++ struct device_node *dn = priv->dev->of_node; ++ struct device_node *ports, *port; ++ struct device_node *phy_dn; ++ struct phy_device *phy; ++ int reg, err = 0, test_phase; ++ u32 tests_result = 0; ++ ++ ports = of_get_child_by_name(dn, "ports"); ++ if (!ports) { ++ dev_err(priv->dev, "no ports child node found\n"); ++ return -EINVAL; ++ } ++ ++ for (test_phase = 1; test_phase <= 2; test_phase++) { ++ if (parallel_test && test_phase == 2) { ++ err = qca8k_start_all_phys_pkt_gens(priv); ++ if (err) ++ goto error; ++ } ++ for_each_available_child_of_node(ports, port) { ++ err = of_property_read_u32(port, "reg", ®); ++ if (err) ++ goto error; ++ if (reg >= QCA8K_NUM_PORTS) { ++ err = -EINVAL; ++ goto error; ++ } ++ phy_dn = of_parse_phandle(port, "phy-handle", 0); ++ if (phy_dn) { ++ phy = of_phy_find_device(phy_dn); ++ of_node_put(phy_dn); ++ if (phy) { ++ int result; ++ result = qca8k_test_dsa_port_for_errors(priv, ++ phy, reg, test_phase); ++ if (!parallel_test && test_phase == 1) ++ qca8k_start_phy_pkt_gen(phy); ++ put_device(&phy->mdio.dev); ++ if (test_phase == 2) { ++ tests_result <<= 1; ++ if (result) ++ tests_result |= 1; ++ } ++ } ++ } ++ } ++ } ++ ++end: ++ of_node_put(ports); ++ qca8k_fdb_flush(priv); ++ return tests_result; ++error: ++ tests_result |= 0xf000; ++ goto end; ++} ++ ++static int ++psgmii_vco_calibrate_and_test(struct dsa_switch *ds) ++{ ++ int ret, a, test_result; ++ struct qca8k_priv *priv = ds->priv; ++ ++ for (a = 0; a <= QCA8K_PSGMII_CALB_NUM; a++) { ++ ret = psgmii_vco_calibrate(priv); ++ if (ret) ++ return ret; ++ /* first we run serial test */ ++ test_result = qca8k_do_dsa_sw_ports_self_test(priv, 0); ++ /* and if it is ok then we run the test in parallel */ ++ if (!test_result) ++ test_result = qca8k_do_dsa_sw_ports_self_test(priv, 1); ++ if (!test_result) { ++ if (a > 0) { ++ dev_warn(priv->dev, "PSGMII work was stabilized after %d " ++ "calibration retries !\n", a); ++ } ++ return 0; ++ } else { ++ schedule(); ++ if (a > 0 && a % 10 == 0) { ++ dev_err(priv->dev, "PSGMII work is unstable !!! " ++ "Let's try to wait a bit ... %d\n", a); ++ set_current_state(TASK_INTERRUPTIBLE); ++ schedule_timeout(msecs_to_jiffies(a * 100)); ++ } ++ } ++ } ++ ++ panic("PSGMII work is unstable !!! " ++ "Repeated recalibration attempts did not help(0x%x) !\n", ++ test_result); ++ ++ return -EFAULT; ++} ++ ++static int ++ipq4019_psgmii_configure(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ if (!priv->psgmii_calibrated) { ++ dev_info(ds->dev, "PSGMII calibration!\n"); ++ ret = psgmii_vco_calibrate_and_test(ds); ++ ++ ret = regmap_clear_bits(priv->psgmii, PSGMIIPHY_MODE_CONTROL, ++ PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M); ++ ret = regmap_write(priv->psgmii, PSGMIIPHY_TX_CONTROL, ++ PSGMIIPHY_TX_CONTROL_MAGIC_VALUE); ++ ++ priv->psgmii_calibrated = true; ++ ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void ++qca8k_phylink_ipq4019_mac_config(struct dsa_switch *ds, int port, ++ unsigned int mode, ++ const struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ switch (port) { ++ case 0: ++ /* CPU port, no configuration needed */ ++ return; ++ case 1: ++ case 2: ++ case 3: ++ if (state->interface == PHY_INTERFACE_MODE_PSGMII) ++ if (ipq4019_psgmii_configure(ds)) ++ dev_err(ds->dev, "PSGMII configuration failed!\n"); ++ return; ++ case 4: ++ case 5: ++ if (state->interface == PHY_INTERFACE_MODE_RGMII || ++ state->interface == PHY_INTERFACE_MODE_RGMII_ID || ++ state->interface == PHY_INTERFACE_MODE_RGMII_RXID || ++ state->interface == PHY_INTERFACE_MODE_RGMII_TXID) { ++ regmap_set_bits(priv->regmap, ++ QCA8K_IPQ4019_REG_RGMII_CTRL, ++ QCA8K_IPQ4019_RGMII_CTRL_CLK); ++ } ++ ++ if (state->interface == PHY_INTERFACE_MODE_PSGMII) ++ if (ipq4019_psgmii_configure(ds)) ++ dev_err(ds->dev, "PSGMII configuration failed!\n"); ++ return; ++ default: ++ dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port); ++ return; ++ } ++} ++ ++static int ++qca8k_ipq4019_setup_port(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int ret; ++ ++ /* CPU port gets connected to all user ports of the switch */ ++ if (dsa_is_cpu_port(ds, port)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); ++ if (ret) ++ return ret; ++ ++ /* Disable CPU ARP Auto-learning by default */ ++ ret = regmap_clear_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LEARN); ++ if (ret) ++ return ret; ++ } ++ ++ /* Individual user ports get connected to CPU port only */ ++ if (dsa_is_user_port(ds, port)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, ++ BIT(QCA8K_IPQ4019_CPU_PORT)); ++ if (ret) ++ return ret; ++ ++ /* Enable ARP Auto-learning by default */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_LEARN); ++ if (ret) ++ return ret; ++ ++ /* For port based vlans to work we need to set the ++ * default egress vid ++ */ ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), ++ QCA8K_EGREES_VLAN_PORT_MASK(port), ++ QCA8K_EGREES_VLAN_PORT(port, QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), ++ QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | ++ QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_ipq4019_setup(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int ret, i; ++ ++ /* Make sure that port 0 is the cpu port */ ++ if (!dsa_is_cpu_port(ds, QCA8K_IPQ4019_CPU_PORT)) { ++ dev_err(priv->dev, "port %d is not the CPU port", ++ QCA8K_IPQ4019_CPU_PORT); ++ return -EINVAL; ++ } ++ ++ qca8k_ipq4019_setup_pcs(priv, &priv->pcs_port_0, 0); ++ ++ /* Enable CPU Port */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling CPU port"); ++ return ret; ++ } ++ ++ /* Enable MIB counters */ ++ ret = qca8k_mib_init(priv); ++ if (ret) ++ dev_warn(priv->dev, "MIB init failed"); ++ ++ /* Disable forwarding by default on all ports */ ++ for (i = 0; i < QCA8K_IPQ4019_NUM_PORTS; i++) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, 0); ++ if (ret) ++ return ret; ++ } ++ ++ /* Enable QCA header mode on the CPU port */ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(QCA8K_IPQ4019_CPU_PORT), ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling QCA header mode"); ++ return ret; ++ } ++ ++ /* Disable MAC by default on all ports */ ++ for (i = 0; i < QCA8K_IPQ4019_NUM_PORTS; i++) { ++ if (dsa_is_user_port(ds, i)) ++ qca8k_port_set_status(priv, i, 0); ++ } ++ ++ /* Forward all unknown frames to CPU port for Linux processing */ ++ ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(QCA8K_IPQ4019_CPU_PORT)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(QCA8K_IPQ4019_CPU_PORT)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(QCA8K_IPQ4019_CPU_PORT)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(QCA8K_IPQ4019_CPU_PORT))); ++ if (ret) ++ return ret; ++ ++ /* Setup connection between CPU port & user ports */ ++ for (i = 0; i < QCA8K_IPQ4019_NUM_PORTS; i++) { ++ ret = qca8k_ipq4019_setup_port(ds, i); ++ if (ret) ++ return ret; ++ } ++ ++ /* Setup our port MTUs to match power on defaults */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN); ++ if (ret) ++ dev_warn(priv->dev, "failed setting MTU settings"); ++ ++ /* Flush the FDB table */ ++ qca8k_fdb_flush(priv); ++ ++ /* Set min a max ageing value supported */ ++ ds->ageing_time_min = 7000; ++ ds->ageing_time_max = 458745000; ++ ++ /* Set max number of LAGs supported */ ++ ds->num_lag_ids = QCA8K_NUM_LAGS; ++ ++ /* CPU port HW learning doesnt work correctly, so let DSA handle it */ ++ ds->assisted_learning_on_cpu_port = true; ++ ++ return 0; ++} ++ ++static const struct dsa_switch_ops qca8k_ipq4019_switch_ops = { ++ .get_tag_protocol = qca8k_ipq4019_get_tag_protocol, ++ .setup = qca8k_ipq4019_setup, ++ .get_strings = qca8k_get_strings, ++ .get_ethtool_stats = qca8k_get_ethtool_stats, ++ .get_sset_count = qca8k_get_sset_count, ++ .set_ageing_time = qca8k_set_ageing_time, ++ .get_mac_eee = qca8k_get_mac_eee, ++ .set_mac_eee = qca8k_set_mac_eee, ++ .port_enable = qca8k_port_enable, ++ .port_disable = qca8k_port_disable, ++ .port_change_mtu = qca8k_port_change_mtu, ++ .port_max_mtu = qca8k_port_max_mtu, ++ .port_stp_state_set = qca8k_port_stp_state_set, ++ .port_bridge_join = qca8k_port_bridge_join, ++ .port_bridge_leave = qca8k_port_bridge_leave, ++ .port_fast_age = qca8k_port_fast_age, ++ .port_fdb_add = qca8k_port_fdb_add, ++ .port_fdb_del = qca8k_port_fdb_del, ++ .port_fdb_dump = qca8k_port_fdb_dump, ++ .port_mdb_add = qca8k_port_mdb_add, ++ .port_mdb_del = qca8k_port_mdb_del, ++ .port_mirror_add = qca8k_port_mirror_add, ++ .port_mirror_del = qca8k_port_mirror_del, ++ .port_vlan_filtering = qca8k_port_vlan_filtering, ++ .port_vlan_add = qca8k_port_vlan_add, ++ .port_vlan_del = qca8k_port_vlan_del, ++ .phylink_mac_select_pcs = qca8k_ipq4019_phylink_mac_select_pcs, ++ .phylink_get_caps = qca8k_ipq4019_phylink_get_caps, ++ .phylink_mac_config = qca8k_phylink_ipq4019_mac_config, ++ .phylink_mac_link_down = qca8k_phylink_ipq4019_mac_link_down, ++ .phylink_mac_link_up = qca8k_phylink_ipq4019_mac_link_up, ++ .port_lag_join = qca8k_port_lag_join, ++ .port_lag_leave = qca8k_port_lag_leave, ++}; ++ ++static const struct qca8k_match_data ipq4019 = { ++ .id = QCA8K_ID_IPQ4019, ++ .mib_count = QCA8K_QCA833X_MIB_COUNT, ++}; ++ ++static int ++qca8k_ipq4019_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct qca8k_priv *priv; ++ void __iomem *base, *psgmii; ++ struct device_node *np = dev->of_node, *mdio_np, *psgmii_ethphy_np; ++ int ret; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->dev = dev; ++ priv->info = &ipq4019; ++ ++ /* Start by setting up the register mapping */ ++ base = devm_platform_ioremap_resource_byname(pdev, "base"); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ priv->regmap = devm_regmap_init_mmio(dev, base, ++ &qca8k_ipq4019_regmap_config); ++ if (IS_ERR(priv->regmap)) { ++ ret = PTR_ERR(priv->regmap); ++ dev_err(dev, "base regmap initialization failed, %d\n", ret); ++ return ret; ++ } ++ ++ psgmii = devm_platform_ioremap_resource_byname(pdev, "psgmii_phy"); ++ if (IS_ERR(psgmii)) ++ return PTR_ERR(psgmii); ++ ++ priv->psgmii = devm_regmap_init_mmio(dev, psgmii, ++ &qca8k_ipq4019_psgmii_phy_regmap_config); ++ if (IS_ERR(priv->psgmii)) { ++ ret = PTR_ERR(priv->psgmii); ++ dev_err(dev, "PSGMII regmap initialization failed, %d\n", ret); ++ return ret; ++ } ++ ++ mdio_np = of_parse_phandle(np, "mdio", 0); ++ if (!mdio_np) { ++ dev_err(dev, "unable to get MDIO bus phandle\n"); ++ of_node_put(mdio_np); ++ return -EINVAL; ++ } ++ ++ priv->bus = of_mdio_find_bus(mdio_np); ++ of_node_put(mdio_np); ++ if (!priv->bus) { ++ dev_err(dev, "unable to find MDIO bus\n"); ++ return -EPROBE_DEFER; ++ } ++ ++ psgmii_ethphy_np = of_parse_phandle(np, "psgmii-ethphy", 0); ++ if (!psgmii_ethphy_np) { ++ dev_dbg(dev, "unable to get PSGMII eth PHY phandle\n"); ++ of_node_put(psgmii_ethphy_np); ++ } ++ ++ if (psgmii_ethphy_np) { ++ priv->psgmii_ethphy = of_phy_find_device(psgmii_ethphy_np); ++ of_node_put(psgmii_ethphy_np); ++ if (!priv->psgmii_ethphy) { ++ dev_err(dev, "unable to get PSGMII eth PHY\n"); ++ return -ENODEV; ++ } ++ } ++ ++ /* Check the detected switch id */ ++ ret = qca8k_read_switch_id(priv); ++ if (ret) ++ return ret; ++ ++ priv->ds = devm_kzalloc(dev, sizeof(*priv->ds), GFP_KERNEL); ++ if (!priv->ds) ++ return -ENOMEM; ++ ++ priv->ds->dev = dev; ++ priv->ds->num_ports = QCA8K_IPQ4019_NUM_PORTS; ++ priv->ds->priv = priv; ++ priv->ds->ops = &qca8k_ipq4019_switch_ops; ++ mutex_init(&priv->reg_mutex); ++ platform_set_drvdata(pdev, priv); ++ ++ return dsa_register_switch(priv->ds); ++} ++ ++static int ++qca8k_ipq4019_remove(struct platform_device *pdev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(&pdev->dev); ++ int i; ++ ++ if (!priv) ++ return 0; ++ ++ for (i = 0; i < QCA8K_IPQ4019_NUM_PORTS; i++) ++ qca8k_port_set_status(priv, i, 0); ++ ++ dsa_unregister_switch(priv->ds); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++static const struct of_device_id qca8k_ipq4019_of_match[] = { ++ { .compatible = "qca,ipq4019-qca8337n", }, ++ { /* sentinel */ }, ++}; ++ ++static struct platform_driver qca8k_ipq4019_driver = { ++ .probe = qca8k_ipq4019_probe, ++ .remove = qca8k_ipq4019_remove, ++ .driver = { ++ .name = "qca8k-ipq4019", ++ .of_match_table = qca8k_ipq4019_of_match, ++ }, ++}; ++ ++module_platform_driver(qca8k_ipq4019_driver); ++ ++MODULE_AUTHOR("Mathieu Olivari, John Crispin "); ++MODULE_AUTHOR("Gabor Juhos , Robert Marko "); ++MODULE_DESCRIPTION("Qualcomm IPQ4019 built-in switch driver"); ++MODULE_LICENSE("GPL"); +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -19,7 +19,10 @@ + #define QCA8K_ETHERNET_TIMEOUT 5 + + #define QCA8K_NUM_PORTS 7 ++#define QCA8K_IPQ4019_NUM_PORTS 6 + #define QCA8K_NUM_CPU_PORTS 2 ++#define QCA8K_IPQ4019_NUM_CPU_PORTS 1 ++#define QCA8K_IPQ4019_CPU_PORT 0 + #define QCA8K_MAX_MTU 9000 + #define QCA8K_NUM_LAGS 4 + #define QCA8K_NUM_PORTS_FOR_LAG 4 +@@ -28,6 +31,7 @@ + #define QCA8K_ID_QCA8327 0x12 + #define PHY_ID_QCA8337 0x004dd036 + #define QCA8K_ID_QCA8337 0x13 ++#define QCA8K_ID_IPQ4019 0x14 + + #define QCA8K_QCA832X_MIB_COUNT 39 + #define QCA8K_QCA833X_MIB_COUNT 41 +@@ -265,6 +269,7 @@ + #define QCA8K_PORT_LOOKUP_STATE_LEARNING QCA8K_PORT_LOOKUP_STATE(0x3) + #define QCA8K_PORT_LOOKUP_STATE_FORWARD QCA8K_PORT_LOOKUP_STATE(0x4) + #define QCA8K_PORT_LOOKUP_LEARN BIT(20) ++#define QCA8K_PORT_LOOKUP_LOOPBACK_EN BIT(21) + #define QCA8K_PORT_LOOKUP_ING_MIRROR_EN BIT(25) + + #define QCA8K_REG_GOL_TRUNK_CTRL0 0x700 +@@ -341,6 +346,53 @@ + #define MII_ATH_MMD_ADDR 0x0d + #define MII_ATH_MMD_DATA 0x0e + ++/* IPQ4019 PSGMII PHY registers */ ++#define QCA8K_IPQ4019_REG_RGMII_CTRL 0x004 ++#define QCA8K_IPQ4019_RGMII_CTRL_RGMII_RXC GENMASK(1, 0) ++#define QCA8K_IPQ4019_RGMII_CTRL_RGMII_TXC GENMASK(9, 8) ++/* Some kind of CLK selection ++ * 0: gcc_ess_dly2ns ++ * 1: gcc_ess_clk ++ */ ++#define QCA8K_IPQ4019_RGMII_CTRL_CLK BIT(10) ++#define QCA8K_IPQ4019_RGMII_CTRL_DELAY_RMII0 GENMASK(17, 16) ++#define QCA8K_IPQ4019_RGMII_CTRL_INVERT_RMII0_REF_CLK BIT(18) ++#define QCA8K_IPQ4019_RGMII_CTRL_DELAY_RMII1 GENMASK(20, 19) ++#define QCA8K_IPQ4019_RGMII_CTRL_INVERT_RMII1_REF_CLK BIT(21) ++#define QCA8K_IPQ4019_RGMII_CTRL_INVERT_RMII0_MASTER_EN BIT(24) ++#define QCA8K_IPQ4019_RGMII_CTRL_INVERT_RMII1_MASTER_EN BIT(25) ++ ++#define PSGMIIPHY_MODE_CONTROL 0x1b4 ++#define PSGMIIPHY_MODE_ATHR_CSCO_MODE_25M BIT(0) ++#define PSGMIIPHY_TX_CONTROL 0x288 ++#define PSGMIIPHY_TX_CONTROL_MAGIC_VALUE 0x8380 ++#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_1 0x9c ++#define PSGMIIPHY_REG_PLL_VCO_CALIB_RESTART BIT(14) ++#define PSGMIIPHY_VCO_CALIBRATION_CONTROL_REGISTER_2 0xa0 ++#define PSGMIIPHY_REG_PLL_VCO_CALIB_READY BIT(0) ++ ++#define QCA8K_PSGMII_CALB_NUM 100 ++#define MII_QCA8075_SSTATUS 0x11 ++#define QCA8075_PHY_SPEC_STATUS_LINK BIT(10) ++#define QCA8075_MMD7_CRC_AND_PKTS_COUNT 0x8029 ++#define QCA8075_MMD7_PKT_GEN_PKT_NUMB 0x8021 ++#define QCA8075_MMD7_PKT_GEN_PKT_SIZE 0x8062 ++#define QCA8075_MMD7_PKT_GEN_CTRL 0x8020 ++#define QCA8075_MMD7_CNT_SELFCLR BIT(1) ++#define QCA8075_MMD7_CNT_FRAME_CHK_EN BIT(0) ++#define QCA8075_MMD7_PKT_GEN_START BIT(13) ++#define QCA8075_MMD7_PKT_GEN_INPROGR BIT(15) ++#define QCA8075_MMD7_IG_FRAME_RECV_CNT_HI 0x802a ++#define QCA8075_MMD7_IG_FRAME_RECV_CNT_LO 0x802b ++#define QCA8075_MMD7_IG_FRAME_ERR_CNT 0x802c ++#define QCA8075_MMD7_EG_FRAME_RECV_CNT_HI 0x802d ++#define QCA8075_MMD7_EG_FRAME_RECV_CNT_LO 0x802e ++#define QCA8075_MMD7_EG_FRAME_ERR_CNT 0x802f ++#define QCA8075_MMD7_MDIO_BRDCST_WRITE 0x8028 ++#define QCA8075_MMD7_MDIO_BRDCST_WRITE_EN BIT(15) ++#define QCA8075_MDIO_BRDCST_PHY_ADDR 0x1f ++#define QCA8075_PKT_GEN_PKTS_COUNT 4096 ++ + enum { + QCA8K_PORT_SPEED_10M = 0, + QCA8K_PORT_SPEED_100M = 1, +@@ -466,6 +518,10 @@ struct qca8k_priv { + struct qca8k_pcs pcs_port_6; + const struct qca8k_match_data *info; + struct qca8k_led ports_led[QCA8K_LED_COUNT]; ++ /* IPQ4019 specific */ ++ struct regmap *psgmii; ++ struct phy_device *psgmii_ethphy; ++ bool psgmii_calibrated; + }; + + struct qca8k_mib_desc { diff --git a/target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch new file mode 100644 index 0000000000..e7203a3ac9 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/707-arm-dts-ipq4019-add-switch-node.patch @@ -0,0 +1,98 @@ +From 19c507c3fe4a6fc60317dcae2c55de452aecb7d5 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Mon, 1 Nov 2021 18:15:04 +0100 +Subject: [PATCH] arm: dts: ipq4019: add switch node + +Since the built-in IPQ40xx switch now has a driver, add the required node +for it to work. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++++ + 1 file changed, 76 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -594,6 +594,82 @@ + status = "disabled"; + }; + ++ switch: switch@c000000 { ++ compatible = "qca,ipq4019-qca8337n"; ++ reg = <0xc000000 0x80000>, <0x98000 0x800>; ++ reg-names = "base", "psgmii_phy"; ++ resets = <&gcc ESS_PSGMII_ARES>; ++ reset-names = "psgmii_rst"; ++ mdio = <&mdio>; ++ psgmii-ethphy = <&psgmiiphy>; ++ ++ status = "disabled"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { /* MAC0 */ ++ reg = <0>; ++ label = "cpu"; ++ ethernet = <&gmac>; ++ phy-mode = "internal"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ asym-pause; ++ }; ++ }; ++ ++ swport1: port@1 { /* MAC1 */ ++ reg = <1>; ++ label = "lan1"; ++ phy-handle = <ðphy0>; ++ phy-mode = "psgmii"; ++ ++ status = "disabled"; ++ }; ++ ++ swport2: port@2 { /* MAC2 */ ++ reg = <2>; ++ label = "lan2"; ++ phy-handle = <ðphy1>; ++ phy-mode = "psgmii"; ++ ++ status = "disabled"; ++ }; ++ ++ swport3: port@3 { /* MAC3 */ ++ reg = <3>; ++ label = "lan3"; ++ phy-handle = <ðphy2>; ++ phy-mode = "psgmii"; ++ ++ status = "disabled"; ++ }; ++ ++ swport4: port@4 { /* MAC4 */ ++ reg = <4>; ++ label = "lan4"; ++ phy-handle = <ðphy3>; ++ phy-mode = "psgmii"; ++ ++ status = "disabled"; ++ }; ++ ++ swport5: port@5 { /* MAC5 */ ++ reg = <5>; ++ label = "wan"; ++ phy-handle = <ðphy4>; ++ phy-mode = "psgmii"; ++ ++ status = "disabled"; ++ }; ++ }; ++ }; ++ + gmac: ethernet@c080000 { + compatible = "qcom,ipq4019-ess-edma"; + reg = <0xc080000 0x8000>; diff --git a/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch b/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch new file mode 100644 index 0000000000..e8b89647ce --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch @@ -0,0 +1,67 @@ +From 5ac078c8fe18f3e8318547b8ed0ed782730c5039 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 10 Feb 2024 22:28:27 +0100 +Subject: [PATCH] ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodes + +Add QCA8075 PHY Package nodes. The PHY nodes that were previously +defined never worked and actually never had a driver to correctly setup +these PHY. Now that we have a correct driver, correctly add the PHY +Package node and set the default value of 300mw for tx driver strength +following specification of ipq4019 SoC. + +Signed-off-by: Christian Marangi +--- + arch/arm/boot/dts//qcom-ipq4019.dtsi | 35 +++++++++++++++--------- + 1 file changed, 22 insertions(+), 13 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -725,24 +725,33 @@ + reg = <0x90000 0x64>; + status = "disabled"; + +- ethphy0: ethernet-phy@0 { ++ ethernet-phy-package@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "qcom,qca8075-package"; + reg = <0>; +- }; +- +- ethphy1: ethernet-phy@1 { +- reg = <1>; +- }; + +- ethphy2: ethernet-phy@2 { +- reg = <2>; +- }; +- +- ethphy3: ethernet-phy@3 { +- reg = <3>; +- }; ++ qcom,tx-drive-strength-milliwatt = <300>; + +- ethphy4: ethernet-phy@4 { +- reg = <4>; ++ ethphy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ ethphy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ ethphy2: ethernet-phy@2 { ++ reg = <2>; ++ }; ++ ++ ethphy3: ethernet-phy@3 { ++ reg = <3>; ++ }; ++ ++ ethphy4: ethernet-phy@4 { ++ reg = <4>; ++ }; + }; + }; + diff --git a/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch new file mode 100644 index 0000000000..a9ba70ff2f --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch @@ -0,0 +1,25 @@ +From 79b38b9f85da868ca59b66715c20aa55104b640b Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Fri, 2 Oct 2020 10:43:26 +0200 +Subject: [PATCH] arm: dts: ipq4019: QCA807x properties + +This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI. + +Signed-off-by: Robert Marko +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -752,6 +752,10 @@ + ethphy4: ethernet-phy@4 { + reg = <4>; + }; ++ ++ psgmiiphy: psgmii-phy@5 { ++ reg = <5>; ++ }; + }; + }; + diff --git a/target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch b/target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch new file mode 100644 index 0000000000..149208aa69 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/711-net-qualcomm-ipqess-fix-TX-timeout-errors.patch @@ -0,0 +1,64 @@ +From d0055b03d9c8d48ad2b971821989b09ba95c39f8 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 17 Sep 2023 20:18:31 +0200 +Subject: [PATCH] net: qualcomm: ipqess: fix TX timeout errors + +Currently logic to handle napi tx completion is flawed and on the long +run on loaded condition cause TX timeout error with the queue not being +able to handle any new packet. + +There are 2 main cause of this: +- incrementing the packet done value wrongly +- handling 2 times the tx_ring tail + +ipqess_tx_unmap_and_free may return 2 kind values: +- 0: we are handling first and middle descriptor for the packet +- packet len: we are at the last descriptor for the packet + +Done value was wrongly incremented also for first and intermediate +descriptor for the packet resulting causing panic and TX timeouts by +comunicating to the kernel an inconsistent value of packet handling not +matching the expected ones. + +Tx_ring tail was handled twice for ipqess_tx_complete run resulting in +again done value incremented wrongly and also problem with idx handling +by actually skipping descriptor for some packets. + +Rework the loop logic to fix these 2 problem and also add some comments +to make sure ipqess_tx_unmap_and_free ret value is better +understandable. + +Signed-off-by: Christian Marangi +--- + drivers/net/ethernet/qualcomm/ipqess/ipqess.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.c ++++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c +@@ -453,13 +453,22 @@ static int ipqess_tx_complete(struct ipq + tail >>= IPQESS_TPD_CONS_IDX_SHIFT; + tail &= IPQESS_TPD_CONS_IDX_MASK; + +- do { ++ while ((tx_ring->tail != tail) && (done < budget)) { + ret = ipqess_tx_unmap_and_free(&tx_ring->ess->pdev->dev, + &tx_ring->buf[tx_ring->tail]); +- tx_ring->tail = IPQESS_NEXT_IDX(tx_ring->tail, tx_ring->count); ++ /* ipqess_tx_unmap_and_free may return 2 kind values: ++ * - 0: we are handling first and middle descriptor for the packet ++ * - packet len: we are at the last descriptor for the packet ++ * Increment total bytes handled and packet done only if we are ++ * handling the last descriptor for the packet. ++ */ ++ if (ret) { ++ total += ret; ++ done++; ++ } + +- total += ret; +- } while ((++done < budget) && (tx_ring->tail != tail)); ++ tx_ring->tail = IPQESS_NEXT_IDX(tx_ring->tail, tx_ring->count); ++ }; + + ipqess_w32(tx_ring->ess, IPQESS_REG_TX_SW_CONS_IDX_Q(tx_ring->idx), + tx_ring->tail); diff --git a/target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch new file mode 100644 index 0000000000..6afb27b178 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/850-soc-add-qualcomm-syscon.patch @@ -0,0 +1,175 @@ +From: Christian Lamparter +Subject: SoC: add qualcomm syscon +--- a/drivers/soc/qcom/Kconfig ++++ b/drivers/soc/qcom/Kconfig +@@ -248,4 +248,11 @@ config QCOM_ICC_BWMON + the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high + memory throughput even with lower CPU frequencies. + ++config QCOM_TCSR ++ tristate "QCOM Top Control and Status Registers" ++ depends on ARCH_QCOM ++ help ++ Say y here to enable TCSR support. The TCSR provides control ++ functions for various peripherals. ++ + endmenu +--- a/drivers/soc/qcom/Makefile ++++ b/drivers/soc/qcom/Makefile +@@ -29,3 +29,4 @@ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o + obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o + obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o + obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o ++obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o +--- /dev/null ++++ b/drivers/soc/qcom/qcom_tcsr.c +@@ -0,0 +1,98 @@ ++/* ++ * Copyright (c) 2014, The Linux foundation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License rev 2 and ++ * only rev 2 as published by the free Software foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define TCSR_USB_PORT_SEL 0xb0 ++#define TCSR_USB_HSPHY_CONFIG 0xC ++ ++#define TCSR_ESS_INTERFACE_SEL_OFFSET 0x0 ++#define TCSR_ESS_INTERFACE_SEL_MASK 0xf ++ ++#define TCSR_WIFI0_GLB_CFG_OFFSET 0x0 ++#define TCSR_WIFI1_GLB_CFG_OFFSET 0x4 ++#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2 0x4 ++ ++static int tcsr_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ const struct device_node *node = pdev->dev.of_node; ++ void __iomem *base; ++ u32 val; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) { ++ dev_err(&pdev->dev, "setting usb port select = %d\n", val); ++ writel(val, base + TCSR_USB_PORT_SEL); ++ } ++ ++ if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) { ++ dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val); ++ writel(val, base + TCSR_USB_HSPHY_CONFIG); ++ } ++ ++ if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) { ++ u32 tmp = 0; ++ dev_info(&pdev->dev, "setting ess interface select = %x\n", val); ++ tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET); ++ tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK); ++ tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK); ++ writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET); ++ } ++ ++ if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) { ++ dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val); ++ writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET); ++ writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET); ++ } ++ ++ if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) { ++ dev_info(&pdev->dev, ++ "setting wifi_noc_memtype_m0_m2 = %x\n", val); ++ writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2); ++ } ++ ++ return 0; ++} ++ ++static const struct of_device_id tcsr_dt_match[] = { ++ { .compatible = "qcom,tcsr", }, ++ { }, ++}; ++ ++MODULE_DEVICE_TABLE(of, tcsr_dt_match); ++ ++static struct platform_driver tcsr_driver = { ++ .driver = { ++ .name = "tcsr", ++ .owner = THIS_MODULE, ++ .of_match_table = tcsr_dt_match, ++ }, ++ .probe = tcsr_probe, ++}; ++ ++module_platform_driver(tcsr_driver); ++ ++MODULE_AUTHOR("Andy Gross "); ++MODULE_DESCRIPTION("QCOM TCSR driver"); ++MODULE_LICENSE("GPL v2"); +--- /dev/null ++++ b/include/dt-bindings/soc/qcom,tcsr.h +@@ -0,0 +1,48 @@ ++/* Copyright (c) 2014, The Linux Foundation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 and ++ * only version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++#ifndef __DT_BINDINGS_QCOM_TCSR_H ++#define __DT_BINDINGS_QCOM_TCSR_H ++ ++#define TCSR_USB_SELECT_USB3_P0 0x1 ++#define TCSR_USB_SELECT_USB3_P1 0x2 ++#define TCSR_USB_SELECT_USB3_DUAL 0x3 ++ ++/* IPQ40xx HS PHY Mode Select */ ++#define TCSR_USB_HSPHY_HOST_MODE 0x00E700E7 ++#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E7 ++ ++/* IPQ40xx ess interface mode select */ ++#define TCSR_ESS_PSGMII 0 ++#define TCSR_ESS_PSGMII_RGMII5 1 ++#define TCSR_ESS_PSGMII_RMII0 2 ++#define TCSR_ESS_PSGMII_RMII1 4 ++#define TCSR_ESS_PSGMII_RMII0_RMII1 6 ++#define TCSR_ESS_PSGMII_RGMII4 9 ++ ++/* ++ * IPQ40xx WiFi Global Config ++ * Bit 30:AXID_EN ++ * Enable AXI master bus Axid translating to confirm all txn submitted by order ++ * Bit 24: Use locally generated socslv_wxi_bvalid ++ * 1: use locally generate socslv_wxi_bvalid for performance. ++ * 0: use SNOC socslv_wxi_bvalid. ++ */ ++#define TCSR_WIFI_GLB_CFG 0x41000000 ++ ++/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */ ++#define TCSR_WIFI_NOC_MEMTYPE_M0_M2 0x02222222 ++ ++/* TCSR A/B REG */ ++#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0 ++#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1 ++ ++#endif diff --git a/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch b/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch new file mode 100644 index 0000000000..c73e40429c --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch @@ -0,0 +1,27 @@ +From c668fd2c4d9ad4a510fd214a2da83bd9b67a2508 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 13 Aug 2023 18:13:08 +0200 +Subject: [PATCH] Revert "firmware: qcom_scm: Clear download bit during reboot" + +This reverts commit a3ea89b5978dbcd0fa55f675c5a1e04611093709. + +It is breaking reboot on IPQ4019 boards, so revert until a proper fix +is found. + +Signed-off-by: Robert Marko +--- + drivers/firmware/qcom_scm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/firmware/qcom_scm.c ++++ b/drivers/firmware/qcom_scm.c +@@ -1466,7 +1466,8 @@ static int qcom_scm_probe(struct platfor + static void qcom_scm_shutdown(struct platform_device *pdev) + { + /* Clean shutdown, disable download mode to allow normal restart */ +- qcom_scm_set_download_mode(false); ++ if (download_mode) ++ qcom_scm_set_download_mode(false); + } + + static const struct of_device_id qcom_scm_dt_match[] = { diff --git a/target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch b/target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch new file mode 100644 index 0000000000..c15a4b3ae3 --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/998-lantiq-atm-hacks.patch @@ -0,0 +1,43 @@ +From: John Crispin +Date: Fri, 3 Aug 2012 10:27:25 +0200 +Subject: [PATCH 04/36] MIPS: lantiq: add atm hack + +Signed-off-by: John Crispin +--- a/include/uapi/linux/atm.h ++++ b/include/uapi/linux/atm.h +@@ -131,8 +131,14 @@ + #define ATM_ABR 4 + #define ATM_ANYCLASS 5 /* compatible with everything */ + ++#define ATM_VBR_NRT ATM_VBR ++#define ATM_VBR_RT 6 ++#define ATM_UBR_PLUS 7 ++#define ATM_GFR 8 ++ + #define ATM_MAX_PCR -1 /* maximum available PCR */ + ++ + struct atm_trafprm { + unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */ + int max_pcr; /* maximum PCR in cells per second */ +@@ -155,6 +161,9 @@ struct atm_trafprm { + unsigned int adtf :10; /* ACR Decrease Time Factor (10-bit) */ + unsigned int cdf :3; /* Cutoff Decrease Factor (3-bit) */ + unsigned int spare :9; /* spare bits */ ++ int scr; /* sustained rate in cells per second */ ++ int mbs; /* maximum burst size (MBS) in cells */ ++ int cdv; /* Cell delay variation */ + }; + + struct atm_qos { +--- a/net/atm/proc.c ++++ b/net/atm/proc.c +@@ -141,7 +141,7 @@ static void *vcc_seq_next(struct seq_fil + static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc) + { + static const char *const class_name[] = { +- "off", "UBR", "CBR", "VBR", "ABR"}; ++ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"}; + static const char *const aal_name[] = { + "---", "1", "2", "3/4", /* 0- 3 */ + "???", "5", "???", "???", /* 4- 7 */ diff --git a/target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch b/target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch new file mode 100644 index 0000000000..3d5b7afe8c --- /dev/null +++ b/target/linux/ipq40xx/patches-6.1/999-atm-mpoa-intel-dsl-phy-support.patch @@ -0,0 +1,137 @@ +From: Subhra Banerjee +Date: Fri, 31 Aug 2018 12:01:19 +0530 +Subject: [PATCH] UGW_SW-29163: ATM oam support + +--- a/drivers/net/ppp/ppp_generic.c ++++ b/drivers/net/ppp/ppp_generic.c +@@ -2953,6 +2953,22 @@ char *ppp_dev_name(struct ppp_channel *c + return name; + } + ++/* ++ * Return the PPP device interface pointer ++ */ ++struct net_device *ppp_device(struct ppp_channel *chan) ++{ ++ struct channel *pch = chan->ppp; ++ struct net_device *dev = NULL; ++ ++ if (pch) { ++ read_lock_bh(&pch->upl); ++ if (pch->ppp && pch->ppp->dev) ++ dev = pch->ppp->dev; ++ read_unlock_bh(&pch->upl); ++ } ++ return dev; ++} + + /* + * Disconnect a channel from the generic layer. +@@ -3599,6 +3615,7 @@ EXPORT_SYMBOL(ppp_unregister_channel); + EXPORT_SYMBOL(ppp_channel_index); + EXPORT_SYMBOL(ppp_unit_number); + EXPORT_SYMBOL(ppp_dev_name); ++EXPORT_SYMBOL(ppp_device); + EXPORT_SYMBOL(ppp_input); + EXPORT_SYMBOL(ppp_input_error); + EXPORT_SYMBOL(ppp_output_wakeup); +--- a/include/linux/ppp_channel.h ++++ b/include/linux/ppp_channel.h +@@ -76,6 +76,9 @@ extern int ppp_unit_number(struct ppp_ch + /* Get the device name associated with a channel, or NULL if none */ + extern char *ppp_dev_name(struct ppp_channel *); + ++/* Get the device pointer associated with a channel, or NULL if none */ ++extern struct net_device *ppp_device(struct ppp_channel *); ++ + /* + * SMP locking notes: + * The channel code must ensure that when it calls ppp_unregister_channel, +--- a/net/atm/Kconfig ++++ b/net/atm/Kconfig +@@ -56,6 +56,12 @@ config ATM_MPOA + subnetwork boundaries. These shortcut connections bypass routers + enhancing overall network performance. + ++config ATM_MPOA_INTEL_DSL_PHY_SUPPORT ++ bool "Intel DSL Phy MPOA support" ++ depends on ATM && INET && ATM_MPOA!=n ++ help ++ Add support for Intel DSL Phy ATM MPOA ++ + config ATM_BR2684 + tristate "RFC1483/2684 Bridged protocols" + depends on ATM && INET +--- a/net/atm/br2684.c ++++ b/net/atm/br2684.c +@@ -598,6 +598,11 @@ static int br2684_regvcc(struct atm_vcc + atmvcc->push = br2684_push; + atmvcc->pop = br2684_pop; + atmvcc->release_cb = br2684_release_cb; ++#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT) ++ if (atm_hook_mpoa_setup) /* IPoA or EoA w/o FCS */ ++ atm_hook_mpoa_setup(atmvcc, brdev->payload == p_routed ? 3 : 0, ++ brvcc->encaps == BR2684_ENCAPS_LLC ? 1 : 0, net_dev); ++#endif + atmvcc->owner = THIS_MODULE; + + /* initialize netdev carrier state */ +--- a/net/atm/common.c ++++ b/net/atm/common.c +@@ -137,6 +137,11 @@ static struct proto vcc_proto = { + .release_cb = vcc_release_cb, + }; + ++#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT) ++void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *) = NULL; ++EXPORT_SYMBOL(atm_hook_mpoa_setup); ++#endif ++ + int vcc_create(struct net *net, struct socket *sock, int protocol, int family, int kern) + { + struct sock *sk; +--- a/net/atm/common.h ++++ b/net/atm/common.h +@@ -53,4 +53,6 @@ int svc_change_qos(struct atm_vcc *vcc,s + + void atm_dev_release_vccs(struct atm_dev *dev); + ++extern void (*atm_hook_mpoa_setup)(struct atm_vcc *, int, int, struct net_device *); ++ + #endif +--- a/net/atm/mpc.c ++++ b/net/atm/mpc.c +@@ -31,6 +31,7 @@ + /* Modular too */ + #include + ++#include "common.h" + #include "lec.h" + #include "mpc.h" + #include "resources.h" +@@ -645,6 +646,10 @@ static int atm_mpoa_vcc_attach(struct at + vcc->proto_data = mpc->dev; + vcc->push = mpc_push; + ++#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT) ++ if (atm_hook_mpoa_setup) /* IPoA, LLC */ ++ atm_hook_mpoa_setup(vcc, 3, 1, mpc->dev); ++#endif + return 0; + } + +--- a/net/atm/pppoatm.c ++++ b/net/atm/pppoatm.c +@@ -422,6 +422,12 @@ static int pppoatm_assign_vcc(struct atm + atmvcc->user_back = pvcc; + atmvcc->push = pppoatm_push; + atmvcc->pop = pppoatm_pop; ++#if IS_ENABLED(CONFIG_ATM_MPOA_INTEL_DSL_PHY_SUPPORT) ++ if (atm_hook_mpoa_setup) /* PPPoA */ ++ atm_hook_mpoa_setup(atmvcc, 2, ++ pvcc->encaps == e_llc ? 1 : 0, ++ ppp_device(&pvcc->chan)); ++#endif + atmvcc->release_cb = pppoatm_release_cb; + __module_get(THIS_MODULE); + atmvcc->owner = THIS_MODULE; From 68c46788717f2232cd7b9e9c49c15e9bb5a16b88 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:10:40 +0100 Subject: [PATCH 12/31] ipq40xx: split files in 6.1 and 6.6 dedicated directory Since with recent kernel version DTS moved to a dedicated directory, it's required to split files to per kernel version to follow kernel version directory structure. Also makes use of DEVICE_DTS_DIR to target the correct DTS directory based on the kernel version. Signed-off-by: Christian Marangi --- .../arch/arm/boot/dts/qcom-ipq4018-a42.dts | 0 .../arm/boot/dts/qcom-ipq4018-ap120c-ac.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts | 0 .../dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts | 0 .../arm/boot/dts/qcom-ipq4018-dap-2610.dts | 0 .../arm/boot/dts/qcom-ipq4018-ea6350v3.dts | 0 .../arm/boot/dts/qcom-ipq4018-eap1300.dts | 0 .../arm/boot/dts/qcom-ipq4018-ecw5211.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-emd1.dts | 0 .../arm/boot/dts/qcom-ipq4018-emr3500.dts | 0 .../arm/boot/dts/qcom-ipq4018-ens620ext.dts | 0 .../arm/boot/dts/qcom-ipq4018-ex6100v2.dts | 0 .../arm/boot/dts/qcom-ipq4018-ex6150v2.dts | 0 .../arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi | 0 .../boot/dts/qcom-ipq4018-fritzbox-4040.dts | 0 .../arm/boot/dts/qcom-ipq4018-gl-a1300.dts | 0 .../arm/boot/dts/qcom-ipq4018-gl-ap1300.dts | 0 .../arm/boot/dts/qcom-ipq4018-hap-ac2.dts | 0 .../arm/boot/dts/qcom-ipq4018-jalapeno.dts | 0 .../arm/boot/dts/qcom-ipq4018-jalapeno.dtsi | 0 .../dts/qcom-ipq4018-magic-2-wifi-next.dts | 0 .../boot/dts/qcom-ipq4018-meshpoint-one.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-mf287.dts | 0 .../boot/dts/qcom-ipq4018-mf287_common.dtsi | 0 .../arm/boot/dts/qcom-ipq4018-mf287plus.dts | 0 .../arm/boot/dts/qcom-ipq4018-mf287pro.dts | 0 .../arm/boot/dts/qcom-ipq4018-nbg6617.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-pa1200.dts | 0 .../arm/boot/dts/qcom-ipq4018-rt-ac58u.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4018-rutx10.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-rutx50.dts | 0 .../arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-wac510.dts | 0 .../arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts | 0 .../arm/boot/dts/qcom-ipq4018-wap-ac.dtsi | 0 .../arm/boot/dts/qcom-ipq4018-wap-r-ac.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-whw01.dts | 0 .../arch/arm/boot/dts/qcom-ipq4018-wr-1.dts | 0 .../arm/boot/dts/qcom-ipq4018-wre6606.dts | 0 .../arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-a62.dts | 0 .../arm/boot/dts/qcom-ipq4019-cm520-79f.dts | 0 .../arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts | 0 .../arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts | 0 .../arm/boot/dts/qcom-ipq4019-e2600ac.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4019-ea8300.dts | 0 .../arm/boot/dts/qcom-ipq4019-eap2200.dts | 0 .../boot/dts/qcom-ipq4019-fritzbox-7530.dts | 0 .../dts/qcom-ipq4019-fritzrepeater-1200.dts | 0 .../dts/qcom-ipq4019-fritzrepeater-3000.dts | 0 .../arm/boot/dts/qcom-ipq4019-gl-b2200.dts | 0 .../boot/dts/qcom-ipq4019-habanero-dvk.dts | 0 .../dts/qcom-ipq4019-hap-ac3-lte6-kit.dts | 0 .../arm/boot/dts/qcom-ipq4019-hap-ac3.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-lbr20.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-le1.dts | 0 .../arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts | 0 .../arm/boot/dts/qcom-ipq4019-map-ac2200.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-mf18a.dts | 0 .../arm/boot/dts/qcom-ipq4019-mf282plus.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-mf286d.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-mf289f.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-mr8300.dts | 0 .../dts/qcom-ipq4019-ncp-hg100-cellular.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-oap100.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4019-pa2200.dts | 0 .../arm/boot/dts/qcom-ipq4019-r619ac-128m.dts | 0 .../arm/boot/dts/qcom-ipq4019-r619ac-64m.dts | 0 .../arm/boot/dts/qcom-ipq4019-r619ac.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4019-rbr40.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-rbr50.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-rbs40.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-rbs50.dts | 0 .../arm/boot/dts/qcom-ipq4019-rt-ac42u.dts | 0 .../arm/boot/dts/qcom-ipq4019-rtl30vw.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-srr60.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-srs60.dts | 0 .../arm/boot/dts/qcom-ipq4019-u4019-32m.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi | 0 .../arm/boot/dts/qcom-ipq4019-whw03v2.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-wifi.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-wpj419.dts | 0 .../arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-x1pro.dts | 0 .../arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi | 0 .../arm/boot/dts/qcom-ipq4019-xx8300.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4028-wpj428.dts | 0 .../arch/arm/boot/dts/qcom-ipq4029-ap-303.dts | 0 .../arm/boot/dts/qcom-ipq4029-ap-303h.dts | 0 .../arch/arm/boot/dts/qcom-ipq4029-ap-365.dts | 0 .../dts/qcom-ipq4029-aruba-glenmorangie.dtsi | 0 .../arm/boot/dts/qcom-ipq4029-gl-b1300.dts | 0 .../arm/boot/dts/qcom-ipq4029-gl-s1300.dts | 0 .../boot/dts/qcom-ipq4029-insect-common.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq4029-mr33.dts | 0 .../arch/arm/boot/dts/qcom-ipq4029-mr74.dts | 0 .../arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts | 0 .../arm/boot/dts/qcom-ipq4029-ws-ap391x.dts | 0 .../arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts | 0 .../arm/boot/dts/qcom/qcom-ipq4018-a42.dts | 240 +++++++ .../boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts | 359 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts | 255 +++++++ .../qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts | 296 ++++++++ .../boot/dts/qcom/qcom-ipq4018-dap-2610.dts | 235 +++++++ .../boot/dts/qcom/qcom-ipq4018-ea6350v3.dts | 312 +++++++++ .../boot/dts/qcom/qcom-ipq4018-eap1300.dts | 236 +++++++ .../boot/dts/qcom/qcom-ipq4018-ecw5211.dts | 334 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-emd1.dts | 212 ++++++ .../boot/dts/qcom/qcom-ipq4018-emr3500.dts | 217 ++++++ .../boot/dts/qcom/qcom-ipq4018-ens620ext.dts | 251 +++++++ .../boot/dts/qcom/qcom-ipq4018-ex6100v2.dts | 31 + .../boot/dts/qcom/qcom-ipq4018-ex6150v2.dts | 31 + .../boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi | 348 ++++++++++ .../dts/qcom/qcom-ipq4018-fritzbox-4040.dts | 330 +++++++++ .../boot/dts/qcom/qcom-ipq4018-gl-a1300.dts | 343 ++++++++++ .../boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts | 308 +++++++++ .../boot/dts/qcom/qcom-ipq4018-hap-ac2.dts | 298 ++++++++ .../boot/dts/qcom/qcom-ipq4018-jalapeno.dts | 9 + .../boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi | 279 ++++++++ .../qcom/qcom-ipq4018-magic-2-wifi-next.dts | 258 +++++++ .../dts/qcom/qcom-ipq4018-meshpoint-one.dts | 84 +++ .../arm/boot/dts/qcom/qcom-ipq4018-mf287.dts | 229 +++++++ .../dts/qcom/qcom-ipq4018-mf287_common.dtsi | 188 ++++++ .../boot/dts/qcom/qcom-ipq4018-mf287plus.dts | 229 +++++++ .../boot/dts/qcom/qcom-ipq4018-mf287pro.dts | 276 ++++++++ .../boot/dts/qcom/qcom-ipq4018-nbg6617.dts | 365 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts | 232 +++++++ .../boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts | 330 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-rutx.dtsi | 324 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-rutx10.dts | 73 ++ .../arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts | 181 +++++ .../boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts | 241 +++++++ .../arm/boot/dts/qcom/qcom-ipq4018-wac510.dts | 385 +++++++++++ .../boot/dts/qcom/qcom-ipq4018-wap-ac-lte.dts | 45 ++ .../arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dts | 9 + .../boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi | 217 ++++++ .../boot/dts/qcom/qcom-ipq4018-wap-r-ac.dts | 45 ++ .../arm/boot/dts/qcom/qcom-ipq4018-whw01.dts | 338 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts | 289 ++++++++ .../boot/dts/qcom/qcom-ipq4018-wre6606.dts | 255 +++++++ .../dts/qcom/qcom-ipq4018-wrtq-329acn.dts | 305 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-a62.dts | 276 ++++++++ .../boot/dts/qcom/qcom-ipq4019-cm520-79f.dts | 393 +++++++++++ .../boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts | 139 ++++ .../boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts | 182 +++++ .../boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi | 246 +++++++ .../arm/boot/dts/qcom/qcom-ipq4019-ea8300.dts | 100 +++ .../boot/dts/qcom/qcom-ipq4019-eap2200.dts | 291 ++++++++ .../dts/qcom/qcom-ipq4019-fritzbox-7530.dts | 325 +++++++++ .../qcom/qcom-ipq4019-fritzrepeater-1200.dts | 294 ++++++++ .../qcom/qcom-ipq4019-fritzrepeater-3000.dts | 274 ++++++++ .../boot/dts/qcom/qcom-ipq4019-gl-b2200.dts | 392 +++++++++++ .../dts/qcom/qcom-ipq4019-habanero-dvk.dts | 392 +++++++++++ .../qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts | 318 +++++++++ .../boot/dts/qcom/qcom-ipq4019-hap-ac3.dts | 357 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts | 516 ++++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-le1.dts | 330 +++++++++ .../boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts | 284 ++++++++ .../boot/dts/qcom/qcom-ipq4019-map-ac2200.dts | 363 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts | 490 ++++++++++++++ .../boot/dts/qcom/qcom-ipq4019-mf282plus.dts | 454 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts | 453 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts | 443 ++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-mr8300.dts | 86 +++ .../qcom/qcom-ipq4019-ncp-hg100-cellular.dts | 635 ++++++++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-oap100.dts | 342 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi | 345 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts | 256 +++++++ .../dts/qcom/qcom-ipq4019-r619ac-128m.dts | 18 + .../boot/dts/qcom/qcom-ipq4019-r619ac-64m.dts | 12 + .../boot/dts/qcom/qcom-ipq4019-r619ac.dtsi | 387 +++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-rbr40.dts | 12 + .../arm/boot/dts/qcom/qcom-ipq4019-rbr50.dts | 30 + .../arm/boot/dts/qcom/qcom-ipq4019-rbs40.dts | 12 + .../arm/boot/dts/qcom/qcom-ipq4019-rbs50.dts | 30 + .../boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts | 324 +++++++++ .../boot/dts/qcom/qcom-ipq4019-rtl30vw.dts | 397 +++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-srr60.dts | 12 + .../arm/boot/dts/qcom/qcom-ipq4019-srs60.dts | 12 + .../boot/dts/qcom/qcom-ipq4019-u4019-32m.dts | 91 +++ .../arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi | 216 ++++++ .../boot/dts/qcom/qcom-ipq4019-whw03v2.dts | 518 ++++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-wifi.dts | 451 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts | 373 ++++++++++ .../dts/qcom/qcom-ipq4019-wtr-m2133hp.dts | 472 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4019-x1pro.dts | 92 +++ .../arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi | 218 ++++++ .../boot/dts/qcom/qcom-ipq4019-xx8300.dtsi | 326 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts | 316 +++++++++ .../arm/boot/dts/qcom/qcom-ipq4029-ap-303.dts | 204 ++++++ .../boot/dts/qcom/qcom-ipq4029-ap-303h.dts | 479 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4029-ap-365.dts | 227 +++++++ .../qcom/qcom-ipq4029-aruba-glenmorangie.dtsi | 271 ++++++++ .../boot/dts/qcom/qcom-ipq4029-gl-b1300.dts | 329 +++++++++ .../boot/dts/qcom/qcom-ipq4029-gl-s1300.dts | 363 ++++++++++ .../dts/qcom/qcom-ipq4029-insect-common.dtsi | 444 ++++++++++++ .../arm/boot/dts/qcom/qcom-ipq4029-mr33.dts | 13 + .../arm/boot/dts/qcom/qcom-ipq4029-mr74.dts | 13 + .../boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts | 262 ++++++++ .../boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts | 344 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts | 424 ++++++++++++ target/linux/ipq40xx/image/Makefile | 1 + 205 files changed, 26491 insertions(+) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-a42.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-cap-ac.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-cs-w3-wd1200g-eup.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-dap-2610.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-emd1.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-emr3500.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ens620ext.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-mf287.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-mf287_common.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-rutx50.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-sxtsq-5-ac.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wac510.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wap-r-ac.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-whw01.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-a62.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-ea8300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-1200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-fritzrepeater-3000.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-hap-ac3-lte6-kit.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-hap-ac3.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-lbr20.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-le1.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-lhgg-60ad.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-map-ac2200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-mf282plus.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-mf286d.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-mf289f.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-mr8300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-oap100.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-orbi.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-pa2200.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rbr40.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rbr50.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rbs40.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rbs50.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-srr60.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-srs60.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-wifi.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-x1pro.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts (100%) rename target/linux/ipq40xx/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts (100%) rename target/linux/ipq40xx/{files => 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target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-fritzbox-4040.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-hap-ac2.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-magic-2-wifi-next.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-meshpoint-one.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287_common.dtsi b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287_common.dtsi similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287_common.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287_common.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287plus.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-pa1200.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx10.dts rename to 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target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wac510.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wap-ac-lte.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wap-ac.dtsi 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a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wr-1.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts rename to 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target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-xx8300.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts 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a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-insect-common.dtsi diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-mr33.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr33.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-mr33.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-mr74.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-mr74.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-mr74.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ws-ap3915i.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap391x.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ws-ap391x.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ws-ap391x.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ws-ap391x.dts diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts similarity index 100% rename from target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts rename to target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq40x9-dr40x9.dts diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts new file mode 100644 index 0000000000..f43c4b8000 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: ISC +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2017, Sven Eckelmann + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "OpenMesh A42"; + compatible = "openmesh,a42"; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_green; + led-running = &led_status_green; + led-upgrade = &led_status_green; + label-mac-device = &swport5; + }; + + leds { + compatible = "gpio-leds"; + + status_red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: status_green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + /* partitions are passed via bootloader */ + partitions { + partition-art { + label = "0:ART"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "ethernet2"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&swport5 { + status = "okay"; + label = "ethernet1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A42"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A42"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts new file mode 100644 index 0000000000..ceaa1edd45 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts @@ -0,0 +1,359 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ALFA Network AP120C-AC"; + compatible = "alfa-network,ap120c-ac"; + + aliases { + led-boot = &status; + led-failsafe = &status; + led-running = &status; + led-upgrade = &status; + ethernet1 = &swport5; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + status: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <ðphy4 1 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "red:wlan5g"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c3 { + status = "okay"; + + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + tpm@29 { + compatible = "atmel,at97sc3204t"; + reg = <0x29>; + }; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 4 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@180000 { + label = "priv_data1"; + reg = <0x00180000 0x00010000>; + read-only; + }; + + partition@190000 { + label = "priv_data2"; + reg = <0x00190000 0x00010000>; + read-only; + }; + }; + }; + + nand@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs1"; + reg = <0x00000000 0x04000000>; + }; + + partition@4000000 { + label = "rootfs2"; + reg = <0x04000000 0x04000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial0_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +ðphy4 { + gpio-controller; + #gpio-cells = <2>; +}; + +&tlmm { + i2c0_pins: i2c0_pinmux { + mux_i2c { + function = "blsp_i2c0"; + pins = "gpio58", "gpio59"; + drive-strength = <16>; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_mdio { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_mdc { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial0_pins: serial0_pinmux { + mux_uart { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + mux_spi { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio4"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts new file mode 100644 index 0000000000..388b2dd590 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cap-ac.dts @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MikroTik cAP ac"; + compatible = "mikrotik,cap-ac"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x08000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_user; + led-failsafe = &led_user; + led-running = &led_user; + led-upgrade = &led_user; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + mode { + label = "mode"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + led_user: user { + label = "green:user"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + eth1 { + label = "green:eth1"; + gpios = <ðphy4 1 GPIO_ACTIVE_HIGH>; + }; + + eth2 { + label = "green:eth2"; + gpios = <ðphy3 1 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@100000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x100000 0xf00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +ðphy3 { + gpio-controller; + #gpio-cells = <2>; +}; + +ðphy4 { + gpio-controller; + #gpio-cells = <2>; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-cAP-ac"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-cAP-ac"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts new file mode 100644 index 0000000000..c388ceca27 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-cs-w3-wd1200g-eup.dts @@ -0,0 +1,296 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "EZVIZ CS-W3-WD1200G EUP"; + compatible = "ezviz,cs-w3-wd1200g-eup"; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_green; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + reset-delay-us = <5000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: status_red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; + }; + + led_status_green: status_green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; + }; + + led_status_blue: status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition5@E0000 { + label = "APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + + partition6@F0000 { + label = "APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition7@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition9@580000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x00180000 0x00e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + label = "lan3"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; + label = "wan"; + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; +}; + +ðphy0 { + status = "disabled"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ezviz-cs-w3-wd1200g-eup"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts new file mode 100644 index 0000000000..fef549035d --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-dap-2610.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "D-Link DAP 2610"; + compatible = "dlink,dap-2610"; + + aliases { + led-boot = &led_red; + led-failsafe = &led_red; + led-running = &led_green; + led-upgrade = &led_red; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + rng@22000 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_red: red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + }; + + led_green: green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fixed-partitions"; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + partition@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + partition@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + partition@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + partition@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + partition@180000 { + compatible = "wrg"; + label = "firmware"; + reg = <0x180000 0xdc0000>; + }; + partition@fb0000 { + label = "rgbd"; + reg = <0xfb0000 0x10000>; + read-only; + }; + partition@fc0000 { + label = "bdcfg"; + reg = <0xfc0000 0x10000>; + read-only; + }; + partition@fd0000 { + label = "langpack"; + reg = <0xfd0000 0x20000>; + read-only; + }; + partition@ff0000 { + label = "certificate"; + reg = <0xff0000 0x10000>; + read-only; + }; + partition@f40000 { + label = "captival"; + reg = <0xf40000 0x70000>; + read-only; + }; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport5 { + status = "okay"; + + label = "lan"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "dlink,dap-2610"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "dlink,dap-2610"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts new file mode 100644 index 0000000000..50e7f3d4e0 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Linksys EA6350v3"; + compatible = "linksys,ea6350v3"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "linksys-ea6350v3"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "linksys-ea6350v3"; +}; + +&blsp_dma { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp1_spi1 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + SBL1@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + MBIB@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + QSEE@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + CDT@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + APPSBLENV@d0000 { + label = "APPSBLENV"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + APPSBL@e0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000e0000 0x00080000>; + read-only; + }; + ART@160000 { + label = "ART"; + reg = <0x00160000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + u_env@170000 { + label = "u_env"; + reg = <0x00170000 0x00020000>; + }; + s_env@190000 { + label = "s_env"; + reg = <0x00190000 0x00020000>; + }; + devinfo@1b0000 { + label = "devinfo"; + reg = <0x001b0000 0x00010000>; + }; + /* 0x001c0000 - 0x00200000 unused */ + }; + }; + + flash@1 { + status = "okay"; + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + kernel@0 { + label = "kernel"; + reg = <0x00000000 0x02800000>; + }; + rootfs@500000 { + label = "rootfs"; + reg = <0x00500000 0x02300000>; + }; + alt_kernel@2800000 { + label = "alt_kernel"; + reg = <0x02800000 0x02800000>; + }; + alt_rootfs@2d00000 { + label = "alt_rootfs"; + reg = <0x02d00000 0x02300000>; + }; + sysdiag@5000000 { + label = "sysdiag"; + reg = <0x05000000 0x00100000>; + }; + syscfg@5100000 { + label = "syscfg"; + reg = <0x05100000 0x02F00000>; + }; + /* 0x00000000 - 0x08000000: 128 MiB */ + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts new file mode 100644 index 0000000000..e9d4775fd8 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-eap1300.dts @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "EnGenius EAP1300"; + compatible = "engenius,eap1300"; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + leds { + compatible = "gpio-leds"; + + power: orange { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + }; + + lan { + function = LED_FUNCTION_LAN; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + + mesh { + label = "blue:mesh"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "yellow:wlan5g"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio54", "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x00090000>; + read-only; + }; + partition7@180000 { + label = "0:ART"; + reg = <0x00180000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition8@190000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x190000 0x1dc0000>; + }; + partition9@1f50000 { + label = "u-boot-env"; + reg = <0x01f50000 0x00010000>; + }; + partition10@1f60000 { + label = "userconfig"; + reg = <0x01f60000 0x000a0000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "EnGenius-EAP1300"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "EnGenius-EAP1300"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ecw5211.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ecw5211.dts new file mode 100644 index 0000000000..e74d110b3d --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ecw5211.dts @@ -0,0 +1,334 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Edgecore ECW5211"; + compatible = "edgecore,ecw5211"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + ethernet0 = &swport5; + ethernet1 = &gmac; + }; + + chosen { + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_mdio { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_mdc { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio54", "gpio4"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + i2c0_pins: i2c0_pinmux { + mux_i2c { + function = "blsp_i2c0"; + pins = "gpio58", "gpio59"; + drive-strength = <16>; + bias-disable; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; /* uboot env */ + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "0:APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + flash@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs"; + reg = <0x00000000 0x04000000>; + }; + }; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + tpm@29 { + compatible = "atmel,at97sc3204t"; + reg = <0x29>; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emd1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emd1.dts new file mode 100644 index 0000000000..bca85cf4ab --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emd1.dts @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "EnGenius EMD1"; + compatible = "engenius,emd1"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "red:wlan2g"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "blue:wlan5g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + mesh { + label = "orange:mesh"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio54", "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition7@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + partition8@180000 { + label = "userconfig"; + reg = <0x00180000 0x00080000>; + read-only; + }; + partition9@200000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x200000 0x01e00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-EMD1"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-EMD1"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emr3500.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emr3500.dts new file mode 100644 index 0000000000..701dc936f1 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-emr3500.dts @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "EnGenius EMR3500"; + compatible = "engenius,emr3500"; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2_hs_phy: hsphy@a8000 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + leds { + compatible = "gpio-leds"; + + power: white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + + blue { + label = "blue"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + + red { + label = "red"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + + orange { + label = "orange"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio54", "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + partition@180000 { + label = "userconfig"; + reg = <0x00180000 0x00080000>; + read-only; + }; + partition@200000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x200000 0x1e00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-EMR3500"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-EMR3500"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ens620ext.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ens620ext.dts new file mode 100644 index 0000000000..17bac82bfe --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ens620ext.dts @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "EnGenius ENS620EXT"; + compatible = "engenius,ens620ext"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + /* + * Disable the broken restart as a workaround for the buggy + * 3.0.0/3.0.1 U-boots that ship with the device. + * Note: The watchdog is now used to restart this device. + */ + restart@4ab000 { + status = "disabled"; + }; + }; + + buttons { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + }; + + lan1 { + label = "green:lan1"; + gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; + }; + + lan2 { + label = "green:lan2"; + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp1_spi1 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00090000>; + read-only; + }; + partition@180000 { + label = "ART"; + reg = <0x00180000 0x00010000>; + read-only; + }; + partition@190000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x00190000 0x14d0000>; + }; + partition@1660000 { + label = "failsafe"; + reg = <0x01660000 0x008F0000>; + read-only; + }; + partition@1f50000 { + label = "u-boot-env"; + reg = <0x01f50000 0x00010000>; + read-only; + }; + partition@1f60000 { + label = "userconfig"; + reg = <0x01f60000 0x000a0000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "EnGenius-ENS620EXT"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6100v2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6100v2.dts new file mode 100644 index 0000000000..1495c64da9 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6100v2.dts @@ -0,0 +1,31 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4018-ex61x0v2.dtsi" + +/ { + model = "Netgear EX6100v2"; + compatible = "netgear,ex6100v2"; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "Netgear-EX6100v2"; +}; + +&wifi1 { + qcom,ath10k-calibration-variant = "Netgear-EX6100v2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6150v2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6150v2.dts new file mode 100644 index 0000000000..ce24466e54 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex6150v2.dts @@ -0,0 +1,31 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4018-ex61x0v2.dtsi" + +/ { + model = "Netgear EX6150v2"; + compatible = "netgear,ex6150v2"; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "Netgear-EX6150v2"; +}; + +&wifi1 { + qcom,ath10k-calibration-variant = "Netgear-EX6150v2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi new file mode 100644 index 0000000000..918224607a --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ex61x0v2.dtsi @@ -0,0 +1,348 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Netgear EX61X0v2"; + compatible = "netgear,ex61x0v2"; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + aliases { + led-boot = &power_amber; + led-failsafe = &power_amber; + led-running = &power_green; + led-upgrade = &power_amber; + label-mac-device = &gmac; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <1000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + power_amber: power_amber { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>; + }; + + power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; + }; + + right { + label = "blue:right"; + gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>; + }; + + left { + label = "blue:left"; + gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>; + }; + + client_green { + label = "green:client"; + gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>; + }; + + client_red { + label = "red:client"; + gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>; + }; + + router_green { + label = "green:router"; + gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>; + }; + + router_red { + label = "red:router"; + gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + mx25l12805d@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <45000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition5@E0000 { + label = "APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + + partition6@F0000 { + label = "APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition7@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition8@180000 { + label = "config"; + reg = <0x00180000 0x00010000>; + read-only; + }; + + partition9@190000 { + label = "pot"; + reg = <0x00190000 0x00010000>; + read-only; + }; + + partition10@1a0000 { + label = "dnidata"; + reg = <0x001a0000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_dnidata_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_dnidata_c: macaddr@c { + reg = <0xc 0x6>; + }; + }; + }; + + partition11@1b0000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x001b0000 0x00e10000>; + }; + + partition12@fc0000 { + label = "language"; + reg = <0x00fc0000 0x00040000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_dnidata_0>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_dnidata_c>; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts new file mode 100644 index 0000000000..524bcbcb2b --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-fritzbox-4040.dts @@ -0,0 +1,330 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "AVM FRITZ!Box 4040"; + compatible = "avm,fritzbox-4040"; + + aliases { + led-boot = &power; + led-failsafe = &flash; + led-running = &power; + led-upgrade = &flash; + label-mac-device = &gmac; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wlan { + label = "wlan"; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + switch-leds { + compatible = "gpio-leds"; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <ðphy0 0 GPIO_ACTIVE_HIGH>; + }; + + panic: info_red { + label = "red:info"; + gpios = <ðphy0 1 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <ðphy1 0 GPIO_ACTIVE_HIGH>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <ðphy2 1 GPIO_ACTIVE_HIGH>; + }; + + lan { + function = LED_FUNCTION_LAN; + color = ; + gpios = <ðphy3 0 GPIO_ACTIVE_HIGH>; + }; + + flash: info_amber { + label = "amber:info"; + gpios = <ðphy3 1 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + status = "okay"; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "APPSBLENV"; /* uboot env - empty */ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "urlader"; /* APPSBL */ + reg = <0x000f0000 0x0002dc000>; + read-only; + }; + partition7@11dc00 { + /* make a backup of this partition! */ + label = "urlader_config"; + reg = <0x0011dc00 0x00002400>; + read-only; + }; + partition8@120000 { + label = "tffs1"; + reg = <0x00120000 0x00080000>; + read-only; + }; + partition9@1a0000 { + label = "tffs2"; + reg = <0x001a0000 0x00080000>; + read-only; + }; + partition10@220000 { + label = "uboot"; + reg = <0x00220000 0x00080000>; + read-only; + }; + partition11@2A0000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x002a0000 0x01c60000>; + }; + partition12@1f00000 { + label = "jffs2"; + reg = <0x01f00000 0x00100000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +ðphy0 { + gpio-controller; + #gpio-cells = <2>; +}; + +ðphy1 { + gpio-controller; + #gpio-cells = <2>; + + enable-usb-power { + gpio-hog; + line-name = "enable USB3 power"; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +ðphy2 { + gpio-controller; + #gpio-cells = <2>; +}; + +ðphy3 { + gpio-controller; + #gpio-cells = <2>; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts new file mode 100644 index 0000000000..cdb0093217 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-a1300.dts @@ -0,0 +1,343 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "GL.iNet GL-A1300"; + compatible = "glinet,gl-a1300", "qcom,ipq4019"; + + aliases { + led-boot = &led_run; + led-failsafe = &led_run; + led-running = &led_run; + led-upgrade = &led_run; + label-mac-device = &swport4; + }; + + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + switch { + label = "switch-button"; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_run: blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + + white { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + + usb { + gpio-export,name = "usb_power"; + gpio-export,output = <1>; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@180000 { + label = "log"; + reg = <0x00180000 0x00020000>; + }; + }; + }; + + spi-nand@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + pinmux { + pins = "gpio58", "gpio59"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + mux_spi { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio5"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; +}; + +&usb2 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0 2>; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0 0>; +}; + +&swport5 { + status = "okay"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "GL-A1300"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "GL-A1300"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts new file mode 100644 index 0000000000..5fc97d7bb2 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-gl-ap1300.dts @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "GL.iNet GL-AP1300"; + compatible = "glinet,gl-ap1300"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>; + + flash@0 { + status = "okay"; + + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: mac-address@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: mac-address@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + spi-nand@1 { + status = "okay"; + + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + mux_spi { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio5"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan"; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +&swport5 { + status = "okay"; + label = "wan"; + + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "GL-AP1300"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "GL-AP1300"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts new file mode 100644 index 0000000000..fa3ed8b054 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-hap-ac2.dts @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MikroTik hAP ac2"; + compatible = "mikrotik,hap-ac2"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x08000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_user; + led-failsafe = &led_user; + led-running = &led_user; + led-upgrade = &led_user; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + mode { + label = "mode"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + panic-indicator; + }; + + led_user: user { + label = "green:user"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable USB power"; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + size = <0x2000>; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@100000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x100000 0xf00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +ðphy0 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy1 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy2 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy3 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy4 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + label = "lan4"; +}; + +&swport2 { + status = "okay"; + label = "lan3"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-hAP-ac2"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-hAP-ac2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts new file mode 100644 index 0000000000..988b86b68d --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2018, Robert Marko + +#include "qcom-ipq4018-jalapeno.dtsi" + +/ { + model = "8devices Jalapeno"; + compatible = "8dev,jalapeno"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi new file mode 100644 index 0000000000..bb293bb57e --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi @@ -0,0 +1,279 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2018, Robert Marko + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + aliases { + ethernet1 = &swport5; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + pinmux_1 { + pins = "gpio53"; + function = "mdio"; + }; + + pinmux_2 { + pins = "gpio52"; + function = "mdc"; + }; + + pinconf { + pins = "gpio52", "gpio53"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + status = "okay"; + + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + spi-nand@1 { + status = "okay"; + + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts new file mode 100644 index 0000000000..501aed5467 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-magic-2-wifi-next.dts @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "devolo Magic 2 WiFi next"; + compatible = "devolo,magic-2-wifi-next"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + plc { + gpio-export,name = "plc-enable"; + gpio-export,output = <1>; + gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; + }; + }; + + }; + + keys { + compatible = "gpio-keys"; + + wlan { + label = "WLAN"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "Reset"; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + status_dlan { + label = "white:dlan"; + gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + status_wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + error_dlan { + label = "red:dlan"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; +}; + +&tlmm { + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio61", "gpio60"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + button_pins: button_pinmux { + mux { + function = "gpio"; + pins = "gpio0", "gpio5"; + bias-disable; + input; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +ðphy0 { + status = "disabled"; +}; + +ðphy1 { + status = "disabled"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "devolo,magic-2-wifi-next"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "devolo,magic-2-wifi-next"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + linux,modalias = "n25q128a11"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + }; + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + firmware@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x00180000 0x01a80000>; + }; + }; + }; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport5 { + status = "okay"; + label = "lan1"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "ghn"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-meshpoint-one.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-meshpoint-one.dts new file mode 100644 index 0000000000..cab34b5a6c --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-meshpoint-one.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2019, CRISIS INNOVATION LAB d.o.o. + * Author: Robert Marko + */ + +#include + +#include "qcom-ipq4018-jalapeno.dtsi" + +/ { + model = "Crisis Innovation Lab MeshPoint.One"; + compatible = "cilab,meshpoint-one"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + soc { + i2c-gpio { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + compatible = "i2c-gpio"; + gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */ + &tlmm 4 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */ + >; + + bme280@76 { + status = "okay"; + + compatible = "bosch,bme280"; + reg = <0x76>; + }; + + pcf2129@51 { + status = "okay"; + + compatible = "nxp,pcf2129"; + reg = <0x51>; + }; + + ina230@40 { + status = "okay"; + + compatible = "ti,ina230"; + reg = <0x40>; + shunt-resistor = <2000>; + }; + + ina230@44 { + status = "okay"; + + compatible = "ti,ina230"; + reg = <0x44>; + shunt-resistor = <2000>; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287.dts new file mode 100644 index 0000000000..fc4bae6937 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Giammarco Marzano . +// Copyright (c) 2023, Andreas Böhler + +#include "qcom-ipq4018-mf287_common.dtsi" + +/ { + model = "ZTE MF287"; + compatible = "zte,mf287"; +}; + +&gpio_modem_reset { + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; +}; + +&key_reset { + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; +}; + +&key_wps { + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; +}; + +&led_status { + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>, + <&tlmm 1 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; + + spi-nand@1 { /* flash@1 ? */ + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0x140000>; + read-only; + }; + + partition@140000 { + label = "ART"; + reg = <0x140000 0x140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@280000 { + label = "mac"; + reg = <0x280000 0x140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@3c0000 { + label = "cfg-param"; + reg = <0x3c0000 0x600000>; + read-only; + }; + + partition@9c0000 { + label = "oops"; + reg = <0x9c0000 0x140000>; + }; + + partition@b00000 { + label = "web"; + reg = <0xb00000 0x800000>; + }; + + partition@1300000 { + label = "rootfs"; + reg = <0x1300000 0x2200000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x3200000>; + }; + }; + }; + + zigbee@2 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "silabs,em3581"; + reg = <2>; + spi-max-frequency = <12000000>; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio59", "gpio1"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "zte,mf287"; +}; + +&wifi1{ + qcom,ath10k-calibration-variant = "zte,mf287"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi new file mode 100644 index 0000000000..3784e62d0b --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Giammarco Marzano . +// Copyright (c) 2023, Andreas Böhler + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + chosen { + /* + * bootargs forced by u-boot bootipq command: + * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait' + */ + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + leds { + compatible = "gpio-leds"; + + led_status: led-0 { + function = LED_FUNCTION_POWER; + color = ; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + gpio_modem_reset: modem { + gpio-export,name = "modem-reset"; + gpio-export,output = <0>; + }; + }; + + keys { + compatible = "gpio-keys"; + + key_reset: key-reset { + label = "reset"; + linux,code = ; + }; + + key_wps: key-wps { + label = "wps"; + linux,code = ; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; +}; + +&mdio { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_mac_0 2>; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + + label = "lan1"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan3"; +}; + +&swport5 { + status = "okay"; + + label = "lan4"; +}; + +&qpic_bam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0 0>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0 1>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287plus.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287plus.dts new file mode 100644 index 0000000000..8eb8ce8503 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287plus.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Giammarco Marzano . +// Copyright (c) 2023, Andreas Böhler + +#include "qcom-ipq4018-mf287_common.dtsi" + +/ { + model = "ZTE MF287Plus"; + compatible = "zte,mf287plus"; +}; + +&gpio_modem_reset { + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; +}; + +&key_reset { + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; +}; + +&key_wps { + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; +}; + +&led_status { + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>, + <&tlmm 1 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; + + spi-nand@1 { /* flash@1 ? */ + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0x140000>; + read-only; + }; + + partition@140000 { + label = "ART"; + reg = <0x140000 0x140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@280000 { + label = "mac"; + reg = <0x280000 0x140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@3c0000 { + label = "cfg-param"; + reg = <0x3c0000 0x600000>; + read-only; + }; + + partition@9c0000 { + label = "oops"; + reg = <0x9c0000 0x140000>; + }; + + partition@b00000 { + label = "web"; + reg = <0xb00000 0x800000>; + }; + + partition@1300000 { + label = "rootfs"; + reg = <0x1300000 0x2200000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x3200000>; + }; + }; + }; + + zigbee@2 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "silabs,em3581"; + reg = <2>; + spi-max-frequency = <12000000>; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio59", "gpio1"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "zte,mf287plus"; +}; + +&wifi1{ + qcom,ath10k-calibration-variant = "zte,mf287plus"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287pro.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287pro.dts new file mode 100644 index 0000000000..b4b9451cb2 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287pro.dts @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Giammarco Marzano . +// Copyright (c) 2023, Andreas Böhler + +#include "qcom-ipq4018-mf287_common.dtsi" + +/ { + model = "ZTE MF287Pro"; + compatible = "zte,mf287pro"; + + regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "USB_VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + gpio = <&tlmm 25 GPIO_ACTIVE_LOW>; + }; +}; + +&gpio_modem_reset { + gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; +}; + +&key_reset { + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; +}; + +&key_wps { + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; +}; + +&led_status { + gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, + <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; + + spi-nand@1 { /* flash@1 ? */ + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0xa0000>; + read-only; + }; + + partition@a0000 { + label = "ART"; + reg = <0xa0000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@120000 { + label = "mac"; + reg = <0x120000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1a0000 { + label = "reserved2"; + reg = <0x1a0000 0xc0000>; + }; + + partition@260000 { + label = "cfg-param"; + reg = <0x260000 0x400000>; + read-only; + }; + + partition@660000 { + label = "log"; + reg = <0x660000 0x400000>; + }; + + partition@a60000 { + label = "oops"; + reg = <0xa60000 0xa0000>; + }; + + partition@b00000 { + label = "reserved3"; + reg = <0xb00000 0x500000>; + }; + + partition@1000000 { + label = "web"; + reg = <0x1000000 0x800000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0x1d00000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x3200000>; + }; + }; + }; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio12", "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12", "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +/* The MF287Plus and MF287Pro share the same board data file */ +&wifi0 { + qcom,ath10k-calibration-variant = "zte,mf287plus"; +}; + +/* The MF287Plus and MF287Pro share the same board data file */ +&wifi1{ + qcom,ath10k-calibration-variant = "zte,mf287plus"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts new file mode 100644 index 0000000000..a9e9683592 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-nbg6617.dts @@ -0,0 +1,365 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "ZyXEL NBG6617"; + compatible = "zyxel,nbg6617"; + + chosen { + /* + * the vendor u-boot adds root and mtdparts cmdline parameters + * which we don't want... but we have to overwrite them or else + * the kernel will take them at face value. + */ + bootargs-append = " mtdparts= root=31:13"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wlan { + label = "wlan"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + linux,code = ; + linux,input-type = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>; + linux,default-trigger = "usbport"; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + led_pins: led_pinmux { + mux { + pins = "gpio0", "gpio1", "gpio3", "gpio5", "gpio58"; + drive-strength = <0x8>; + bias-disable; + output-low; + }; + }; +}; + +&blsp1_spi1 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + status = "okay"; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "APPSBL"; /* u-boot */ + reg = <0x000e0000 0x00080000>; + /* U-Boot Standalone App "zloader" is located at 0x64000 */ + read-only; + }; + partition6@160000 { + label = "APPSBLENV"; /* u-boot env */ + reg = <0x00160000 0x00010000>; + }; + partition7@170000 { + /* make a backup of this partition! */ + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + partition8@180000 { + label = "kernel"; + reg = <0x00180000 0x00400000>; + }; + partition9@580000 { + label = "dualflag"; + reg = <0x00580000 0x00010000>; + read-only; + }; + partition10@590000 { + label = "header"; + reg = <0x00590000 0x00010000>; + }; + partition11@5a0000 { + label = "romd"; + reg = <0x005a0000 0x00100000>; + read-only; + }; + partition12@6a0000 { + label = "not_root_data"; + /* + * for some strange reason, someone at ZyXEL + * had the "great" idea to put the rootfs_data + * in front of rootfs... Don't do that! + * As a result this one, full MebiByte remains + * unused. + */ + reg = <0x006a0000 0x00100000>; + }; + partition13@7a0000 { + label = "rootfs"; + reg = <0x007a0000 0x01860000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + + label = "lan4"; +}; + +&swport2 { + status = "okay"; + + label = "lan3"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ZyXEL-NBG6617"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ZyXEL-NBG6617"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts new file mode 100644 index 0000000000..f23b58a3f4 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2017-2020, Sven Eckelmann + * Copyright (c) 2018, Marek Lindner + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Plasma Cloud PA1200"; + compatible = "plasmacloud,pa1200"; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &led_status_purple; + led-failsafe = &led_status_yellow; + led-running = &led_status_cyan; + led-upgrade = &led_status_yellow; + label-mac-device = &swport5; + }; + + leds { + compatible = "gpio-leds"; + + led_status_cyan: status_cyan { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + + led_status_purple: status_purple { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + led_status_yellow: status_yellow { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; + +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + /* partitions are passed via bootloader */ + partitions { + partition-art { + label = "0:ART"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "ethernet2"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&swport5 { + status = "okay"; + label = "ethernet1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "PlasmaCloud-PA1200"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "PlasmaCloud-PA1200"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts new file mode 100644 index 0000000000..38158fbfa7 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rt-ac58u.dts @@ -0,0 +1,330 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ASUS RT-AC58U"; + compatible = "asus,rt-ac58u"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x8000000>; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led-1 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + /* + * linux,default-trigger = "90000.mdio-1:04:link"; + * sadly still lacks rx+tx + */ + }; + + led-2 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <2>; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + led-3 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <5>; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + led-4 { + color = ; + function = LED_FUNCTION_USB; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + trigger-sources = <&usb3_port1>, <&usb3_port2>; + linux,default-trigger = "usbport"; + }; + + led-5 { + color = ; + function = LED_FUNCTION_LAN; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp1_spi1 { /* BLSP1 QUP1 */ + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + /* + * U-boot looks for "n25q128a11" node, + * if we don't have it, it will spit out the following warning: + * "ipq: fdt fixup unable to find compatible node". + */ + compatible = "jedec,spi-nor"; + reg = <0>; + linux,modalias = "m25p80", "mx25l1606e", "n25q128a11"; + spi-max-frequency = <30000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + /* 0x00180000 - 0x00200000 unused */ + }; + }; + + spi-nand@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <30000000>; + + /* + * U-boot looks for "spinand,mt29f" node, + * if we don't have it, it will spit out the following warning: + * "ipq: fdt fixup unable to find compatible node". + */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "RT-AC58U"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "RT-AC58U"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx.dtsi new file mode 100644 index 0000000000..737e7365a6 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx.dtsi @@ -0,0 +1,324 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" + +#include +#include +#include + +/ { + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + aliases { + serial0 = &blsp1_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 4 1>; + linux,code = ; + }; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; + }; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio58", "gpio59"; + function = "blsp_i2c0"; + bias-disable; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>; + num-cs = <2>; + status = "okay"; + + xt25f128b@0 { + /* + * Factory U-boot looks in 0:BOOTCONFIG partition for active + * partitions settings and mangles the partition config so + * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and 0:APPSBL/0:APPSBL_1 pairs + * can be swaped. It isn't a problem but we never can be sure where + * OFW put factory images. "n25q128a11" is required for proper nor + * recognition in u-boot. + */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:BOOTCONFIG"; + reg = <0x60000 0x20000>; + read-only; + }; + + partition@80000 { + label = "0:BOOTCONFIG1"; + reg = <0x80000 0x20000>; + read-only; + }; + + partition@a0000 { + label = "0:QSEE"; + reg = <0xa0000 0x60000>; + read-only; + }; + + partition@100000 { + label = "0:QSEE_1"; + reg = <0x100000 0x60000>; + read-only; + }; + + partition@160000 { + label = "0:CDT"; + reg = <0x160000 0x10000>; + read-only; + }; + + partition@170000 { + label = "0:CDT_1"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "0:DDRPARAMS"; + reg = <0x180000 0x10000>; + read-only; + }; + + partition@190000 { + label = "0:APPSBLENV"; + reg = <0x190000 0x10000>; + read-only; + }; + + partition@1a0000 { + label = "0:APPSBL"; + reg = <0x1a0000 0xa0000>; + read-only; + }; + + partition@240000 { + label = "0:APPSBL_1"; + reg = <0x240000 0xa0000>; + read-only; + }; + + partition@2e0000 { + label = "0:ART"; + reg = <0x2e0000 0x10000>; + read-only; + }; + + config: partition@2f0000 { + label = "0:CONFIG"; + reg = <0x2f0000 0x10000>; + read-only; + }; + + partition@300000 { + label = "0:CONFIG_RW"; + reg = <0x300000 0x10000>; + read-only; + }; + + partition@310000 { + label = "0:EVENTSLOG"; + reg = <0x310000 0x90000>; + read-only; + }; + }; + }; + + xt26g02a@1 { + /* + * Factory U-boot looks in 0:BOOTCONFIG partition for active + * partitions settings and mangles the partition config so + * rootfs/rootfs_1 pairs can be swaped. + * It isn't a problem but we never can be sure where OFW put + * factory images. "spinand,mt29f" value is required for proper + * nand recognition in u-boot. + */ + compatible = "spi-nand", "spinand,mt29f"; + #address-cells = <1>; + #size-cells = <1>; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs_1"; + reg = <0x00000000 0x08000000>; + }; + + partition@8000000 { + label = "rootfs"; + reg = <0x08000000 0x08000000>; + }; + }; + }; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + phy-reset-gpio = <&tlmm 62 0>; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx10.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx10.dts new file mode 100644 index 0000000000..8fc976a11b --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx10.dts @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4018-rutx.dtsi" + +/ { + model = "Teltonika RUTX10"; + compatible = "teltonika,rutx10"; + + soc { + leds { + compatible = "gpio-leds"; + + wifi2g { + label = "green:wifi2g"; + gpios = <&stm32_io 19 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wifi5g { + label = "green:wifi5g"; + gpios = <&stm32_io 18 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + gpio_out { + gpio-export,name = "gpio_out"; + gpio-export,output = <0>; + gpio-export,direction_may_change = <0>; + gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>; + }; + + gpio_in { + gpio-export,name = "gpio_in"; + gpio-export,input = <0>; + gpio-export,direction_may_change = <0>; + gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>; + }; + }; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + clock-frequency = <400000>; + + stm32_io: stm32@74 { + compatible = "tlt,stm32v1"; + #gpio-cells = <2>; + #interrupt-cells = <2>; + gpio-controller; + interrupt-controller; + interrupt-parent = <&tlmm>; + interrupts = <5 2>; + reg = <0x74>; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Teltonika-RUTX10"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Teltonika-RUTX10"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts new file mode 100644 index 0000000000..ea2102f7d6 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4018-rutx.dtsi" + +/ { + model = "Teltonika RUTX50"; + compatible = "teltonika,rutx50"; + + aliases { + led-boot = &led_rssi0; + led-failsafe = &led_rssi0; + led-running = &led_rssi0; + led-upgrade = &led_rssi0; + label-mac-device = &gmac; + }; + + soc { + gpio-export { + compatible = "gpio-export"; + #size-cells = <0>; + + gpio_modem_reset { + gpio-export,name = "modem_reset"; + gpio-export,output = <0>; + gpios = <&shift_io 8 GPIO_ACTIVE_HIGH>; + }; + + gpio_modem_power { + gpio-export,name = "modem_power"; + gpio-export,output = <0>; + gpios = <&shift_io 9 GPIO_ACTIVE_HIGH>; + }; + + gpio_out_1 { + gpio-export,name = "sim-select"; + /* 0 = SIM1 ; 1 = SIM2 */ + gpio-export,output = <0>; + gpios = <&shift_io 10 GPIO_ACTIVE_HIGH>; + }; + + gpio_in_1 { + gpio-export,name = "sim-detect"; + gpio-export,input = <0>; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + label = "green:sim1"; + gpios = <&shift_io 14 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + label = "green:sim2"; + gpios = <&shift_io 15 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "green:eth"; + gpios = <&shift_io 6 GPIO_ACTIVE_HIGH>; + }; + + led-3 { + label = "green:wifi"; + gpios = <&shift_io 7 GPIO_ACTIVE_HIGH>; + }; + + led-4 { + label = "green:3g"; + gpios = <&shift_io 5 GPIO_ACTIVE_HIGH>; + }; + + led-5 { + label = "green:4g"; + gpios = <&shift_io 4 GPIO_ACTIVE_HIGH>; + }; + + led-6 { + label = "green:5g"; + gpios = <&shift_io 3 GPIO_ACTIVE_HIGH>; + }; + + led_rssi0: led-7 { + label = "green:rssi0"; + gpios = <&shift_io 0 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + label = "green:rssi1"; + gpios = <&shift_io 1 GPIO_ACTIVE_HIGH>; + }; + + led-9 { + label = "green:rssi2"; + gpios = <&shift_io 2 GPIO_ACTIVE_HIGH>; + }; + + led-10 { + label = "green:wifi2g"; + gpios = <&shift_io 12 GPIO_ACTIVE_HIGH>; + }; + + led-11 { + label = "green:wifi5g"; + gpios = <&shift_io 13 GPIO_ACTIVE_HIGH>; + }; + }; + + spi-gpio { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>; + cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + shift_io: shift_io@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + /* Attn: This is specific to RUTX50 in Teltonika GPL */ + registers-number = <2>; + spi-max-frequency = <10000000>; + }; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Teltonika-RUTX10"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Teltonika-RUTX10"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + + label = "lan1"; +}; + +&swport2 { + status = "okay"; + + label = "lan2"; +}; + +&swport3 { + status = "okay"; + + label = "lan3"; +}; + +&swport4 { + status = "okay"; + + label = "lan4"; +}; + +&swport5 { + status = "okay"; + + label = "wan"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts new file mode 100644 index 0000000000..252f9ad71a --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-sxtsq-5-ac.dts @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MikroTik SXTsq 5 ac (RBSXTsqG-5acD)"; + compatible = "mikrotik,sxtsq-5-ac"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_user; + led-failsafe = &led_user; + led-running = &led_user; + led-upgrade = &led_user; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + panic-indicator; + }; + + led_user: user { + label = "green:user"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + rssilow { + label = "green:rssilow"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + rssimediumlow { + label = "green:rssimediumlow"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + rssimedium { + label = "green:rssimedium"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + + rssimediumhigh { + label = "green:rssimediumhigh"; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + + rssihigh { + label = "green:rssihigh"; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@100000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x100000 0xf00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-SXTsq-5-ac"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; + + /delete-property/ psgmii-ethphy; +}; + +&swport5 { + status = "okay"; + + label = "lan"; + phy-mode = "rgmii"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts new file mode 100644 index 0000000000..9bcfab4487 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts @@ -0,0 +1,385 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Netgear WAC510"; + compatible = "netgear,wac510"; + + aliases { + led-boot = &led_power_amber; + led-failsafe = &led_power_amber; + led-running = &led_power_green; + led-upgrade = &led_power_amber; + ethernet1 = &swport5; + }; + + chosen { + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + ssr: ssr@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <1000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_amber: led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&ssr 6 GPIO_ACTIVE_LOW>; + panic-indicator; + }; + + led_power_green: led-1 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&ssr 5 GPIO_ACTIVE_LOW>; + }; + + led-2 { + /* 2.4GHz blue - activity */ + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + gpios = <&ssr 4 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led-3 { + /* 2.4GHz green - link */ + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + gpios = <&ssr 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0radio"; + }; + + led-4 { + /* 5GHz blue - activity */ + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + gpios = <&ssr 2 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led-5 { + /* 5GHz green - link */ + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + gpios = <&ssr 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1radio"; + }; + + led-6 { + color = ; + function = LED_FUNCTION_ACTIVITY; + gpios = <&ssr 0 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x000f0000>; + read-only; + }; + + partition@1e0000 { + label = "0:MANUDATA"; + reg = <0x001e0000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_manudata_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1f0000 { + label = "0:ART"; + reg = <0x001f0000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + nand@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <48000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs"; + reg = <0x00000000 0x03800000>; + }; + + partition@3800000 { + label = "rootfs_1"; + reg = <0x03800000 0x03800000>; + }; + + partition@7000000 { + label = "var_config"; + reg = <0x07000000 0x00f00000>; + read-only; + }; + + partition@7f00000 { + label = "Oops_log"; + reg = <0x07f00000 0x000c0000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6 0>; + qcom,ath10k-calibration-variant = "Netgear-WAC510"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6 16>; + qcom,ath10k-calibration-variant = "Netgear-WAC510"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac-lte.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac-lte.dts new file mode 100644 index 0000000000..8ff18d92b7 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac-lte.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2022, Alexander Couzens */ + +#include "qcom-ipq4018-wap-ac.dtsi" + +/ { + model = "MikroTik wAP ac LTE"; + compatible = "mikrotik,wap-ac-lte"; + + soc { + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + }; +}; + +&tlmm { + enable-usb-power { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable USB power"; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dts new file mode 100644 index 0000000000..1bfcbf1e33 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4018-wap-ac.dtsi" + +/ { + model = "MikroTik wAP ac"; + compatible = "mikrotik,wap-ac"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi new file mode 100644 index 0000000000..2b357a1f03 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-ac.dtsi @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2020, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + memory { + device_type = "memory"; + reg = <0x80000000 0x08000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_user; + led-failsafe = &led_user; + led-running = &led_user; + led-upgrade = &led_user; + }; + + soc { + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + led_user: user { + label = "green:user"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + size = <0x2000>; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@100000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x100000 0xf00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "sw-eth2"; +}; + +&swport5 { + status = "okay"; + label = "sw-eth1"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-wAP-ac"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-wAP-ac"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-r-ac.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-r-ac.dts new file mode 100644 index 0000000000..e7f28f23cf --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wap-r-ac.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2022, Alexander Couzens */ + +#include "qcom-ipq4018-wap-ac.dtsi" + +/ { + model = "MikroTik wAP R ac"; + compatible = "mikrotik,wap-r-ac"; + + soc { + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + }; +}; + +&tlmm { + enable-usb-power { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable USB power"; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts new file mode 100644 index 0000000000..1f26db5869 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-whw01.dts @@ -0,0 +1,338 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Linksys WHW01"; + compatible = "linksys,whw01"; + + aliases { + serial0 = &blsp1_uart1; + led-boot = &led_system_blue; + led-running = &led_system_blue; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_0"; + }; + + soc { + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + ess_tcsr@1953000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c3 { + status = "okay"; + pinctrl-0 = <&i2c_0_pins>; + pinctrl-1 = <&i2c_0_pins>; + pinctrl-names = "i2c_active", "i2c_sleep"; + + leds@62 { + compatible = "nxp,pca9633"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x62>; + + /* RGB? */ + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led_system_blue: led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_POWER; + linux,default-trigger = "default-on"; + }; + }; +}; + +&blsp1_spi1 { + status = "okay"; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>; + + nor@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "APPSBL"; + reg = <0xd0000 0xa0000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@180000 { + label = "u_env"; + reg = <0x180000 0x40000>; + }; + + partition@1c0000 { + label = "s_env"; + reg = <0x1c0000 0x20000>; + }; + + partition@1e0000 { + label = "devinfo"; + reg = <0x1e0000 0x20000>; + read-only; + }; + }; + }; + + nand@1 { + reg = <1>; + compatible = "spi-nand"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0000000 0x5000000>; + }; + + partition@600000 { + label = "rootfs"; + reg = <0x0600000 0x4a00000>; + }; + + partition@5000000 { + label = "alt_kernel"; + reg = <0x5000000 0x5000000>; + }; + + partition@5600000 { + label = "alt_rootfs"; + reg = <0x5600000 0x4a00000>; + }; + + partition@a000000 { + label = "sysdiag"; + reg = <0xa000000 0x0200000>; + read-only; + }; + + partition@a200000 { + label = "syscfg"; + reg = <0xa200000 0x5e00000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_mdio { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_mdc { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio4"; + }; + + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinconf_cs { + pins = "gpio54", "gpio4"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + function = "blsp_i2c0"; + pins = "gpio58", "gpio59"; + bias-disable; + }; + }; + + reset_pinmux { + mux { + pins = "gpio63"; + bias-pull-up; + }; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "linksys-whw01-v1"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "linksys-whw01-v1"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "eth1"; +}; + +&swport5 { + status = "okay"; + label = "eth2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts new file mode 100644 index 0000000000..dd56cb215e --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wr-1.dts @@ -0,0 +1,289 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Pakedge WR-1"; + compatible = "pakedge,wr-1"; + + aliases { + label-mac-device = &gmac; + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&key_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + + wlan2g { + gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy1tpt"; + }; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x0040000 0x0020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x0060000 0x0060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x00c0000 0x0010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x00d0000 0x0010000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0x00e0000 0x0010000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0x00f0000 0x0080000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x0170000 0x0010000>; + read-only; + }; + + partition@180000 { + label = "firmware"; + reg = <0x0180000 0x1e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + + label = "lan4"; +}; + +&swport2 { + status = "okay"; + + label = "lan3"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&tlmm { + key_pins: key_pinmux { + mux { + function = "gpio"; + pins = "gpio59"; + bias-pull-up; + }; + }; + + led_pins: led_pinmux { + mux { + function = "gpio"; + pins = "gpio0", "gpio1", "gpio2"; + bias-none; + drive-strength = <2>; + output-low; + }; + }; + + serial_pins: serial_pinmux { + mux { + function = "blsp_uart0"; + pins = "gpio60", "gpio61"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + bias-disable; + drive-strength = <12>; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54"; + bias-disable; + drive-strength = <2>; + output-high; + }; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Pakedge-WR-1"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Pakedge-WR-1"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wre6606.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wre6606.dts new file mode 100644 index 0000000000..7ce0b9e359 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wre6606.dts @@ -0,0 +1,255 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ZyXEL WRE6606"; + compatible = "zyxel,wre6606"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + chosen { + bootargs-append = " mtdparts="; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + wlan5g_green { + label = "green:wlan5g"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + + wlan5g_red { + label = "red:wlan5g"; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_red { + label = "red:wlan2g"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_green { + label = "green:wlan2g"; + gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + mx25l12805d@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition5@E0000 { + label = "APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + + partition6@F0000 { + label = "APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition7@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + + partition8@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x00180000 0x00ce0000>; + }; + + partition9@e60000 { + label = "manufacture"; + reg = <0x00e60000 0x00050000>; + read-only; + }; + + partition10@eb0000 { + label = "storage"; + reg = <0x00eb0000 0x00150000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ZyXEL-WRE6606"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ZyXEL-WRE6606"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts new file mode 100644 index 0000000000..f3c6f34bf4 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Luma Home WRTQ-329ACN"; + compatible = "luma,wrtq-329acn"; + + i2c-gpio { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + #address-cells = <1>; + #size-cells = <0>; + + /* No driver exists */ + led_ring@48 { + compatible = "ti,msp430"; + reg = <0x48>; + }; + + eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + read-only; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + + +&blsp1_spi1 { + status = "okay"; + + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, + <&tlmm 59 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x040000 0x020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x060000 0x060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x0c0000 0x010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x0d0000 0x010000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0x0e0000 0x010000>; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0x0f0000 0x080000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0{ + reg = <0x0000 0x0006>; + }; + + macaddr_art_6: macaddr@6{ + reg = <0x0006 0x0006>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + flash@1 { + status = "okay"; + + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x0000000 0x8000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial0_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +ðphy0 { + status = "disabled"; +}; + +ðphy1 { + status = "disabled"; +}; + +ðphy3 { + status = "disabled"; +}; + +&mdio { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport3 { + status = "okay"; + + label = "lan"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_art_6>; +}; + +&swport5 { + status = "okay"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_art_0>; +}; + +&tlmm { + serial0_pins: serial0_pinmux { + mux { + function = "blsp_uart0"; + pins = "gpio60", "gpio61"; + bias-disable; + }; + }; + + spi0_pins: spi0_pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + bias-disable; + drive-strength = <12>; + }; + + mux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + bias-disable; + drive-strength = <2>; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts new file mode 100644 index 0000000000..39a52a7c48 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: ISC +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2017-2018, Sven Eckelmann + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "OpenMesh A62"; + compatible = "openmesh,a62"; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_green; + led-running = &led_status_green; + led-upgrade = &led_status_green; + label-mac-device = &swport4; + }; + + leds { + compatible = "gpio-leds"; + + status_red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: status_green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + + status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <58 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "enable USB2 power"; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + /* partitions are passed via bootloader */ + partitions { + partition-art { + label = "0:ART"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "OM-A62"; + ieee80211-freq-limit = <5170000 5350000>; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_9000>; + }; + }; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "ethernet1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&swport5 { + status = "okay"; + label = "ethernet2"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A62"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "OM-A62"; + ieee80211-freq-limit = <5470000 5875000>; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts new file mode 100644 index 0000000000..d1c8d798f9 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts @@ -0,0 +1,393 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MobiPromo CM520-79F"; + compatible = "mobipromo,cm520-79f"; + + aliases { + led-boot = &led_sys; + led-failsafe = &led_sys; + led-running = &led_sys; + led-upgrade = &led_sys; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <1000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <1000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>; + }; + + led_sys: can { + label = "blue:can"; + gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>; + }; + + lan1 { + label = "blue:lan1"; + gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>; + }; + + lan2 { + label = "blue:lan2"; + gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "blue:wlan5g"; + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + status = "okay"; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "MIBIB"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "BOOTCONFIG"; + reg = <0x200000 0x100000>; + }; + + partition@300000 { + label = "QSEE"; + reg = <0x300000 0x100000>; + read-only; + }; + + partition@400000 { + label = "QSEE_1"; + reg = <0x400000 0x100000>; + read-only; + }; + + partition@500000 { + label = "CDT"; + reg = <0x500000 0x80000>; + read-only; + }; + + partition@580000 { + label = "CDT_1"; + reg = <0x580000 0x80000>; + read-only; + }; + + partition@600000 { + label = "BOOTCONFIG1"; + reg = <0x600000 0x80000>; + }; + + partition@680000 { + label = "APPSBLENV"; + reg = <0x680000 0x80000>; + }; + + partition@700000 { + label = "APPSBL"; + reg = <0x700000 0x200000>; + read-only; + }; + + partition@900000 { + label = "APPSBL_1"; + reg = <0x900000 0x200000>; + read-only; + }; + + art: partition@b00000 { + label = "ART"; + reg = <0xb00000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + macaddr_art_1006: macaddr@1006 { + reg = <0x1006 0x6>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + macaddr_art_5006: macaddr@5006 { + reg = <0x5006 0x6>; + }; + }; + }; + + partition@b80000 { + label = "ubi"; + reg = <0xb80000 0x7480000>; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; + + nvmem-cells = <&macaddr_art_1006>; + nvmem-cell-names = "mac-address"; +}; + +&switch { + status = "okay"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; +}; + +&swport5 { + status = "okay"; + + nvmem-cells = <&macaddr_art_5006>; + nvmem-cell-names = "mac-address"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "CM520-79F"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "CM520-79F"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts new file mode 100644 index 0000000000..243d19fb03 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c1.dts @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT + * + * Copyright (c) 2018 Peng Zhang + * + */ + +#include "qcom-ipq4019-e2600ac.dtsi" +#include +#include + +/ { + model = "Qxwlan E2600AC c1"; + compatible = "qxwlan,e2600ac-c1"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; + }; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C1"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C1"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "sw-eth1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&swport5 { + status = "okay"; + + label = "sw-eth2"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts new file mode 100644 index 0000000000..9300568986 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts @@ -0,0 +1,182 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT + * + * Copyright (c) 2018 Peng Zhang + * + */ + +#include "qcom-ipq4019-e2600ac.dtsi" +#include +#include + +/ { + model = "Qxwlan E2600AC c2"; + compatible = "qxwlan,e2600ac-c2"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x04000000>; + }; + }; + }; +}; + +&tlmm { + nand_pins: nand-pins { + + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + label = "sw-eth1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&swport4 { + status = "okay"; + label = "sw-eth2"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&swport5 { + status = "okay"; + + label = "sw-eth3"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi new file mode 100644 index 0000000000..d226611311 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi @@ -0,0 +1,246 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT + * + * Copyright (c) 2018 Peng Zhang + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + + model = "Qxwlan E2600AC"; + compatible = "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256MB */ + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + serial@78af000 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + serial@78b0000 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + i2c@78b7000 { /* BLSP1 QUP2 */ + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + + led1 { + label = "green:wlan0"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + led2 { + label = "green:wlan1"; + gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + }; + + led3 { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + trigger-sources = <&usb2_port1>, <&usb3_port1>, <&usb3_port2>; + linux,default-trigger = "usbport"; + }; + + led4 { + label = "green:ctrl1"; + gpios = <&tlmm 51 GPIO_ACTIVE_LOW>; + }; + + led5 { + label = "green:ctrl2"; + gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; + }; + + led6 { + label = "green:ctrl3"; + gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + i2c_0_pins: i2c-0-pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ea8300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ea8300.dts new file mode 100644 index 0000000000..1b9276ede2 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ea8300.dts @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include + +#include "qcom-ipq4019-xx8300.dtsi" + +/ { + model = "Linksys EA8300 (Dallas)"; + compatible = "linksys,ea8300", "qcom,ipq4019"; + + + aliases { + led-boot = &led_wps_amber; + led-failsafe = &led_wps; + led-running = &led_linksys; + led-upgrade = &led_world; + serial0 = &blsp1_uart1; + }; + + + leds { + compatible = "gpio-leds"; + + // Retain node names from running OEM on EA8300 + + // Front panel LEDs, top to bottom + + led_plug: diag { + label = "amber:plug"; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + }; + + led_world: internet { + label = "amber:world"; + gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>; + }; + + led_wps: wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + + led_wps_amber: wps_amber { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_linksys: pwr { + label = "white:linksys"; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + + // On back panel, above USB socket + + led_usb: usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + trigger-sources = <&usb3_port1>, <&usb3_port2>, + <&usb2_port1>; + linux,default-trigger = "usbport"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "linksys-ea8300-fcc"; +}; + +&wifi1 { + status = "okay"; + ieee80211-freq-limit = <5170000 5330000>; + qcom,ath10k-calibration-variant = "linksys-ea8300-fcc"; +}; + +&wifi2 { + status = "okay"; + ieee80211-freq-limit = <5490000 5835000>; + qcom,ath10k-calibration-variant = "linksys-ea8300-fcc"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-eap2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-eap2200.dts new file mode 100644 index 0000000000..000acd196c --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-eap2200.dts @@ -0,0 +1,291 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "EnGenius EAP2200"; + compatible = "engenius,eap2200"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + }; + + lan1 { + label = "blue:lan1"; + gpios = <&tlmm 44 GPIO_ACTIVE_LOW>; + }; + + lan2 { + label = "blue:lan2"; + gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "yellow:wlan5g"; + gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wlan5g2 { + label = "yellow:wlan5g2"; + gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy2tpt"; + }; + + mode { + label = "blue:mode"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition7@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs1"; + reg = <0x00000000 0x04000000>; + }; + partition@40000000 { + label = "ubi"; + reg = <0x04000000 0x04000000>; + }; + + }; + }; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_9000>; + ieee80211-freq-limit = <5470000 5875000>; + qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; +}; + +&wifi1 { + status = "okay"; + ieee80211-freq-limit = <5170000 5350000>; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts new file mode 100644 index 0000000000..a118bdf26b --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzbox-7530.dts @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "AVM FRITZ!Box 7530"; + compatible = "avm,fritzbox-7530"; + + chosen { + bootargs-append = " coherent_pool=4M"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &info_red; + led-running = &power_green; + led-upgrade = &info_red; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wlan { + label = "wlan"; + gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + dect { + label = "dect"; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + info_red: info_red { + label = "red:info"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + }; + + info { + label = "green:info"; + gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + }; + + fon { + label = "green:fon"; + gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; + }; + + power_green: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + usb-power { + line-name = "enable USB3 power"; + gpios = <49 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + /delete-property/ nand-ecc-strength; + /delete-property/ nand-ecc-step-size; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x000000 0x80000>; + read-only; + }; + + partition@80000 { + label = "MIBIB"; + reg = <0x080000 0x80000>; + read-only; + }; + + partition@100000 { + label = "QSEE"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "CDT"; + reg = <0x180000 0x40000>; + read-only; + }; + + partition@1c0000 { + label = "QSEE_B"; + reg = <0x1c0000 0x80000>; + read-only; + }; + + partition@240000 { + label = "urlader0"; + reg = <0x240000 0x40000>; + read-only; + }; + + partition@280000 { + label = "urlader1"; + reg = <0x280000 0x40000>; + read-only; + }; + + partition@2c0000 { + label = "nand-tffs"; + reg = <0x2c0000 0x840000>; + read-only; + }; + + partition@b00000 { + /* 'kernel1' in AVM firmware */ + label = "uboot0"; + reg = <0xb00000 0x400000>; + }; + + partition@f00000 { + /* 'kernel2' in AVM firmware */ + label = "uboot1"; + reg = <0xf00000 0x400000>; + }; + + partition@1300000 { + label = "ubi"; + reg = <0x1300000 0x6d00000>; + }; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZBox-7530"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + dsl@1,0 { + compatible = "intel,vrx518"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts new file mode 100644 index 0000000000..7d683cdf65 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-1200.dts @@ -0,0 +1,294 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "AVM FRITZ!Repeater 1200"; + compatible = "avm,fritzrepeater-1200"; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + led-upgrade = &power_red; + label-mac-device = &wifi0; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + key { + compatible = "gpio-keys"; + + wps { + label = "WPS button"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power_red: power_red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + + power_yellow { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + phy-reset { + line-name = "PHY-reset"; + gpios = <19 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; + + phy-reset-2 { + line-name = "PHY-reset-2"; + gpios = <47 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "MIBIB"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "QSEE"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "CDT"; + reg = <0x180000 0x40000>; + read-only; + }; + + partition@1c0000 { + label = "QSEE_B"; + reg = <0x1c0000 0x80000>; + read-only; + }; + + partition@240000 { + label = "urlader0"; + reg = <0x240000 0x40000>; + read-only; + }; + + partition@280000 { + label = "urlader1"; + reg = <0x280000 0x40000>; + read-only; + }; + + partition@2c0000 { + label = "nand-tffs"; + reg = <0x2c0000 0x840000>; + read-only; + }; + + partition@b00000 { + /* 'kernel1' in AVM firmware */ + label = "uboot0"; + reg = <0xb00000 0x400000>; + }; + + partition@f00000 { + /* 'kernel2' in AVM firmware */ + label = "uboot1"; + reg = <0xf00000 0x400000>; + }; + + partition@1300000 { + label = "ubi"; + reg = <0x1300000 0x6d00000>; + }; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-1200"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; + + /delete-property/ psgmii-ethphy; +}; + +&swport5 { + status = "okay"; + + label = "lan"; + phy-handle = <ðphy>; + phy-mode = "rgmii-id"; +}; + +ðphy1 { + status = "disabled"; +}; + +ðphy2 { + status = "disabled"; +}; + +ðphy3 { + status = "disabled"; +}; + +ðphy4 { + status = "disabled"; +}; + +&psgmiiphy { + status = "disabled"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts new file mode 100644 index 0000000000..2555984384 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-fritzrepeater-3000.dts @@ -0,0 +1,274 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "AVM FRITZ!Repeater 3000"; + compatible = "avm,fritzrepeater-3000"; + + aliases { + led-boot = &power_led; + led-failsafe = &power_led; + led-running = &power_led; + led-upgrade = &power_led; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + key { + compatible = "gpio-keys"; + + connect { + label = "Connect"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + connect_red { + label = "red:connect"; + gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; + }; + + connect_green { + label = "green:connect"; + gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + }; + + connect_blue { + label = "blue:connect"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + }; + + power_led: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + /delete-property/ nand-ecc-strength; + /delete-property/ nand-ecc-step-size; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x000000 0x80000>; + read-only; + }; + + partition@80000 { + label = "MIBIB"; + reg = <0x080000 0x80000>; + read-only; + }; + + partition@100000 { + label = "QSEE"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "CDT"; + reg = <0x180000 0x40000>; + read-only; + }; + + partition@1c0000 { + label = "QSEE_B"; + reg = <0x1c0000 0x80000>; + read-only; + }; + + partition@240000 { + label = "urlader0"; + reg = <0x240000 0x40000>; + read-only; + }; + + partition@280000 { + label = "urlader1"; + reg = <0x280000 0x40000>; + read-only; + }; + + partition@2c0000 { + label = "nand-tffs"; + reg = <0x2c0000 0x840000>; + read-only; + }; + + partition@b00000 { + /* 'kernel1' in AVM firmware */ + label = "uboot0"; + reg = <0xb00000 0x400000>; + }; + + partition@f00000 { + /* 'kernel2' in AVM firmware */ + label = "uboot1"; + reg = <0xf00000 0x400000>; + }; + + partition@1300000 { + label = "ubi"; + reg = <0x1300000 0x6d00000>; + }; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + /* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */ + qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000"; +}; + +&wifi1 { + status = "okay"; + ieee80211-freq-limit = <5170000 5350000>; + /* BDFs are identical for the FRITZ!Box 7530 and the FRITZ!Repeater 3000 */ + qcom,ath10k-calibration-variant = "AVM-FRITZRepeater-3000"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + /* QCA9984 */ + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + ieee80211-freq-limit = <5470000 5875000>; + /* Uses the reference BDF */ + }; + }; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; +}; + +&swport5 { + status = "okay"; + + label = "lan2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts new file mode 100644 index 0000000000..9f645dd657 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-gl-b2200.dts @@ -0,0 +1,392 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "GL.iNet GL-B2200"; + compatible = "glinet,gl-b2200", "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused"; + }; + + aliases { + ethernet1 = &swport4; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = <1>; + }; + + reset { + label = "reset"; + gpios = <&tlmm 40 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = <1>; + }; + }; + + leds { + compatible = "gpio-leds"; + + power_blue { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + internet_blue { + label = "blue:internet"; + gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>; + }; + power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + }; + internet_white { + label = "white:internet"; + gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vqmmc>; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_spi2 { + pinctrl-0 = <&spi_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + spidev1: spi@0 { + compatible = "silabs,si3210"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + }; + pinconf { + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + spi_1_pins: spi_1_pinmux { + mux { + pins = "gpio44", "gpio46", "gpio47"; + function = "blsp_spi1"; + bias-disable; + }; + cs { + pins = "gpio45"; + function = "gpio"; + bias-pull-up; + }; + reset { + pins = "gpio43"; + function = "gpio"; + output-high; + }; + mux_2 { + pins = "gpio35"; + function = "gpio"; + output-high; + }; + host_int { + pins = "gpio2"; + function = "gpio"; + input; + }; + wake { + pins = "gpio48"; + function = "gpio"; + output-high; + }; + }; + + sd_pins: sd_pins { + pinmux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio29", "gpio30", "gpio31", "gpio32"; + drive-strength = <10>; + }; + + pinmux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + + pinmux_sd7 { + function = "sdio"; + pins = "gpio28"; + drive-strength = <10>; + bias-disable; + }; + }; + +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + status = "okay"; + /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */ + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_9000>; + qcom,ath10k-calibration-variant = "GL-B2200"; + ieee80211-freq-limit = <5450000 5900000>; + }; + }; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "wan"; +}; + +&swport5 { + status = "okay"; + + label = "lan"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "GL-B2200"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "GL-B2200"; + ieee80211-freq-limit = <5100000 5400000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts new file mode 100644 index 0000000000..26e9941a9f --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts @@ -0,0 +1,392 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2019, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "8devices Habanero DVK"; + compatible = "8dev,habanero-dvk"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_upgrade; + ethernet1 = &swport5; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_upgrade: upgrade { + label = "green:upgrade"; + gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vqmmc>; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", "gpio57", + "gpio60", "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", "gpio68", + "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + sd_pins: sd_pins { + pinmux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio28", "gpio29", "gpio30", "gpio31"; + drive-strength = <10>; + }; + + pinmux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + + pinmux_sd7 { + function = "sdio"; + pins = "gpio32"; + drive-strength = <10>; + bias-disable; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition@e0000 { + label = "APPSBLENV"; /* uboot env */ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition@180000 { + label = "cfg"; + reg = <0x00180000 0x00040000>; + }; + partition@1c0000 { + label = "firmware"; + compatible = "denx,fit"; + reg = <0x001c0000 0x01e40000>; + }; + }; + }; +}; + +/* Some DVK boards ship without NAND */ +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + /* Free slot for use */ + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "8devices-Habanero"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "8devices-Habanero"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts new file mode 100644 index 0000000000..52af1f125e --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MikroTik hAP ac3 LTE6 kit"; + compatible = "mikrotik,hap-ac3-lte6-kit"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_status_blue; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + }; + + soc { + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_blue: status-blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + + led_status_red: status-red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_status_green: status-green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>; + }; + + ethernet { + label = "green:ethernet"; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + }; + + lan1 { + label = "green:lan1"; + gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; + }; + + lan2 { + label = "green:lan2"; + gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + }; + + lan3 { + label = "green:lan3"; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + lan4 { + label = "green:lan4"; + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <44 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable USB power"; + }; + + enable-mpcie-power { + gpio-hog; + gpios = <51 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable mPCI-E power"; + }; + +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <10000000>; + #address-cells = <1>; + #size-cells = <1>; + + + partitions { + compatible = "fixed-partitions"; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + size = <0x2000>; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@110000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x110000 0xef0000>; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&blsp1_uart1 { + status = "okay"; + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + label = "lan4"; +}; + +&swport2 { + status = "okay"; + label = "lan3"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; +}; + +&wifi1 { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&prng { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts new file mode 100644 index 0000000000..4e2b4574d3 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts @@ -0,0 +1,357 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2021, Robert Marko */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "MikroTik hAP ac3"; + compatible = "mikrotik,hap-ac3"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &led_status_blue; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + mode { + label = "mode"; + gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + led { + label = "led"; + gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_blue: status-blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + }; + + led_status_red: status-red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_status_green: status-green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>; + }; + + ethernet { + label = "green:ethernet"; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + }; + + lan1 { + label = "green:lan1"; + gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; + }; + + lan2 { + label = "green:lan2"; + gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + }; + + lan3 { + label = "green:lan3"; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + lan4 { + label = "green:lan4"; + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; + + poe { + label = "red:poe"; + gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio55", "gpio56", "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", "gpio65", + "gpio66", "gpio67", "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + enable-usb-power { + gpio-hog; + gpios = <44 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "enable USB power"; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + size = <0x2000>; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0xa00000>; + }; + + partition@a00000 { + label = "ubi"; + reg = <0xa00000 0x7600000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + label = "lan4"; +}; + +&swport2 { + status = "okay"; + label = "lan3"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-hAP-ac3"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "MikroTik-hAP-ac3"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts new file mode 100644 index 0000000000..4e5497cbc3 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lbr20.dts @@ -0,0 +1,516 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Netgear LBR20"; + compatible = "netgear,lbr20"; + + chosen { + bootargs-append = "ubi.mtd=ubi root=/dev/ubiblock0_0"; + }; + + aliases { + led-boot = &led_backlight_white; + led-failsafe = &led_status_green; + led-running = &led_status_green; + led-upgrade = &led_status_red; + label-mac-device = &gmac; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_green: led-status-green { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + led_status_red: led-status-red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + lte_rst { + gpio-export,name = "lte_rst"; + gpio-export,output = <1>; + gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + }; + + lte_pwrkey { + gpio-export,name = "lte_pwrkey"; + gpio-export,output = <1>; + gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; + }; + + lte_usb_boot { + gpio-export,name = "lte_usb_boot"; + gpio-export,output = <0>; + gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + }; + + lte_pwm { + gpio-export,name = "lte_pwm"; + gpio-export,output = <1>; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + }; + + soc { + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + }; +}; + +&prng { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&crypto { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio-pinmux { + mux_mdio { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_mdc { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial-pinmux { + function = "blsp_uart0"; + pins = "gpio16", "gpio17"; + bias-disable; + }; + + nand_pins: nand-pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + partition@100000 { + label = "0:MIBIB"; + reg = <0x00100000 0x00100000>; + read-only; + }; + + partition@200000 { + label = "0:BOOTCONFIG"; + reg = <0x00200000 0x00100000>; + read-only; + }; + + partition@300000 { + label = "0:QSEE"; + reg = <0x00300000 0x00100000>; + read-only; + }; + + partition@400000 { + label = "0:QSEE_1"; + reg = <0x00400000 0x00100000>; + read-only; + }; + + partition@500000 { + label = "0:CDT"; + reg = <0x00500000 0x00080000>; + read-only; + }; + + partition@580000 { + label = "0:CDT_1"; + reg = <0x00580000 0x00080000>; + read-only; + }; + + partition@600000 { + label = "0:BOOTCONFIG1"; + reg = <0x00600000 0x00080000>; + read-only; + }; + + partition@680000 { + label = "0:APPSBLENV"; + reg = <0x00680000 0x00080000>; + }; + + partition@700000 { + label = "0:APPSBL"; + reg = <0x00700000 0x00200000>; + read-only; + }; + + partition@900000 { + label = "0:APPSBL_1"; + reg = <0x00900000 0x00200000>; + read-only; + }; + + partition@b00000 { + label = "0:ART"; + reg = <0x00b00000 0x00080000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + + }; + }; + + partition@b80000 { + label = "0:ART.bak"; + reg = <0x00b80000 0x00080000>; + read-only; + }; + + partition@c00000 { + label = "config"; + reg = <0x00c00000 0x00100000>; + read-only; + }; + + partition@d00000 { + label = "boarddata1"; + reg = <0x00d00000 0x00080000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address_lan: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + mac_address_wan: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + + mac_address_wlan_5g: macaddr@c { + compatible = "mac-base"; + reg = <0xc 0x6>; + #nvmem-cell-cells = <1>; + }; + + mac_address_wlan_2nd5g: macaddr@12 { + compatible = "mac-base"; + reg = <0x12 0x6>; + #nvmem-cell-cells = <1>; + }; + + }; + }; + + partition@d80000 { + label = "boarddata2"; + reg = <0x00d80000 0x00040000>; + read-only; + }; + + partition@dc0000 { + label = "pot"; + reg = <0x00dc0000 0x00100000>; + read-only; + }; + + partition@ec0000 { + label = "boarddata1.bak"; + reg = <0x00ec0000 0x00080000>; + read-only; + }; + + partition@f40000 { + label = "boarddata2.bak"; + reg = <0x00f40000 0x00040000>; + read-only; + }; + + partition@f80000 { + label = "language"; + reg = <0x00f80000 0x00300000>; + read-only; + }; + + partition@1280000 { + label = "cert"; + reg = <0x01280000 0x00080000>; + read-only; + }; + + partition@1300000 { + label = "ntgrdata"; + reg = <0x01300000 0x09300000>; + }; + + partition@a600000 { + label = "kernel"; + reg = <0x0a600000 0x00700000>; + }; + + partition@a9c0000 { + label = "ubi"; + reg = <0x0ad00000 0x05300000>; + }; + + }; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + + led-controller { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,tlc59108"; /* really is tlc59208f */ + reg = <0x27>; + + led_backlight_green: led-backlight-green { + function = LED_FUNCTION_BACKLIGHT; + color = ; + reg = <0x0>; + linux,default-trigger = "default-off"; + }; + + led_backlight_red: led-backlight-red { + function = LED_FUNCTION_BACKLIGHT; + color = ; + reg = <0x1>; + linux,default-trigger = "default-off"; + }; + + led_backlight_blue: led-backlight-blue { + function = LED_FUNCTION_BACKLIGHT; + color = ; + reg = <0x2>; + linux,default-trigger = "default-off"; + }; + + led_backlight_white: led-backlight-white { + function = LED_FUNCTION_BACKLIGHT; + color = ; + reg = <0x3>; + linux,default-trigger = "default-off"; + }; + + }; +}; + +&blsp1_uart1 { + status = "okay"; + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&mac_address_lan 0>; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; + label = "lan2"; +}; + +&pcie0 { + status = "okay"; + perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + ieee80211-freq-limit = <5170000 5350000>; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_9000>, <&mac_address_wlan_2nd5g 0>; + qcom,ath10k-calibration-variant = "Netgear-LBR20"; + }; + }; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&mac_address_lan 0>; + qcom,ath10k-calibration-variant = "Netgear-LBR20"; +}; + +&wifi1 { + status = "okay"; + ieee80211-freq-limit = <5470000 5815000>; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&mac_address_wlan_5g 0>; + qcom,ath10k-calibration-variant = "Netgear-LBR20"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-le1.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-le1.dts new file mode 100644 index 0000000000..c4e7d0b207 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-le1.dts @@ -0,0 +1,330 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "YYeTs LE1"; + compatible = "yyets,le1"; + + aliases { + led-boot = &led_usb; + led-failsafe = &led_usb; + led-upgrade = &led_usb; + + ethernet0 = &swport5; + ethernet1 = &gmac; + label-mac-device = &gmac; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_usb: usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>; + }; + + wlan2g { + label = "green:wlan2g"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "green:wlan5g"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cells = <&precal_art_1000>; + nvmem-cell-names = "pre-calibration"; + qcom,ath10k-calibration-variant = "YYeTs-LE1"; +}; + +&wifi1 { + status = "okay"; + nvmem-cells = <&precal_art_5000>; + nvmem-cell-names = "pre-calibration"; + qcom,ath10k-calibration-variant = "YYeTs-LE1"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts new file mode 100644 index 0000000000..4f0eaa625b --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-lhgg-60ad.dts @@ -0,0 +1,284 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2019, Robert Marko + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Mikrotik Wireless Wire Dish LHGG-60ad"; + compatible = "mikrotik,lhgg-60ad"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + led-boot = &user; + led-failsafe = &user; + led-running = &user; + led-upgrade = &user; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + panic-indicator; + }; + + user: user { + label = "yellow:user"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + align-left { + label = "green:align-left"; + gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; + }; + + align-right { + label = "green:align-right"; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + + wlan-rx { + label = "green:align-down"; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + + wlan-tx { + label = "green:align-up"; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi-0-pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + + m25p80@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Qualcomm"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + compatible = "mikrotik,routerboot-partitions"; + #address-cells = <1>; + #size-cells = <1>; + label = "RouterBoot"; + reg = <0x80000 0x80000>; + + hard_config { + read-only; + size = <0x2000>; + }; + + dtb_config { + read-only; + }; + + soft_config { + }; + }; + + partition@100000 { + compatible = "mikrotik,minor"; + label = "firmware"; + reg = <0x100000 0xf00000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + /* wil6210 802.11ad card */ + wifi: wifi@1,0 { + status = "okay"; + /* wil6210 driver has no compatible */ + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +ðphy1 { + status = "disabled"; +}; + +ðphy2 { + status = "disabled"; +}; + +ðphy3 { + status = "disabled"; +}; + +ðphy4 { + status = "disabled"; +}; + +&psgmiiphy { + status = "disabled"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; + + /delete-property/ psgmii-ethphy; +}; + +&swport5 { + status = "okay"; + + label = "lan"; + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts new file mode 100644 index 0000000000..32f0473fb1 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-map-ac2200.dts @@ -0,0 +1,363 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ASUS Lyra MAP-AC2200"; + compatible = "asus,map-ac2200"; + + aliases { + led-boot = &led_blue0; + led-failsafe = &led_red0; + led-running = &led_blue0; + led-upgrade = &led_red0; + ethernet1 = &swport4; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "MIBIB"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "QSEE"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "CDT"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "APPSBL"; + reg = <0x280000 0x140000>; + read-only; + }; + + partition@3c0000 { + label = "APPSBLENV"; + reg = <0x3c0000 0x40000>; + read-only; + }; + + partition@400000 { + label = "ubi"; + reg = <0x400000 0x7c00000>; + }; + }; + }; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + pinmux { + function = "blsp_i2c0"; + pins = "gpio20", "gpio21"; + drive-strength = <16>; + bias-disable; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + enable_ext_pa_high { + gpio-hog; + gpios = <44 GPIO_ACTIVE_HIGH>, + <46 GPIO_ACTIVE_HIGH>; + output-high; + bias-pull-down; + line-name = "enable external PA output-high"; + }; + enable_ext_pa_low { + gpio-hog; + gpios = <45 GPIO_ACTIVE_HIGH>, + <47 GPIO_ACTIVE_HIGH>; + output-low; + bias-pull-down; + line-name = "enable external PA output-low"; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200"; + ieee80211-freq-limit = <5470000 5875000>; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "ASUS-MAP-AC2200"; + ieee80211-freq-limit = <5170000 5350000>; + }; + }; +}; + +&usb2_hs_phy { + /* Bluetooth module attached via USB */ + status = "okay"; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + led-controller@32 { + /* 9-channel RGB LED controller */ + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* + * There is only one single extremely bright RGB-LED. + * The RGB-color channels are running in parallel to + * increase the current delivery capabilities beyond + * what a single PWM-output of the controller can do. + */ + + led_blue0: led@0 { + chan-name = "blue-0"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <0>; + color = ; + function-enumerator = <0>; + }; + + led@1 { + chan-name = "blue-1"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <1>; + color = ; + function-enumerator = <1>; + }; + + led@2 { + chan-name = "blue-2"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <2>; + color = ; + function-enumerator = <2>; + }; + + led_green0: led@3 { + chan-name = "green-0"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <3>; + color = ; + function-enumerator = <0>; + }; + + led@4 { + chan-name = "green-1"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <4>; + color = ; + function-enumerator = <1>; + }; + + led@5 { + chan-name = "green-2"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <5>; + color = ; + function-enumerator = <2>; + }; + + led_red0: led@6 { + chan-name = "red-0"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <6>; + color = ; + function-enumerator = <0>; + }; + + led@7 { + chan-name = "red-1"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <7>; + color = ; + function-enumerator = <1>; + }; + + led@8 { + chan-name = "red-2"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + reg = <8>; + color = ; + function-enumerator = <2>; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "wan"; +}; + +&swport5 { + status = "okay"; + + label = "lan"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts new file mode 100644 index 0000000000..6987515720 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf18a.dts @@ -0,0 +1,490 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Marcin Gajda . + + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ZTE MF18A"; + compatible = "zte,mf18a"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + /* + * bootargs forced by u-boot bootipq command: + * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait' + */ + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + + led_internal: led-0 { + label = "blue:internal"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + led_power: led-1 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + led-2 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + led-3 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>; + }; + + led-4 { + function = LED_FUNCTION_WLAN; + label = "blue:smart"; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + led-5 { + label = "red:smart"; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; + }; + + resetzwave { + label = "resetzwave"; + gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + /* u-boot is looking for "n25q128a11" property */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_config_0 0>; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + + label = "wan"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_config_0 1>; +}; + +&swport3 { + status = "okay"; + + label = "lan"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0xa0000>; + read-only; + }; + + partition@a0000 { + label = "ART"; + reg = <0xa0000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + + partition@120000 { + label = "mac"; + reg = <0x120000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1a0000 { + label = "reserved2"; + reg = <0x1a0000 0xc0000>; + read-only; + }; + + partition@260000 { + label = "cfg-param"; + reg = <0x260000 0x400000>; + read-only; + }; + + partition@660000 { + label = "log"; + reg = <0x660000 0x400000>; + }; + + partition@a60000 { + label = "oops"; + reg = <0xa60000 0xa0000>; + }; + + partition@b00000 { + label = "reserved3"; + reg = <0xb00000 0x500000>; + read-only; + }; + + partition@1000000 { + label = "web"; + reg = <0x1000000 0x800000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0x1d00000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x2800000>; + + }; + partition@7600000 { + label = "iot-db"; + reg = <0x7600000 0xa00000>; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>; + qcom,ath10k-calibration-variant = "ZTE-MF18A"; +}; + +//* This node is used for 5Ghz on QCA9982 */ +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>; + clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "pci168c,0040"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>; + qcom,ath10k-calibration-variant = "ZTE-MF18A"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + + diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts new file mode 100644 index 0000000000..54353cac58 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf282plus.dts @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2023, Andreas Böhler + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ZTE MF282Plus"; + compatible = "zte,mf282plus"; + + aliases { + led-boot = &led_internal; + led-failsafe = &led_internal; + led-running = &led_internal; + led-upgrade = &led_internal; + }; + + chosen { + /* + * bootargs forced by u-boot bootipq command: + * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait' + */ + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + modem { + gpio-export,name = "modem-reset"; + gpio-export,output = <0>; + gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_internal: led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + label = "blue:internal_led"; + default-state = "keep"; + }; + + led-1 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wifi { + label = "wifi"; + linux,code = ; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + /* u-boot is looking for "n25q128a11" property */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_config_0 0>; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0xa0000>; + read-only; + }; + + partition@a0000 { + label = "ART"; + reg = <0xa0000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@120000 { + label = "mac"; + reg = <0x120000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1a0000 { + label = "reserved2"; + reg = <0x1a0000 0xc0000>; + read-only; + }; + + partition@260000 { + label = "cfg-param"; + reg = <0x260000 0x400000>; + read-only; + }; + + partition@660000 { + label = "log"; + reg = <0x660000 0x400000>; + }; + + partition@a60000 { + label = "oops"; + reg = <0xa60000 0xa0000>; + }; + + partition@b00000 { + label = "reserved3"; + reg = <0xb00000 0x500000>; + read-only; + }; + + partition@1000000 { + label = "web"; + reg = <0x1000000 0x800000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0x1d00000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x2800000>; + }; + + partition@7600000 { + label = "extra-cfg"; + reg = <0x7600000 0xa00000>; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +/* + * The MD5 sum of the board file of the MF286D is identical to the board + * file in the OEM firmware + */ +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 1>; + qcom,ath10k-calibration-variant = "zte,mf286d"; +}; + +/* + * The MD5 sum of the board file of the MF286D is identical to the board + * file in the OEM firmware + */ +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_config_0 1>; + qcom,ath10k-calibration-variant = "zte,mf286d"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts new file mode 100644 index 0000000000..61cbdba0d1 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf286d.dts @@ -0,0 +1,453 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ZTE MF286D"; + compatible = "zte,mf286d"; + + aliases { + led-boot = &led_internal; + led-failsafe = &led_internal; + led-running = &led_internal; + led-upgrade = &led_internal; + }; + + chosen { + /* + * bootargs forced by u-boot bootipq command: + * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait' + */ + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + + led_internal: led-0 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + label = "blue:internal_led"; + default-state = "keep"; + }; + + led-1 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wifi { + label = "wifi"; + linux,code = ; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + /* u-boot is looking for "n25q128a11" property */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_config_0 0>; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0xa0000>; + read-only; + }; + + partition@a0000 { + label = "ART"; + reg = <0xa0000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@120000 { + label = "mac"; + reg = <0x120000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1a0000 { + label = "reserved2"; + reg = <0x1a0000 0xc0000>; + read-only; + }; + + partition@260000 { + label = "cfg-param"; + reg = <0x260000 0x400000>; + read-only; + }; + + partition@660000 { + label = "log"; + reg = <0x660000 0x400000>; + }; + + partition@a60000 { + label = "oops"; + reg = <0xa60000 0xa0000>; + }; + + partition@b00000 { + label = "reserved3"; + reg = <0xb00000 0x500000>; + read-only; + }; + + partition@1000000 { + label = "web"; + reg = <0x1000000 0x800000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0x1d00000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x3200000>; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + + label = "lan4"; +}; + +&swport3 { + status = "okay"; + + label = "lan3"; +}; + +&swport4 { + status = "okay"; + + label = "lan2"; +}; + +&swport5 { + status = "okay"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_config_0 1>; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>; + qcom,ath10k-calibration-variant = "zte,mf286d"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_config_0 3>; + qcom,ath10k-calibration-variant = "zte,mf286d"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts new file mode 100644 index 0000000000..7c0194ccc0 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +// Copyright (c) 2022, Pawel Dembicki . +// Copyright (c) 2022, Giammarco Marzano . + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ZTE MF289F"; + compatible = "zte,mf289f"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + chosen { + /* + * bootargs forced by u-boot bootipq command: + * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait' + */ + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + /* + * This node is used to restart modem module to avoid anomalous + * behaviours on initial communication. + */ + gpio-restart { + compatible = "gpio-restart"; + gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + + led_status: led-0 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; + }; + + led-1 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + }; + + keys { + compatible = "gpio-keys"; + + key-reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + + key-wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; +}; + +&watchdog { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, + <&tlmm 54 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "0:reserved1"; + reg = <0x1b0000 0x50000>; + read-only; + }; + }; + }; + + spi-nand@1 { /* flash@1 ? */ + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fota-flag"; + reg = <0x0 0xa0000>; + read-only; + }; + + partition@a0000 { + label = "ART"; + reg = <0xa0000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@120000 { + label = "mac"; + reg = <0x120000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1a0000 { + label = "reserved2"; + reg = <0x1a0000 0xc0000>; + read-only; + }; + + partition@260000 { + label = "cfg-param"; + reg = <0x260000 0x400000>; + read-only; + }; + + partition@660000 { + label = "log"; + reg = <0x660000 0x400000>; + }; + + partition@a60000 { + label = "oops"; + reg = <0xa60000 0xa0000>; + }; + + partition@b00000 { + label = "reserved3"; + reg = <0xb00000 0x500000>; + read-only; + }; + + partition@1000000 { + label = "web"; + reg = <0x1000000 0x800000>; + }; + + partition@1800000 { + label = "rootfs"; + reg = <0x1800000 0x1d00000>; + }; + + partition@3500000 { + label = "data"; + reg = <0x3500000 0x1900000>; + }; + + partition@4e00000 { + label = "fota"; + reg = <0x4e00000 0x3200000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_mac_0 0>; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + + label = "wan"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_mac_0 1>; +}; + +&swport5 { + status = "okay"; + + label = "lan"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12", "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0 2>; + qcom,ath10k-calibration-variant = "zte,mf289f"; +}; + +/* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */ +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0 3>; + qcom,ath10k-calibration-variant = "zte,mf289f"; +}; + +/* This node is used only on AT1 version for 5Ghz on QCA9984 */ +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>; + clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_mac_0 4>; + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "zte,mf289f"; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mr8300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mr8300.dts new file mode 100644 index 0000000000..ab9a05c788 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mr8300.dts @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include + +#include "qcom-ipq4019-xx8300.dtsi" + +/ { + model = "Linksys MR8300 (Dallas)"; + compatible = "linksys,mr8300", "qcom,ipq4019"; + + aliases { + led-boot = &led_blue; + led-failsafe = &led_red; + led-running = &led_blue; + led-upgrade = &led_amber; + serial0 = &blsp1_uart1; + }; + + // Top panel LEDs, above Linksys logo + leds { + compatible = "gpio-leds"; + + led_red: red { + function = LED_FUNCTION_ALARM; + color = ; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + }; + + led_amber: amber { + function = LED_FUNCTION_PROGRAMMING; + color = ; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_blue: blue { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + + // On back panel, above USB socket + + led_usb: usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + trigger-sources = <&usb3_port1>, <&usb3_port2>, + <&usb2_port1>; + linux,default-trigger = "usbport"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc"; +}; + +&wifi1 { + status = "okay"; + ieee80211-freq-limit = <5170000 5330000>; + qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc"; +}; + +&wifi2 { + status = "okay"; + ieee80211-freq-limit = <5490000 5835000>; + qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts new file mode 100644 index 0000000000..ea27defea3 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-ncp-hg100-cellular.dts @@ -0,0 +1,635 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" + +#include +#include +#include +#include + +/ { + model = "Sony NCP-HG100/Cellular"; + compatible = "sony,ncp-hg100-cellular"; + + aliases { + led-boot = &led_cloud_green; + led-failsafe = &led_cloud_red; + led-running = &led_cloud_green; + led-upgrade = &led_cloud_green; + label-mac-device = &gmac; + }; + + chosen { + bootargs = "console=ttyMSM0,115200n8 root=/dev/mmcblk0p15 rootfstype=squashfs,ext4"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + soc { + tcsr@1949000 { + status = "okay"; + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + status = "okay"; + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + status = "okay"; + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + dma@7984000 { + status = "okay"; + }; + }; + + keys-repeat { + compatible = "gpio-keys"; + pinctrl-0 = <&keys_pins>; + pinctrl-names = "default"; + autorepeat; + + key-volup { + label = "volume up"; + linux,code = ; + gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>; + linux,input-type = ; + }; + + key-voldown { + label = "volume down"; + linux,code = ; + gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + linux,input-type = ; + }; + + key-alexatrigger { + label = "alexa trigger"; + linux,code = ; + gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; + linux,input-type = ; + }; + + key-mute { + label = "mic mute"; + linux,code = ; + gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + linux,input-type = ; + }; + }; + + keys { + compatible = "gpio-keys"; + + key-reset { + label = "reset"; + gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-wps { + label = "setup"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&tlmm { + pinctrl-0 = <&bt_pins>, <&aud_pins>, <&mcu_pins>; + pinctrl-names = "default"; + + /* + * uart0 is shared for debug console and Z-Wave, + * use only for debug console in OpenWrt. + * + * 1: debug console + * 0: Z-Wave + */ + uart0_ctrl_pins: uart0_ctrl_pinmux { + mux { + pins = "gpio15"; + function = "gpio"; + output-high; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + /* + * reset pin for Z-Wave + * active-low, >= 20ns + */ + zwave_pins: zwave_pinmux { + mux { + pins = "gpio59"; + function = "gpio"; + output-high; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + bt_pins: bt_pinmux { + mux_reset { + pins = "gpio66"; + function = "gpio"; + output-high; + }; + + mux_pwr { + pins = "gpio68"; + function = "gpio"; + output-high; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + i2c_1_pins: i2c_1_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "blsp_i2c1"; + bias-disable; + }; + }; + + keys_pins: keys_pinmux { + mux_1 { + pins = "gpio39", "gpio40", "gpio42", "gpio47"; + function = "gpio"; + bias-disable; + }; + + mux_2 { + pins = "gpio2"; + function = "gpio"; + input; + }; + }; + + sd_pins: sd_pins { + mux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio28", "gpio29", "gpio30", "gpio31"; + drive-strength = <4>; + }; + + mux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + + mux_sd7 { + function = "sdio"; + pins = "gpio32"; + drive-strength = <4>; + bias-disable; + }; + }; + + aud_pins: aud_pinmux { + mux { + pins = "gpio48", "gpio49", "gpio50", "gpio51"; + function = "aud_pin"; + }; + }; + + alc1304_pins: alc1304_pinmux { + mux_1 { + pins = "gpio44"; + function = "gpio"; + bias-disable; + }; + + mux_2 { + pins = "gpio45"; + function = "gpio"; + bias-disable; + }; + }; + + cx2902x_reset: cx2902x_pinmux { + mux_1 { + pins = "gpio64"; + function = "gpio"; + bias-disable; + }; + + mux_2 { + pins = "gpio65"; + function = "gpio"; + bias-disable; + }; + }; + + lte_pins: lte_pinmux { + mux_en { + pins = "gpio20"; + function = "gpio"; + output-high; + }; + + mux_reset { + pins = "gpio35"; + function = "gpio"; + input; + }; + }; + + usb3_pins: usb3_pinmux { + mux_en { + pins = "gpio36"; + function = "gpio"; + output-high; + }; + + mux_flt { + pins = "gpio4"; + function = "gpio"; + input; + }; + }; + + mcu_pins: mcu_pinmux { + mux_boot { + pins = "gpio38"; + function = "gpio"; + output-low; + }; + + mux_reset { + pins = "gpio5"; + function = "gpio"; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c4 { + /* + * There is no driver for the following devices: + * - CY8C4014LQI@14 : Touch-Sensor for buttons on top + * - MINI54FDE@15 : MCU for Fan/RGB LED/Thermal control + * - ALC5629@18 : I2S/PCM Audio DAC + * - CX20924@41 : Voice Input Processor + */ + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + led-controller@32 { + compatible = "ti,lp55231"; + reg = <0x32>; + clock-mode = /bits/ 8 <0>; + enable-gpio = <&tlmm 1 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + chan-name = "green:wan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x0>; + color = ; + function = LED_FUNCTION_WAN; + }; + + led@1 { + chan-name = "blue:wan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x1>; + color = ; + function = LED_FUNCTION_WAN; + }; + + led@2 { + chan-name = "green:lan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x2>; + color = ; + function = LED_FUNCTION_LAN; + }; + + led@3 { + chan-name = "blue:lan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x3>; + color = ; + function = LED_FUNCTION_LAN; + }; + + led@4 { + chan-name = "green:wlan-2"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x4>; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <2>; + linux,default-trigger = "phy0tpt"; + }; + + led@5 { + chan-name = "blue:wlan-2"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x5>; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <2>; + }; + + led@6 { + chan-name = "red:wan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x6>; + color = ; + function = LED_FUNCTION_WAN; + }; + + led@7 { + chan-name = "red:lan"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x7>; + color = ; + function = LED_FUNCTION_LAN; + }; + + led@8 { + chan-name = "red:wlan-2"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x8>; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <2>; + }; + }; + + led-controller@33 { + compatible = "ti,lp55231"; + reg = <0x33>; + clock-mode = /bits/ 8 <0>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + chan-name = "green:wlan-5"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x0>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy1tpt"; + function-enumerator = <5>; + }; + + led@1 { + chan-name = "blue:wlan-5"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x1>; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <5>; + }; + + led@2 { + chan-name = "green:wan-4"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x2>; + color = ; + function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */ + function-enumerator = <4>; /* WWAN/LTE/4G */ + }; + + led@3 { + chan-name = "blue:wan-4"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x3>; + color = ; + function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */ + function-enumerator = <4>; /* WWAN/LTE/4G */ + }; + + led_cloud_green: led@4 { + chan-name = "green:power"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x4>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led@5 { + chan-name = "blue:power"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x5>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led@6 { + chan-name = "red:wlan-5"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x6>; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <5>; + }; + + led@7 { + chan-name = "red:wan-4"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x7>; + color = ; + function = LED_FUNCTION_WAN; /* WWAN/LTE/4G */ + function-enumerator = <4>; /* WWAN/LTE/4G */ + }; + + led_cloud_red: led@8 { + chan-name = "red:power"; + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x8>; + color = ; + function = LED_FUNCTION_POWER; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>, <&uart0_ctrl_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; +}; + +&prng { + status = "okay"; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&vqmmc>; + non-removable; + #address-cells = <1>; + #size-cells = <0>; + + emmc@0 { + compatible = "mmc-card"; + reg = <0>; + }; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; + + pinctrl-0 = <&usb3_pins>, <<e_pins>; + pinctrl-names = "default"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + device@1 { + compatible = "usb1bc7,1900"; + reg = <1>; + }; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan"; +}; + +&swport5 { + status = "okay"; + label = "wan"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular"; +}; + +&watchdog { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-oap100.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-oap100.dts new file mode 100644 index 0000000000..2080a34e2f --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-oap100.dts @@ -0,0 +1,342 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "EdgeCore OAP-100"; + compatible = "edgecore,oap100"; + + aliases { + led-boot = &led_system; + led-failsafe = &led_system; + led-running = &led_system; + led-upgrade = &led_system; + }; + + chosen { + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + soc { + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + key { + compatible = "gpio-keys"; + + button@1 { + label = "reset"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system: led_system { + label = "green:system"; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + }; + + led_2g { + label = "blue:wlan2g"; + gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>; + }; + + led_5g { + label = "blue:wlan5g"; + gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + usb { + gpio-export,name = "usb-power"; + gpio-export,output = <1>; + gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>; + }; + + poe { + gpio-export,name = "poe-power"; + gpio-export,output = <0>; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + linux,modalias = "m25p80", "gd25q256"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "0:APPSBLENV"; + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition6@f0000 { + label = "0:APPSBL"; + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition7@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs"; + reg = <0x00000000 0x4000000>; + }; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "Edgecore OAP100"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "Edgecore OAP100"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi new file mode 100644 index 0000000000..849df64201 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi @@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + aliases { + led-boot = &led_status_white; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_blue; + label-mac-device = &gmac; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led-1 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; + panic-indicator; + }; + + led_status_green: led-2 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + }; + + led_status_red: led-3 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: led-4 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>; + }; + + led_status_white: led-5 { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vqmmc>; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + pinmux { + function = "blsp_i2c0"; + pins = "gpio58", "gpio59"; + bias-disable; + }; + }; + + sd_pins: sd_pins { + pinmux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio28", "gpio29", "gpio30", "gpio31"; + drive-strength = <10>; + }; + + pinmux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + + pinmux_sd7 { + function = "sdio"; + pins = "gpio32"; + drive-strength = <10>; + bias-disable; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + led-controller@27 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,tlc59108"; /* really is tlc59208f */ + reg = <0x27>; + + led0@0 { + label = "rgb:led0"; + reg = <0x0>; + linux,default-trigger = "default-on"; + }; + + led1@1 { + label = "rgb:led1"; + reg = <0x1>; + linux,default-trigger = "default-on"; + }; + + led2@2 { + label = "rgb:led2"; + reg = <0x2>; + linux,default-trigger = "default-on"; + }; + + led3@3 { + label = "rgb:led3"; + reg = <0x3>; + linux,default-trigger = "default-on"; + }; + + led4@4 { + label = "rgb:led4"; + reg = <0x4>; + linux,default-trigger = "default-on"; + }; + + led5@5 { + label = "rgb:led5"; + reg = <0x5>; + linux,default-trigger = "default-on"; + }; + + led6@6 { + label = "rgb:led6"; + reg = <0x6>; + linux,default-trigger = "default-on"; + }; + + led7@7 { + label = "rgb:led7"; + reg = <0x7>; + linux,default-trigger = "default-on"; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + + label = "wan"; +}; + +&swport2 { + status = "okay"; + + label = "lan1"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan3"; +}; + +ðphy4 { + status = "disabled"; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + ieee80211-freq-limit = <5470000 5875000>; + qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60"; + }; + }; +}; + +&wifi0 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60"; +}; + +&wifi1 { + status = "okay"; + + qcom,ath10k-calibration-variant = "Netgear-Orbi-Pro-SRK60"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts new file mode 100644 index 0000000000..ed333c4990 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-pa2200.dts @@ -0,0 +1,256 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* Copyright (c) 2017-2020, Sven Eckelmann + * Copyright (c) 2018, Marek Lindner + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Plasma Cloud PA2200"; + compatible = "plasmacloud,pa2200"; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &led_power_orange; + led-failsafe = &led_status_blue; + led-running = &led_power_orange; + led-upgrade = &led_status_blue; + label-mac-device = &swport4; + }; + + leds { + compatible = "gpio-leds"; + + led_power_orange: power_orange { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + }; + + 2g_blue { + label = "blue:2g"; + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + 2g_green { + label = "green:5g1"; + gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + 5g2_green { + label = "green:5g2"; + gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy2tpt"; + }; + + led_status_blue: status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + /* partitions are passed via bootloader */ + partitions { + partition-art { + label = "0:ART"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200"; + ieee80211-freq-limit = <5170000 5350000>; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_9000>; + }; + }; +}; + +&mdio { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "ethernet1"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0>; +}; + +&swport5 { + status = "okay"; + label = "ethernet2"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200"; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "PlasmaCloud-PA2200"; + ieee80211-freq-limit = <5470000 5875000>; + + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-128m.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-128m.dts new file mode 100644 index 0000000000..0896374ab2 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-128m.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-r619ac.dtsi" + +/ { + model = "P&W R619AC 128M"; + compatible = "p2w,r619ac-128m"; +}; + +&nand_rootfs { + /* + * Watch out: stock MIBIB is set up for a 64MiB chip. + * If a 128MiB flash chip is used, make sure to have + * the right values in MIBIB or the device might not + * boot. + */ + reg = <0x0 0x8000000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-64m.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-64m.dts new file mode 100644 index 0000000000..6c8821a90e --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac-64m.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-r619ac.dtsi" + +/ { + model = "P&W R619AC 64M"; + compatible = "p2w,r619ac-64m"; +}; + +&nand_rootfs { + reg = <0x0 0x4000000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi new file mode 100644 index 0000000000..90e5455b25 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-r619ac.dtsi @@ -0,0 +1,387 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + aliases { + led-boot = &led_sys; + led-failsafe = &led_sys; + led-running = &led_sys; + led-upgrade = &led_sys; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_sys: led-0 { + gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led-1 { + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + }; + + led-2 { + gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + nand_rootfs: partition@0 { + label = "ubi"; + /* reg defined in 64M/128M variant dts. */ + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>; + + /* Free slot for use */ + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&sdhci { + pinctrl-0 = <&sd_0_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&vqmmc>; + status = "okay"; +}; + +&tlmm { + pcie_pins: pcie_pinmux { + mux { + pins = "gpio2"; + function = "gpio"; + output-low; + bias-pull-down; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + sd_0_pins: sd_0_pinmux { + mux_1 { + pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28"; + function = "sdio"; + drive-strength = <10>; + }; + + mux_2 { + pins = "gpio27"; + function = "sdio"; + drive-strength = <16>; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; +}; + +ðphy0 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy1 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy2 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy3 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy4 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + + label = "lan4"; +}; + +&swport2 { + status = "okay"; + + label = "lan3"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&vqmmc { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "P&W-R619AC"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "P&W-R619AC"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr40.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr40.dts new file mode 100644 index 0000000000..26e87b808c --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr40.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR RBR40"; + compatible = "netgear,rbr40"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr50.dts new file mode 100644 index 0000000000..a803999804 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbr50.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR RBR50"; + compatible = "netgear,rbr50"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; + + soc { + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs40.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs40.dts new file mode 100644 index 0000000000..2dfa0c9654 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs40.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR RBS40"; + compatible = "netgear,rbs40"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs50.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs50.dts new file mode 100644 index 0000000000..4d0a9132c6 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rbs50.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR RBS50"; + compatible = "netgear,rbs50"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_ALT)ro,256K(0:CDT)ro,256K(0:CDT_ALT)ro,256K(0:DDRPARAMS)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_ALT)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,1457651200(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; + + soc { + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + }; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts new file mode 100644 index 0000000000..70849d71d6 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rt-ac42u.dts @@ -0,0 +1,324 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ASUS RT-AC42U"; + compatible = "asus,rt-ac42u"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256MB */ + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: led-0 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 40 GPIO_ACTIVE_LOW>; + }; + + led-1 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "90000.mdio-1:04:link"; + }; + + led-2 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + }; + + led-3 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led-4 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led-5 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; + }; + + led-6 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + }; + + led-7 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; + }; + + led-8 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + serial_0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio55", "gpio56", "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", "gpio65", + "gpio66", "gpio67", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00080000>; + read-only; + }; + partition@80000 { + label = "MIBIB"; + reg = <0x00080000 0x00080000>; + read-only; + }; + partition@100000 { + label = "QSEE"; + reg = <0x00100000 0x00100000>; + read-only; + }; + partition@200000 { + label = "CDT"; + reg = <0x00200000 0x00080000>; + read-only; + }; + partition@280000 { + label = "APPSBL"; + reg = <0x00280000 0x00140000>; + read-only; + }; + partition@3C0000 { + label = "APPSBLENV"; + reg = <0x003C0000 0x00040000>; + read-only; + }; + partition@400000 { + label = "ubi"; + reg = <0x00400000 0x07C00000>; + }; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ASUS-RT-AC42U"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + + qcom,ath10k-calibration-variant = "ASUS-RT-AC42U"; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts new file mode 100644 index 0000000000..e2df1d1997 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-rtl30vw.dts @@ -0,0 +1,397 @@ +// SPDX-License-Identifier: ISC +// Copyright (c) 2015, The Linux Foundation. All rights reserved. +// Copyright (c) 2019, Cezary Jackiewicz . +// Copyright (c) 2020, Pawel Dembicki . + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Cell C RTL30VW"; + compatible = "cellc,rtl30vw"; + + aliases { + led-boot = &led_power_blue; + led-failsafe = &led_power_red; + led-running = &led_power_blue; + led-upgrade = &led_power_red; + }; + + chosen { + bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro"; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + num-chipselects = <1>; + + mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; + cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; + sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <2>; + spi-max-frequency = <1000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_blue: power_blue { + gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_POWER; + color = ; + default-state = "on"; + }; + + led_power_red: power_red { + gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_POWER; + color = ; + }; + + tp28 { + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; + label = "ext:tp28"; + default-state = "keep"; + }; + + tp27 { + gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>; + label = "ext:tp27"; + default-state = "keep"; + }; + + wlan2g { + gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>; + label = "blue:wlan2g"; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>; + label = "blue:wlan5g"; + linux,default-trigger = "phy1tpt"; + }; + + wps { + gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_WPS; + color = ; + }; + + voip { + gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>; + label = "blue:voip"; + }; + + s1 { + gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>; + label = "blue:s1"; + }; + + s2 { + gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>; + label = "blue:s2"; + }; + + s3 { + gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>; + label = "blue:s3"; + }; + + s4 { + gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>; + label = "blue:s4"; + }; + + signal { + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + label = "red:signal"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + }; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + /*"n25q128a11" is required for proper nand recognition in u-boot. */ + compatible = "jedec,spi-nor", "n25q128a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "0:BOOTCONFIG"; + reg = <0x180000 0x10000>; + read-only; + }; + }; + }; + + flash@1 { + /* + * Factory U-boot looks in 0:BOOTCONFIG partition for active + * partitions settings and mangle partition config. So kernel + * /kernel_1 and rootfs/rootfs_1 pairs can be swaped. + * It isn't a problem but we never can be sure where OFW put + * factory images. "spinand,mt29f" value is required for proper + * nand recognition in u-boot. + */ + compatible = "spi-nand","spinand,mt29f"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "rootfs"; + reg = <0x400000 0x2000000>; + }; + + partition@2400000 { + label = "kernel_1"; + reg = <0x2400000 0x400000>; + }; + + partition@2800000 { + label = "rootfs_1"; + reg = <0x2800000 0x2000000>; + }; + + partition@4800000 { + label = "ubifs"; + reg = <0x4800000 0x3800000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "cellc,rtl30vw"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "cellc,rtl30vw"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport3 { + status = "okay"; + + label = "lan1"; +}; + +&swport4 { + status = "okay"; + + label = "lan2"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srr60.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srr60.dts new file mode 100644 index 0000000000..80bcb2e204 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srr60.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR SRR60"; + compatible = "netgear,srr60"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_1)ro,256K(0:CDT)ro,256K(0:CDT_1)ro,512K(0:BOOTCONFIG1)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_1)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,64K(cert)ro,3840K(kernel-2)ro,31488K(rootfs-2)ro,35328K@44881K(firmware-2)ro,5M(device_table)ro,17M(cp_file)ro,102737K(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srs60.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srs60.dts new file mode 100644 index 0000000000..65bb7ac397 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-srs60.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-orbi.dtsi" + +/ { + model = "NETGEAR SRS60"; + compatible = "netgear,srs60"; + + chosen { + bootargs = "root=/dev/mmcblk0p20 blkdevparts=mmcblk0:512K@17K(0:SBL1)ro,512K(0:BOOTCONFIG)ro,512K(0:QSEE)ro,512K(0:QSEE_1)ro,256K(0:CDT)ro,256K(0:CDT_1)ro,512K(0:BOOTCONFIG1)ro,256K(0:APPSBLENV)ro,1M(0:APPSBL)ro,1M(0:APPSBL_1)ro,256K(0:ART)ro,256K(ARTMTD)ro,2M(language)ro,256K(config)ro,256K(pot)ro,256K(traffic_meter)ro,256K(pot_bak)ro,256K(traffic_meter.bak)ro,3840K(kernel),31488K(rootfs),35328K@9233K(firmware),256K(mtdoops)ro,64K(cert)ro,3840K(kernel-2)ro,31488K(rootfs-2)ro,35328K@44881K(firmware-2)ro,5M(device_table)ro,17M(cp_file)ro,102737K(reserved)ro,-(unallocated) rootfstype=squashfs,ext4 rootwait"; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019-32m.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019-32m.dts new file mode 100644 index 0000000000..08c55d0c27 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019-32m.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-u4019.dtsi" +#include +#include + +/ { + model = "Unielec U4019 (32M)"; + compatible = "unielec,u4019-32m","unielec,u4019","qcom,ipq4019"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + broken-flash-reset; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; + }; +}; + diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi new file mode 100644 index 0000000000..c7439b87ec --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + compatible = "unielec,u4019","qcom,ipq4019"; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + watchdog@b017000 { + status = "okay"; + }; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + serial0 = &blsp1_uart1; + serial1 = &blsp1_uart2; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_status: led2 { + label = "green:led2"; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + led_pins: led_pinmux { + mux { + function = "gpio"; + pins = "gpio68"; + bias-disabled; + output-low; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts new file mode 100644 index 0000000000..7b3f1c8bb7 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts @@ -0,0 +1,518 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Linksys WHW03 V2 (Velop)"; + compatible = "linksys,whw03v2", "qcom,ipq4019"; + + aliases { + led-boot = &led_blue; + led-failsafe = &led_red; + led-running = &led_green; + led-upgrade = &led_red; + }; + + // The arguments rootfstype and ro are needed + // to override the default bootargs + chosen { + bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro"; + stdout-path = &blsp1_uart1; + }; + + soc { + ess-tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; + + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + + +&tlmm { + mdio_pins: mdio-pinmux { + mux-1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux-2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + i2c_0_pins: i2c-0-pinmux { + mux { + function = "blsp_i2c0"; + pins = "gpio20", "gpio21"; + bias-disable; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1-pinmux { + mux { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi-0-pinmux { + mux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + mux-cs { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + spi_1_pins: spi-1-pinmux { + mux-1 { + function = "blsp_spi1"; + pins = "gpio44", "gpio46","gpio47"; + bias-disable; + }; + + mux-2 { + pins = "gpio31", "gpio45", "gpio49"; + function = "gpio"; + bias-pull-up; + output-high; + }; + + host-interrupt { + pins = "gpio42"; + function = "gpio"; + input; + }; + }; + + wifi_0_pins: wifi0-pinmux { + btcoexist { + bias-pull-up; + drive-strength = <6>; + function = "gpio"; + output-high; + pins = "gpio52"; + }; + }; + + zigbee-0 { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + bias-disable; + output-low; + }; + + zigbee-1 { + gpio-hog; + gpios = <50 GPIO_ACTIVE_HIGH>; + bias-disable; + input; + }; + + bluetooth-enable { + gpio-hog; + gpios = <32 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + phy-reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; +}; + +ðphy0 { + status = "disabled"; +}; + +ðphy1 { + status = "disabled"; +}; + +ðphy2 { + status = "disabled"; +}; + +ðphy3 { + reg = <0x1b>; +}; + +ðphy4 { + reg = <0x1c>; +}; + +&psgmiiphy { + reg = <0x1d>; +}; + +&watchdog { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + num-channels = <4>; + qcom,num-ees = <2>; + + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&blsp1_uart1 { + status = "okay"; + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; +}; + +&blsp1_uart2 { + status = "okay"; + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + + bluetooth { + compatible = "csr,8811"; + + enable-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; +}; + +&blsp1_spi2 { + pinctrl-0 = <&spi_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + + zigbee@0 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "silabs,em3581"; + reg = <0>; + spi-max-frequency = <12000000>; + }; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + // RGB LEDs + pca9633: led-controller@62 { + compatible = "nxp,pca9633"; + nxp,hw-blink; + reg = <0x62>; + #address-cells = <1>; + #size-cells = <0>; + + led_red: red@0 { + color = ; + function = LED_FUNCTION_INDICATOR; + linux,default-trigger = "none"; + reg = <0>; + }; + + led_green: green@1 { + color = ; + function = LED_FUNCTION_INDICATOR; + linux,default-trigger = "none"; + reg = <1>; + }; + + led_blue: blue@2 { + color = ; + function = LED_FUNCTION_INDICATOR; + linux,default-trigger = "default-on"; + reg = <2>; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "MIBIB"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "QSEE"; + reg = <0x200000 0x100000>; + read-only; + }; + + partition@300000 { + label = "CDT"; + reg = <0x300000 0x80000>; + read-only; + }; + + partition@380000 { + label = "APPSBL"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "ART"; + reg = <0x580000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; + }; + }; + + partition@600000 { + label = "u_env"; + reg = <0x600000 0x80000>; + }; + + partition@680000 { + label = "s_env"; + reg = <0x680000 0x40000>; + }; + + partition@6c0000 { + label = "devinfo"; + reg = <0x6c0000 0x40000>; + read-only; + }; + + partition@700000 { + label = "kernel"; + reg = <0x700000 0xa100000>; + }; + + partition@d00000 { + label = "rootfs"; + reg = <0xd00000 0x9b00000>; + }; + + partition@a800000 { + label = "alt_kernel"; + reg = <0xa800000 0xa100000>; + }; + + partition@ae00000 { + label = "alt_rootfs"; + reg = <0xae00000 0x9b00000>; + }; + + partition@14900000 { + label = "sysdiag"; + reg = <0x14900000 0x200000>; + read-only; + }; + + partition@14b00000 { + label = "syscfg"; + reg = <0x14b00000 0xb500000>; + read-only; + }; + }; + }; +}; + +&pcie0 { + status = "okay"; + + perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 40 GPIO_ACTIVE_LOW>; + clkreq-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&swport5 { + status = "okay"; + label = "wan"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0 0>; +}; + +&wifi0 { + pinctrl-0 = <&wifi_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + qcom,coexist-support = <1>; + qcom,coexist-gpio-pin = <0x34>; + + ieee80211-freq-limit = <2401000 2473000>; + qcom,ath10k-calibration-variant = "linksys-whw03v2"; + + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_gmac0 1>; +}; + +&wifi1 { + status = "okay"; + + ieee80211-freq-limit = <5170000 5250000>; + qcom,ath10k-calibration-variant = "linksys-whw03v2"; + + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_gmac0 2>; +}; + +&wifi2 { + status = "okay"; + + ieee80211-freq-limit = <5735000 5835000>; + qcom,ath10k-calibration-variant = "linksys-whw03v2"; + + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_9000>, <&macaddr_gmac0 3>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts new file mode 100644 index 0000000000..f2e39c87ae --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wifi.dts @@ -0,0 +1,451 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2016, 2018 The Linux Foundation. All rights reserved. + * Copyright (c) 2016 Google, Inc + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Google WiFi (Gale)"; + compatible = "google,wifi", "google,gale-v2", "qcom,ipq4019"; + + aliases { + label-mac-device = &gmac0; + led-boot = &led0_blue; + led-failsafe = &led0_red; + led-running = &led0_blue; + led-upgrade = &led0_red; + }; + + chosen { + /* + * rootwait: in case we're booting from slow/async USB storage. + */ + bootargs-append = " rootwait"; + stdout-path = &blsp1_uart1; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MB */ + }; + + soc { + edma@c080000 { + /* + * Factory bootloader (depthcharge) will fail to boot + * if this exact path (soc/edma@c080000/gmac0) doesn't + * exist. + */ + gmac0: gmac0 { + }; + + /* + * Factory bootloader (depthcharge) will fail to boot + * if this exact path (soc/edma@c080000/gmac1) doesn't + * exist. + */ + gmac1 { + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&fw_pinmux>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&scm { + qcom,sdi-enabled; +}; + +&tlmm { + fw_pinmux: fw_pinmux { + wp { + pins = "gpio53"; + output-low; + }; + recovery { + pins = "gpio57"; + function = "gpio"; + bias-none; + }; + developer { + pins = "gpio41"; + bias-none; + }; + }; + + reset802_15_4 { + pins = "gpio60"; + }; + + led_reset { + pins = "gpio22"; + output-high; + }; + + sys_reset { + pins = "gpio19"; + output-high; + }; + + rx_active { + pins = "gpio43"; + bias-pull,down; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14","gpio15"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + }; + pinconf { + pins = "gpio13", "gpio14","gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + spi_1_pins: spi_1_pinmux { + pinmux { + function = "blsp_spi1"; + pins = "gpio44", "gpio46","gpio47"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio45"; + }; + pinconf { + pins = "gpio44", "gpio46","gpio47"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio45"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + serial_0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + drive-open-drain; + }; + }; + + i2c_1_pins: i2c_1_pinmux { + mux { + pins = "gpio34", "gpio35"; + function = "blsp_i2c1"; + drive-open-drain; + }; + }; + + sd_0_pins: sd_0_pinmux { + sd0 { + pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio29", "gpio30", "gpio31", "gpio32"; + function = "sdio"; + drive-strength = <10>; + bias-pull-up; + pull-up-res = <0>; + }; + sdclk { + pins = "gpio27"; + function = "sdio"; + drive-strength = <2>; + bias-pull-up; + pull-up-res = <0>; + }; + sdcmd { + pins = "gpio28"; + function = "sdio"; + drive-strength = <10>; + bias-pull-up; + pull-up-res = <0>; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-disable; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-disable; + }; + mux_3 { + pins = "gpio40"; + function = "gpio"; + bias-disable; + output-high; + }; + }; + + wifi1_1_pins: wifi2_pinmux { + mux { + pins = "gpio58"; + output-low; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + powered-while-suspended; + }; +}; + +&blsp1_i2c4 { + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + led-controller@32 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + +#if 1 + led0_red: led@0 { + reg = <0>; + chan-name = "LED0_Red"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + function = LED_FUNCTION_FAULT; + }; + + led@1 { + reg = <1>; + chan-name = "LED0_Green"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + }; + + led0_blue: led@2 { + reg = <2>; + chan-name = "LED0_Blue"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + function = LED_FUNCTION_POWER; + }; +#else + /* + * openwrt isn't ready to handle multi-intensity leds yet + * # echo 255 255 255 > /sys/class/leds/tricolor/multi_intensity + * # echo 255 > /sys/class/leds/tricolor/brightness + */ + multi-led@2 { + function = LED_FUNCTION_POWER; + reg = <2>; + color = ; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + chan-name = "tricolor"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + }; + + led@1 { + reg = <1>; + chan-name = "tricolor"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + }; + + led@2 { + reg = <2>; + chan-name = "tricolor"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + color = ; + }; + }; +#endif + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + +&blsp1_spi2 { + pinctrl-0 = <&spi_1_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + + /* + * This "spidev" was included in the manufacturer device tree. I + * suspect it's the (unused; and removed from later HW spins) Zigbee + * radio -- SiliconLabs EM3581 Zigbee? There's no driver or binding for + * this at the moment. + */ + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&prng { + status = "okay"; +}; + +&sdhci { + status = "okay"; + pinctrl-0 = <&sd_0_pins>; + pinctrl-names = "default"; + clock-frequency = <192000000>; + vqmmc-supply = <&vqmmc>; + non-removable; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + + label = "lan"; +}; + +&swport5 { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&vqmmc { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "GO_GALE"; +}; + +&wifi1 { + status = "okay"; + pinctrl-0 = <&wifi1_1_pins>; + pinctrl-names = "default"; + qcom,ath10k-calibration-variant = "GO_GALE"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts new file mode 100644 index 0000000000..2dc4544433 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts @@ -0,0 +1,373 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2019, Nguyen Dinh Phi + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Compex WPJ419"; + compatible = "compex,wpj419", "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + reserved-memory { + ranges; + rsvd1@87000000 { + /* Reserved for other subsystem */ + reg = <0x87000000 0x500000>; + no-map; + }; + wifi_dump@87500000 { + reg = <0x87500000 0x600000>; + no-map; + }; + + rsvd2@87B00000 { + /* Reserved for other subsystem */ + reg = <0x87B00000 0x500000>; + no-map; + }; + }; + + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + soc { + pinctrl@1000000 { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + bias-disable; + output-high; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + led_0_pins: led0_pinmux { + mux_1 { + pins = "gpio36"; + function = "led0"; + bias-pull-down; + }; + mux_2 { + pins = "gpio40"; + function = "led4"; + bias-pull-down; + }; + }; + }; + + blsp_dma: dma@7884000 { + status = "okay"; + }; + + spi_0: spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>; + num-cs = <2>; + + flash0@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + broken-flash-reset; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x040000 0x020000>; + read-only; + }; + + partition@60000 { + label = "0:QSEE"; + reg = <0x060000 0x060000>; + read-only; + }; + + partition@c0000 { + label = "0:CDT"; + reg = <0x0c0000 0x010000>; + read-only; + }; + + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0x0d0000 0x010000>; + read-only; + }; + + partition@e0000 { + label = "u-boot-env"; + reg = <0x0e0000 0x010000>; + }; + + partition@f0000 { + label = "u-boot"; + reg = <0x0f0000 0x080000>; + read-only; + }; + + partition@170000 { + label = "0:ART"; + reg = <0x170000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + + nand@1 { + reg = <1>; + status = "okay"; + compatible = "spi-nand"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* The device has 128MB, but we can only address + * 64MB because of the bootloader's default settings. + * This is due to the old mt29f driver, + * which detected the deivce with only 64MB + */ + partition@0 { + label = "ubi"; + reg = <0x0000000 0x4000000>; + }; + }; + }; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <5000>; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + i2c_0: i2c@78b7000 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + serial@78af000 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + serial@78b0000 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + usb3_ss_phy: ssphy@9a000 { + status = "okay"; + }; + + usb3_hs_phy: hsphy@a6000 { + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + }; + + usb2_hs_phy: hsphy@a8000 { + status = "okay"; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + cryptobam: dma@8e04000 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + qpic_bam: dma@7984000 { + status = "okay"; + }; + + pcie0: pci@40000000 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts new file mode 100644 index 0000000000..00b5897b7d --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wtr-m2133hp.dts @@ -0,0 +1,472 @@ +// SPDX-License-Identifier: ISC +/* + * Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2020 Yanase Yuki + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "Buffalo WTR-M2133HP"; + compatible = "buffalo,wtr-m2133hp", "qcom,ipq4019"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + chosen { + /* + * U-Boot adds "ubi.mtd=rootfs root=mtd:ubi_rootfs" to + * kernel command line. But we use different partition names, + * so we have to set correct parameters. + */ + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + aliases { + led-boot = &led_power_blue; + led-failsafe = &led_power_orange; + led-running = &led_power_white; + led-upgrade = &led_power_blue; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_white: power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + }; + + led_power_orange: power_orange { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; + }; + + led_power_blue: power_blue { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; + }; + + router_white { + label = "white:router"; + gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + }; + + router_orange { + label = "orange:router"; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + + internet_white { + label = "white:internet"; + gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>; + }; + + internet_orange { + label = "orange:internet"; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; + + wireless_white { + label = "white:wireless"; + gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; + }; + + wireless_orange { + label = "orange:wireless"; + gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + auto_mode { + label = "auto_mode"; + gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + router_mode { + label = "router_mode"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + ap_mode { + label = "ap_mode"; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "AOSS Button"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&tlmm { + serial_0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + usb_power { + line-name = "USB power"; + gpios = <34 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@0,0 { + compatible = "qcom,ath10k"; + reg = <0 0 0 0 0>; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_9000>, <&macaddr_orgdata_32>; + qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0000000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "MIBIB"; + reg = <0x0100000 0x0100000>; + read-only; + }; + + partition@200000 { + label = "BOOTCONFIG"; + reg = <0x0200000 0x0100000>; + read-only; + }; + + partition@300000 { + label = "QSEE"; + reg = <0x0300000 0x0100000>; + read-only; + }; + + partition@400000 { + label = "QSEE_1"; + reg = <0x0400000 0x0100000>; + read-only; + }; + + partition@500000 { + label = "CDT"; + reg = <0x0500000 0x0080000>; + read-only; + }; + + partition@580000 { + label = "CDT_1"; + reg = <0x0580000 0x0080000>; + read-only; + }; + + partition@600000 { + label = "BOOTCONFIG1"; + reg = <0x0600000 0x0080000>; + read-only; + }; + + partition@680000 { + label = "APPSBLENV"; + reg = <0x0680000 0x0080000>; + }; + + partition@700000 { + label = "APPSBL"; + reg = <0x0700000 0x0200000>; + read-only; + }; + + partition@900000 { + label = "APPSBL_1"; + reg = <0x0900000 0x0200000>; + read-only; + }; + + partition@b00000 { + label = "ART"; + reg = <0x0b00000 0x0080000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@b80000 { + label = "ART_1"; + reg = <0x0b80000 0x0080000>; + read-only; + }; + + orgdata: partition@c00000 { + label = "ORGDATA"; + reg = <0x0c00000 0x0080000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_orgdata_20: macaddr@20 { + reg = <0x20 0x6>; + }; + macaddr_orgdata_26: macaddr@26 { + reg = <0x26 0x6>; + }; + macaddr_orgdata_2c: macaddr@2c { + reg = <0x2c 0x6>; + }; + macaddr_orgdata_32: macaddr@32 { + reg = <0x32 0x6>; + }; + }; + }; + + partition@c80000 { + label = "ORGDATA_1"; + reg = <0x0c80000 0x0080000>; + read-only; + }; + + partition@d00000 { + label = "ubi"; + reg = <0x0d00000 0x2900000>; + }; + + partition@3600000 { + label = "rootfs_recover"; + reg = <0x3600000 0x2900000>; + read-only; + }; + + partition@5f00000 { + label = "user_property"; + reg = <0x5f00000 0x1a20000>; + read-only; + }; + }; + }; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_orgdata_26>; + qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; + ieee80211-freq-limit = <2400000 2483000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_orgdata_2c>; + qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + label = "lan3"; +}; + +&swport3 { + status = "okay"; + label = "lan2"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; +}; + +&swport5 { + status = "okay"; +}; + +&gmac { + status = "okay"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_orgdata_20>; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dts new file mode 100644 index 0000000000..3d71593e86 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dts @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "qcom-ipq4019-x1pro.dtsi" +#include +#include + +/ { + model = "Telco X1 Pro"; + compatible = "tel,x1pro","qcom,ipq4019"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + broken-flash-reset; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + partition@60000 { + label = "0:QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + partition@c0000 { + label = "0:CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + partition@d0000 { + label = "0:DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + partition@e0000 { + label = "0:APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + partition@f0000 { + label = "0:APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + art: partition@170000 { + label = "0:ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi new file mode 100644 index 0000000000..fe3650ca58 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi @@ -0,0 +1,218 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + compatible = "tel,x1pro","qcom,ipq4019"; + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + serial0 = &blsp1_uart1; + serial1 = &blsp1_uart2; + }; + + soc { + + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + watchdog@b017000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_status: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + led_pins: led_pinmux { + mux { + function = "gpio"; + pins = "gpio68"; + bias-disabled; + output-low; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi new file mode 100644 index 0000000000..141ea60442 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-xx8300.dtsi @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/* + * Device Tree Source for Linksys xx8300 (Dallas) + * + * Copyright (C) 2019, 2022 Jeff Kletsky + * Updated 2020 Hans Geiblinger + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + + // + // OEM U-Boot provides either + // init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \ + // root=ubi0:ubifs rootwait rw + // or the same with ubi.mtd=13,2048 + // + +/ { + chosen { + bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro"; + }; + + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "USB_VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + gpio = <&tlmm 68 GPIO_ACTIVE_LOW>; + }; +}; + + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + status = "okay"; + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + +}; + +&cryptobam { + status = "okay"; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "sbl1"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "mibib"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "qsee"; + reg = <0x200000 0x100000>; + read-only; + }; + + partition@300000 { + label = "cdt"; + reg = <0x300000 0x80000>; + read-only; + }; + + partition@380000 { + label = "appsblenv"; + reg = <0x380000 0x80000>; + read-only; + }; + + partition@400000 { + label = "ART"; + reg = <0x400000 0x80000>; + read-only; + }; + + partition@480000 { + label = "appsbl"; + reg = <0x480000 0x200000>; + read-only; + }; + + partition@680000 { + label = "u_env"; + reg = <0x680000 0x80000>; + // writable -- U-Boot environment + }; + + partition@700000 { + label = "s_env"; + reg = <0x700000 0x40000>; + // writable -- Boot counter records + }; + + partition@740000 { + label = "devinfo"; + reg = <0x740000 0x40000>; + read-only; + }; + + partition@780000 { + label = "kernel"; + reg = <0x780000 0x5800000>; + }; + + partition@c80000 { + label = "rootfs"; + reg = <0xc80000 0x5300000>; + }; + + partition@5f80000 { + label = "alt_kernel"; + reg = <0x5f80000 0x5800000>; + }; + + partition@6480000 { + label = "alt_rootfs"; + reg = <0x6480000 0x5300000>; + }; + + partition@b780000 { + label = "sysdiag"; + reg = <0xb780000 0x100000>; + read-only; + }; + + partition@b880000 { + label = "syscfg"; + reg = <0xb880000 0x4680000>; + read-only; + }; + }; + }; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + serial_0_pins: serial0-pinmux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + // gpio61 controls led_usb + + pulldowns { + pins = "gpio55", "gpio56", "gpio57", + "gpio60", "gpio62", "gpio63", + "gpio64", "gpio65", "gpio66", + "gpio67", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; +}; + +&swport2 { + status = "okay"; +}; + +&swport3 { + status = "okay"; +}; + +&swport4 { + status = "okay"; +}; + +&swport5 { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts new file mode 100644 index 0000000000..4b61bbb5ac --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts @@ -0,0 +1,316 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2017, Christian Mehlis + * Copyright (c) 2017-2018, Sven Eckelmann + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Compex WPJ428"; + compatible = "compex,wpj428"; + + chosen { + /* + * There's a chance that SPI reads fail even though the data itself is alright. + * The read result is cached and squashfs can't recover. + * Just panic when that happens and hope that next time it doesn't. + */ + bootargs-append = " rootflags=errors=panic"; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + aliases { + led-boot = &status; + led-failsafe = &status; + led-upgrade = &status; + }; + + leds { + compatible = "gpio-leds"; + + status: rss4 { + label = "green:rss4"; + gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; + }; + + rss3 { + label = "green:rss3"; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + }; + }; + + beeper: beeper { + compatible = "gpio-beeper"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio53"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio52"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "0:APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition5@f0000 { + label = "0:APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition5@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_e010: mac-address@e010 { + reg = <0xe010 0x6>; + }; + + macaddr_art_e018: mac-address@e018 { + reg = <0xe018 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + partition6@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x00180000 0x01e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "lan1"; + + nvmem-cells = <&macaddr_art_e018>; + nvmem-cell-names = "mac-address"; +}; + +&swport5 { + status = "okay"; + label = "lan2"; + + nvmem-cells = <&macaddr_art_e010>; + nvmem-cell-names = "mac-address"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303.dts new file mode 100644 index 0000000000..7e484db1b5 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303.dts @@ -0,0 +1,204 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4029-aruba-glenmorangie.dtsi" +#include + +/ { + model = "Aruba AP-303"; + compatible = "aruba,ap-303"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_red; + }; + + leds { + compatible = "gpio-leds"; + + wifi_green { + label = "green:wifi"; + gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wifi_amber { + label = "amber:wifi"; + gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + led_system_red: system_red { + label = "red:system"; + gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; + }; + + led_system_green: system_green { + label = "green:system"; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + /* + * In addition to the Pins listed below, + * the following GPIOs have "features": + * 54 - out - active low to force HW reset + * 41 - out - active low to reset TPM + * 43 - out - active low to reset BLE radio + * 19 - in - active high when DC powered + */ + + phy-reset { + line-name = "PHY-reset"; + gpios = <42 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * There is no partition map for the NOR flash + * in the stock firmware. + * + * All partitions here are based on offsets + * found in the U-Boot GPL code and information + * from smem. + */ + + partition@0 { + label = "sbl1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "mibib"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "qsee"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "cdt"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "ddrparams"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "ART"; + reg = <0xe0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@f0000 { + label = "appsbl"; + reg = <0xf0000 0xf0000>; + read-only; + }; + + partition@1e0000 { + label = "mfginfo"; + reg = <0x1e0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + compatible = "mac-base"; + reg = <0x1d 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1f0000 { + label = "apcd"; + reg = <0x1f0000 0x10000>; + read-only; + }; + + partition@200000 { + label = "osss"; + reg = <0x200000 0x180000>; + read-only; + }; + + partition@380000 { + label = "appsblenv"; + reg = <0x380000 0x10000>; + }; + + partition@390000 { + label = "pds"; + reg = <0x390000 0x10000>; + read-only; + }; + + partition@3a0000 { + label = "fcache"; + reg = <0x3a0000 0x10000>; + read-only; + }; + + partition@3b0000 { + /* Called osss1 in smem */ + label = "u-boot-env-bak"; + reg = <0x3b0000 0x10000>; + read-only; + }; + + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts new file mode 100644 index 0000000000..41b42e8f58 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts @@ -0,0 +1,479 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Aruba AP-303H"; + compatible = "aruba,ap-303h"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_amber; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + i2c_0: i2c@78b7000 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + tpm@29 { + /* No Driver */ + compatible = "atmel,at97sc3203"; + reg = <0x29>; + read-only; + }; + + power-monitor@40 { + /* No driver */ + compatible = "isl,isl28022"; + reg = <0x40>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + wifi_green { + label = "green:wifi"; + gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wifi_amber { + label = "amber:wifi"; + gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + pse { + label = "green:pse"; + gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; + }; + + led_system_red: system_red { + label = "red:system"; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; + }; + + led_system_green: system_green { + label = "green:system"; + gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; + }; + + led_system_amber: system_amber { + label = "amber:system"; + gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + /* Texas Instruments CC2540T BLE radio */ + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + /* + * In addition to the Pins listed below, + * the following GPIOs have "features": + * 39 - out - active low to force HW reset + * 32 - out - active low to reset TPM + * 43 - out - active low to reset BLE radio + * 41 - out - pulse to set warm reset status + * 34 - out - active low to enable PSE port + * 22 - in - active low when 802.3at powered + * 29 - in - active high when DC powered + * 40 - in - active low when reset due to cold HW reset + * 30 - in - active low when USB overcurrent detected + * 35 - in - interrupt line for power monitor chip + * 31 - in - active low when PSE port active + */ + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + drive-strength = <4>; + bias-disable; + }; + }; + + serial_0_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial_1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + usb-power { + line-name = "USB-power"; + gpios = <23 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * There is no partition map for the NOR flash + * in the stock firmware. + * + * All partitions here are based on offsets + * found in the U-Boot GPL code and information + * from smem. + */ + + partition@0 { + label = "sbl1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "mibib"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "qsee"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "cdt"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "ddrparams"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "appsblenv"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "appsbl"; + reg = <0xf0000 0x100000>; + read-only; + }; + + partition@1e0000 { + label = "ART"; + reg = <0x1f0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@1f0000 { + label = "osss"; + reg = <0x200000 0x170000>; + read-only; + }; + + partition@200000 { + label = "pds"; + reg = <0x370000 0x10000>; + read-only; + }; + + partition@380000 { + label = "apcd"; + reg = <0x380000 0x10000>; + read-only; + }; + + partition@390000 { + label = "mfginfo"; + reg = <0x390000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + reg = <0x1d 0x6>; + }; + + macaddr_mfginfo_45: macaddr@45 { + compatible = "mac-base"; + reg = <0x45 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@3a0000 { + label = "fcache"; + reg = <0x3a0000 0x10000>; + read-only; + }; + + partition@3b0000 { + /* Called osss1 in smem */ + label = "u-boot-env-bak"; + reg = <0x3b0000 0x10000>; + read-only; + }; + + partition@3f0000 { + label = "u-boot-env"; + reg = <0x3c0000 0x40000>; + read-only; + }; + }; + }; + + flash@1 { + status = "okay"; + + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* 'aos0' in Aruba firmware */ + label = "aos0"; + reg = <0x0 0x2000000>; + read-only; + }; + + partition@2000000 { + /* 'aos1' in Aruba firmware */ + label = "ubi"; + reg = <0x2000000 0x2000000>; + }; + + partition@4000000 { + label = "aruba-ubifs"; + reg = <0x4000000 0x4000000>; + read-only; + }; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport2 { + status = "okay"; + + label = "lan1"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; +}; + +&swport4 { + status = "okay"; + + label = "lan3"; +}; + +&swport5 { + status = "okay"; + + label = "wan"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45 0>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45 1>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-365.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-365.dts new file mode 100644 index 0000000000..3477dace72 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-365.dts @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4029-aruba-glenmorangie.dtsi" +#include + +/ { + model = "Aruba AP-365"; + compatible = "aruba,ap-365"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_red; + }; + + leds { + compatible = "gpio-leds"; + + led_system_red: system_red { + label = "red:system"; + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; + }; + + led_system_green: system_green { + label = "green:system"; + gpios = <&tlmm 61 GPIO_ACTIVE_LOW>; + }; + + system_amber { + label = "amber:system"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + hw_margin_ms = <1000>; + always-running; + }; +}; + +&tlmm { + /* + * In addition to the Pins listed below, + * the following GPIOs have "features": + * 39 - out - pulse low to reset watchdog status flipflop + * 40 - out - active high to enable watchdog + * 41 - out - watchdog poke + * 42 - out - active low to reset BLE radio + * 43 - out - active low to reset TPM + * 47 - out - pulse low to reset warm reset status + * 54 - out - active low to force HW reset + * 18 - in - PHY interrupt line + * 45 - in - power monitor interrupt + * 48 - in - active low when cold reset + * 52 - in - active high when watchdog reset + */ + + phy-reset { + line-name = "PHY-reset"; + gpios = <42 GPIO_ACTIVE_HIGH>; + gpio-hog; + output-high; + }; +}; + +&i2c_0 { + power-monitor@40 { + /* No driver */ + compatible = "isl,isl28022"; + reg = <0x40>; + }; + + temperature-sensor@48 { + compatible = "adi,ad7416"; + reg = <0x48>; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * There is no partition map for the NOR flash + * in the stock firmware. + * + * All partitions here are based on offsets + * found in the U-Boot GPL code and information + * from smem. + */ + + partition@0 { + label = "sbl1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "mibib"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "qsee"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "cdt"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "ddrparams"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "u-boot-env"; + reg = <0xe0000 0x10000>; + }; + + partition@f0000 { + label = "appsbl"; + reg = <0xf0000 0x100000>; + read-only; + }; + + partition@1f0000 { + label = "ART"; + reg = <0x1f0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@200000 { + label = "osss"; + reg = <0x200000 0x170000>; + read-only; + }; + + partition@370000 { + label = "pds"; + reg = <0x370000 0x10000>; + read-only; + }; + + partition@380000 { + label = "apcd"; + reg = <0x380000 0x10000>; + read-only; + }; + + partition@390000 { + label = "mfginfo"; + reg = <0x390000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + compatible = "mac-base"; + reg = <0x1d 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@3a0000 { + label = "fcache"; + reg = <0x3a0000 0x10000>; + read-only; + }; + + partition@3b0000 { + label = "osss1"; + reg = <0x3b0000 0x50000>; + read-only; + }; + }; + }; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "Aruba-AP-365"; +}; + +&wifi1 { + qcom,ath10k-calibration-variant = "Aruba-AP-365"; +}; + diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi new file mode 100644 index 0000000000..4b3b682260 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-aruba-glenmorangie.dtsi @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy: ethernet-phy@5 { + reg = <0x5>; + }; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + i2c_0: i2c@78b7000 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + tpm@29 { + /* No Driver */ + compatible = "atmel,at97sc3203"; + reg = <0x29>; + read-only; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + /* Texas Instruments CC2540T BLE radio */ + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio10", "gpio11"; + function = "blsp_i2c0"; + drive-strength = <4>; + bias-disable; + }; + }; + + serial_0_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial_1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* 'aos0' in Aruba firmware */ + label = "aos0"; + reg = <0x0 0x2000000>; + read-only; + }; + + partition@2000000 { + /* 'aos1' in Aruba firmware */ + label = "ubi"; + reg = <0x2000000 0x2000000>; + }; + + partition@4000000 { + label = "aruba-ubifs"; + reg = <0x4000000 0x4000000>; + read-only; + }; + }; + }; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; + + /delete-property/ psgmii-ethphy; +}; + +&swport5 { + status = "okay"; + + label = "lan"; + phy-handle = <ðphy>; + phy-mode = "rgmii-id"; +}; + +ðphy0 { + status = "disabled"; +}; + +ðphy1 { + status = "disabled"; +}; + +ðphy2 { + status = "disabled"; +}; + +ðphy3 { + status = "disabled"; +}; + +ðphy4 { + status = "disabled"; +}; + +&psgmiiphy { + status = "disabled"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_1d 0>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_1d 1>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts new file mode 100644 index 0000000000..13ed26d5d6 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-b1300.dts @@ -0,0 +1,329 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "GL.iNet GL-B1300"; + compatible = "glinet,gl-b1300"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + label-mac-device = &swport4; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + mesh { + label = "green:mesh"; + gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + mx25l25635f@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + SBL1@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + MIBIB@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + QSEE@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + CDT@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + DDRPARAMS@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + APPSBLENV@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + APPSBL@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + ART@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_gmac0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_gmac1: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + firmware@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0x1e80000>; + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; + }; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport3 { + status = "okay"; + + label = "lan2"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0 2>; +}; + +&swport4 { + status = "okay"; + + label = "lan1"; + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac0 0>; +}; + +&swport5 { + status = "okay"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_gmac1>; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "GL-B1300"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "GL-B1300"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-s1300.dts new file mode 100644 index 0000000000..e7236824aa --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-s1300.dts @@ -0,0 +1,363 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "GL.iNet GL-S1300"; + compatible = "glinet,gl-s1300"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + mesh { + label = "green:mesh"; + gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>; + }; + + wlan { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + }; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vqmmc>; +}; + +&blsp_dma { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + SBL1@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + MIBIB@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + QSEE@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + CDT@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + DDRPARAMS@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + APPSBLENV@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + APPSBL@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + ART@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + firmware@180000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x180000 0xe80000>; + }; + }; + }; +}; + +&blsp1_spi2 { + pinctrl-0 = <&spi_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + spidev1: spi@0 { + compatible = "silabs,si3210"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart2 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&tlmm { + serial_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + }; + pinconf { + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + spi_1_pins: spi_1_pinmux { + mux { + pins = "gpio44", "gpio46", "gpio47"; + function = "blsp_spi1"; + bias-disable; + }; + host_int { + pins = "gpio42"; + function = "gpio"; + input; + }; + cs { + pins = "gpio45"; + function = "gpio"; + bias-pull-up; + }; + wake { + pins = "gpio40"; + function = "gpio"; + output-high; + }; + reset { + pins = "gpio49"; + function = "gpio"; + output-high; + }; + }; + + sd_pins: sd_pins { + pinmux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio28", "gpio29", "gpio30", "gpio31"; + drive-strength = <10>; + }; + + pinmux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + + pinmux_sd7 { + function = "sdio"; + pins = "gpio32"; + drive-strength = <10>; + bias-disable; + }; + }; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; + qcom,ath10k-calibration-variant = "GL-S1300"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; + qcom,ath10k-calibration-variant = "GL-S1300"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi new file mode 100644 index 0000000000..2b9f73eb24 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-insect-common.dtsi @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Device Tree Source for Meraki "Insect" series + * + * Copyright (C) 2017 Chris Blake + * Copyright (C) 2017 Christian Lamparter + * + * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427 + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + aliases { + led-boot = &status_green; + led-failsafe = &status_red; + led-running = &status_green; + led-upgrade = &power_orange; + }; + + /* Do we really need this defined? */ + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + /* It is a 56-bit counter that supplies the count to the ARM arch + timers and without upstream driver */ + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + serial@78b0000 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + bluetooth { + compatible = "ti,cc2650"; + enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + power_orange: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + panic-indicator; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c64"; + pagesize = <32>; + reg = <0x50>; + read-only; /* This holds our MAC & Meraki board-data */ + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + compatible = "mac-base"; + reg = <0x66 0x6>; + #nvmem-cell-cells = <1>; + }; + }; +}; + +&blsp1_i2c4 { + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "okay"; + + tricolor: led-controller@30 { + compatible = "ti,lp5562"; + reg = <0x30>; + clock-mode = /bits/8 <2>; + #address-cells = <1>; + #size-cells = <0>; + + /* RGB led */ + status_red: chan@0 { + chan-name = "red:status"; + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <0>; + color = ; + }; + + status_green: chan@1 { + chan-name = "green:status"; + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <1>; + color = ; + }; + + chan@2 { + chan-name = "blue:status"; + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <2>; + color = ; + }; + + chan@3 { + chan-name = "white:status"; + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <3>; + color = ; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "sbl1"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@100000 { + label = "mibib"; + reg = <0x00100000 0x00100000>; + read-only; + }; + partition@200000 { + label = "bootconfig"; + reg = <0x00200000 0x00100000>; + read-only; + }; + partition@300000 { + label = "qsee"; + reg = <0x00300000 0x00100000>; + read-only; + }; + partition@400000 { + label = "qsee_alt"; + reg = <0x00400000 0x00100000>; + read-only; + }; + partition@500000 { + label = "cdt"; + reg = <0x00500000 0x00080000>; + read-only; + }; + partition@580000 { + label = "cdt_alt"; + reg = <0x00580000 0x00080000>; + read-only; + }; + partition@600000 { + label = "ddrparams"; + reg = <0x00600000 0x00080000>; + read-only; + }; + partition@700000 { + label = "u-boot"; + reg = <0x00700000 0x00200000>; + read-only; + }; + partition@900000 { + label = "u-boot-backup"; + reg = <0x00900000 0x00200000>; + read-only; + }; + partition@b00000 { + label = "ART"; + reg = <0x00b00000 0x00080000>; + read-only; + }; + partition@c00000 { + label = "ubi"; + reg = <0x00c00000 0x07000000>; + /* + * Do not try to allocate the remaining + * 4 MiB to this ubi partition. It will + * confuse the u-boot and it might not + * find the kernel partition anymore. + */ + }; + }; + }; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + nvmem-cells = <&mac_address 1>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + /* + * GPIO43 should be 0/1 whenever the unit is + * powered through PoE or AC-Adapter. + * That said, playing with this seems to + * reset the AP. + */ + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial_0_pins: serial_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial_1_pins: serial1_pinmux { + mux { + /* We use the i2c-0 pins for serial_1 */ + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + i2c_0_pins: i2c_0_pinmux { + pinmux { + function = "blsp_i2c0"; + pins = "gpio20", "gpio21"; + }; + pinconf { + pins = "gpio20", "gpio21"; + drive-strength = <16>; + bias-disable; + }; + }; + + i2c_1_pins: i2c_1_pinmux { + pinmux { + function = "blsp_i2c1"; + pins = "gpio34", "gpio35"; + }; + pinconf { + pins = "gpio34", "gpio35"; + drive-strength = <16>; + bias-disable; + }; + }; + + nand_pins: nand_pins { + /* + * There are 18 pins. 15 pins are common between LCD and NAND. + * The QPIC controller arbitrates between LCD and NAND. Of the + * remaining 4, 2 are for NAND and 2 are for LCD exclusively. + * + * The meraki source hints that the bluetooth module claims + * pin 52 as well. But sadly, there's no data whenever this + * is a NAND or LCD exclusive pin or not. + */ + + pullups { + pins = "gpio52", "gpio53", "gpio58", + "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", + "gpio57", "gpio60", "gpio61", + "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", + "gpio68", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Meraki-MR33"; + nvmem-cells = <&mac_address 2>; + nvmem-cell-names = "mac-address"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Meraki-MR33"; + nvmem-cells = <&mac_address 3>; + nvmem-cell-names = "mac-address"; +}; + +&gmac { + status = "okay"; + nvmem-cells = <&mac_address 0>; + nvmem-cell-names = "mac-address"; +}; + +&switch { + status = "okay"; + + /delete-property/ psgmii-ethphy; +}; + +&swport5 { + status = "okay"; + + label = "lan"; + phy-handle = <ðphy1>; + phy-mode = "rgmii-rxid"; +}; + +ðphy0 { + status = "disabled"; +}; + +ðphy2 { + status = "disabled"; +}; + +ðphy3 { + status = "disabled"; +}; + +ðphy4 { + status = "disabled"; +}; + +&psgmiiphy { + status = "disabled"; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr33.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr33.dts new file mode 100644 index 0000000000..8c8b1b3150 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr33.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Device Tree Source for Meraki MR33 (Stinkbug) + +#include "qcom-ipq4029-insect-common.dtsi" + +/ { + model = "Meraki MR33 Access Point"; + compatible = "meraki,mr33"; +}; + +&tricolor { + enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr74.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr74.dts new file mode 100644 index 0000000000..904f724652 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-mr74.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Device Tree Source for Meraki MR74 (Ladybug) + +#include "qcom-ipq4029-insect-common.dtsi" + +/ { + model = "Meraki MR74 Access Point"; + compatible = "meraki,mr74"; +}; + +&tricolor { + enable-gpio = <&tlmm 14 GPIO_ACTIVE_LOW>; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts new file mode 100644 index 0000000000..8794d839a8 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Extreme Networks WS-AP3915i"; + compatible = "extreme-networks,ws-ap3915i"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_amber; + led-running = &led_system_green; + led-upgrade = &led_system_amber; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system_green: system_green { + label = "green:system"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + + led_system_amber: system_amber { + label = "amber:system"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + led_wlan24_green: wlan24_green { + label = "green:wlan24"; + gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_wlan24_amber: wlan24_amber { + label = "amber:wlan24"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + }; + + led_wlan5_green: wlan5_green { + label = "green:wlan5"; + gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led_wlan5_amber: wlan5_amber { + label = "amber:wlan5"; + gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + }; + + iot { + label = "blue:iot"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport5 { + status = "okay"; + + label = "lan"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + serial_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Layout for 0x0 - 0xe0000 unknown */ + + partition@e0000 { + label = "CFG1"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "BootBAK"; + reg = <0xf0000 0x70000>; + read-only; + }; + + partition@160000 { + label = "WINGCFG1"; + reg = <0x160000 0x10000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "BootPRI"; + reg = <0x180000 0x70000>; + read-only; + }; + + partition@1f0000 { + label = "WINGCFG2"; + reg = <0x1f0000 0x10000>; + read-only; + }; + + partition@200000 { + label = "FS"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "firmware"; + reg = <0x280000 0x1d60000>; + }; + + partition@1fe0000 { + label = "CFG2"; + reg = <0x1fe0000 0x10000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts new file mode 100644 index 0000000000..04b55b1abf --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts @@ -0,0 +1,344 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Extreme Networks WS-AP391x"; + compatible = "extreme-networks,ws-ap391x"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_red; + }; + + soc { + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + }; + + leds { + compatible = "gpio-leds"; + + led_system_green: system_green { + label = "system:green"; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + + /* + * system:amber ==> AP3917 + * system:red ==> AP3916 + * */ + led_system_red: system_red { + label = "system:red_or_system:amber"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + }; + + led_wlan24_green: wlan24_green { + label = "wlan24:green"; + gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + /* + * wlan24:amber ==> AP3915/AP3917 + * pse:green ==> AP3912 + * */ + led_wlan24_amber: wlan24_amber { + label = "wlan24:amber_or_pse:green"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + }; + + led_wlan5_green: wlan5_green { + label = "wlan5:green"; + gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + /* iot:blue ==> AP3917 */ + led_iot_green: iot_green { + label = "iot:green_or_iot:blue"; + gpios = <&tlmm 10 GPIO_ACTIVE_LOW>; + }; + + /* eth:green ==> only AP3912/AP3916 */ + led_eth_green: eth_green { + label = "eth:green"; + gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + }; + + /* + * eth:amber ==> only AP3912/AP3916 + * usb_enable ==> only AP3915e + */ + led_eth_amber: eth_amber { + label = "eth:amber_or_usb_enable"; + gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; + }; + + /* + * wlan5:amber ==> AP3915/AP3917 + * cam:green ==> only AP3916 + */ + led_wlan5_amber: wlan5_amber { + label = "wlan5:amber_or_cam:green"; + gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; + }; + + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&prng { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&crypto { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb2 { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport1 { + status = "okay"; + label = "sw-eth1"; +}; + +&swport2 { + status = "okay"; + label = "sw-eth2"; +}; + +&swport3 { + status = "okay"; + label = "sw-eth3"; +}; + +/* "GE2" on AP3917/AP3916/WiNG-AP7662 */ +&swport4 { + status = "okay"; + label = "sw-eth4"; +}; + +/* + * "GE1" on AP3917/AP3916/AP3915/AP7662 + * "LAN1" on EXTR-AP3912 + */ +&swport5 { + status = "okay"; + label = "sw-eth5"; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + serial_pins: serial_0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "Extreme-Networks-WS-AP3915i"; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Layout for 0x0 - 0xe0000 unknown */ + + partition@e0000 { + label = "CFG1"; + compatible = "u-boot,env-redundant-bool"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "BootBAK"; + reg = <0xf0000 0x70000>; + read-only; + }; + + partition@160000 { + label = "WINGCFG1"; + reg = <0x160000 0x10000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + + partition@180000 { + label = "BootPRI"; + reg = <0x180000 0x70000>; + read-only; + }; + + partition@1f0000 { + label = "WINGCFG2"; + reg = <0x1f0000 0x10000>; + read-only; + }; + + partition@200000 { + label = "FS"; + reg = <0x200000 0x80000>; + read-only; + }; + + partition@280000 { + label = "firmware"; + reg = <0x280000 0xeb0000>; + }; + + partition@1130000 { + label = "firmware2"; + reg = <0x1130000 0xeb0000>; + }; + + partition@1fe0000 { + label = "CFG2"; + compatible = "u-boot,env-redundant-bool"; + reg = <0x1fe0000 0x10000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts new file mode 100644 index 0000000000..271a972092 --- /dev/null +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq40x9-dr40x9.dts @@ -0,0 +1,424 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include + +/ { + model = "Wallystech DR40X9"; + compatible = "wallys,dr40x9"; + + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + soc { + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + status = "okay"; + + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + wlan2g { + label = "dr4029:green:wlan2g"; + gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "dr4029:green:wlan5g"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wlan2g-strength { + label = "dr4029:green:wlan2g-strength"; + gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + }; + + wlan5g-strength { + label = "dr4029:green:wlan5g-strength"; + gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + serial0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + serial1_pins: serial1_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart1"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio13", "gpio14", "gpio15"; + drive-strength = <12>; + bias-disable; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio52", "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio54", "gpio55", "gpio56", "gpio57", + "gpio60", "gpio62", "gpio63", "gpio64", + "gpio65", "gpio66", "gpio67", "gpio68", + "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; + + sd_pins: sd_pins { + pinmux { + function = "sdio"; + pins = "gpio23", "gpio24", "gpio25", "gpio26", + "gpio28", "gpio29", "gpio30", "gpio31"; + drive-strength = <10>; + }; + pinmux_sd_clk { + function = "sdio"; + pins = "gpio27"; + drive-strength = <16>; + }; + pinmux_sd7 { + function = "sdio"; + pins = "gpio32"; + drive-strength = <10>; + bias-disable; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + + cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "0:SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + + partition1@40000 { + label = "0:MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + + partition2@60000 { + label = "0:QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + + partition3@c0000 { + label = "0:CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + + partition4@d0000 { + label = "0:DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + + partition5@e0000 { + label = "0:APPSBLENV"; /* uboot env */ + reg = <0x000e0000 0x00010000>; + read-only; + }; + + partition6@f0000 { + label = "0:APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + + partition7@170000 { + label = "0:ART"; + reg = <0x00170000 0x00010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: mac-address@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: mac-address@6 { + reg = <0x6 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + macaddr_art_1006: mac-address@1006 { + reg = <0x1006 0x6>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + macaddr_art_5006: mac-address@5006 { + reg = <0x5006 0x6>; + }; + }; + }; + + partition8@180000 { + label = "0:CONFIG"; + reg = <0x00180000 0x00010000>; + read-only; + }; + }; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x04000000>; + }; + }; + }; +}; + +&blsp1_uart1 { + status = "okay"; + pinctrl-0 = <&serial0_pins>; + pinctrl-names = "default"; +}; + +&blsp1_uart2 { + status = "okay"; + pinctrl-0 = <&serial1_pins>; + pinctrl-names = "default"; +}; + +&crypto { + status = "okay"; +}; + +&cryptobam { + num-channels = <4>; + qcom,num-ees = <2>; + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + reset-delay-us = <2000>; +}; + +&pcie0 { + status = "okay"; + + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>; + + /* Unpolulated slot */ + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; +}; + +&vqmmc { + status = "okay"; +}; + +&sdhci { + status = "okay"; + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vqmmc>; +}; + +&gmac { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + +&swport4 { + status = "okay"; + label = "wan"; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +&swport5 { + status = "okay"; + label = "lan"; + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; +}; + +&wifi0 { + status = "okay"; + nvmem-cells = <&precal_art_1000>, <&macaddr_art_1006>; + nvmem-cell-names = "pre-calibration", "mac-address"; + qcom,ath10k-calibration-variant = "Wallys-DR40X9"; +}; + +&wifi1 { + status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_art_5006>; + qcom,ath10k-calibration-variant = "Wallys-DR40X9"; +}; + +&usb2 { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + diff --git a/target/linux/ipq40xx/image/Makefile b/target/linux/ipq40xx/image/Makefile index 2ba4c779a0..fe99d05ccb 100644 --- a/target/linux/ipq40xx/image/Makefile +++ b/target/linux/ipq40xx/image/Makefile @@ -5,6 +5,7 @@ define Device/Default PROFILES := Default KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) KERNEL_LOADADDR := 0x80208000 + DEVICE_DTS_DIR = $(if $(CONFIG_TESTING_KERNEL),$$(DTS_DIR)/qcom,$$(DTS_DIR)) DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1))) DEVICE_DTS_CONFIG := config@1 IMAGES := sysupgrade.bin From 6136ebabc5cb8e37e2c6543e48ffeb7177320c5a Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:16:14 +0100 Subject: [PATCH 13/31] ipq40xx: 6.6: fix DTS to use reference for usb node Fix DTS to use reference for usb node instead of redefining them since upstream usb node names changed from usb2/3 to usb. Signed-off-by: Christian Marangi --- .../arm/boot/dts/qcom/qcom-ipq4018-a42.dts | 8 +-- .../boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi | 16 ++--- .../arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts | 8 +-- .../arm/boot/dts/qcom/qcom-ipq4019-a62.dts | 8 +-- .../boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi | 66 +++++++++---------- .../dts/qcom/qcom-ipq4019-habanero-dvk.dts | 16 ++--- .../boot/dts/qcom/qcom-ipq4019-hap-ac3.dts | 8 +-- .../arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts | 16 ++--- 8 files changed, 73 insertions(+), 73 deletions(-) diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts index f43c4b8000..8ce530dbd5 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-a42.dts @@ -44,10 +44,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -191,6 +187,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi index bb293bb57e..581b939ae6 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-jalapeno.dtsi @@ -54,14 +54,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - - usb3: usb3@8af8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -266,6 +258,10 @@ qcom,ath10k-calibration-variant = "8devices-Jalapeno"; }; +&usb3 { + status = "okay"; +}; + &usb3_ss_phy { status = "okay"; }; @@ -274,6 +270,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts index f23b58a3f4..cb847e7558 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-pa1200.dts @@ -44,10 +44,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -183,6 +179,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts index 39a52a7c48..463e1e171e 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-a62.dts @@ -44,10 +44,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -202,6 +198,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi index d226611311..9216a7c9f8 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi @@ -57,20 +57,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - - dwc3@6000000 { - #address-cells = <1>; - #size-cells = <0>; - - usb2_port1: port@1 { - reg = <1>; - #trigger-source-cells = <0>; - }; - }; - }; - serial@78af000 { pinctrl-0 = <&serial_0_pins>; pinctrl-names = "default"; @@ -90,25 +76,6 @@ status = "okay"; }; - usb3: usb3@8af8800 { - status = "okay"; - - dwc3@8a00000 { - #address-cells = <1>; - #size-cells = <0>; - - usb3_port1: port@1 { - reg = <1>; - #trigger-source-cells = <0>; - }; - - usb3_port2: port@2 { - reg = <2>; - #trigger-source-cells = <0>; - }; - }; - }; - crypto@8e3a000 { status = "okay"; }; @@ -233,6 +200,25 @@ }; }; +&usb3 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; +}; + &usb3_ss_phy { status = "okay"; }; @@ -241,6 +227,20 @@ status = "okay"; }; +&usb2 { + status = "okay"; + + dwc3@6000000 { + #address-cells = <1>; + #size-cells = <0>; + + usb2_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + }; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts index 26e9941a9f..86daa58a3f 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-habanero-dvk.dts @@ -62,14 +62,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - - usb3: usb3@8af8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -379,6 +371,10 @@ qcom,ath10k-calibration-variant = "8devices-Habanero"; }; +&usb3 { + status = "okay"; +}; + &usb3_ss_phy { status = "okay"; }; @@ -387,6 +383,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts index 4e2b4574d3..836ad44210 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3.dts @@ -63,10 +63,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -304,6 +300,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts index 4b61bbb5ac..88bcbb3101 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts @@ -73,14 +73,6 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2: usb2@60f8800 { - status = "okay"; - }; - - usb3: usb3@8af8800 { - status = "okay"; - }; - crypto@8e3a000 { status = "okay"; }; @@ -291,6 +283,10 @@ nvmem-cell-names = "mac-address"; }; +&usb3 { + status = "okay"; +}; + &usb3_ss_phy { status = "okay"; }; @@ -299,6 +295,10 @@ status = "okay"; }; +&usb2 { + status = "okay"; +}; + &usb2_hs_phy { status = "okay"; }; From 5323c45d7866be4cf61aa963846e00c4f456e590 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:11:41 +0100 Subject: [PATCH 14/31] ipq40xx: 6.6: drop upstream kernel patches Drop upstream kernel patches that were straight backport. Signed-off-by: Christian Marangi --- ...k-qcom-ipq4019-add-missing-networkin.patch | 30 ------------------- ...pq4019-add-missing-networking-resets.patch | 30 ------------------- 2 files changed, 60 deletions(-) delete mode 100644 target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch delete mode 100644 target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch diff --git a/target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch b/target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch deleted file mode 100644 index 87feaf79f8..0000000000 --- a/target/linux/ipq40xx/patches-6.6/001-v6.6-dt-bindings-clock-qcom-ipq4019-add-missing-networkin.patch +++ /dev/null @@ -1,30 +0,0 @@ -From be59072c6eeb7535bf9a339fb9d5a8bfae17ac22 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Mon, 14 Aug 2023 12:40:23 +0200 -Subject: [PATCH] dt-bindings: clock: qcom: ipq4019: add missing networking - resets - -Add bindings for the missing networking resets found in IPQ4019 GCC. - -Signed-off-by: Robert Marko -Acked-by: Krzysztof Kozlowski -Link: https://lore.kernel.org/r/20230814104119.96858-1-robert.marko@sartura.hr -Signed-off-by: Bjorn Andersson ---- - include/dt-bindings/clock/qcom,gcc-ipq4019.h | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h -+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h -@@ -165,5 +165,11 @@ - #define GCC_QDSS_BCR 69 - #define GCC_MPM_BCR 70 - #define GCC_SPDM_BCR 71 -+#define ESS_MAC1_ARES 72 -+#define ESS_MAC2_ARES 73 -+#define ESS_MAC3_ARES 74 -+#define ESS_MAC4_ARES 75 -+#define ESS_MAC5_ARES 76 -+#define ESS_PSGMII_ARES 77 - - #endif diff --git a/target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch b/target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch deleted file mode 100644 index 70b278c803..0000000000 --- a/target/linux/ipq40xx/patches-6.6/002-v6.6-clk-qcom-gcc-ipq4019-add-missing-networking-resets.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 20014461691efc9e274c3870357152db7f091820 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Mon, 14 Aug 2023 12:40:24 +0200 -Subject: [PATCH] clk: qcom: gcc-ipq4019: add missing networking resets - -IPQ4019 has more networking related resets that will be required for future -wired networking support, so lets add them. - -Signed-off-by: Robert Marko -Link: https://lore.kernel.org/r/20230814104119.96858-2-robert.marko@sartura.hr -Signed-off-by: Bjorn Andersson ---- - drivers/clk/qcom/gcc-ipq4019.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/clk/qcom/gcc-ipq4019.c -+++ b/drivers/clk/qcom/gcc-ipq4019.c -@@ -1707,6 +1707,12 @@ static const struct qcom_reset_map gcc_i - [GCC_TCSR_BCR] = {0x22000, 0}, - [GCC_MPM_BCR] = {0x24000, 0}, - [GCC_SPDM_BCR] = {0x25000, 0}, -+ [ESS_MAC1_ARES] = {0x1200C, 0}, -+ [ESS_MAC2_ARES] = {0x1200C, 1}, -+ [ESS_MAC3_ARES] = {0x1200C, 2}, -+ [ESS_MAC4_ARES] = {0x1200C, 3}, -+ [ESS_MAC5_ARES] = {0x1200C, 4}, -+ [ESS_PSGMII_ARES] = {0x1200C, 5}, - }; - - static const struct regmap_config gcc_ipq4019_regmap_config = { From 82531764fefc7b8d5f7ed1ef9d41be0b0304e86f Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:12:31 +0100 Subject: [PATCH 15/31] ipq40xx: 6.6: rework kernel patches for new kernel Rework kernel patches for new kernel. Mainly adaptation for patch related to DTS, OOB Tagger and SDHCI patch. Signed-off-by: Christian Marangi --- ...RM-dts-qcom-ipq4019-add-label-to-SCM.patch | 6 +++--- ...msm-use-sdhci_set_clock-instead-of-s.patch | 2 +- ...dsa-add-out-of-band-tagging-protocol.patch | 20 ++++++------------- ...4019-Add-description-for-the-IPQESS-.patch | 6 +++--- ...-add-IPQ4019-built-in-switch-support.patch | 4 +--- .../707-arm-dts-ipq4019-add-switch-node.patch | 6 +++--- ...pq4019-add-QCA8075-PHY-Package-nodes.patch | 4 ++-- ...0-arm-dts-ipq4019-QCA807x-properties.patch | 6 +++--- .../850-soc-add-qualcomm-syscon.patch | 4 ++-- 9 files changed, 24 insertions(+), 34 deletions(-) diff --git a/target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch b/target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch index 8b9352e6f1..23d8745bde 100644 --- a/target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch +++ b/target/linux/ipq40xx/patches-6.6/100-ARM-dts-qcom-ipq4019-add-label-to-SCM.patch @@ -8,11 +8,11 @@ SCM node, so lets make that easy by adding a label to the SCM node. Signed-off-by: Robert Marko --- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- + arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -155,7 +155,7 @@ }; diff --git a/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch b/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch index bf36164aed..9ce68d40aa 100644 --- a/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch +++ b/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch @@ -16,7 +16,7 @@ Signed-off-by: Robert Marko @@ -2451,7 +2451,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat static const struct sdhci_ops sdhci_msm_ops = { - .reset = sdhci_msm_reset, + .reset = sdhci_and_cqhci_reset, - .set_clock = sdhci_msm_set_clock, + .set_clock = sdhci_set_clock, .get_min_clock = sdhci_msm_get_min_clock, diff --git a/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch b/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch index 68d1a2e23b..6ed6fa7540 100644 --- a/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch +++ b/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch @@ -146,16 +146,6 @@ Signed-off-by: Maxime Chevallier }; static __always_inline unsigned int skb_ext_total_length(void) -@@ -4537,6 +4544,9 @@ static __always_inline unsigned int skb_ - #if IS_ENABLED(CONFIG_MCTP_FLOWS) - skb_ext_type_len[SKB_EXT_MCTP] + - #endif -+#if IS_ENABLED(CONFIG_NET_DSA_TAG_OOB) -+ skb_ext_type_len[SKB_EXT_DSA_OOB] + -+#endif - 0; - } - --- a/net/dsa/Kconfig +++ b/net/dsa/Kconfig @@ -113,6 +113,15 @@ config NET_DSA_TAG_OCELOT_8021Q @@ -186,7 +176,7 @@ Signed-off-by: Maxime Chevallier obj-$(CONFIG_NET_DSA_TAG_RTL8_4) += tag_rtl8_4.o --- /dev/null +++ b/net/dsa/tag_oob.c -@@ -0,0 +1,49 @@ +@@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* Copyright (c) 2022, Maxime Chevallier */ @@ -195,7 +185,9 @@ Signed-off-by: Maxime Chevallier +#include +#include + -+#include "dsa_priv.h" ++#include "tag.h" ++ ++#define OOB_NAME "oob" + +static struct sk_buff *oob_tag_xmit(struct sk_buff *skb, + struct net_device *dev) @@ -224,7 +216,7 @@ Signed-off-by: Maxime Chevallier +} + +static const struct dsa_device_ops oob_tag_dsa_ops = { -+ .name = "oob", ++ .name = OOB_NAME, + .proto = DSA_TAG_PROTO_OOB, + .xmit = oob_tag_xmit, + .rcv = oob_tag_rcv, @@ -233,6 +225,6 @@ Signed-off-by: Maxime Chevallier +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("DSA tag driver for out-of-band tagging"); +MODULE_AUTHOR("Maxime Chevallier "); -+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OOB); ++MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OOB, OOB_NAME); + +module_dsa_tag_driver(oob_tag_dsa_ops); diff --git a/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch b/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch index 27bdebdb93..4f9e7f2f9a 100644 --- a/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch +++ b/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch @@ -16,11 +16,11 @@ for connection to the switch. Signed-off-by: Maxime Chevallier Reviewed-by: Krzysztof Kozlowski --- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -594,6 +594,54 @@ status = "disabled"; }; diff --git a/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch index 992884cf31..c82626eefd 100644 --- a/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch +++ b/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch @@ -87,7 +87,7 @@ Signed-off-by: Robert Marko if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge)) --- /dev/null +++ b/drivers/net/dsa/qca/qca8k-ipq4019.c -@@ -0,0 +1,948 @@ +@@ -0,0 +1,946 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2009 Felix Fietkau @@ -256,8 +256,6 @@ Signed-off-by: Robert Marko + + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000FD; -+ -+ config->legacy_pre_march2020 = false; +} + +static void diff --git a/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch index e7203a3ac9..b49f08650b 100644 --- a/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch +++ b/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch @@ -8,11 +8,11 @@ for it to work. Signed-off-by: Robert Marko --- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -594,6 +594,82 @@ status = "disabled"; }; diff --git a/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch b/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch index e8b89647ce..afc8d920d7 100644 --- a/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch +++ b/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch @@ -14,8 +14,8 @@ Signed-off-by: Christian Marangi arch/arm/boot/dts//qcom-ipq4019.dtsi | 35 +++++++++++++++--------- 1 file changed, 22 insertions(+), 13 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -725,24 +725,33 @@ reg = <0x90000 0x64>; status = "disabled"; diff --git a/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch index a9ba70ff2f..2ea94d5c34 100644 --- a/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch +++ b/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch @@ -7,11 +7,11 @@ This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI. Signed-off-by: Robert Marko --- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 17 +++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -752,6 +752,10 @@ ethphy4: ethernet-phy@4 { reg = <4>; diff --git a/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch index 6afb27b178..80dba5d686 100644 --- a/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch +++ b/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch @@ -17,9 +17,9 @@ Subject: SoC: add qualcomm syscon --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -29,3 +29,4 @@ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o - obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o - obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o + qcom_ice-objs += ice.o + obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += qcom_ice.o +obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o --- /dev/null +++ b/drivers/soc/qcom/qcom_tcsr.c From 8ec76705d42766156c4185f59998c7144f815363 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 17:08:30 +0100 Subject: [PATCH 16/31] ipq806x: 6.6: add pending patch fixing mtdcore with MTD OTP Add pending patch fixing mtdcore with MTD OTP with a fragile detection if Nand supports OTP. Patch has been sent upstream and will be backported to stable kernel if accepted. Signed-off-by: Christian Marangi --- ...-limit-OTP-nvmem-to-non-nand-devices.patch | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch diff --git a/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch b/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch new file mode 100644 index 0000000000..80fd20318b --- /dev/null +++ b/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch @@ -0,0 +1,63 @@ +From 540dcef6f39d6356d2a65230a8d4e9738ee2d25b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 20 Mar 2024 16:43:01 +0100 +Subject: [PATCH] mtd: limit OTP nvmem to non nand devices + +MTD OTP logic is very fragile and can be problematic with some specific +kind of devices. + +NVMEM across the years had various iteration on how Cells could be +declared in DT and MTD OTP probably was left behind and +add_legacy_fixed_of_cells was enabled without thinking of the consequences. + +That option enables NVMEM to scan the provided of_node and treat each +child as a NVMEM Cell, this was to support legacy NVMEM implementation +and don't cause regression. + +This is problematic if we have devices like Nand where the OTP is +triggered by setting a special mode in the flash. In this context real +partitions declared in the Nand node are registered as OTP Cells and +this cause probe fail with -EINVAL error. + +This was never notice due to the fact that till now, no Nand supported +the OTP feature. With commit e87161321a40 ("mtd: rawnand: macronix: OTP +access for MX30LFxG18AC") this changed and coincidentally this Nand is +used on an FritzBox 7530 supported on OpenWrt. + +Alternative and more robust way to declare OTP Cells are already +prossible by using the fixed-layout node or by declaring a child node +with the compatible set to "otp-user" or "otp-factory". + +To fix this and limit any regression with other MTD that makes use of +declaring OTP as direct child of the dev node, disable +add_legacy_fixed_of_cells if we have a node called nand since it's the +standard property name to identify Nand devices attached to a Nand +Controller. + +With the following logic, the OTP NVMEM entry is correctly created with +no Cells and the MTD Nand is correctly probed and partitions are +correctly exposed. + +Fixes: 2cc3b37f5b6d ("nvmem: add explicit config option to read old syntax fixed OF cells") +Cc: +Signed-off-by: Christian Marangi +--- + drivers/mtd/mtdcore.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c +index 5887feb347a4..6872477a5129 100644 +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -900,7 +900,7 @@ static struct nvmem_device *mtd_otp_nvmem_register(struct mtd_info *mtd, + config.name = compatible; + config.id = NVMEM_DEVID_AUTO; + config.owner = THIS_MODULE; +- config.add_legacy_fixed_of_cells = true; ++ config.add_legacy_fixed_of_cells = !of_node_name_eq(mtd->dev.of_node, "nand"); + config.type = NVMEM_TYPE_OTP; + config.root_only = true; + config.ignore_wp = true; +-- +2.43.0 + From 61d1eedc2d549f0cb9e81a028165c0f727f91ee3 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:27:10 +0100 Subject: [PATCH 17/31] ipq40xx: 6.6: refresh kernel patches Refresh kernel patches using make target/linux/refresh. Signed-off-by: Christian Marangi --- ...ware-qcom_scm-disable-SDI-if-required.patch | 8 ++++---- .../104-clk-fix-apss-cpu-overclocking.patch | 10 +++++----- ...d-limit-OTP-nvmem-to-non-nand-devices.patch | 7 +------ ...-msm-use-sdhci_set_clock-instead-of-s.patch | 2 +- ...sm-comment-unused-sdhci_msm_set_clock.patch | 2 +- ...re-qcom-scm-fix-SCM-cold-boot-address.patch | 2 +- ...-introduce-the-Qualcomm-IPQESS-driver.patch | 4 ++-- ...-dsa-add-out-of-band-tagging-protocol.patch | 18 +++++++++--------- ...s-Add-out-of-band-DSA-tagging-support.patch | 2 +- ...q4019-Add-description-for-the-IPQESS-.patch | 2 +- ...k-add-IPQ4019-built-in-switch-support.patch | 2 +- .../707-arm-dts-ipq4019-add-switch-node.patch | 2 +- ...ipq4019-add-QCA8075-PHY-Package-nodes.patch | 2 +- ...10-arm-dts-ipq4019-QCA807x-properties.patch | 2 +- .../850-soc-add-qualcomm-syscon.patch | 8 ++++---- ...-qcom_scm-Clear-download-bit-during-r.patch | 2 +- 16 files changed, 35 insertions(+), 40 deletions(-) diff --git a/target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch b/target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch index ae7e9f97c0..a296d8c9a2 100644 --- a/target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch +++ b/target/linux/ipq40xx/patches-6.6/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch @@ -27,9 +27,9 @@ Signed-off-by: Bjorn Andersson --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -407,6 +407,29 @@ int qcom_scm_set_remote_state(u32 state, +@@ -410,6 +410,29 @@ int qcom_scm_set_remote_state(u32 state, } - EXPORT_SYMBOL(qcom_scm_set_remote_state); + EXPORT_SYMBOL_GPL(qcom_scm_set_remote_state); +static int qcom_scm_disable_sdi(void) +{ @@ -57,7 +57,7 @@ Signed-off-by: Bjorn Andersson static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) { struct qcom_scm_desc desc = { -@@ -1411,6 +1434,13 @@ static int qcom_scm_probe(struct platfor +@@ -1467,6 +1490,13 @@ static int qcom_scm_probe(struct platfor __get_convention(); @@ -73,7 +73,7 @@ Signed-off-by: Bjorn Andersson * will cause the boot stages to enter download mode, unless --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h -@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device +@@ -80,6 +80,7 @@ extern int scm_legacy_call(struct device #define QCOM_SCM_SVC_BOOT 0x01 #define QCOM_SCM_BOOT_SET_ADDR 0x01 #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 diff --git a/target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch b/target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch index 2de03f7ae0..a2d9fac1ec 100644 --- a/target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch +++ b/target/linux/ipq40xx/patches-6.6/104-clk-fix-apss-cpu-overclocking.patch @@ -44,7 +44,7 @@ Signed-off-by: John Crispin --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c -@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe +@@ -120,6 +120,29 @@ static const struct clk_fepll_vco gcc_fe .reg = 0x2f020, }; @@ -74,7 +74,7 @@ Signed-off-by: John Crispin /* * Round rate function for APSS CPU PLL Clock divider. * It looks up the frequency table and returns the next higher frequency -@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc +@@ -132,7 +155,7 @@ static long clk_cpu_div_round_rate(struc struct clk_hw *p_hw; const struct freq_tbl *f; @@ -83,7 +83,7 @@ Signed-off-by: John Crispin if (!f) return -EINVAL; -@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c +@@ -154,7 +177,7 @@ static int clk_cpu_div_set_rate(struct c const struct freq_tbl *f; u32 mask; @@ -92,7 +92,7 @@ Signed-off-by: John Crispin if (!f) return -EINVAL; -@@ -1304,6 +1327,7 @@ static unsigned long +@@ -181,6 +204,7 @@ static unsigned long clk_cpu_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -100,7 +100,7 @@ Signed-off-by: John Crispin struct clk_fepll *pll = to_clk_fepll(hw); u32 cdiv, pre_div; u64 rate; -@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h +@@ -201,7 +225,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2; do_div(rate, pre_div); diff --git a/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch b/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch index 80fd20318b..03f45d7a9a 100644 --- a/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch +++ b/target/linux/ipq40xx/patches-6.6/110-mtd-limit-OTP-nvmem-to-non-nand-devices.patch @@ -45,11 +45,9 @@ Signed-off-by: Christian Marangi drivers/mtd/mtdcore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c -index 5887feb347a4..6872477a5129 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c -@@ -900,7 +900,7 @@ static struct nvmem_device *mtd_otp_nvmem_register(struct mtd_info *mtd, +@@ -933,7 +933,7 @@ static struct nvmem_device *mtd_otp_nvme config.name = compatible; config.id = NVMEM_DEVID_AUTO; config.owner = THIS_MODULE; @@ -58,6 +56,3 @@ index 5887feb347a4..6872477a5129 100644 config.type = NVMEM_TYPE_OTP; config.root_only = true; config.ignore_wp = true; --- -2.43.0 - diff --git a/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch b/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch index 9ce68d40aa..1c156d4398 100644 --- a/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch +++ b/target/linux/ipq40xx/patches-6.6/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch @@ -13,7 +13,7 @@ Signed-off-by: Robert Marko --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c -@@ -2451,7 +2451,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat +@@ -2320,7 +2320,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat static const struct sdhci_ops sdhci_msm_ops = { .reset = sdhci_and_cqhci_reset, diff --git a/target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch b/target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch index b297600171..cfbb643974 100644 --- a/target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch +++ b/target/linux/ipq40xx/patches-6.6/401-mmc-sdhci-msm-comment-unused-sdhci_msm_set_clock.patch @@ -13,7 +13,7 @@ Signed-off-by: Christian Marangi --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c -@@ -1751,49 +1751,49 @@ static unsigned int sdhci_msm_get_min_cl +@@ -1755,49 +1755,49 @@ static unsigned int sdhci_msm_get_min_cl return SDHCI_MSM_MIN_CLOCK; } diff --git a/target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch b/target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch index cb06ff353c..1c8cfb2981 100644 --- a/target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch +++ b/target/linux/ipq40xx/patches-6.6/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch @@ -118,7 +118,7 @@ Signed-off-by: Brian Norris } --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -312,6 +312,17 @@ static int qcom_scm_set_boot_addr(void * +@@ -315,6 +315,17 @@ static int qcom_scm_set_boot_addr(void * desc.args[0] = flags; desc.args[1] = virt_to_phys(entry); diff --git a/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch b/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch index be12bfcd21..a15efe57d8 100644 --- a/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch +++ b/target/linux/ipq40xx/patches-6.6/700-net-ipqess-introduce-the-Qualcomm-IPQESS-driver.patch @@ -32,7 +32,7 @@ Signed-off-by: Maxime Chevallier --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -17075,6 +17075,13 @@ L: netdev@vger.kernel.org +@@ -17708,6 +17708,13 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/qualcomm/emac/ @@ -48,7 +48,7 @@ Signed-off-by: Maxime Chevallier R: Bhupesh Sharma --- a/drivers/net/ethernet/qualcomm/Kconfig +++ b/drivers/net/ethernet/qualcomm/Kconfig -@@ -60,6 +60,17 @@ config QCOM_EMAC +@@ -61,6 +61,17 @@ config QCOM_EMAC low power, Receive-Side Scaling (RSS), and IEEE 1588-2008 Precision Clock Synchronization Protocol. diff --git a/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch b/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch index 6ed6fa7540..e07cee30c7 100644 --- a/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch +++ b/target/linux/ipq40xx/patches-6.6/701-net-dsa-add-out-of-band-tagging-protocol.patch @@ -64,7 +64,7 @@ Signed-off-by: Maxime Chevallier --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -17081,6 +17081,7 @@ L: netdev@vger.kernel.org +@@ -17714,6 +17714,7 @@ L: netdev@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml F: drivers/net/ethernet/qualcomm/ipqess/ @@ -93,7 +93,7 @@ Signed-off-by: Maxime Chevallier +#endif --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -4588,6 +4588,9 @@ enum skb_ext_id { +@@ -4627,6 +4627,9 @@ enum skb_ext_id { #if IS_ENABLED(CONFIG_MCTP_FLOWS) SKB_EXT_MCTP, #endif @@ -105,7 +105,7 @@ Signed-off-by: Maxime Chevallier --- a/include/net/dsa.h +++ b/include/net/dsa.h -@@ -55,6 +55,7 @@ struct phylink_link_state; +@@ -56,6 +56,7 @@ struct phylink_link_state; #define DSA_TAG_PROTO_RTL8_4T_VALUE 25 #define DSA_TAG_PROTO_RZN1_A5PSW_VALUE 26 #define DSA_TAG_PROTO_LAN937X_VALUE 27 @@ -113,7 +113,7 @@ Signed-off-by: Maxime Chevallier enum dsa_tag_protocol { DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, -@@ -85,6 +86,7 @@ enum dsa_tag_protocol { +@@ -86,6 +87,7 @@ enum dsa_tag_protocol { DSA_TAG_PROTO_RTL8_4T = DSA_TAG_PROTO_RTL8_4T_VALUE, DSA_TAG_PROTO_RZN1_A5PSW = DSA_TAG_PROTO_RZN1_A5PSW_VALUE, DSA_TAG_PROTO_LAN937X = DSA_TAG_PROTO_LAN937X_VALUE, @@ -123,7 +123,7 @@ Signed-off-by: Maxime Chevallier struct dsa_switch; --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -62,8 +62,12 @@ +@@ -63,8 +63,12 @@ #include #include #include @@ -136,7 +136,7 @@ Signed-off-by: Maxime Chevallier #include #include #include -@@ -4517,6 +4521,9 @@ static const u8 skb_ext_type_len[] = { +@@ -4812,6 +4816,9 @@ static const u8 skb_ext_type_len[] = { #if IS_ENABLED(CONFIG_MCTP_FLOWS) [SKB_EXT_MCTP] = SKB_EXT_CHUNKSIZEOF(struct mctp_flow), #endif @@ -148,7 +148,7 @@ Signed-off-by: Maxime Chevallier static __always_inline unsigned int skb_ext_total_length(void) --- a/net/dsa/Kconfig +++ b/net/dsa/Kconfig -@@ -113,6 +113,15 @@ config NET_DSA_TAG_OCELOT_8021Q +@@ -119,6 +119,15 @@ config NET_DSA_TAG_OCELOT_8021Q this mode, less TCAM resources (VCAP IS1, IS2, ES0) are available for use with tc-flower. @@ -166,8 +166,8 @@ Signed-off-by: Maxime Chevallier help --- a/net/dsa/Makefile +++ b/net/dsa/Makefile -@@ -22,6 +22,7 @@ obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag - obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o +@@ -31,6 +31,7 @@ obj-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk + obj-$(CONFIG_NET_DSA_TAG_NONE) += tag_none.o obj-$(CONFIG_NET_DSA_TAG_OCELOT) += tag_ocelot.o obj-$(CONFIG_NET_DSA_TAG_OCELOT_8021Q) += tag_ocelot_8021q.o +obj-$(CONFIG_NET_DSA_TAG_OOB) += tag_oob.o diff --git a/target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch b/target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch index ac0718ba2c..fe6b59d18f 100644 --- a/target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch +++ b/target/linux/ipq40xx/patches-6.6/702-net-ipqess-Add-out-of-band-DSA-tagging-support.patch @@ -23,7 +23,7 @@ Signed-off-by: Maxime Chevallier --- a/drivers/net/ethernet/qualcomm/Kconfig +++ b/drivers/net/ethernet/qualcomm/Kconfig -@@ -64,6 +64,7 @@ config QCOM_IPQ4019_ESS_EDMA +@@ -65,6 +65,7 @@ config QCOM_IPQ4019_ESS_EDMA tristate "Qualcomm Atheros IPQ4019 ESS EDMA support" depends on (OF && ARCH_QCOM) || COMPILE_TEST select PHYLINK diff --git a/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch b/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch index 4f9e7f2f9a..6b66393d82 100644 --- a/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch +++ b/target/linux/ipq40xx/patches-6.6/705-ARM-dts-qcom-ipq4019-Add-description-for-the-IPQESS-.patch @@ -21,7 +21,7 @@ Reviewed-by: Krzysztof Kozlowski --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi -@@ -594,6 +594,54 @@ +@@ -596,6 +596,54 @@ status = "disabled"; }; diff --git a/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch b/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch index c82626eefd..e0331d28ab 100644 --- a/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch +++ b/target/linux/ipq40xx/patches-6.6/706-net-dsa-qca8k-add-IPQ4019-built-in-switch-support.patch @@ -37,7 +37,7 @@ Signed-off-by: Robert Marko --- a/drivers/net/dsa/qca/Kconfig +++ b/drivers/net/dsa/qca/Kconfig -@@ -23,3 +23,11 @@ config NET_DSA_QCA8K_LEDS_SUPPORT +@@ -24,3 +24,11 @@ config NET_DSA_QCA8K_LEDS_SUPPORT help This enabled support for LEDs present on the Qualcomm Atheros QCA8K Ethernet switch chips. diff --git a/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch b/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch index b49f08650b..130cc52fbe 100644 --- a/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch +++ b/target/linux/ipq40xx/patches-6.6/707-arm-dts-ipq4019-add-switch-node.patch @@ -13,7 +13,7 @@ Signed-off-by: Robert Marko --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi -@@ -594,6 +594,82 @@ +@@ -596,6 +596,82 @@ status = "disabled"; }; diff --git a/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch b/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch index afc8d920d7..6a37cc1f5e 100644 --- a/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch +++ b/target/linux/ipq40xx/patches-6.6/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch @@ -16,7 +16,7 @@ Signed-off-by: Christian Marangi --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi -@@ -725,24 +725,33 @@ +@@ -727,24 +727,33 @@ reg = <0x90000 0x64>; status = "disabled"; diff --git a/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch index 2ea94d5c34..9f4c9fa67e 100644 --- a/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch +++ b/target/linux/ipq40xx/patches-6.6/710-arm-dts-ipq4019-QCA807x-properties.patch @@ -12,7 +12,7 @@ Signed-off-by: Robert Marko --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi -@@ -752,6 +752,10 @@ +@@ -754,6 +754,10 @@ ethphy4: ethernet-phy@4 { reg = <4>; }; diff --git a/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch index 80dba5d686..778b9f5930 100644 --- a/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch +++ b/target/linux/ipq40xx/patches-6.6/850-soc-add-qualcomm-syscon.patch @@ -2,9 +2,9 @@ From: Christian Lamparter Subject: SoC: add qualcomm syscon --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig -@@ -248,4 +248,11 @@ config QCOM_ICC_BWMON - the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high - memory throughput even with lower CPU frequencies. +@@ -291,4 +291,11 @@ config QCOM_INLINE_CRYPTO_ENGINE + tristate + select QCOM_SCM +config QCOM_TCSR + tristate "QCOM Top Control and Status Registers" @@ -16,7 +16,7 @@ Subject: SoC: add qualcomm syscon endmenu --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile -@@ -29,3 +29,4 @@ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o +@@ -32,3 +32,4 @@ obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o qcom_ice-objs += ice.o obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += qcom_ice.o diff --git a/target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch b/target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch index c73e40429c..8cb424c050 100644 --- a/target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch +++ b/target/linux/ipq40xx/patches-6.6/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch @@ -15,7 +15,7 @@ Signed-off-by: Robert Marko --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -1466,7 +1466,8 @@ static int qcom_scm_probe(struct platfor +@@ -1522,7 +1522,8 @@ static int qcom_scm_probe(struct platfor static void qcom_scm_shutdown(struct platform_device *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ From f632e9295137d69139860337567a38350b6a8517 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:19:15 +0100 Subject: [PATCH 18/31] ipq40xx: 6.6: update config file with missing symbol Update config file with missing symbol added with kernel 6.6. Signed-off-by: Christian Marangi --- target/linux/ipq40xx/config-6.6 | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/linux/ipq40xx/config-6.6 b/target/linux/ipq40xx/config-6.6 index 866d49c66f..22101d7df0 100644 --- a/target/linux/ipq40xx/config-6.6 +++ b/target/linux/ipq40xx/config-6.6 @@ -224,11 +224,13 @@ CONFIG_INITRAMFS_SOURCE="" # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set # CONFIG_IOMMU_IO_PGTABLE_LPAE is not set CONFIG_IOMMU_SUPPORT=y +# CONFIG_IOMMUFD is not set # CONFIG_IPQ_APSS_PLL is not set CONFIG_IPQ_GCC_4019=y # CONFIG_IPQ_GCC_6018 is not set # CONFIG_IPQ_GCC_806X is not set # CONFIG_IPQ_GCC_8074 is not set +# CONFIG_IPQ_GCC_9574 is not set # CONFIG_IPQ_LCC_806X is not set CONFIG_IRQCHIP=y CONFIG_IRQSTACKS=y @@ -362,15 +364,19 @@ CONFIG_PHYLIB=y CONFIG_PHYLINK=y # CONFIG_PHY_QCOM_APQ8064_SATA is not set # CONFIG_PHY_QCOM_EDP is not set +# CONFIG_PHY_QCOM_EUSB2_REPEATER is not set CONFIG_PHY_QCOM_IPQ4019_USB=y # CONFIG_PHY_QCOM_IPQ806X_SATA is not set # CONFIG_PHY_QCOM_IPQ806X_USB is not set +# CONFIG_PHY_QCOM_M31_USB is not set # CONFIG_PHY_QCOM_PCIE2 is not set # CONFIG_PHY_QCOM_QMP is not set # CONFIG_PHY_QCOM_QUSB2 is not set +# CONFIG_PHY_QCOM_SNPS_EUSB2 is not set # CONFIG_PHY_QCOM_USB_HS_28NM is not set # CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set # CONFIG_PHY_QCOM_USB_SS is not set +# CONFIG_PHY_QCOM_SGMII_ETH is not set CONFIG_PINCTRL=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set @@ -414,6 +420,8 @@ CONFIG_QCOM_IPQ4019_ESS_EDMA=y # CONFIG_QCOM_LLCC is not set # CONFIG_QCOM_OCMEM is not set # CONFIG_QCOM_PDC is not set +# CONFIG_QCOM_RAMP_CTRL is not set +# CONFIG_QCOM_RPM_MASTER_STATS is not set # CONFIG_QCOM_RMTFS_MEM is not set # CONFIG_QCOM_RPMH is not set CONFIG_QCOM_SCM=y @@ -429,6 +437,7 @@ CONFIG_QCOM_WDT=y # CONFIG_QCS_GCC_404 is not set # CONFIG_QCS_Q6SSTOP_404 is not set # CONFIG_QCS_TURING_404 is not set +# CONFIG_QDU_GCC_1000 is not set CONFIG_RANDSTRUCT_NONE=y CONFIG_RAS=y CONFIG_RATIONAL=y @@ -452,6 +461,8 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_I2C_AND_SPI=y CONFIG_RTC_MC146818_LIB=y CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SA_GCC_8775P is not set +# CONFIG_SA_GPUCC_8775P is not set # CONFIG_SC_CAMCC_7280 is not set # CONFIG_SC_DISPCC_7180 is not set # CONFIG_SC_GCC_7180 is not set @@ -470,6 +481,8 @@ CONFIG_RWSEM_SPIN_ON_OWNER=y # CONFIG_SDM_LPASSCC_845 is not set # CONFIG_SDM_VIDEOCC_845 is not set # CONFIG_SDX_GCC_65 is not set +# CONFIG_SDX_GCC_75 is not set +# CONFIG_SM_GCC_7150 is not set CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_MSM=y From dbd0bc7cf95c87a0c7b18a1724be82ff161eaf8d Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:37:23 +0100 Subject: [PATCH 19/31] generic: 6.6: add missing config symbol Add missing config symbol while adding support for kernel 6.6 for target ipq806x. Signed-off-by: Christian Marangi --- target/linux/generic/config-6.6 | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6 index 28baaf518e..c52b4f682f 100644 --- a/target/linux/generic/config-6.6 +++ b/target/linux/generic/config-6.6 @@ -5356,6 +5356,7 @@ CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3 # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set # CONFIG_REGULATOR_PWM is not set +# CONFIG_REGULATOR_QCOM_REFGEN is not set # CONFIG_REGULATOR_RAA215300 is not set # CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set # CONFIG_REGULATOR_RT4801 is not set @@ -7228,6 +7229,7 @@ CONFIG_TTY=y # CONFIG_TYPEC_TCPM is not set # CONFIG_TYPEC_UCSI is not set # CONFIG_TYPHOON is not set +# CONFIG_UACCE is not set # CONFIG_UACCESS_WITH_MEMCPY is not set # CONFIG_UBIFS_ATIME_SUPPORT is not set # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set From 032dad8818b3f4a61b24505c45b38c7706e6260a Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 11:19:49 +0100 Subject: [PATCH 20/31] ipq40xx: add kernel 6.6 as a testing kernel version Add and enable kernel 6.6 as a testing kernel version. Signed-off-by: Christian Marangi --- target/linux/ipq40xx/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile index b494e66e5d..be48e4be52 100644 --- a/target/linux/ipq40xx/Makefile +++ b/target/linux/ipq40xx/Makefile @@ -9,6 +9,7 @@ CPU_SUBTYPE:=neon-vfpv4 SUBTARGETS:=generic chromium mikrotik KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 KERNELNAME:=zImage Image dtbs From 3b7169f78606fd7818756912953a7df48df8a3d9 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 12:25:47 +0100 Subject: [PATCH 21/31] ltq-vdsl-vr11: add patch fixing compilation with kernel 6.6 Add patch fixing compilation with kernel 6.6. class_create now require only the name instead of the module ownership reference. Also the kernel enabled checks for enum. Signed-off-by: Christian Marangi --- package/kernel/lantiq/ltq-vdsl-vr11/Makefile | 2 +- .../patches/130-support-kernel-6.6.patch | 97 +++++++++++++++++++ 2 files changed, 98 insertions(+), 1 deletion(-) create mode 100644 package/kernel/lantiq/ltq-vdsl-vr11/patches/130-support-kernel-6.6.patch diff --git a/package/kernel/lantiq/ltq-vdsl-vr11/Makefile b/package/kernel/lantiq/ltq-vdsl-vr11/Makefile index 11f96d744a..0fa6011cfc 100644 --- a/package/kernel/lantiq/ltq-vdsl-vr11/Makefile +++ b/package/kernel/lantiq/ltq-vdsl-vr11/Makefile @@ -9,7 +9,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=ltq-vdsl-vr11 PKG_VERSION:=4.23.1 -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_BASE_NAME:=dsl_cpe_api UGW_VERSION=8.5.2.10 diff --git a/package/kernel/lantiq/ltq-vdsl-vr11/patches/130-support-kernel-6.6.patch b/package/kernel/lantiq/ltq-vdsl-vr11/patches/130-support-kernel-6.6.patch new file mode 100644 index 0000000000..4e127cd907 --- /dev/null +++ b/package/kernel/lantiq/ltq-vdsl-vr11/patches/130-support-kernel-6.6.patch @@ -0,0 +1,97 @@ +--- a/src/common/drv_dsl_cpe_os_linux.c ++++ b/src/common/drv_dsl_cpe_os_linux.c +@@ -431,7 +431,11 @@ static int DSL_DRV_DevNodeInit(DSL_void_ + } + + /* create a device class used for createing /dev/ entries */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0) + dsl_class = class_create(THIS_MODULE, DRV_DSL_CPE_API_DEV_NAME); ++#else ++ dsl_class = class_create(DRV_DSL_CPE_API_DEV_NAME); ++#endif + if (IS_ERR(dsl_class)) { + DSL_DEBUG(DSL_DBG_ERR, + (DSL_NULL, SYS_DBG_ERR""DSL_DRV_CRLF DSL_DRV_CRLF +--- a/src/common/drv_dsl_cpe_api.c ++++ b/src/common/drv_dsl_cpe_api.c +@@ -1370,7 +1370,8 @@ DSL_boolean_t DSL_DRV_BondingEnableCheck + nDslMode = DSL_DRV_VRX_DslModeIndexGet(pContext); + + DSL_CHECK_DSLMODE(nDslMode); +- DSL_CHECK_ERR_CODE(); ++ if (nErrCode != DSL_SUCCESS) ++ return bPafEnable; + + /* Bonding is always enabled for both lines/devices together so using the + configuration from the current line/device is ok. */ +@@ -3886,7 +3887,7 @@ DSL_Error_t DSL_DRV_RetxStatisticsGet( + + DSL_CHECK_POINTER(pContext, pData); + DSL_CHECK_ERR_CODE(); +- DSL_CHECK_DIRECTION(pData->nDirection); ++ DSL_CHECK_ATU_DIRECTION(pData->nDirection); + DSL_CHECK_ERR_CODE(); + + DSL_DEBUG(DSL_DBG_MSG, +--- a/src/device/drv_dsl_cpe_device_vrx.c ++++ b/src/device/drv_dsl_cpe_device_vrx.c +@@ -2760,7 +2760,7 @@ static DSL_Error_t DSL_DRV_VRX_ChannelSt + DSL_CHECK_CHANNEL_RANGE(nChannel); + DSL_CHECK_ERR_CODE(); + +- DSL_CHECK_ATU_DIRECTION(nDirection); ++ DSL_CHECK_DIRECTION(nDirection); + DSL_CHECK_ERR_CODE(); + + DSL_DEBUG(DSL_DBG_MSG, +@@ -2807,8 +2807,8 @@ static DSL_Error_t DSL_DRV_VRX_ChannelSt + if (nVerCheck >= DSL_VERSION_EQUAL) + { + bRocEnable = nDirection == DSL_UPSTREAM ? +- (DSL_boolean_t)sAckLs.FUS.ROCstatus_us : +- (DSL_boolean_t)sAckLs.FDS.ROCstatus_ds; ++ (DSL_FeatureSupport_t)sAckLs.FUS.ROCstatus_us : ++ (DSL_FeatureSupport_t)sAckLs.FDS.ROCstatus_ds; + + DSL_CTX_WRITE_SCALAR( + pContext, nErrCode, lineFeatureDataSts[nDirection].bRocEnable, +@@ -4885,7 +4885,7 @@ DSL_Error_t DSL_DRV_DEV_FwDownload( + + /* Set VRX device FW mode*/ + fwModeSelect.firmwareFeatures.nPlatformId = nFwFeatures.nPlatformId; +- fwModeSelect.firmwareFeatures.eFirmwareXdslModes = nFwFeatures.nFirmwareXdslModes; ++ fwModeSelect.firmwareFeatures.eFirmwareXdslModes = (IOCTL_MEI_firmwareXdslMode_t)nFwFeatures.nFirmwareXdslModes; + + if( DSL_DRV_VRX_InternalFwModeCtrlSet((MEI_DYN_CNTRL_T*)dev, &fwModeSelect) != 0 ) + { +@@ -7420,7 +7420,7 @@ DSL_Error_t DSL_DRV_VRX_ChannelStatusGet + { + DSL_Error_t nErrCode = DSL_SUCCESS; + +- DSL_CHECK_ATU_DIRECTION(nDirection); ++ DSL_CHECK_DIRECTION(nDirection); + DSL_CHECK_ERR_CODE(); + + DSL_CTX_READ_SCALAR(pContext, nErrCode, +--- a/src/bnd/drv_dsl_cpe_api_bnd_vrx.c ++++ b/src/bnd/drv_dsl_cpe_api_bnd_vrx.c +@@ -480,7 +480,8 @@ DSL_Error_t DSL_DRV_BND_DEV_PafBndStatus + else + { + pData->nRemotePafSupported = +- pafHsStatus.bPafEnable ? DSL_BND_ENABLE_ON : DSL_BND_ENABLE_OFF; ++ pafHsStatus.bPafEnable ? (DSL_BND_Supported_t)DSL_BND_ENABLE_ON : ++ (DSL_BND_Supported_t)DSL_BND_ENABLE_OFF; + } + + DSL_DEBUG(DSL_DBG_MSG, (pContext, +@@ -517,7 +518,8 @@ DSL_Error_t DSL_DRV_BND_DEV_ImapBndStatu + else + { + pData->nRemoteImapSupported = +- imapHsStatus.bImapEnable ? DSL_BND_ENABLE_ON : DSL_BND_ENABLE_OFF; ++ imapHsStatus.bImapEnable ? (DSL_BND_Supported_t)DSL_BND_ENABLE_ON : ++ (DSL_BND_Supported_t)DSL_BND_ENABLE_OFF; + } + + DSL_DEBUG(DSL_DBG_MSG, (pContext, From 844a41f7455ba3e2f4abfb2723ebfaf5a0f1815e Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 12:28:35 +0100 Subject: [PATCH 22/31] ltq-vdsl-vr11-mei: add patch fixing compilation with kernel 6.6 Add patch fixing compilation with kernel 6.6. class_create now require only the name instead of the module ownership reference. Also the kernel enabled checks for enum. Signed-off-by: Christian Marangi --- .../kernel/lantiq/ltq-vdsl-vr11-mei/Makefile | 2 +- .../patches/130-support-kernel-6.6.patch | 35 +++++++++++++++++++ 2 files changed, 36 insertions(+), 1 deletion(-) create mode 100644 package/kernel/lantiq/ltq-vdsl-vr11-mei/patches/130-support-kernel-6.6.patch diff --git a/package/kernel/lantiq/ltq-vdsl-vr11-mei/Makefile b/package/kernel/lantiq/ltq-vdsl-vr11-mei/Makefile index 7b8a948179..3e01ee6373 100644 --- a/package/kernel/lantiq/ltq-vdsl-vr11-mei/Makefile +++ b/package/kernel/lantiq/ltq-vdsl-vr11-mei/Makefile @@ -9,7 +9,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=ltq-vdsl-vr11-mei PKG_VERSION:=1.11.1 -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_BASE_NAME:=dsl_cpe_mei UGW_VERSION=8.5.2.10 diff --git a/package/kernel/lantiq/ltq-vdsl-vr11-mei/patches/130-support-kernel-6.6.patch b/package/kernel/lantiq/ltq-vdsl-vr11-mei/patches/130-support-kernel-6.6.patch new file mode 100644 index 0000000000..407afc9bf2 --- /dev/null +++ b/package/kernel/lantiq/ltq-vdsl-vr11-mei/patches/130-support-kernel-6.6.patch @@ -0,0 +1,35 @@ +--- a/src/drv_mei_cpe_linux.c ++++ b/src/drv_mei_cpe_linux.c +@@ -2779,7 +2779,11 @@ static int MEI_InitModuleRegCharDev(cons + ("Using major number %d" MEI_DRV_CRLF, MAJOR(mei_devt))); + } + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0) + mei_class = class_create(THIS_MODULE, devName); ++#else ++ mei_class = class_create(devName); ++#endif + if (IS_ERR(mei_class)) + { + PRN_DBG_USR_NL( MEI_DRV,MEI_DRV_PRN_LEVEL_HIGH, +--- a/src/drv_mei_cpe_api_atm_ptm_intern.c ++++ b/src/drv_mei_cpe_api_atm_ptm_intern.c +@@ -223,7 +223,7 @@ IFX_int32_t MEI_TcRequest(void *data) + pMeiDynCntrl->pDfeX = NULL; + pMeiDynCntrl->pMeiDev = pMeiDev; + +- argsTcRequest.request_type = request_type; ++ argsTcRequest.request_type = (MEI_TC_RequestType_t)request_type; + argsTcRequest.is_bonding = MEI_BND_EnableGet(pMeiDynCntrl); + + if (MEI_DFEX_ENTITIES == 1 && argsTcRequest.is_bonding == IFX_TRUE) +@@ -398,7 +398,8 @@ IFX_int32_t MEI_InternalLineTCModeSwitch + pMeiDynCntrl->pDfeX = NULL; + pMeiDynCntrl->pMeiDev = MEIX_Cntrl[nEntity]->MeiDevice[nInstance]; + +- argsTcRequest.request_type = bPowerUp ? MEI_TC_REQUEST_PTM : MEI_TC_REQUEST_OFF; ++ argsTcRequest.request_type = bPowerUp ? (MEI_TC_RequestType_t)MEI_TC_REQUEST_PTM : ++ (MEI_TC_RequestType_t)MEI_TC_REQUEST_OFF; + argsTcRequest.is_bonding = pMeiDynCntrl->pMeiDev->bLastBondingStatus; + + retVal = MEI_InternalTcRequest(pMeiDynCntrl, &argsTcRequest); From a2bd0a7ef077b8f498f1dda389bb683f9c4e12dd Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:21:38 +0100 Subject: [PATCH 23/31] kernel/ipq806x: Create kernel files for v6.6 (from v6.1) This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Christian Marangi --- target/linux/ipq806x/{config-6.1 => config-6.6} | 0 .../001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch | 0 ...-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch | 0 ...-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch | 0 ...-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch | 0 ...-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch | 0 ...6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch | 0 ...002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch | 0 ...v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch | 0 ...-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch | 0 ...-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch | 0 ...-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch | 0 .../102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch | 0 ...107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch | 0 ...107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch | 0 ...107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch | 0 ...-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch | 0 ...-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch | 0 ...-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch | 0 ...-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch | 0 .../115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch | 0 .../115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch | 0 ...122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch | 0 .../122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch | 0 .../122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch | 0 ...-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch | 0 .../122-05-clk-qcom-clk-krait-generilize-div-functions.patch | 0 .../123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch | 0 .../850-soc-add-qualcomm-syscon.patch | 0 .../900-arm-add-cmdline-override.patch | 0 ...901-01-ARM-decompressor-support-memory-start-validation-.patch | 0 .../901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch | 0 ...902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch | 0 33 files changed, 0 insertions(+), 0 deletions(-) rename target/linux/ipq806x/{config-6.1 => config-6.6} (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/122-05-clk-qcom-clk-krait-generilize-div-functions.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/850-soc-add-qualcomm-syscon.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/900-arm-add-cmdline-override.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/901-01-ARM-decompressor-support-memory-start-validation-.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch (100%) rename target/linux/ipq806x/{patches-6.1 => patches-6.6}/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch (100%) diff --git a/target/linux/ipq806x/config-6.1 b/target/linux/ipq806x/config-6.6 similarity index 100% rename from target/linux/ipq806x/config-6.1 rename to target/linux/ipq806x/config-6.6 diff --git a/target/linux/ipq806x/patches-6.1/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch b/target/linux/ipq806x/patches-6.6/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch similarity index 100% rename from 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rename to target/linux/ipq806x/patches-6.6/900-arm-add-cmdline-override.patch diff --git a/target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch b/target/linux/ipq806x/patches-6.6/901-01-ARM-decompressor-support-memory-start-validation-.patch similarity index 100% rename from target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch rename to target/linux/ipq806x/patches-6.6/901-01-ARM-decompressor-support-memory-start-validation-.patch diff --git a/target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch b/target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch similarity index 100% rename from target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch rename to target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch diff --git a/target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch b/target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch similarity index 100% rename from target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch rename to target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch From 3bf06ea9b3841688b5c3aa99a24f8ec0b4f5280f Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:21:39 +0100 Subject: [PATCH 24/31] kernel/ipq806x: Restore kernel files for v6.1 This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html for the original discussion. Signed-off-by: Christian Marangi --- target/linux/ipq806x/config-6.1 | 538 ++++++++++++++++++ ...kpss-xcc-register-it-as-clk-provider.patch | 60 ++ ...c-use-devm-variant-for-clk-notifier-.patch | 27 + ...c-fix-wrong-parent-order-for-seconda.patch | 46 ++ ...c-also-enable-secondary-mux-and-div-.patch | 68 +++ ...c-handle-secondary-mux-sourcing-out-.patch | 48 ++ ...t-cc-convert-to-devm_clk_hw_register.patch | 104 ++++ ...-krait-cc-convert-to-parent_data-API.patch | 414 ++++++++++++++ ...q8064-disable-mmc-ddr-1_8v-for-sdcc1.patch | 28 + ...qcom-tsens-Init-debugfs-only-with-su.patch | 42 ++ ...qcom-tsens-Fix-wrong-version-id-dbg_.patch | 29 + ...qcom-tsens-Rework-debugfs-file-struc.patch | 54 ++ ...conflicts-with-OpenWrt-auto-mounting.patch | 25 + ...add-saw-for-l2-cache-and-kraitcc-for.patch | 89 +++ ...add-opp-table-for-cpu-and-l2-for-ipq.patch | 268 +++++++++ ...add-multiple-missing-binding-for-cpu.patch | 153 +++++ ...-wrong-nad_pins-definition-for-ipq80.patch | 29 + ...-MDIO-dedicated-controller-node-for-.patch | 188 ++++++ ...-L2-Krait-Cache-devfreq-scaling-driv.patch | 235 ++++++++ ...-krait-cache-compatible-for-ipq806x-.patch | 50 ++ ...eq-add-ipq806x-fabric-scaling-driver.patch | 203 +++++++ ...com-add-fab-scaling-node-for-ipq806x.patch | 48 ++ ...t-cc-handle-qsb-clock-defined-in-DTS.patch | 47 ++ ...ait-cc-register-REAL-qsb-fixed-clock.patch | 36 ++ ...ait-cc-drop-pr_info-and-use-dev_info.patch | 44 ++ ...c-rework-mux-reset-logic-and-reset-h.patch | 88 +++ ...m-clk-krait-generilize-div-functions.patch | 156 +++++ ...ipq806x-remove-cc_register_board-for.patch | 31 + .../850-soc-add-qualcomm-syscon.patch | 121 ++++ .../900-arm-add-cmdline-override.patch | 37 ++ ...sor-support-memory-start-validation-.patch | 75 +++ ...essor-add-option-to-ignore-MEM-ATAGs.patch | 54 ++ ...-support-for-ATAGs-rootblock-parsing.patch | 197 +++++++ 33 files changed, 3632 insertions(+) create mode 100644 target/linux/ipq806x/config-6.1 create mode 100644 target/linux/ipq806x/patches-6.1/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch create mode 100644 target/linux/ipq806x/patches-6.1/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch create mode 100644 target/linux/ipq806x/patches-6.1/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch create mode 100644 target/linux/ipq806x/patches-6.1/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch create mode 100644 target/linux/ipq806x/patches-6.1/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch create mode 100644 target/linux/ipq806x/patches-6.1/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch create mode 100644 target/linux/ipq806x/patches-6.1/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch create mode 100644 target/linux/ipq806x/patches-6.1/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch create mode 100644 target/linux/ipq806x/patches-6.1/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch create mode 100644 target/linux/ipq806x/patches-6.1/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch create mode 100644 target/linux/ipq806x/patches-6.1/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch create mode 100644 target/linux/ipq806x/patches-6.1/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch create mode 100644 target/linux/ipq806x/patches-6.1/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch create mode 100644 target/linux/ipq806x/patches-6.1/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch create mode 100644 target/linux/ipq806x/patches-6.1/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch create mode 100644 target/linux/ipq806x/patches-6.1/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch create mode 100644 target/linux/ipq806x/patches-6.1/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch create mode 100644 target/linux/ipq806x/patches-6.1/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch create mode 100644 target/linux/ipq806x/patches-6.1/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch create mode 100644 target/linux/ipq806x/patches-6.1/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch create mode 100644 target/linux/ipq806x/patches-6.1/122-05-clk-qcom-clk-krait-generilize-div-functions.patch create mode 100644 target/linux/ipq806x/patches-6.1/123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch create mode 100644 target/linux/ipq806x/patches-6.1/850-soc-add-qualcomm-syscon.patch create mode 100644 target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch create mode 100644 target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch create mode 100644 target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch create mode 100644 target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch diff --git a/target/linux/ipq806x/config-6.1 b/target/linux/ipq806x/config-6.1 new file mode 100644 index 0000000000..18325c0346 --- /dev/null +++ b/target/linux/ipq806x/config-6.1 @@ -0,0 +1,538 @@ +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_APQ_GCC_8084 is not set +# CONFIG_APQ_MMCC_8084 is not set +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +# CONFIG_ARCH_IPQ40XX is not set +CONFIG_ARCH_KEEP_MEMBLOCK=y +# CONFIG_ARCH_MDM9615 is not set +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_ARCH_MSM8909 is not set +# CONFIG_ARCH_MSM8916 is not set +CONFIG_ARCH_MSM8960=y +CONFIG_ARCH_MSM8974=y +CONFIG_ARCH_MSM8X60=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_QCOM=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y +CONFIG_ARM_ATAG_DTB_COMPAT_IGNORE_MEM=y +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_CPU_SUSPEND=y +# CONFIG_ARM_CPU_TOPOLOGY is not set +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_GROUP_RELOCS=y +CONFIG_ARM_IPQ806X_FAB_DEVFREQ=y +CONFIG_ARM_KRAIT_CACHE_DEVFREQ=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_QCOM_CPUFREQ_HW is not set +CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y +CONFIG_ARM_QCOM_SPM_CPUIDLE=y +# CONFIG_ARM_SMMU is not set +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_CLKSRC_QCOM=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE_OVERRIDE=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_QCOM=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRC8=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DEV_QCOM_RNG=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CURRENT_POINTER_IN_TPIDRURO=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_GPIO=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEVFREQ_GOV_PASSIVE=y +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +# CONFIG_DWMAC_GENERIC is not set +CONFIG_DWMAC_IPQ806X=y +# CONFIG_DWMAC_QCOM_ETHQOS is not set +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GRO_CELLS=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +# CONFIG_HIGHPTE is not set +CONFIG_HOTPLUG_CPU=y +CONFIG_HWMON=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +# CONFIG_I2C_QCOM_CCI is not set +CONFIG_I2C_QUP=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +CONFIG_IOMMU_SUPPORT=y +# CONFIG_IPQ_APSS_PLL is not set +# CONFIG_IPQ_GCC_4019 is not set +# CONFIG_IPQ_GCC_6018 is not set +CONFIG_IPQ_GCC_806X=y +# CONFIG_IPQ_GCC_8074 is not set +# CONFIG_IPQ_LCC_806X is not set +CONFIG_IRQCHIP=y +CONFIG_IRQSTACKS=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +CONFIG_KPSS_XCC=y +CONFIG_KRAITCC=y +CONFIG_KRAIT_CLOCKS=y +CONFIG_KRAIT_L2_ACCESSORS=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_GPIO=y +CONFIG_MDIO_IPQ8064=y +# CONFIG_MDM_GCC_9615 is not set +# CONFIG_MDM_LCC_9615 is not set +CONFIG_MEMFD_CREATE=y +# CONFIG_MFD_HI6421_SPMI is not set +CONFIG_MFD_QCOM_RPM=y +# CONFIG_MFD_SPMI_PMIC is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_CQHCI=y +CONFIG_MMC_QCOM_DML=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_MSM=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MSM_GCC_8660=y +# CONFIG_MSM_GCC_8909 is not set +# CONFIG_MSM_GCC_8916 is not set +# CONFIG_MSM_GCC_8939 is not set +# CONFIG_MSM_GCC_8960 is not set +# CONFIG_MSM_GCC_8974 is not set +# CONFIG_MSM_GCC_8976 is not set +# CONFIG_MSM_GCC_8994 is not set +# CONFIG_MSM_GCC_8996 is not set +# CONFIG_MSM_GCC_8998 is not set +# CONFIG_MSM_GPUCC_8998 is not set +# CONFIG_MSM_IOMMU is not set +# CONFIG_MSM_LCC_8960 is not set +# CONFIG_MSM_MMCC_8960 is not set +# CONFIG_MSM_MMCC_8974 is not set +# CONFIG_MSM_MMCC_8996 is not set +# CONFIG_MSM_MMCC_8998 is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_QCOM=y +CONFIG_MTD_QCOMSMEM_PARTS=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_QCA8K=y +CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y +CONFIG_NET_DSA_TAG_QCA=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_QCOM_QFPROM=y +# CONFIG_NVMEM_QCOM_SEC_QFPROM is not set +# CONFIG_NVMEM_SPMI_SDAM is not set +CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_U_BOOT_ENV=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_QCOM=y +CONFIG_PCI_DEBUG=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCS_XPCS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLIB_LEDS=y +CONFIG_PHYLINK=y +# CONFIG_PHY_QCOM_APQ8064_SATA is not set +# CONFIG_PHY_QCOM_EDP is not set +# CONFIG_PHY_QCOM_IPQ4019_USB is not set +CONFIG_PHY_QCOM_IPQ806X_SATA=y +# CONFIG_PHY_QCOM_IPQ806X_USB is not set +# CONFIG_PHY_QCOM_PCIE2 is not set +# CONFIG_PHY_QCOM_QMP is not set +# CONFIG_PHY_QCOM_QUSB2 is not set +# CONFIG_PHY_QCOM_USB_HS_28NM is not set +# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set +# CONFIG_PHY_QCOM_USB_SS is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_APQ8064 is not set +# CONFIG_PINCTRL_APQ8084 is not set +# CONFIG_PINCTRL_IPQ4019 is not set +CONFIG_PINCTRL_IPQ8064=y +# CONFIG_PINCTRL_MDM9615 is not set +CONFIG_PINCTRL_MSM=y +# CONFIG_PINCTRL_MSM8226 is not set +# CONFIG_PINCTRL_MSM8660 is not set +# CONFIG_PINCTRL_MSM8909 is not set +# CONFIG_PINCTRL_MSM8916 is not set +# CONFIG_PINCTRL_MSM8960 is not set +# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set +# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set +# CONFIG_PINCTRL_SDX65 is not set +CONFIG_PM_DEVFREQ=y +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_MSM=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PREEMPT_NONE_BUILD=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QCA83XX_PHY=y +# CONFIG_QCM_DISPCC_2290 is not set +# CONFIG_QCM_GCC_2290 is not set +# CONFIG_QCOM_A53PLL is not set +CONFIG_QCOM_ADM=y +CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_CLK_RPM=y +# CONFIG_QCOM_COMMAND_DB is not set +# CONFIG_QCOM_CPR is not set +# CONFIG_QCOM_EBI2 is not set +# CONFIG_QCOM_GENI_SE is not set +CONFIG_QCOM_GSBI=y +CONFIG_QCOM_HFPLL=y +# CONFIG_QCOM_ICC_BWMON is not set +# CONFIG_QCOM_IOMMU is not set +# CONFIG_QCOM_LLCC is not set +CONFIG_QCOM_NET_PHYLIB=y +# CONFIG_QCOM_OCMEM is not set +# CONFIG_QCOM_PDC is not set +# CONFIG_QCOM_RMTFS_MEM is not set +CONFIG_QCOM_RPMCC=y +# CONFIG_QCOM_RPMH is not set +CONFIG_QCOM_SCM=y +# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set +CONFIG_QCOM_SMEM=y +# CONFIG_QCOM_SMSM is not set +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_SPM=y +# CONFIG_QCOM_STATS is not set +CONFIG_QCOM_TCSR=y +CONFIG_QCOM_TSENS=y +CONFIG_QCOM_WDT=y +# CONFIG_QCS_GCC_404 is not set +# CONFIG_QCS_Q6SSTOP_404 is not set +# CONFIG_QCS_TURING_404 is not set +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +# CONFIG_REGULATOR_QCOM_LABIBB is not set +CONFIG_REGULATOR_QCOM_RPM=y +# CONFIG_REGULATOR_QCOM_SPMI is not set +# CONFIG_REGULATOR_QCOM_USB_VBUS is not set +# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_QCOM_AOSS is not set +# CONFIG_RESET_QCOM_PDC is not set +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SC_CAMCC_7280 is not set +# CONFIG_SC_DISPCC_7180 is not set +# CONFIG_SC_GCC_7180 is not set +# CONFIG_SC_GCC_8280XP is not set +# CONFIG_SC_GPUCC_7180 is not set +# CONFIG_SC_LPASSCC_7280 is not set +# CONFIG_SC_LPASS_CORECC_7180 is not set +# CONFIG_SC_LPASS_CORECC_7280 is not set +# CONFIG_SC_MSS_7180 is not set +# CONFIG_SC_VIDEOCC_7180 is not set +# CONFIG_SDM_CAMCC_845 is not set +# CONFIG_SDM_DISPCC_845 is not set +# CONFIG_SDM_GCC_660 is not set +# CONFIG_SDM_GCC_845 is not set +# CONFIG_SDM_GPUCC_845 is not set +# CONFIG_SDM_LPASSCC_845 is not set +# CONFIG_SDM_VIDEOCC_845 is not set +# CONFIG_SDX_GCC_65 is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +# CONFIG_SM_CAMCC_8450 is not set +# CONFIG_SM_GCC_8150 is not set +# CONFIG_SM_GCC_8250 is not set +# CONFIG_SM_GCC_8450 is not set +# CONFIG_SM_GPUCC_6350 is not set +# CONFIG_SM_GPUCC_8150 is not set +# CONFIG_SM_GPUCC_8250 is not set +# CONFIG_SM_GPUCC_8350 is not set +# CONFIG_SM_VIDEOCC_8150 is not set +# CONFIG_SM_VIDEOCC_8250 is not set +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_QUP=y +CONFIG_SPMI=y +# CONFIG_SPMI_HISI3670 is not set +CONFIG_SPMI_MSM_PMIC_ARB=y +# CONFIG_SPMI_PMIC_CLKDIV is not set +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +# CONFIG_UCLAMP_TASK is not set +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/ipq806x/patches-6.1/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch b/target/linux/ipq806x/patches-6.1/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch new file mode 100644 index 0000000000..9395f1b241 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch @@ -0,0 +1,60 @@ +From 09be1a39e685d8c5edd471fd1cac9a8f8280d2de Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 8 Nov 2022 22:17:34 +0100 +Subject: [PATCH] clk: qcom: kpss-xcc: register it as clk provider + +krait-cc use this driver for the secondary mux. Register it as a clk +provider to correctly use this clk in other drivers. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221108211734.3707-1-ansuelsmth@gmail.com +--- + drivers/clk/qcom/kpss-xcc.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +--- a/drivers/clk/qcom/kpss-xcc.c ++++ b/drivers/clk/qcom/kpss-xcc.c +@@ -31,12 +31,13 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_t + + static int kpss_xcc_driver_probe(struct platform_device *pdev) + { ++ struct device *dev = &pdev->dev; + const struct of_device_id *id; + void __iomem *base; + struct clk_hw *hw; + const char *name; + +- id = of_match_device(kpss_xcc_match_table, &pdev->dev); ++ id = of_match_device(kpss_xcc_match_table, dev); + if (!id) + return -ENODEV; + +@@ -45,7 +46,7 @@ static int kpss_xcc_driver_probe(struct + return PTR_ERR(base); + + if (id->data) { +- if (of_property_read_string_index(pdev->dev.of_node, ++ if (of_property_read_string_index(dev->of_node, + "clock-output-names", + 0, &name)) + return -ENODEV; +@@ -55,12 +56,16 @@ static int kpss_xcc_driver_probe(struct + base += 0x28; + } + +- hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents, ++ hw = devm_clk_hw_register_mux_parent_data_table(dev, name, aux_parents, + ARRAY_SIZE(aux_parents), 0, + base, 0, 0x3, + 0, aux_parent_map, NULL); ++ if (IS_ERR(hw)) ++ return PTR_ERR(hw); + +- return PTR_ERR_OR_ZERO(hw); ++ of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); ++ ++ return 0; + } + + static struct platform_driver kpss_xcc_driver = { diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch new file mode 100644 index 0000000000..65c1fc17f2 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch @@ -0,0 +1,27 @@ +From 3198106a99e73dbc4c02bd5128cec0997c73af82 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 8 Nov 2022 22:58:27 +0100 +Subject: [PATCH 1/6] clk: qcom: krait-cc: use devm variant for clk notifier + register + +Use devm variant for clk notifier register and correctly handle free +resource on driver remove. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221108215827.30475-1-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -62,7 +62,7 @@ static int krait_notifier_register(struc + int ret = 0; + + mux->clk_nb.notifier_call = krait_notifier_cb; +- ret = clk_notifier_register(clk, &mux->clk_nb); ++ ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb); + if (ret) + dev_err(dev, "failed to register clock notifier: %d\n", ret); + diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch new file mode 100644 index 0000000000..2dcb69399c --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch @@ -0,0 +1,46 @@ +From 8e456411abcbf899c04740b9dbb3dcefcd61c946 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 9 Nov 2022 01:56:27 +0100 +Subject: [PATCH 2/6] clk: qcom: krait-cc: fix wrong parent order for secondary + mux + +The secondary mux parent order is swapped. +This currently doesn't cause problems as the secondary mux is used for idle +clk and as a safe clk source while reprogramming the hfpll. + +Each mux have 2 or more output but he always have a safe source to +switch while reprogramming the connected pll. We use a clk notifier to +switch to the correct parent before clk core can apply the correct rate. +The parent to switch is hardcoded in the mux struct. + +For the secondary mux the safe source to use is the qsb parent as it's +the only fixed clk as the acpus_aux is a pll that can source from pxo or +from pll8. + +The hardcoded safe parent for the secondary mux is set to index 0 that +in the secondary mux map is set to 2. + +But the index 0 is actually acpu_aux in the parent list. + +Fix the swapped parents to correctly handle idle frequency and output a +sane clk_summary report. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221109005631.3189-1-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, in + int ret; + struct krait_mux_clk *mux; + static const char *sec_mux_list[] = { +- "acpu_aux", + "qsb", ++ "acpu_aux", + }; + struct clk_init_data init = { + .parent_names = sec_mux_list, diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch new file mode 100644 index 0000000000..6261a940d7 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch @@ -0,0 +1,68 @@ +From 18ae57b1e8abee6c453381470f6e18991d2901a8 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 9 Nov 2022 01:56:28 +0100 +Subject: [PATCH 3/6] clk: qcom: krait-cc: also enable secondary mux and div + clk + +clk-krait ignore any rate change if clk is not flagged as enabled. +Correctly enable the secondary mux and div clk to correctly change rate +instead of silently ignoring the request. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221109005631.3189-2-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++- + 1 file changed, 20 insertions(+), 1 deletion(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id + }; + const char *p_names[1]; + struct clk *clk; ++ int cpu; + + div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); + if (!div) +@@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id + } + + clk = devm_clk_register(dev, &div->hw); ++ if (IS_ERR(clk)) ++ goto err; ++ ++ /* clk-krait ignore any rate change if mux is not flagged as enabled */ ++ if (id < 0) ++ for_each_online_cpu(cpu) ++ clk_prepare_enable(div->hw.clk); ++ else ++ clk_prepare_enable(div->hw.clk); ++ ++err: + kfree(p_names[0]); + kfree(init.name); + +@@ -113,7 +125,7 @@ static int + krait_add_sec_mux(struct device *dev, int id, const char *s, + unsigned int offset, bool unique_aux) + { +- int ret; ++ int cpu, ret; + struct krait_mux_clk *mux; + static const char *sec_mux_list[] = { + "qsb", +@@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, in + if (ret) + goto unique_aux; + ++ /* clk-krait ignore any rate change if mux is not flagged as enabled */ ++ if (id < 0) ++ for_each_online_cpu(cpu) ++ clk_prepare_enable(mux->hw.clk); ++ else ++ clk_prepare_enable(mux->hw.clk); ++ + unique_aux: + if (unique_aux) + kfree(sec_mux_list[0]); diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch new file mode 100644 index 0000000000..fabb299f42 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch @@ -0,0 +1,48 @@ +From e5dc1a4c01510da8438dddfdf4200b79d73990dc Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 9 Nov 2022 01:56:29 +0100 +Subject: [PATCH 4/6] clk: qcom: krait-cc: handle secondary mux sourcing out of + acpu_aux + +Some bootloader may leave the system in an even more undefined state +with the secondary mux of L2 or other cores sourcing out of the acpu_aux +parent. This results in the clk set to the PXO rate or a PLL8 rate. + +The current logic to reset the mux and set them to a defined state only +handle if the mux are configured to source out of QSB. Change this and +force a new and defined state if the current clk is lower than the aux +rate. This way we can handle any wrong configuration where the mux is +sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1), +PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz). + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -383,8 +383,8 @@ static int krait_cc_probe(struct platfor + */ + cur_rate = clk_get_rate(l2_pri_mux_clk); + aux_rate = 384000000; +- if (cur_rate == 1) { +- pr_info("L2 @ QSB rate. Forcing new rate.\n"); ++ if (cur_rate < aux_rate) { ++ pr_info("L2 @ Undefined rate. Forcing new rate.\n"); + cur_rate = aux_rate; + } + clk_set_rate(l2_pri_mux_clk, aux_rate); +@@ -394,8 +394,8 @@ static int krait_cc_probe(struct platfor + for_each_possible_cpu(cpu) { + clk = clks[cpu]; + cur_rate = clk_get_rate(clk); +- if (cur_rate == 1) { +- pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); ++ if (cur_rate < aux_rate) { ++ pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu); + cur_rate = aux_rate; + } + diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch new file mode 100644 index 0000000000..049b1fa49f --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch @@ -0,0 +1,104 @@ +From 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 9 Nov 2022 01:56:30 +0100 +Subject: [PATCH 5/6] clk: qcom: krait-cc: convert to devm_clk_hw_register + +clk_register is now deprecated. Convert the driver to devm_clk_hw_register. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------ + 1 file changed, 19 insertions(+), 12 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id + .flags = CLK_SET_RATE_PARENT, + }; + const char *p_names[1]; +- struct clk *clk; +- int cpu; ++ int cpu, ret; + + div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); + if (!div) +@@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id + return -ENOMEM; + } + +- clk = devm_clk_register(dev, &div->hw); +- if (IS_ERR(clk)) ++ ret = devm_clk_hw_register(dev, &div->hw); ++ if (ret) + goto err; + + /* clk-krait ignore any rate change if mux is not flagged as enabled */ +@@ -118,7 +117,7 @@ err: + kfree(p_names[0]); + kfree(init.name); + +- return PTR_ERR_OR_ZERO(clk); ++ return ret; + } + + static int +@@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, in + .ops = &krait_mux_clk_ops, + .flags = CLK_SET_RATE_PARENT, + }; +- struct clk *clk; + + mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); + if (!mux) +@@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, in + if (unique_aux) { + sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); + if (!sec_mux_list[0]) { +- clk = ERR_PTR(-ENOMEM); ++ ret = -ENOMEM; + goto err_aux; + } + } + +- clk = devm_clk_register(dev, &mux->hw); ++ ret = devm_clk_hw_register(dev, &mux->hw); ++ if (ret) ++ goto unique_aux; + +- ret = krait_notifier_register(dev, clk, mux); ++ ret = krait_notifier_register(dev, mux->hw.clk, mux); + if (ret) + goto unique_aux; + +@@ -189,7 +189,7 @@ unique_aux: + kfree(sec_mux_list[0]); + err_aux: + kfree(init.name); +- return PTR_ERR_OR_ZERO(clk); ++ return ret; + } + + static struct clk * +@@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, in + goto err_p2; + } + +- clk = devm_clk_register(dev, &mux->hw); ++ ret = devm_clk_hw_register(dev, &mux->hw); ++ if (ret) { ++ clk = ERR_PTR(ret); ++ goto err_p3; ++ } ++ ++ clk = mux->hw.clk; + + ret = krait_notifier_register(dev, clk, mux); + if (ret) +- goto err_p3; ++ clk = ERR_PTR(ret); ++ + err_p3: + kfree(p_names[2]); + err_p2: diff --git a/target/linux/ipq806x/patches-6.1/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch b/target/linux/ipq806x/patches-6.1/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch new file mode 100644 index 0000000000..453a37dfc0 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch @@ -0,0 +1,414 @@ +From 56a655e1c41a86445cf2de656649ad93424b2a63 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 9 Nov 2022 01:56:31 +0100 +Subject: [PATCH 6/6] clk: qcom: krait-cc: convert to parent_data API + +Modernize the krait-cc driver to parent-data API and refactor to drop +any use of parent_names. From Documentation all the required clocks should +be declared in DTS so fw_name can be correctly used to get the parents +for all the muxes. .name is also declared to save compatibility with old +DT. + +While at it also drop some hardcoded index and introduce an enum to make +index values more clear. + +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com +--- + drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++---------------- + 1 file changed, 112 insertions(+), 90 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -15,6 +15,16 @@ + + #include "clk-krait.h" + ++enum { ++ cpu0_mux = 0, ++ cpu1_mux, ++ cpu2_mux, ++ cpu3_mux, ++ l2_mux, ++ ++ clks_max, ++}; ++ + static unsigned int sec_mux_map[] = { + 2, + 0, +@@ -69,21 +79,23 @@ static int krait_notifier_register(struc + return ret; + } + +-static int ++static struct clk_hw * + krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) + { + struct krait_div2_clk *div; ++ static struct clk_parent_data p_data[1]; + struct clk_init_data init = { +- .num_parents = 1, ++ .num_parents = ARRAY_SIZE(p_data), + .ops = &krait_div2_clk_ops, + .flags = CLK_SET_RATE_PARENT, + }; +- const char *p_names[1]; ++ struct clk_hw *clk; ++ char *parent_name; + int cpu, ret; + + div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); + if (!div) +- return -ENOMEM; ++ return ERR_PTR(-ENOMEM); + + div->width = 2; + div->shift = 6; +@@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id + + init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); + if (!init.name) +- return -ENOMEM; ++ return ERR_PTR(-ENOMEM); + +- init.parent_names = p_names; +- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); +- if (!p_names[0]) { +- kfree(init.name); +- return -ENOMEM; ++ init.parent_data = p_data; ++ parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); ++ if (!parent_name) { ++ clk = ERR_PTR(-ENOMEM); ++ goto err_parent_name; + } + ++ p_data[0].fw_name = parent_name; ++ p_data[0].name = parent_name; ++ + ret = devm_clk_hw_register(dev, &div->hw); +- if (ret) +- goto err; ++ if (ret) { ++ clk = ERR_PTR(ret); ++ goto err_clk; ++ } ++ ++ clk = &div->hw; + + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) +@@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id + else + clk_prepare_enable(div->hw.clk); + +-err: +- kfree(p_names[0]); ++err_clk: ++ kfree(parent_name); ++err_parent_name: + kfree(init.name); + +- return ret; ++ return clk; + } + +-static int ++static struct clk_hw * + krait_add_sec_mux(struct device *dev, int id, const char *s, + unsigned int offset, bool unique_aux) + { + int cpu, ret; + struct krait_mux_clk *mux; +- static const char *sec_mux_list[] = { +- "qsb", +- "acpu_aux", ++ static struct clk_parent_data sec_mux_list[2] = { ++ { .name = "qsb", .fw_name = "qsb" }, ++ {}, + }; + struct clk_init_data init = { +- .parent_names = sec_mux_list, ++ .parent_data = sec_mux_list, + .num_parents = ARRAY_SIZE(sec_mux_list), + .ops = &krait_mux_clk_ops, + .flags = CLK_SET_RATE_PARENT, + }; ++ struct clk_hw *clk; ++ char *parent_name; + + mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); + if (!mux) +- return -ENOMEM; ++ return ERR_PTR(-ENOMEM); + + mux->offset = offset; + mux->lpl = id >= 0; +@@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, in + + init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); + if (!init.name) +- return -ENOMEM; ++ return ERR_PTR(-ENOMEM); + + if (unique_aux) { +- sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); +- if (!sec_mux_list[0]) { +- ret = -ENOMEM; ++ parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); ++ if (!parent_name) { ++ clk = ERR_PTR(-ENOMEM); + goto err_aux; + } ++ sec_mux_list[1].fw_name = parent_name; ++ sec_mux_list[1].name = parent_name; ++ } else { ++ sec_mux_list[1].name = "apu_aux"; + } + + ret = devm_clk_hw_register(dev, &mux->hw); +- if (ret) +- goto unique_aux; ++ if (ret) { ++ clk = ERR_PTR(ret); ++ goto err_clk; ++ } ++ ++ clk = &mux->hw; + + ret = krait_notifier_register(dev, mux->hw.clk, mux); +- if (ret) +- goto unique_aux; ++ if (ret) { ++ clk = ERR_PTR(ret); ++ goto err_clk; ++ } + + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) +@@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, in + else + clk_prepare_enable(mux->hw.clk); + +-unique_aux: ++err_clk: + if (unique_aux) +- kfree(sec_mux_list[0]); ++ kfree(parent_name); + err_aux: + kfree(init.name); +- return ret; ++ return clk; + } + +-static struct clk * +-krait_add_pri_mux(struct device *dev, int id, const char *s, +- unsigned int offset) ++static struct clk_hw * ++krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux, ++ int id, const char *s, unsigned int offset) + { + int ret; + struct krait_mux_clk *mux; +- const char *p_names[3]; ++ static struct clk_parent_data p_data[3]; + struct clk_init_data init = { +- .parent_names = p_names, +- .num_parents = ARRAY_SIZE(p_names), ++ .parent_data = p_data, ++ .num_parents = ARRAY_SIZE(p_data), + .ops = &krait_mux_clk_ops, + .flags = CLK_SET_RATE_PARENT, + }; +- struct clk *clk; ++ struct clk_hw *clk; ++ char *hfpll_name; + + mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); + if (!mux) +@@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, in + if (!init.name) + return ERR_PTR(-ENOMEM); + +- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); +- if (!p_names[0]) { ++ hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); ++ if (!hfpll_name) { + clk = ERR_PTR(-ENOMEM); +- goto err_p0; ++ goto err_hfpll; + } + +- p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); +- if (!p_names[1]) { +- clk = ERR_PTR(-ENOMEM); +- goto err_p1; +- } ++ p_data[0].fw_name = hfpll_name; ++ p_data[0].name = hfpll_name; + +- p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); +- if (!p_names[2]) { +- clk = ERR_PTR(-ENOMEM); +- goto err_p2; +- } ++ p_data[1].hw = hfpll_div; ++ p_data[2].hw = sec_mux; + + ret = devm_clk_hw_register(dev, &mux->hw); + if (ret) { + clk = ERR_PTR(ret); +- goto err_p3; ++ goto err_clk; + } + +- clk = mux->hw.clk; ++ clk = &mux->hw; + +- ret = krait_notifier_register(dev, clk, mux); ++ ret = krait_notifier_register(dev, mux->hw.clk, mux); + if (ret) + clk = ERR_PTR(ret); + +-err_p3: +- kfree(p_names[2]); +-err_p2: +- kfree(p_names[1]); +-err_p1: +- kfree(p_names[0]); +-err_p0: ++err_clk: ++ kfree(hfpll_name); ++err_hfpll: + kfree(init.name); + return clk; + } + + /* id < 0 for L2, otherwise id == physical CPU number */ +-static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) ++static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux) + { +- int ret; ++ struct clk_hw *hfpll_div, *sec_mux, *pri_mux; + unsigned int offset; + void *p = NULL; + const char *s; +- struct clk *clk; + + if (id >= 0) { + offset = 0x4501 + (0x1000 * id); +@@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct + s = "_l2"; + } + +- ret = krait_add_div(dev, id, s, offset); +- if (ret) { +- clk = ERR_PTR(ret); ++ hfpll_div = krait_add_div(dev, id, s, offset); ++ if (IS_ERR(hfpll_div)) { ++ pri_mux = hfpll_div; + goto err; + } + +- ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); +- if (ret) { +- clk = ERR_PTR(ret); ++ sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); ++ if (IS_ERR(sec_mux)) { ++ pri_mux = sec_mux; + goto err; + } + +- clk = krait_add_pri_mux(dev, id, s, offset); ++ pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); ++ + err: + kfree(p); +- return clk; ++ return pri_mux; + } + + static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) +@@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct o + unsigned int idx = clkspec->args[0]; + struct clk **clks = data; + +- if (idx >= 5) { ++ if (idx >= clks_max) { + pr_err("%s: invalid clock index %d\n", __func__, idx); + return ERR_PTR(-EINVAL); + } +@@ -327,9 +350,8 @@ static int krait_cc_probe(struct platfor + const struct of_device_id *id; + unsigned long cur_rate, aux_rate; + int cpu; +- struct clk *clk; +- struct clk **clks; +- struct clk *l2_pri_mux_clk; ++ struct clk_hw *mux, *l2_pri_mux; ++ struct clk *clk, **clks; + + id = of_match_device(krait_cc_match_table, dev); + if (!id) +@@ -348,21 +370,21 @@ static int krait_cc_probe(struct platfor + } + + /* Krait configurations have at most 4 CPUs and one L2 */ +- clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); ++ clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL); + if (!clks) + return -ENOMEM; + + for_each_possible_cpu(cpu) { +- clk = krait_add_clks(dev, cpu, id->data); ++ mux = krait_add_clks(dev, cpu, id->data); + if (IS_ERR(clk)) + return PTR_ERR(clk); +- clks[cpu] = clk; ++ clks[cpu] = mux->clk; + } + +- l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); +- if (IS_ERR(l2_pri_mux_clk)) +- return PTR_ERR(l2_pri_mux_clk); +- clks[4] = l2_pri_mux_clk; ++ l2_pri_mux = krait_add_clks(dev, -1, id->data); ++ if (IS_ERR(l2_pri_mux)) ++ return PTR_ERR(l2_pri_mux); ++ clks[l2_mux] = l2_pri_mux->clk; + + /* + * We don't want the CPU or L2 clocks to be turned off at late init +@@ -372,7 +394,7 @@ static int krait_cc_probe(struct platfor + * they take over. + */ + for_each_online_cpu(cpu) { +- clk_prepare_enable(l2_pri_mux_clk); ++ clk_prepare_enable(clks[l2_mux]); + WARN(clk_prepare_enable(clks[cpu]), + "Unable to turn on CPU%d clock", cpu); + } +@@ -388,16 +410,16 @@ static int krait_cc_probe(struct platfor + * two different rates to force a HFPLL reinit under all + * circumstances. + */ +- cur_rate = clk_get_rate(l2_pri_mux_clk); ++ cur_rate = clk_get_rate(clks[l2_mux]); + aux_rate = 384000000; + if (cur_rate < aux_rate) { + pr_info("L2 @ Undefined rate. Forcing new rate.\n"); + cur_rate = aux_rate; + } +- clk_set_rate(l2_pri_mux_clk, aux_rate); +- clk_set_rate(l2_pri_mux_clk, 2); +- clk_set_rate(l2_pri_mux_clk, cur_rate); +- pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); ++ clk_set_rate(clks[l2_mux], aux_rate); ++ clk_set_rate(clks[l2_mux], 2); ++ clk_set_rate(clks[l2_mux], cur_rate); ++ pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); + for_each_possible_cpu(cpu) { + clk = clks[cpu]; + cur_rate = clk_get_rate(clk); diff --git a/target/linux/ipq806x/patches-6.1/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch b/target/linux/ipq806x/patches-6.1/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch new file mode 100644 index 0000000000..7e65f4cdff --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch @@ -0,0 +1,28 @@ +From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 25 Oct 2022 01:38:17 +0200 +Subject: [PATCH] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1 + +It was reported non working mmc with this option enabled. +Both mmc for ipq8064 are supplied by a fixed 3.3v regulator so mmc can't +be run at 1.8v. +Disable it to restore correct functionality of this SoC feature. + +Tested-by: Hendrik Koerner +Signed-off-by: Christian Marangi +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20221024233817.27410-1-ansuelsmth@gmail.com +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -756,7 +756,6 @@ + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; +- mmc-ddr-1_8v; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; diff --git a/target/linux/ipq806x/patches-6.1/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch b/target/linux/ipq806x/patches-6.1/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch new file mode 100644 index 0000000000..76df0f5681 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch @@ -0,0 +1,42 @@ +From de48d8766afcd97d147699aaff78a338081c9973 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 22 Oct 2022 14:56:55 +0200 +Subject: [PATCH 1/3] thermal/drivers/qcom/tsens: Init debugfs only with + successful probe + +Calibrate and tsens_register can fail or PROBE_DEFER. This will cause a +double or a wrong init of the debugfs information. Init debugfs only +with successful probe fixing warning about directory already present. + +Signed-off-by: Christian Marangi +Acked-by: Thara Gopinath +Link: https://lore.kernel.org/r/20221022125657.22530-2-ansuelsmth@gmail.com +Signed-off-by: Daniel Lezcano +--- + drivers/thermal/qcom/tsens.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/thermal/qcom/tsens.c ++++ b/drivers/thermal/qcom/tsens.c +@@ -918,8 +918,6 @@ int __init init_common(struct tsens_priv + if (tsens_version(priv) >= VER_0_1) + tsens_enable_irq(priv); + +- tsens_debug_init(op); +- + err_put_device: + put_device(&op->dev); + return ret; +@@ -1156,7 +1154,11 @@ static int tsens_probe(struct platform_d + } + } + +- return tsens_register(priv); ++ ret = tsens_register(priv); ++ if (!ret) ++ tsens_debug_init(pdev); ++ ++ return ret; + } + + static int tsens_remove(struct platform_device *pdev) diff --git a/target/linux/ipq806x/patches-6.1/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch b/target/linux/ipq806x/patches-6.1/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch new file mode 100644 index 0000000000..10f1e36b58 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch @@ -0,0 +1,29 @@ +From c7e077e921fa94e0c06c8d14af6c0504c8a5f4bd Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 22 Oct 2022 14:56:56 +0200 +Subject: [PATCH 2/3] thermal/drivers/qcom/tsens: Fix wrong version id + dbg_version_show + +For VER_0 the version was incorrectly reported as 0.1.0. + +Fix that and correctly report the major version for this old tsens +revision. + +Signed-off-by: Christian Marangi +Link: https://lore.kernel.org/r/20221022125657.22530-3-ansuelsmth@gmail.com +Signed-off-by: Daniel Lezcano +--- + drivers/thermal/qcom/tsens.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/thermal/qcom/tsens.c ++++ b/drivers/thermal/qcom/tsens.c +@@ -692,7 +692,7 @@ static int dbg_version_show(struct seq_f + return ret; + seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver); + } else { +- seq_puts(s, "0.1.0\n"); ++ seq_printf(s, "0.%d.0\n", priv->feat->ver_major); + } + + return 0; diff --git a/target/linux/ipq806x/patches-6.1/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch b/target/linux/ipq806x/patches-6.1/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch new file mode 100644 index 0000000000..63cce7974b --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch @@ -0,0 +1,54 @@ +From 89992d95ed1046338c7866ef7bbe6de543a2af91 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 22 Oct 2022 14:56:57 +0200 +Subject: [PATCH 3/3] thermal/drivers/qcom/tsens: Rework debugfs file structure + +The current tsens debugfs structure is composed by: +- a tsens dir in debugfs with a version file +- a directory for each tsens istance with sensors file to dump all the + sensors value. + +This works on the assumption that we have the same version for each +istance but this assumption seems fragile and with more than one tsens +istance results in the version file not tracking each of them. + +A better approach is to just create a subdirectory for each tsens +istance and put there version and sensors debugfs file. + +Using this new implementation results in less code since debugfs entry +are created only on successful tsens probe. + +Signed-off-by: Christian Marangi +Link: https://lore.kernel.org/r/20221022125657.22530-4-ansuelsmth@gmail.com +Signed-off-by: Daniel Lezcano +--- + drivers/thermal/qcom/tsens.c | 13 +++---------- + 1 file changed, 3 insertions(+), 10 deletions(-) + +--- a/drivers/thermal/qcom/tsens.c ++++ b/drivers/thermal/qcom/tsens.c +@@ -704,21 +704,14 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors); + static void tsens_debug_init(struct platform_device *pdev) + { + struct tsens_priv *priv = platform_get_drvdata(pdev); +- struct dentry *root, *file; + +- root = debugfs_lookup("tsens", NULL); +- if (!root) ++ priv->debug_root = debugfs_lookup("tsens", NULL); ++ if (!priv->debug_root) + priv->debug_root = debugfs_create_dir("tsens", NULL); +- else +- priv->debug_root = root; +- +- file = debugfs_lookup("version", priv->debug_root); +- if (!file) +- debugfs_create_file("version", 0444, priv->debug_root, +- pdev, &dbg_version_fops); + + /* A directory for each instance of the TSENS IP */ + priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root); ++ debugfs_create_file("version", 0444, priv->debug, pdev, &dbg_version_fops); + debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops); + } + #else diff --git a/target/linux/ipq806x/patches-6.1/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-6.1/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch new file mode 100644 index 0000000000..e0c195f1ab --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch @@ -0,0 +1,25 @@ +From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 9 Mar 2017 09:31:44 +0100 +Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting + +Signed-off-by: John Crispin +--- + drivers/mtd/mtdpart.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -51,7 +51,11 @@ static struct mtd_info *allocate_partiti + + /* allocate the partition structure */ + child = kzalloc(sizeof(*child), GFP_KERNEL); +- name = kstrdup(part->name, GFP_KERNEL); ++ /* "rootfs" conflicts with OpenWrt auto mounting */ ++ if (mtd_type_is_nand(parent) && !strcmp(part->name, "rootfs")) ++ name = "ubi"; ++ else ++ name = kstrdup(part->name, GFP_KERNEL); + if (!name || !child) { + printk(KERN_ERR"memory allocation error while creating partitions for \"%s\"\n", + parent->name); diff --git a/target/linux/ipq806x/patches-6.1/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch b/target/linux/ipq806x/patches-6.1/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch new file mode 100644 index 0000000000..0a594b2688 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch @@ -0,0 +1,89 @@ +From bef5018abb7cf94efafdc05087b4c998891ae4ec Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 17 Jan 2022 23:39:34 +0100 +Subject: [PATCH v3 10/18] ARM: dts: qcom: add saw for l2 cache and kraitcc for + ipq8064 + +Add saw compatible for l2 cache and kraitcc node for ipq8064 dtsi. +Also declare clock-output-names for acc0 and acc1 and qsb fixed clock +for the secondary mux. + +Signed-off-by: Ansuel Smith +Tested-by: Jonathan McDowell +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- + 1 file changed, 32 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -301,6 +301,12 @@ + }; + + clocks { ++ qsb: qsb { ++ compatible = "fixed-clock"; ++ clock-frequency = <225000000>; ++ #clock-cells = <0>; ++ }; ++ + cxo_board: cxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; +@@ -575,15 +581,30 @@ + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu_l2_aux"; ++ #clock-cells = <0>; ++ }; ++ ++ kraitcc: clock-controller { ++ compatible = "qcom,krait-cc-v1"; ++ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, ++ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>; ++ clock-names = "hfpll0", "hfpll1", "hfpll_l2", ++ "acpu0_aux", "acpu1_aux", "acpu_l2_aux", ++ "qsb", "pxo"; ++ #clock-cells = <1>; + }; + + acc0: clock-controller@2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; ++ clock-output-names = "acpu0_aux"; ++ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; ++ clock-names = "pll8_vote", "pxo"; ++ #clock-cells = <0>; + }; + + saw0: regulator@2089000 { +- compatible = "qcom,saw2"; ++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; +@@ -591,14 +612,24 @@ + acc1: clock-controller@2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; ++ clock-output-names = "acpu1_aux"; ++ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; ++ clock-names = "pll8_vote", "pxo"; ++ #clock-cells = <0>; + }; + + saw1: regulator@2099000 { +- compatible = "qcom,saw2"; ++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + ++ saw_l2: regulator@02012000 { ++ compatible = "qcom,saw2", "syscon"; ++ reg = <0x02012000 0x1000>; ++ regulator; ++ }; ++ + nss_common: syscon@03000000 { + compatible = "syscon"; + reg = <0x03000000 0x0000FFFF>; diff --git a/target/linux/ipq806x/patches-6.1/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch b/target/linux/ipq806x/patches-6.1/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch new file mode 100644 index 0000000000..16e924b303 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch @@ -0,0 +1,268 @@ +From 076ebb6e1799c4c7a1d2e07510d88b9e9b57b551 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Tue, 18 Jan 2022 00:03:47 +0100 +Subject: [PATCH v3 13/18] ARM: dts: qcom: add opp table for cpu and l2 for + ipq8064 + +Add opp table for cpu and l2 cache. While the current cpufreq is +the generic one that doesn't scale the L2 cache, we add the l2 +cache opp anyway for the sake of completeness. This will be handy in the +future when a dedicated cpufreq driver is introduced for krait cores +that will correctly scale l2 cache with the core freq. + +Opp-level is set based on the logic of +0: idle level +1: normal level +2: turbo level + +Signed-off-by: Ansuel Smith +Tested-by: Jonathan McDowell +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++ + 1 file changed, 99 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -48,6 +48,105 @@ + }; + }; + ++ opp_table_l2: opp_table_l2 { ++ compatible = "operating-points-v2"; ++ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <100000>; ++ opp-level = <0>; ++ }; ++ ++ opp-1000000000 { ++ opp-hz = /bits/ 64 <1000000000>; ++ opp-microvolt = <1100000>; ++ clock-latency-ns = <100000>; ++ opp-level = <1>; ++ }; ++ ++ opp-1200000000 { ++ opp-hz = /bits/ 64 <1200000000>; ++ opp-microvolt = <1150000>; ++ clock-latency-ns = <100000>; ++ opp-level = <2>; ++ }; ++ }; ++ ++ opp_table0: opp_table0 { ++ compatible = "operating-points-v2-kryo-cpu"; ++ nvmem-cells = <&speedbin_efuse>; ++ ++ /* ++ * Voltage thresholds are ++ */ ++ opp-384000000 { ++ opp-hz = /bits/ 64 <384000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>; ++ opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>; ++ opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>; ++ opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <0>; ++ }; ++ ++ opp-600000000 { ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; ++ opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>; ++ opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>; ++ opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <1>; ++ }; ++ ++ opp-800000000 { ++ opp-hz = /bits/ 64 <800000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>; ++ opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>; ++ opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <1>; ++ }; ++ ++ opp-1000000000 { ++ opp-hz = /bits/ 64 <1000000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>; ++ opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>; ++ opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <1>; ++ }; ++ ++ opp-1200000000 { ++ opp-hz = /bits/ 64 <1200000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>; ++ opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>; ++ opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>; ++ opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <2>; ++ }; ++ ++ opp-1400000000 { ++ opp-hz = /bits/ 64 <1400000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>; ++ opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>; ++ opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>; ++ opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <2>; ++ }; ++ }; ++ + thermal-zones { + sensor0-thermal { + polling-delay-passive = <0>; +--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi +@@ -6,3 +6,92 @@ + model = "Qualcomm Technologies, Inc. IPQ8065"; + compatible = "qcom,ipq8065", "qcom,ipq8064"; + }; ++ ++&opp_table_l2 { ++ /delete-node/opp-1200000000; ++ ++ opp-1400000000 { ++ opp-hz = /bits/ 64 <1400000000>; ++ opp-microvolt = <1150000>; ++ clock-latency-ns = <100000>; ++ opp-level = <2>; ++ }; ++}; ++ ++&opp_table0 { ++ /* ++ * On ipq8065 1.2 ghz freq is not present ++ * Remove it to make cpufreq work and not ++ * complain for missing definition ++ */ ++ ++ /delete-node/opp-1200000000; ++ ++ /* ++ * Voltage thresholds are ++ */ ++ opp-384000000 { ++ opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>; ++ opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>; ++ opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>; ++ opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>; ++ opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>; ++ opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>; ++ opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>; ++ }; ++ ++ opp-600000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>; ++ opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>; ++ opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>; ++ opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>; ++ opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>; ++ opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>; ++ opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>; ++ }; ++ ++ opp-800000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; ++ opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>; ++ opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>; ++ opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>; ++ opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>; ++ opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>; ++ }; ++ ++ opp-1000000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>; ++ opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>; ++ opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>; ++ opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>; ++ opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>; ++ opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>; ++ }; ++ ++ opp-1400000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>; ++ opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>; ++ opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>; ++ opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>; ++ opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>; ++ opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>; ++ opp-level = <1>; ++ }; ++ ++ opp-1725000000 { ++ opp-hz = /bits/ 64 <1725000000>; ++ opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>; ++ opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>; ++ opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>; ++ opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>; ++ opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>; ++ opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>; ++ opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>; ++ opp-supported-hw = <0x1>; ++ clock-latency-ns = <100000>; ++ opp-level = <2>; ++ }; ++}; +--- a/arch/arm/boot/dts/qcom-ipq8062.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi +@@ -6,3 +6,39 @@ + model = "Qualcomm Technologies, Inc. IPQ8062"; + compatible = "qcom,ipq8062", "qcom,ipq8064"; + }; ++ ++&opp_table0 { ++ /delete-node/opp-1200000000; ++ /delete-node/opp-1400000000; ++ ++ /* ++ * Voltage thresholds are ++ */ ++ opp-384000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>; ++ opp-microvolt-speed0-pvs1-v0 = < 925000 878750 971250>; ++ opp-microvolt-speed0-pvs2-v0 = < 875000 831250 918750>; ++ opp-microvolt-speed0-pvs3-v0 = < 800000 760000 840000>; ++ }; ++ ++ opp-600000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; ++ opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>; ++ opp-microvolt-speed0-pvs2-v0 = < 925000 878750 971250>; ++ opp-microvolt-speed0-pvs3-v0 = < 850000 807500 892500>; ++ }; ++ ++ opp-800000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>; ++ opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs2-v0 = < 995000 945250 1044750>; ++ opp-microvolt-speed0-pvs3-v0 = < 900000 855000 945000>; ++ }; ++ ++ opp-1000000000 { ++ opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>; ++ opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>; ++ opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>; ++ opp-microvolt-speed0-pvs3-v0 = < 950000 902500 997500>; ++ }; ++}; diff --git a/target/linux/ipq806x/patches-6.1/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch b/target/linux/ipq806x/patches-6.1/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch new file mode 100644 index 0000000000..cf27aaa08b --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch @@ -0,0 +1,153 @@ +From 211fc0c0a63c99b68663a27182e643316c2d8cbe Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Tue, 18 Jan 2022 00:07:57 +0100 +Subject: [PATCH v3 15/18] ARM: dts: qcom: add multiple missing binding for cpu + and l2 for ipq8064 + +Add multiple binding for cpu node, l2 node and add idle-states +definition for ipq8064 dtsi. + +Signed-off-by: Ansuel Smith +Tested-by: Jonathan McDowell +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ + 1 file changed, 36 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -30,6 +30,15 @@ + next-level-cache = <&L2>; + qcom,acc = <&acc0>; + qcom,saw = <&saw0>; ++ clocks = <&kraitcc 0>, <&kraitcc 4>; ++ clock-names = "cpu", "l2"; ++ clock-latency = <100000>; ++ operating-points-v2 = <&opp_table0>; ++ voltage-tolerance = <5>; ++ cooling-min-state = <0>; ++ cooling-max-state = <10>; ++ #cooling-cells = <2>; ++ cpu-idle-states = <&CPU_SPC>; + }; + + cpu1: cpu@1 { +@@ -40,11 +49,35 @@ + next-level-cache = <&L2>; + qcom,acc = <&acc1>; + qcom,saw = <&saw1>; ++ clocks = <&kraitcc 1>, <&kraitcc 4>; ++ clock-names = "cpu", "l2"; ++ clock-latency = <100000>; ++ operating-points-v2 = <&opp_table0>; ++ voltage-tolerance = <5>; ++ cooling-min-state = <0>; ++ cooling-max-state = <10>; ++ #cooling-cells = <2>; ++ cpu-idle-states = <&CPU_SPC>; ++ }; ++ ++ idle-states { ++ CPU_SPC: spc { ++ compatible = "qcom,idle-state-spc"; ++ status = "disabled"; ++ entry-latency-us = <400>; ++ exit-latency-us = <900>; ++ min-residency-us = <3000>; ++ }; + }; + + L2: l2-cache { + compatible = "cache"; + cache-level = <2>; ++ qcom,saw = <&saw_l2>; ++ ++ clocks = <&kraitcc 4>; ++ clock-names = "l2"; ++ operating-points-v2 = <&opp_table_l2>; + }; + }; + +--- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi +@@ -2,6 +2,18 @@ + + #include "qcom-ipq8064.dtsi" + ++&cpu0 { ++ cpu-supply = <&smb208_s2a>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&smb208_s2b>; ++}; ++ ++&L2 { ++ l2-supply = <&smb208_s1a>; ++}; ++ + &rpm { + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; +--- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi +@@ -2,6 +2,18 @@ + + #include "qcom-ipq8064-v2.0.dtsi" + ++&cpu0 { ++ cpu-supply = <&smb208_s2a>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&smb208_s2b>; ++}; ++ ++&L2 { ++ l2-supply = <&smb208_s1a>; ++}; ++ + &rpm { + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; +--- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi +@@ -2,6 +2,18 @@ + + #include "qcom-ipq8062.dtsi" + ++&cpu0 { ++ cpu-supply = <&smb208_s2a>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&smb208_s2b>; ++}; ++ ++&L2 { ++ l2-supply = <&smb208_s1a>; ++}; ++ + &rpm { + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; +--- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi +@@ -2,6 +2,18 @@ + + #include "qcom-ipq8065.dtsi" + ++&cpu0 { ++ cpu-supply = <&smb208_s2a>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&smb208_s2b>; ++}; ++ ++&L2 { ++ l2-supply = <&smb208_s1a>; ++}; ++ + &rpm { + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; diff --git a/target/linux/ipq806x/patches-6.1/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch b/target/linux/ipq806x/patches-6.1/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch new file mode 100644 index 0000000000..6be9334e7d --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch @@ -0,0 +1,29 @@ +From 6c94e0184e56f9e9f1f5d5f54b20758433e498d2 Mon Sep 17 00:00:00 2001 +From: Christian 'Ansuel' Marangi +Date: Wed, 15 Jun 2022 16:47:09 +0200 +Subject: [PATCH 1/2] ARM: dts: qcom: fix wrong nad_pins definition for ipq806x + +Fix wrong nand_pings definition for bias-disable pins. + +Signed-off-by: Christian 'Ansuel' Marangi +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -599,12 +599,9 @@ + }; + + nand_pins: nand_pins { +- mux { ++ disable { + pins = "gpio34", "gpio35", "gpio36", +- "gpio37", "gpio38", "gpio39", +- "gpio40", "gpio41", "gpio42", +- "gpio43", "gpio44", "gpio45", +- "gpio46", "gpio47"; ++ "gpio37", "gpio38"; + function = "nand"; + drive-strength = <10>; + bias-disable; diff --git a/target/linux/ipq806x/patches-6.1/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch b/target/linux/ipq806x/patches-6.1/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch new file mode 100644 index 0000000000..a35bb3874f --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch @@ -0,0 +1,188 @@ +From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001 +From: Christian 'Ansuel' Marangi +Date: Wed, 15 Jun 2022 16:59:30 +0200 +Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for + ipq806x + +Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to +correctly use the new tag. + +Signed-off-by: Christian 'Ansuel' Marangi +--- + arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++----------- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++ + 2 files changed, 81 insertions(+), 67 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts ++++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +@@ -25,73 +25,6 @@ + device_type = "memory"; + }; + +- mdio0: mdio-0 { +- status = "okay"; +- compatible = "virtual,mdio-gpio"; +- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, +- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- pinctrl-0 = <&mdio0_pins>; +- pinctrl-names = "default"; +- +- switch0: switch@10 { +- compatible = "qca,qca8337"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- dsa,member = <0 0>; +- +- pinctrl-0 = <&sw0_reset_pin>; +- pinctrl-names = "default"; +- +- reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; +- reg = <0x10>; +- +- ports { +- #address-cells = <1>; +- #size-cells = <0>; +- +- switch0cpu: port@0 { +- reg = <0>; +- label = "cpu"; +- ethernet = <&gmac0>; +- phy-mode = "rgmii-id"; +- fixed-link { +- speed = <1000>; +- full-duplex; +- }; +- }; +- +- port@1 { +- reg = <1>; +- label = "sw1"; +- }; +- +- port@2 { +- reg = <2>; +- label = "sw2"; +- }; +- +- port@3 { +- reg = <3>; +- label = "sw3"; +- }; +- +- port@4 { +- reg = <4>; +- label = "sw4"; +- }; +- +- port@5 { +- reg = <5>; +- label = "sw5"; +- }; +- }; +- }; +- }; +- + mdio1: mdio-1 { + status = "okay"; + compatible = "virtual,mdio-gpio"; +@@ -222,6 +155,73 @@ + status = "okay"; + }; + ++&mdio0 { ++ status = "okay"; ++ compatible = "virtual,mdio-gpio"; ++ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, ++ <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-0 = <&mdio0_pins>; ++ pinctrl-names = "default"; ++ ++ switch0: switch@10 { ++ compatible = "qca,qca8337"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ dsa,member = <0 0>; ++ ++ pinctrl-0 = <&sw0_reset_pin>; ++ pinctrl-names = "default"; ++ ++ reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; ++ reg = <0x10>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ switch0cpu: port@0 { ++ reg = <0>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ phy-mode = "rgmii-id"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "sw1"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "sw2"; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "sw3"; ++ }; ++ ++ port@4 { ++ reg = <4>; ++ label = "sw4"; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "sw5"; ++ }; ++ }; ++ }; ++}; ++ + &gmac0 { + status = "okay"; + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -476,6 +476,20 @@ + snps,blen = <16 0 0 0 0 0 0>; + }; + ++ mdio0: mdio@37000000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ compatible = "qcom,ipq8064-mdio", "syscon"; ++ reg = <0x37000000 0x200000>; ++ resets = <&gcc GMAC_CORE1_RESET>; ++ reset-names = "stmmaceth"; ++ clocks = <&gcc GMAC_CORE1_CLK>; ++ clock-names = "stmmaceth"; ++ ++ status = "disabled"; ++ }; ++ + vsdcc_fixed: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "SDCC Power"; diff --git a/target/linux/ipq806x/patches-6.1/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch b/target/linux/ipq806x/patches-6.1/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch new file mode 100644 index 0000000000..9de7328879 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch @@ -0,0 +1,235 @@ +From b044ae89862132a86fb511648e9c52ea3cdf8c30 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 5 Aug 2020 14:19:23 +0200 +Subject: [PATCH 1/4] devfreq: qcom: Add L2 Krait Cache devfreq scaling driver + +Qcom L2 Krait CPUs use the generic cpufreq-dt driver and doesn't actually +scale the Cache frequency when the CPU frequency is changed. This +devfreq driver register with the cpu notifier and scale the Cache +based on the max Freq across all core as the CPU cache is shared across +all of them. If provided this also scale the voltage of the regulator +attached to the CPU cache. The scaling logic is based on the CPU freq +and the 3 scaling interval are set by the device dts. + +Signed-off-by: Christian Marangi +--- + drivers/devfreq/Kconfig | 11 ++ + drivers/devfreq/Makefile | 1 + + drivers/devfreq/krait-cache-devfreq.c | 188 ++++++++++++++++++++++++++ + 3 files changed, 200 insertions(+) + create mode 100644 drivers/devfreq/krait-cache-devfreq.c + +--- a/drivers/devfreq/Kconfig ++++ b/drivers/devfreq/Kconfig +@@ -151,6 +151,17 @@ config ARM_SUN8I_A33_MBUS_DEVFREQ + This adds the DEVFREQ driver for the MBUS controller in some + Allwinner sun8i (A33 through H3) and sun50i (A64 and H5) SoCs. + ++config ARM_KRAIT_CACHE_DEVFREQ ++ tristate "Scaling support for Krait CPU Cache Devfreq" ++ depends on ARCH_QCOM || COMPILE_TEST ++ select DEVFREQ_GOV_PASSIVE ++ help ++ This adds the DEVFREQ driver for the Krait CPU L2 Cache shared by all cores. ++ ++ The driver register with the cpufreq notifier and find the right frequency ++ based on the max frequency across all core and the range set in the device ++ dts. If provided this scale also the regulator attached to the l2 cache. ++ + source "drivers/devfreq/event/Kconfig" + + endif # PM_DEVFREQ +--- a/drivers/devfreq/Makefile ++++ b/drivers/devfreq/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) + + obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o + obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o + obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o ++obj-$(CONFIG_ARM_KRAIT_CACHE_DEVFREQ) += krait-cache-devfreq.o + + # DEVFREQ Event Drivers + obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ +--- /dev/null ++++ b/drivers/devfreq/krait-cache-devfreq.c +@@ -0,0 +1,181 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "governor.h" ++ ++struct krait_cache_data { ++ struct clk *clk; ++ unsigned long idle_freq; ++ int token; ++}; ++ ++static int krait_cache_config_clk(struct device *dev, struct opp_table *opp_table, ++ struct dev_pm_opp *old_opp, struct dev_pm_opp *opp, ++ void *data, bool scaling_down) ++{ ++ struct krait_cache_data *kdata; ++ unsigned long old_freq, freq; ++ unsigned long idle_freq; ++ struct clk *clk; ++ int ret; ++ ++ kdata = dev_get_drvdata(dev); ++ idle_freq = kdata->idle_freq; ++ clk = kdata->clk; ++ ++ old_freq = dev_pm_opp_get_freq(old_opp); ++ freq = dev_pm_opp_get_freq(opp); ++ ++ /* ++ * Set to idle bin if switching from normal to high bin ++ * or vice versa. It has been notice that a bug is triggered ++ * in cache scaling when more than one bin is scaled, to fix ++ * this we first need to transition to the base rate and then ++ * to target rate ++ */ ++ if (likely(freq != idle_freq && old_freq != idle_freq)) { ++ ret = clk_set_rate(clk, idle_freq); ++ if (ret) ++ return ret; ++ } ++ ++ return clk_set_rate(clk, freq); ++}; ++ ++static int krait_cache_get_cur_freq(struct device *dev, unsigned long *freq) ++{ ++ struct krait_cache_data *data = dev_get_drvdata(dev); ++ ++ *freq = clk_get_rate(data->clk); ++ ++ return 0; ++}; ++ ++static int krait_cache_target(struct device *dev, unsigned long *freq, ++ u32 flags) ++{ ++ struct dev_pm_opp *opp; ++ ++ opp = dev_pm_opp_find_freq_ceil(dev, freq); ++ if (unlikely(IS_ERR(opp))) ++ return PTR_ERR(opp); ++ ++ dev_pm_opp_put(opp); ++ ++ return dev_pm_opp_set_rate(dev, *freq); ++}; ++ ++static int krait_cache_get_dev_status(struct device *dev, ++ struct devfreq_dev_status *stat) ++{ ++ struct krait_cache_data *data = dev_get_drvdata(dev); ++ ++ stat->busy_time = 0; ++ stat->total_time = 0; ++ stat->current_frequency = clk_get_rate(data->clk); ++ ++ return 0; ++}; ++ ++static struct devfreq_dev_profile krait_cache_devfreq_profile = { ++ .target = krait_cache_target, ++ .get_dev_status = krait_cache_get_dev_status, ++ .get_cur_freq = krait_cache_get_cur_freq ++}; ++ ++static struct devfreq_passive_data devfreq_gov_data = { ++ .parent_type = CPUFREQ_PARENT_DEV, ++}; ++ ++static int krait_cache_probe(struct platform_device *pdev) ++{ ++ struct dev_pm_opp_config config = { }; ++ struct device *dev = &pdev->dev; ++ struct krait_cache_data *data; ++ struct devfreq *devfreq; ++ struct dev_pm_opp *opp; ++ struct clk *clk; ++ int ret, token; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ clk = devm_clk_get(dev, "l2"); ++ if (IS_ERR(clk)) ++ return PTR_ERR(clk); ++ ++ config.regulator_names = (const char *[]){ "l2", NULL }; ++ config.clk_names = (const char *[]){ "l2", NULL }; ++ config.config_clks = krait_cache_config_clk; ++ ++ token = dev_pm_opp_set_config(dev, &config); ++ if (token < 0) ++ return token; ++ ++ ret = devm_pm_opp_of_add_table(dev); ++ if (ret) ++ goto free_opp; ++ ++ opp = dev_pm_opp_find_freq_ceil(dev, &data->idle_freq); ++ if (IS_ERR(opp)) { ++ ret = PTR_ERR(opp); ++ goto free_opp; ++ } ++ dev_pm_opp_put(opp); ++ ++ data->token = token; ++ data->clk = clk; ++ dev_set_drvdata(dev, data); ++ devfreq = devm_devfreq_add_device(dev, &krait_cache_devfreq_profile, ++ DEVFREQ_GOV_PASSIVE, &devfreq_gov_data); ++ if (IS_ERR(devfreq)) { ++ ret = PTR_ERR(devfreq); ++ goto free_opp; ++ } ++ ++ return 0; ++ ++free_opp: ++ dev_pm_opp_clear_config(token); ++ return ret; ++}; ++ ++static int krait_cache_remove(struct platform_device *pdev) ++{ ++ struct krait_cache_data *data = dev_get_drvdata(&pdev->dev); ++ ++ dev_pm_opp_clear_config(data->token); ++ ++ return 0; ++}; ++ ++static const struct of_device_id krait_cache_match_table[] = { ++ { .compatible = "qcom,krait-cache" }, ++ {} ++}; ++ ++static struct platform_driver krait_cache_driver = { ++ .probe = krait_cache_probe, ++ .remove = krait_cache_remove, ++ .driver = { ++ .name = "krait-cache-scaling", ++ .of_match_table = krait_cache_match_table, ++ }, ++}; ++module_platform_driver(krait_cache_driver); ++ ++MODULE_DESCRIPTION("Krait CPU Cache Scaling driver"); ++MODULE_AUTHOR("Christian Marangi "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ipq806x/patches-6.1/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch b/target/linux/ipq806x/patches-6.1/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch new file mode 100644 index 0000000000..45f05dd423 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch @@ -0,0 +1,50 @@ +From ef124ad0ff8abfbf4ebe3fe6d7dcef4541dec13a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 16 Jun 2022 18:39:21 +0200 +Subject: [PATCH] ARM: dts: qcom: add krait-cache compatible for ipq806x dtsi + +Add qcom,krait-cache compatible to enable cache devfreq driver for +ipq806x SoC and move the L2 node to the soc node to make the devfreq +driver correctly probe. + +Signed-off-by: Christian Marangi +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++----------- + 1 file changed, 11 insertions(+), 11 deletions(-) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -69,16 +69,6 @@ + min-residency-us = <3000>; + }; + }; +- +- L2: l2-cache { +- compatible = "cache"; +- cache-level = <2>; +- qcom,saw = <&saw_l2>; +- +- clocks = <&kraitcc 4>; +- clock-names = "l2"; +- operating-points-v2 = <&opp_table_l2>; +- }; + }; + + opp_table_l2: opp_table_l2 { +@@ -1409,6 +1399,16 @@ + #reset-cells = <1>; + }; + ++ L2: l2-cache { ++ compatible = "cache", "qcom,krait-cache"; ++ cache-level = <2>; ++ qcom,saw = <&saw_l2>; ++ ++ clocks = <&kraitcc 4>; ++ clock-names = "l2"; ++ operating-points-v2 = <&opp_table_l2>; ++ }; ++ + lpass@28100000 { + compatible = "qcom,lpass-cpu"; + status = "disabled"; diff --git a/target/linux/ipq806x/patches-6.1/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch b/target/linux/ipq806x/patches-6.1/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch new file mode 100644 index 0000000000..c9cd3ebdf7 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch @@ -0,0 +1,203 @@ +From 13f075999935bb696dbab63243923179f06fa05e Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 16 Jun 2022 19:56:08 +0200 +Subject: [PATCH 3/4] devfreq: add ipq806x fabric scaling driver + +Add ipq806x fabric scaling driver using the devfreq passive governor. + +Signed-off-by: Christian Marangi +--- + drivers/devfreq/Kconfig | 11 ++ + drivers/devfreq/Makefile | 1 + + drivers/devfreq/ipq806x-fab-devfreq.c | 155 ++++++++++++++++++++++++++ + 3 files changed, 167 insertions(+) + create mode 100644 drivers/devfreq/ipq806x-fab-devfreq.c + +--- a/drivers/devfreq/Kconfig ++++ b/drivers/devfreq/Kconfig +@@ -162,6 +162,17 @@ config ARM_KRAIT_CACHE_DEVFREQ + based on the max frequency across all core and the range set in the device + dts. If provided this scale also the regulator attached to the l2 cache. + ++config ARM_IPQ806X_FAB_DEVFREQ ++ tristate "Scaling support for ipq806x Soc Fabric" ++ depends on ARCH_QCOM || COMPILE_TEST ++ select DEVFREQ_GOV_PASSIVE ++ help ++ This adds the DEVFREQ driver for the ipq806x Soc Fabric. ++ ++ The driver register with the cpufreq notifier and find the right frequency ++ based on the max frequency across all core and the range set in the device ++ dts. ++ + source "drivers/devfreq/event/Kconfig" + + endif # PM_DEVFREQ +--- a/drivers/devfreq/Makefile ++++ b/drivers/devfreq/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += + obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o + obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o + obj-$(CONFIG_ARM_KRAIT_CACHE_DEVFREQ) += krait-cache-devfreq.o ++obj-$(CONFIG_ARM_IPQ806X_FAB_DEVFREQ) += ipq806x-fab-devfreq.o + + # DEVFREQ Event Drivers + obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ +--- /dev/null ++++ b/drivers/devfreq/ipq806x-fab-devfreq.c +@@ -0,0 +1,155 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "governor.h" ++ ++struct ipq806x_fab_data { ++ struct clk *fab_clk; ++ struct clk *ddr_clk; ++}; ++ ++static int ipq806x_fab_get_cur_freq(struct device *dev, unsigned long *freq) ++{ ++ struct ipq806x_fab_data *data = dev_get_drvdata(dev); ++ ++ *freq = clk_get_rate(data->fab_clk); ++ ++ return 0; ++}; ++ ++static int ipq806x_fab_target(struct device *dev, unsigned long *freq, ++ u32 flags) ++{ ++ struct ipq806x_fab_data *data = dev_get_drvdata(dev); ++ struct dev_pm_opp *opp; ++ int ret; ++ ++ opp = dev_pm_opp_find_freq_ceil(dev, freq); ++ if (unlikely(IS_ERR(opp))) ++ return PTR_ERR(opp); ++ ++ dev_pm_opp_put(opp); ++ ++ ret = clk_set_rate(data->fab_clk, *freq); ++ if (ret) ++ return ret; ++ ++ return clk_set_rate(data->ddr_clk, *freq); ++}; ++ ++static int ipq806x_fab_get_dev_status(struct device *dev, ++ struct devfreq_dev_status *stat) ++{ ++ struct ipq806x_fab_data *data = dev_get_drvdata(dev); ++ ++ stat->busy_time = 0; ++ stat->total_time = 0; ++ stat->current_frequency = clk_get_rate(data->fab_clk); ++ ++ return 0; ++}; ++ ++static struct devfreq_dev_profile ipq806x_fab_devfreq_profile = { ++ .target = ipq806x_fab_target, ++ .get_dev_status = ipq806x_fab_get_dev_status, ++ .get_cur_freq = ipq806x_fab_get_cur_freq ++}; ++ ++static struct devfreq_passive_data devfreq_gov_data = { ++ .parent_type = CPUFREQ_PARENT_DEV, ++}; ++ ++static int ipq806x_fab_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct ipq806x_fab_data *data; ++ struct devfreq *devfreq; ++ struct clk *clk; ++ int ret; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ clk = devm_clk_get(dev, "apps-fab-clk"); ++ if (IS_ERR(clk)) { ++ dev_err_probe(dev, PTR_ERR(clk), "failed to get apps fab clk\n"); ++ return PTR_ERR(clk); ++ } ++ ++ clk_prepare_enable(clk); ++ data->fab_clk = clk; ++ ++ clk = devm_clk_get(dev, "ddr-fab-clk"); ++ if (IS_ERR(clk)) { ++ dev_err_probe(dev, PTR_ERR(clk), "failed to get ddr fab clk\n"); ++ goto err_ddr; ++ } ++ ++ clk_prepare_enable(clk); ++ data->ddr_clk = clk; ++ ++ ret = dev_pm_opp_of_add_table(dev); ++ if (ret) { ++ dev_err(dev, "failed to parse fab freq thresholds\n"); ++ return ret; ++ } ++ ++ dev_set_drvdata(dev, data); ++ ++ devfreq = devm_devfreq_add_device(&pdev->dev, &ipq806x_fab_devfreq_profile, ++ DEVFREQ_GOV_PASSIVE, &devfreq_gov_data); ++ if (IS_ERR(devfreq)) ++ dev_pm_opp_remove_table(dev); ++ ++ return PTR_ERR_OR_ZERO(devfreq); ++ ++err_ddr: ++ clk_unprepare(data->fab_clk); ++ clk_put(data->fab_clk); ++ return PTR_ERR(clk); ++}; ++ ++static int ipq806x_fab_remove(struct platform_device *pdev) ++{ ++ struct ipq806x_fab_data *data = dev_get_drvdata(&pdev->dev); ++ ++ clk_unprepare(data->fab_clk); ++ clk_put(data->fab_clk); ++ ++ clk_unprepare(data->ddr_clk); ++ clk_put(data->ddr_clk); ++ ++ dev_pm_opp_remove_table(&pdev->dev); ++ ++ return 0; ++}; ++ ++static const struct of_device_id ipq806x_fab_match_table[] = { ++ { .compatible = "qcom,fab-scaling" }, ++ {} ++}; ++ ++static struct platform_driver ipq806x_fab_driver = { ++ .probe = ipq806x_fab_probe, ++ .remove = ipq806x_fab_remove, ++ .driver = { ++ .name = "ipq806x-fab-scaling", ++ .of_match_table = ipq806x_fab_match_table, ++ }, ++}; ++module_platform_driver(ipq806x_fab_driver); ++ ++MODULE_DESCRIPTION("ipq806x Fab Scaling driver"); ++MODULE_AUTHOR("Christian Marangi "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ipq806x/patches-6.1/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch b/target/linux/ipq806x/patches-6.1/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch new file mode 100644 index 0000000000..24e0ecf619 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch @@ -0,0 +1,48 @@ +From c3573f0907dadb0a6e9933aae2a46a489abcbd48 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 16 Jun 2022 20:03:05 +0200 +Subject: [PATCH 4/4] ARM: dts: qcom: add fab scaling node for ipq806x + +Add fabric scaling node for ipq806x to correctly scale apps and ddr +fabric clk. + +Signed-off-by: Christian Marangi +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -170,6 +170,18 @@ + }; + }; + ++ opp_table_fab: opp_table_fab { ++ compatible = "operating-points-v2"; ++ ++ opp-533000000 { ++ opp-hz = /bits/ 64 <533000000>; ++ }; ++ ++ opp-400000000 { ++ opp-hz = /bits/ 64 <400000000>; ++ }; ++ }; ++ + thermal-zones { + sensor0-thermal { + polling-delay-passive = <0>; +@@ -1409,6 +1421,13 @@ + operating-points-v2 = <&opp_table_l2>; + }; + ++ fab-scaling { ++ compatible = "qcom,fab-scaling"; ++ clocks = <&rpmcc RPM_APPS_FABRIC_A_CLK>, <&rpmcc RPM_EBI1_A_CLK>; ++ clock-names = "apps-fab-clk", "ddr-fab-clk"; ++ operating-points-v2 = <&opp_table_fab>; ++ }; ++ + lpass@28100000 { + compatible = "qcom,lpass-cpu"; + status = "disabled"; diff --git a/target/linux/ipq806x/patches-6.1/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch b/target/linux/ipq806x/patches-6.1/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch new file mode 100644 index 0000000000..c30c245d0a --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch @@ -0,0 +1,47 @@ +From 666c1b745e93ccddde841d5057c33f97b29a316a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 15 Sep 2022 02:19:28 +0200 +Subject: [PATCH 3/9] clk: qcom: krait-cc: handle qsb clock defined in DTS + +qsb fixed clk may be defined in DTS and correctly passed in the clocks +list. Add related code to handle this and modify the logic to +dynamically read qsb clock frequency. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/krait-cc.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -348,7 +348,7 @@ static int krait_cc_probe(struct platfor + { + struct device *dev = &pdev->dev; + const struct of_device_id *id; +- unsigned long cur_rate, aux_rate; ++ unsigned long cur_rate, aux_rate, qsb_rate; + int cpu; + struct clk_hw *mux, *l2_pri_mux; + struct clk *clk, **clks; +@@ -357,11 +357,19 @@ static int krait_cc_probe(struct platfor + if (!id) + return -ENODEV; + +- /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ +- clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); ++ /* ++ * Per Documentation qsb should be provided from DTS. ++ * To address old implementation, register the fixed clock anyway. ++ * Rate is 1 because 0 causes problems for __clk_mux_determine_rate ++ */ ++ clk = clk_get(dev, "qsb"); ++ if (IS_ERR(clk)) ++ clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); + if (IS_ERR(clk)) + return PTR_ERR(clk); + ++ qsb_rate = clk_get_rate(clk); ++ + if (!id->data) { + clk = clk_register_fixed_factor(dev, "acpu_aux", + "gpll0_vote", 0, 1, 2); diff --git a/target/linux/ipq806x/patches-6.1/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch b/target/linux/ipq806x/patches-6.1/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch new file mode 100644 index 0000000000..e2f78f79fb --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/122-02-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch @@ -0,0 +1,36 @@ +From fca6f185a9d9ef0892a719bc6da955b22d326ec7 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 15 Sep 2022 02:24:33 +0200 +Subject: [PATCH 4/9] clk: qcom: krait-cc: register REAL qsb fixed clock + +With some tools it was discovered the real frequency of the qsb fixed +clock. While not 100% correct it's still better than using 1 as a dummy +frequency. +Correctly register the qsb fixed clock with the frequency of 225 MHz +instead of 1. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/krait-cc.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -25,6 +25,8 @@ enum { + clks_max, + }; + ++#define QSB_RATE 2250000000 ++ + static unsigned int sec_mux_map[] = { + 2, + 0, +@@ -364,7 +366,7 @@ static int krait_cc_probe(struct platfor + */ + clk = clk_get(dev, "qsb"); + if (IS_ERR(clk)) +- clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); ++ clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, QSB_RATE); + if (IS_ERR(clk)) + return PTR_ERR(clk); + diff --git a/target/linux/ipq806x/patches-6.1/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch b/target/linux/ipq806x/patches-6.1/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch new file mode 100644 index 0000000000..d95a63fc44 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/122-03-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch @@ -0,0 +1,44 @@ +From 2399d181557d94ae9a2686926cd25768f132e4b4 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Fri, 18 Mar 2022 16:12:14 +0100 +Subject: [PATCH 7/9] clk: qcom: krait-cc: drop pr_info and use dev_info + +Replace pr_info() with dev_info() to provide better diagnostics. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/krait-cc.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -423,25 +423,25 @@ static int krait_cc_probe(struct platfor + cur_rate = clk_get_rate(clks[l2_mux]); + aux_rate = 384000000; + if (cur_rate < aux_rate) { +- pr_info("L2 @ Undefined rate. Forcing new rate.\n"); ++ dev_info(dev, "L2 @ Undefined rate. Forcing new rate.\n"); + cur_rate = aux_rate; + } + clk_set_rate(clks[l2_mux], aux_rate); + clk_set_rate(clks[l2_mux], 2); + clk_set_rate(clks[l2_mux], cur_rate); +- pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); ++ dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); + for_each_possible_cpu(cpu) { + clk = clks[cpu]; + cur_rate = clk_get_rate(clk); + if (cur_rate < aux_rate) { +- pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu); ++ dev_info(dev, "CPU%d @ Undefined rate. Forcing new rate.\n", cpu); + cur_rate = aux_rate; + } + + clk_set_rate(clk, aux_rate); + clk_set_rate(clk, 2); + clk_set_rate(clk, cur_rate); +- pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); ++ dev_info(dev, "CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); + } + + of_clk_add_provider(dev->of_node, krait_of_get, clks); diff --git a/target/linux/ipq806x/patches-6.1/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch b/target/linux/ipq806x/patches-6.1/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch new file mode 100644 index 0000000000..8f88e06991 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/122-04-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch @@ -0,0 +1,88 @@ +From 6a77cf3f5f95ec0058e1b4d1ada018748cb0b83b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Thu, 15 Sep 2022 03:33:13 +0200 +Subject: [PATCH 9/9] clk: qcom: krait-cc: rework mux reset logic and reset + hfpll + +Rework and clean mux reset logic. +Compact it to a for loop to handle both CPU and L2 in one place. +Move hardcoded aux_rate to define and add a new hfpll_rate value to +reset hfpll settings. +Change logic to now reset the hfpll to the lowest value of 600 Mhz and +then restoring the previous frequency. This permits to reset the hfpll if +the primary mux was set to source out of the secondary mux. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/krait-cc.c | 50 +++++++++++++++++-------------------- + 1 file changed, 23 insertions(+), 27 deletions(-) + +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -25,7 +25,9 @@ enum { + clks_max, + }; + +-#define QSB_RATE 2250000000 ++#define QSB_RATE 225000000 ++#define AUX_RATE 384000000 ++#define HFPLL_RATE 600000000 + + static unsigned int sec_mux_map[] = { + 2, +@@ -350,7 +352,7 @@ static int krait_cc_probe(struct platfor + { + struct device *dev = &pdev->dev; + const struct of_device_id *id; +- unsigned long cur_rate, aux_rate, qsb_rate; ++ unsigned long cur_rate, qsb_rate; + int cpu; + struct clk_hw *mux, *l2_pri_mux; + struct clk *clk, **clks; +@@ -420,28 +422,29 @@ static int krait_cc_probe(struct platfor + * two different rates to force a HFPLL reinit under all + * circumstances. + */ +- cur_rate = clk_get_rate(clks[l2_mux]); +- aux_rate = 384000000; +- if (cur_rate < aux_rate) { +- dev_info(dev, "L2 @ Undefined rate. Forcing new rate.\n"); +- cur_rate = aux_rate; +- } +- clk_set_rate(clks[l2_mux], aux_rate); +- clk_set_rate(clks[l2_mux], 2); +- clk_set_rate(clks[l2_mux], cur_rate); +- dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); +- for_each_possible_cpu(cpu) { ++ for (cpu = 0; cpu < 5; cpu++) { ++ const char *l2_s = "L2"; ++ char cpu_s[5]; ++ + clk = clks[cpu]; ++ if (!clk) ++ continue; ++ ++ if (cpu < 4) ++ snprintf(cpu_s, 5, "CPU%d", cpu); ++ + cur_rate = clk_get_rate(clk); +- if (cur_rate < aux_rate) { +- dev_info(dev, "CPU%d @ Undefined rate. Forcing new rate.\n", cpu); +- cur_rate = aux_rate; ++ if (cur_rate < AUX_RATE) { ++ dev_info(dev, "%s @ Undefined rate. Forcing new rate.\n", ++ cpu < 4 ? cpu_s : l2_s); ++ cur_rate = AUX_RATE; + } + +- clk_set_rate(clk, aux_rate); +- clk_set_rate(clk, 2); ++ clk_set_rate(clk, AUX_RATE); ++ clk_set_rate(clk, HFPLL_RATE); + clk_set_rate(clk, cur_rate); +- dev_info(dev, "CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); ++ dev_info(dev, "%s @ %lu KHz\n", cpu < 4 ? cpu_s : l2_s, ++ clk_get_rate(clk) / 1000); + } + + of_clk_add_provider(dev->of_node, krait_of_get, clks); diff --git a/target/linux/ipq806x/patches-6.1/122-05-clk-qcom-clk-krait-generilize-div-functions.patch b/target/linux/ipq806x/patches-6.1/122-05-clk-qcom-clk-krait-generilize-div-functions.patch new file mode 100644 index 0000000000..a7c0f046c8 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/122-05-clk-qcom-clk-krait-generilize-div-functions.patch @@ -0,0 +1,156 @@ +From 908c361b3c3a139eb3e6a798cb620a6da7514d5c Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Fri, 23 Sep 2022 19:05:39 +0200 +Subject: [PATCH 2/4] clk: qcom: clk-krait: generilize div functions + +Generilize div functions and remove hardcode to a divisor of 2. +This is just a cleanup and permit to make it more clear the settings of +the devisor when used by the krait-cc driver. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/clk-krait.c | 57 ++++++++++++++++++++---------------- + drivers/clk/qcom/clk-krait.h | 11 ++++--- + drivers/clk/qcom/krait-cc.c | 7 +++-- + 3 files changed, 42 insertions(+), 33 deletions(-) + +--- a/drivers/clk/qcom/clk-krait.c ++++ b/drivers/clk/qcom/clk-krait.c +@@ -97,53 +97,58 @@ const struct clk_ops krait_mux_clk_ops = + EXPORT_SYMBOL_GPL(krait_mux_clk_ops); + + /* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */ +-static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate, ++static long krait_div_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) + { +- *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2); +- return DIV_ROUND_UP(*parent_rate, 2); ++ struct krait_div_clk *d = to_krait_div_clk(hw); ++ ++ *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), ++ rate * d->divisor); ++ ++ return DIV_ROUND_UP(*parent_rate, d->divisor); + } + +-static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate, ++static int krait_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) + { +- struct krait_div2_clk *d = to_krait_div2_clk(hw); ++ struct krait_div_clk *d = to_krait_div_clk(hw); ++ u8 div_val = krait_div_to_val(d->divisor); + unsigned long flags; +- u32 val; +- u32 mask = BIT(d->width) - 1; +- +- if (d->lpl) +- mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift; +- else +- mask <<= d->shift; ++ u32 regval; + + spin_lock_irqsave(&krait_clock_reg_lock, flags); +- val = krait_get_l2_indirect_reg(d->offset); +- val &= ~mask; +- krait_set_l2_indirect_reg(d->offset, val); ++ regval = krait_get_l2_indirect_reg(d->offset); ++ ++ regval &= ~(d->mask << d->shift); ++ regval |= (div_val & d->mask) << d->shift; ++ ++ if (d->lpl) { ++ regval &= ~(d->mask << (d->shift + LPL_SHIFT)); ++ regval |= (div_val & d->mask) << (d->shift + LPL_SHIFT); ++ } ++ ++ krait_set_l2_indirect_reg(d->offset, regval); + spin_unlock_irqrestore(&krait_clock_reg_lock, flags); + + return 0; + } + + static unsigned long +-krait_div2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) ++krait_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) + { +- struct krait_div2_clk *d = to_krait_div2_clk(hw); +- u32 mask = BIT(d->width) - 1; ++ struct krait_div_clk *d = to_krait_div_clk(hw); + u32 div; + + div = krait_get_l2_indirect_reg(d->offset); + div >>= d->shift; +- div &= mask; +- div = (div + 1) * 2; ++ div &= d->mask; + +- return DIV_ROUND_UP(parent_rate, div); ++ return DIV_ROUND_UP(parent_rate, krait_val_to_div(div)); + } + +-const struct clk_ops krait_div2_clk_ops = { +- .round_rate = krait_div2_round_rate, +- .set_rate = krait_div2_set_rate, +- .recalc_rate = krait_div2_recalc_rate, ++const struct clk_ops krait_div_clk_ops = { ++ .round_rate = krait_div_round_rate, ++ .set_rate = krait_div_set_rate, ++ .recalc_rate = krait_div_recalc_rate, + }; +-EXPORT_SYMBOL_GPL(krait_div2_clk_ops); ++EXPORT_SYMBOL_GPL(krait_div_clk_ops); +--- a/drivers/clk/qcom/clk-krait.h ++++ b/drivers/clk/qcom/clk-krait.h +@@ -25,17 +25,20 @@ struct krait_mux_clk { + + extern const struct clk_ops krait_mux_clk_ops; + +-struct krait_div2_clk { ++struct krait_div_clk { + u32 offset; +- u8 width; ++ u32 mask; ++ u8 divisor; + u32 shift; + bool lpl; + + struct clk_hw hw; + }; + +-#define to_krait_div2_clk(_hw) container_of(_hw, struct krait_div2_clk, hw) ++#define to_krait_div_clk(_hw) container_of(_hw, struct krait_div_clk, hw) ++#define krait_div_to_val(_div) ((_div) / 2) - 1 ++#define krait_val_to_div(_val) ((_val) + 1) * 2 + +-extern const struct clk_ops krait_div2_clk_ops; ++extern const struct clk_ops krait_div_clk_ops; + + #endif +--- a/drivers/clk/qcom/krait-cc.c ++++ b/drivers/clk/qcom/krait-cc.c +@@ -86,11 +86,11 @@ static int krait_notifier_register(struc + static struct clk_hw * + krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) + { +- struct krait_div2_clk *div; ++ struct krait_div_clk *div; + static struct clk_parent_data p_data[1]; + struct clk_init_data init = { + .num_parents = ARRAY_SIZE(p_data), +- .ops = &krait_div2_clk_ops, ++ .ops = &krait_div_clk_ops, + .flags = CLK_SET_RATE_PARENT, + }; + struct clk_hw *clk; +@@ -101,7 +101,8 @@ krait_add_div(struct device *dev, int id + if (!div) + return ERR_PTR(-ENOMEM); + +- div->width = 2; ++ div->mask = 0x3; ++ div->divisor = 2; + div->shift = 6; + div->lpl = id >= 0; + div->offset = offset; diff --git a/target/linux/ipq806x/patches-6.1/123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch b/target/linux/ipq806x/patches-6.1/123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch new file mode 100644 index 0000000000..0df29a0787 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/123-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch @@ -0,0 +1,31 @@ +From ac84ac819a2e8fd3d87122b452c502a386c54437 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 5 Jul 2022 18:30:18 +0200 +Subject: [PATCH v2 4/4] clk: qcom: gcc-ipq806x: remove cc_register_board for + pxo and cxo + +Now that these clock are defined as fixed clk in dts, we can drop the +register_board_clk for cxo_board and pxo_board in gcc_ipq806x_probe. + +Signed-off-by: Christian Marangi +--- + drivers/clk/qcom/gcc-ipq806x.c | 8 -------- + 1 file changed, 8 deletions(-) + +--- a/drivers/clk/qcom/gcc-ipq806x.c ++++ b/drivers/clk/qcom/gcc-ipq806x.c +@@ -3386,14 +3386,6 @@ static int gcc_ipq806x_probe(struct plat + struct regmap *regmap; + int ret; + +- ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); +- if (ret) +- return ret; +- +- ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); +- if (ret) +- return ret; +- + if (of_machine_is_compatible("qcom,ipq8065")) { + ubi32_core1_src_clk.freq_tbl = clk_tbl_nss_ipq8065; + ubi32_core2_src_clk.freq_tbl = clk_tbl_nss_ipq8065; diff --git a/target/linux/ipq806x/patches-6.1/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq806x/patches-6.1/850-soc-add-qualcomm-syscon.patch new file mode 100644 index 0000000000..397c4481ab --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/850-soc-add-qualcomm-syscon.patch @@ -0,0 +1,121 @@ +From: Christian Lamparter +Subject: SoC: add qualcomm syscon +--- a/drivers/soc/qcom/Makefile ++++ b/drivers/soc/qcom/Makefile +@@ -23,6 +23,7 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o + obj-$(CONFIG_QCOM_SPM) += spm.o + obj-$(CONFIG_QCOM_STATS) += qcom_stats.o + obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o ++obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o + obj-$(CONFIG_QCOM_APR) += apr.o + obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o + obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o +--- a/drivers/soc/qcom/Kconfig ++++ b/drivers/soc/qcom/Kconfig +@@ -213,6 +213,13 @@ config QCOM_STATS + various SoC level low power modes statistics and export to debugfs + interface. + ++config QCOM_TCSR ++ tristate "QCOM Top Control and Status Registers" ++ depends on ARCH_QCOM ++ help ++ Say y here to enable TCSR support. The TCSR provides control ++ functions for various peripherals. ++ + config QCOM_WCNSS_CTRL + tristate "Qualcomm WCNSS control driver" + depends on ARCH_QCOM || COMPILE_TEST +--- /dev/null ++++ b/drivers/soc/qcom/qcom_tcsr.c +@@ -0,0 +1,64 @@ ++/* ++ * Copyright (c) 2014, The Linux foundation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License rev 2 and ++ * only rev 2 as published by the free Software foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define TCSR_USB_PORT_SEL 0xb0 ++ ++static int tcsr_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ const struct device_node *node = pdev->dev.of_node; ++ void __iomem *base; ++ u32 val; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) { ++ dev_err(&pdev->dev, "setting usb port select = %d\n", val); ++ writel(val, base + TCSR_USB_PORT_SEL); ++ } ++ ++ return 0; ++} ++ ++static const struct of_device_id tcsr_dt_match[] = { ++ { .compatible = "qcom,tcsr", }, ++ { }, ++}; ++ ++MODULE_DEVICE_TABLE(of, tcsr_dt_match); ++ ++static struct platform_driver tcsr_driver = { ++ .driver = { ++ .name = "tcsr", ++ .owner = THIS_MODULE, ++ .of_match_table = tcsr_dt_match, ++ }, ++ .probe = tcsr_probe, ++}; ++ ++module_platform_driver(tcsr_driver); ++ ++MODULE_AUTHOR("Andy Gross "); ++MODULE_DESCRIPTION("QCOM TCSR driver"); ++MODULE_LICENSE("GPL v2"); +--- /dev/null ++++ b/include/dt-bindings/soc/qcom,tcsr.h +@@ -0,0 +1,23 @@ ++/* Copyright (c) 2014, The Linux Foundation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 and ++ * only version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++#ifndef __DT_BINDINGS_QCOM_TCSR_H ++#define __DT_BINDINGS_QCOM_TCSR_H ++ ++#define TCSR_USB_SELECT_USB3_P0 0x1 ++#define TCSR_USB_SELECT_USB3_P1 0x2 ++#define TCSR_USB_SELECT_USB3_DUAL 0x3 ++ ++/* TCSR A/B REG */ ++#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0 ++#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1 ++ ++#endif diff --git a/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch b/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch new file mode 100644 index 0000000000..c9583549d0 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch @@ -0,0 +1,37 @@ +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1589,6 +1589,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN + + endchoice + ++config CMDLINE_OVERRIDE ++ bool "Use alternative cmdline from device tree" ++ help ++ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can ++ be used, this is not a good option for kernels that are shared across ++ devices. This setting enables using "chosen/cmdline-override" as the ++ cmdline if it exists in the device tree. ++ + config CMDLINE + string "Default kernel command string" + default "" +--- a/drivers/of/fdt.c ++++ b/drivers/of/fdt.c +@@ -1187,6 +1187,17 @@ int __init early_init_dt_scan_chosen(cha + if (p != NULL && l > 0) + strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE)); + ++ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different ++ * device tree option of chosen/bootargs-override. This is ++ * helpful on boards where u-boot sets bootargs, and is unable ++ * to be modified. ++ */ ++#ifdef CONFIG_CMDLINE_OVERRIDE ++ p = of_get_flat_dt_prop(node, "bootargs-override", &l); ++ if (p != NULL && l > 0) ++ strlcpy(cmdline, p, min((int)l, COMMAND_LINE_SIZE)); ++#endif ++ + handle_cmdline: + /* + * CONFIG_CMDLINE is meant to be a default in case nothing else diff --git a/target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch b/target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch new file mode 100644 index 0000000000..04e2a0c57e --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/901-01-ARM-decompressor-support-memory-start-validation-.patch @@ -0,0 +1,75 @@ +From 2f86b9b71a11f86e3d850214ab781ebb17d7260e Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Fri, 19 Jan 2024 19:48:30 +0100 +Subject: [PATCH v2 1/2] ARM: decompressor: support memory start validation for + appended DTB + +There is currently a problem with a very specific sets of kernel config +and AUTO_ZRELADDR. + +For the most common case AUTO_ZRELADDR check the PC register and +calculate the start of the physical memory. Then fdt_check_mem_start is +called to make sure the detected value makes sense by comparing it with +what is present in DTB in the memory nodes and if additional fixup are +required with the use of linux,usable-memory-range in the chosen node to +hardcode usable memory range in case some reserved space needs to be +addressed. With the help of this function the right address is +calculated and the kernel correctly decompress and loads. + +Things starts to become problematic when in the mix, +CONFIG_ARM_APPENDED_DTB is used. This is a particular kernel config is +used when legacy systems doesn't support passing a DTB directly and a +DTB is appended at the end of the image. + +In such case, fdt_check_mem_start is skipped in AUTO_ZRELADDR iteration +as the appended DTB can be augumented later with ATAGS passed from the +bootloader (if CONFIG_ARM_ATAG_DTB_COMPAT is enabled). + +The main problem and what this patch address is the fact that +fdt_check_mem_start is never called later when the appended DTB is +augumented, hence any fixup and validation is not done making AUTO_ZRELADDR +detection inconsistent and most of the time wrong. + +Add support in head.S for this by checking if AUTO_ZRELADDR is enabled +and calling fdt_check_mem_start with the appended DTB and the augumented +values permitting legacy device to provide info in DTB instead of +disabling AUTO_ZRELADDR and hardcoding the physical address offsets. + +Signed-off-by: Christian Marangi +Reviewed-by: Geert Uytterhoeven +Reviewed-by: Linus Walleij +--- + arch/arm/boot/compressed/head.S | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/arch/arm/boot/compressed/head.S ++++ b/arch/arm/boot/compressed/head.S +@@ -443,6 +443,28 @@ restart: adr r0, LC1 + add r6, r6, r5 + add r10, r10, r5 + add sp, sp, r5 ++ ++#ifdef CONFIG_AUTO_ZRELADDR ++ /* ++ * Validate calculated start of physical memory with appended DTB. ++ * In the first iteration for physical memory start calculation, ++ * we skipped validating it as it could have been augumented by ++ * ATAGS stored at an offset from the same start of physical memory. ++ * ++ * We now have parsed them and augumented the appended DTB if asked ++ * so we can finally validate the start of physical memory. ++ * ++ * This is needed to apply additional fixup with ++ * linux,usable-memory-range or to make sure AUTO_ZRELADDR detected ++ * the correct value. ++ */ ++ sub r0, r4, #TEXT_OFFSET @ revert to base address ++ mov r1, r8 @ use appended DTB ++ bl fdt_check_mem_start ++ ++ /* Determine final kernel image address. */ ++ add r4, r0, #TEXT_OFFSET ++#endif + dtb_check_done: + #endif + diff --git a/target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch b/target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch new file mode 100644 index 0000000000..2e4c4de545 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch @@ -0,0 +1,54 @@ +From 781d7cd4c3364e9d38fa12a342c5ad4c7e33a5ba Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Fri, 19 Jan 2024 20:33:10 +0100 +Subject: [PATCH v2 2/2] ARM: decompressor: add option to ignore MEM ATAGs + +Some bootloaders can pass broken MEM ATAGs that provide hardcoded +information about mounted RAM size and physical location. +Example booloader provide RAM of size 1.7Gb but actual mounted RAM +size is 512Mb causing kernel panic. + +Add option CONFIG_ARM_ATAG_DTB_COMPAT_IGNORE_MEM to ignore these ATAG +and not augument appended DTB memory node. + +Signed-off-by: Christian Marangi +Acked-by: Linus Walleij +--- + arch/arm/Kconfig | 12 ++++++++++++ + arch/arm/boot/compressed/atags_to_fdt.c | 4 ++++ + 2 files changed, 16 insertions(+) + +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1570,6 +1570,18 @@ config ARM_ATAG_DTB_COMPAT + bootloaders, this option allows zImage to extract the information + from the ATAG list and store it at run time into the appended DTB. + ++config ARM_ATAG_DTB_COMPAT_IGNORE_MEM ++ bool "Ignore MEM ATAG information from bootloader" ++ depends on ARM_ATAG_DTB_COMPAT ++ help ++ Some bootloaders can pass broken MEM ATAGs that provide hardcoded ++ information about mounted RAM size and physical location. ++ Example booloader provide RAM of size 1.7Gb but actual mounted RAM ++ size is 512Mb causing kernel panic. ++ ++ Enable this option if MEM ATAGs should be ignored and the memory ++ node in the appended DTB should NOT be augumented. ++ + choice + prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT + default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER +--- a/arch/arm/boot/compressed/atags_to_fdt.c ++++ b/arch/arm/boot/compressed/atags_to_fdt.c +@@ -169,6 +169,10 @@ int atags_to_fdt(void *atag_list, void * + setprop_string(fdt, "/chosen", "bootargs", + atag->u.cmdline.cmdline); + } else if (atag->hdr.tag == ATAG_MEM) { ++ /* Bootloader MEM ATAG are broken and should be ignored */ ++ if (IS_ENABLED(CONFIG_ARM_ATAG_DTB_COMPAT_IGNORE_MEM)) ++ continue; ++ + if (memcount >= sizeof(mem_reg_property)/4) + continue; + if (!atag->u.mem.size) diff --git a/target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch b/target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch new file mode 100644 index 0000000000..60b80fefe1 --- /dev/null +++ b/target/linux/ipq806x/patches-6.1/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch @@ -0,0 +1,197 @@ +From 13bb6d8dd9138927950a520a288401db82871dc9 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 21 Jan 2024 23:36:57 +0100 +Subject: [PATCH] ARM: decompressor: support for ATAGs rootblock parsing + +The command-line arguments provided by the boot loader will be +appended to a new device tree property: bootloader-args. + +If there is a property "append-rootblock" in DT under /chosen +and a root= option in bootloaders command line it will be parsed +and added to DT bootargs with the form: XX. + +This is usefull in dual boot systems, to get the current root partition +without afecting the rest of the system. + +Signed-off-by: Adrian Panella +[ reworked to a cleaner patch ] +Signed-off-by: Christian Marangi +--- + arch/arm/Kconfig | 10 +++ + arch/arm/boot/compressed/atags_to_fdt.c | 102 ++++++++++++++++++++++-- + init/main.c | 12 +++ + 3 files changed, 117 insertions(+), 7 deletions(-) + +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1599,6 +1599,16 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN + The command-line arguments provided by the boot loader will be + appended to the the device tree bootargs property. + ++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE ++ bool "Append rootblock parsing bootloader's kernel arguments" ++ help ++ The command-line arguments provided by the boot loader will be ++ appended to a new device tree property: bootloader-args. ++ ++ If there is a property "append-rootblock" in DT under /chosen ++ and a root= option in bootloaders command line it will be parsed ++ and added to DT bootargs with the form: XX. ++ + endchoice + + config CMDLINE_OVERRIDE +--- a/arch/arm/boot/compressed/atags_to_fdt.c ++++ b/arch/arm/boot/compressed/atags_to_fdt.c +@@ -3,7 +3,8 @@ + #include + #include + +-#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) || \ ++ defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) + #define do_extend_cmdline 1 + #else + #define do_extend_cmdline 0 +@@ -69,6 +70,83 @@ static uint32_t get_cell_size(const void + return cell_size; + } + ++/** ++ * taken from arch/x86/boot/string.c ++ * local_strstr - Find the first substring in a %NUL terminated string ++ * @s1: The string to be searched ++ * @s2: The string to search for ++ */ ++static char *local_strstr(const char *s1, const char *s2) ++{ ++ size_t l1, l2; ++ ++ l2 = strlen(s2); ++ if (!l2) ++ return (char *)s1; ++ l1 = strlen(s1); ++ while (l1 >= l2) { ++ l1--; ++ if (!memcmp(s1, s2, l2)) ++ return (char *)s1; ++ s1++; ++ } ++ return NULL; ++} ++ ++static char *append_rootblock(char *dest, const char *str, int len, void *fdt) ++{ ++ char *ptr, *end, *tmp; ++ const char *root="root="; ++ const char *find_rootblock; ++ int i, l; ++ const char *rootblock; ++ ++ find_rootblock = getprop(fdt, "/chosen", "find-rootblock", &l); ++ if (!find_rootblock) ++ find_rootblock = root; ++ ++ /* ARM doesn't have __HAVE_ARCH_STRSTR, so it was copied from x86 */ ++ ptr = local_strstr(str, find_rootblock); ++ if (!ptr) ++ return dest; ++ ++ end = strchr(ptr, ' '); ++ end = end ? (end - 1) : (strchr(ptr, 0) - 1); ++ ++ /* Some boards ubi.mtd=XX,ZZZZ, so let's check for '," too. */ ++ tmp = strchr(ptr, ','); ++ if (tmp) ++ end = end < tmp ? end : tmp - 1; ++ ++ /* ++ * find partition number ++ * (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX | ubi.mtd=XX,ZZZZ ) ++ */ ++ for (i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); ++ ++ ptr = end + 1; ++ ++ /* if append-rootblock property is set use it to append to command line */ ++ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); ++ if (rootblock != NULL) { ++ if (*dest != ' ') { ++ *dest = ' '; ++ dest++; ++ len++; ++ } ++ ++ if (len + l + i <= COMMAND_LINE_SIZE) { ++ memcpy(dest, rootblock, l); ++ dest += l - 1; ++ ++ memcpy(dest, ptr, i); ++ dest += i; ++ } ++ } ++ ++ return dest; ++} ++ + static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) + { + char cmdline[COMMAND_LINE_SIZE]; +@@ -86,13 +164,23 @@ static void merge_fdt_bootargs(void *fdt + ptr += len - 1; + } + +- /* and append the ATAG_CMDLINE */ + if (fdt_cmdline) { +- len = strlen(fdt_cmdline); +- if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { +- *ptr++ = ' '; +- memcpy(ptr, fdt_cmdline, len); +- ptr += len; ++ if (IS_ENABLED(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)) { ++ /* ++ * save original bootloader args ++ * and append ubi.mtd with root partition number ++ * to current cmdline ++ */ ++ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); ++ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); ++ } else { ++ /* and append the ATAG_CMDLINE */ ++ len = strlen(fdt_cmdline); ++ if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { ++ *ptr++ = ' '; ++ memcpy(ptr, fdt_cmdline, len); ++ ptr += len; ++ } + } + } + *ptr = '\0'; +--- a/init/main.c ++++ b/init/main.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -995,6 +996,17 @@ asmlinkage __visible void __init __no_sa + pr_notice("Kernel command line: %s\n", saved_command_line); + /* parameters may set static keys */ + jump_label_init(); ++ ++ /* Show bootloader's original command line for reference */ ++ if (IS_ENABLED(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) && of_chosen) { ++ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); ++ ++ if(prop) ++ pr_notice("Bootloader command line (ignored): %s\n", prop); ++ else ++ pr_notice("Bootloader command line not present\n"); ++ } ++ + parse_early_param(); + after_dashes = parse_args("Booting kernel", + static_command_line, __start___param, From d840d1fdf9ef7292ce8cfe8d91cde61535401a03 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:27:52 +0100 Subject: [PATCH 25/31] ipq806x: split files in 6.1 and 6.6 dedicated directory Since with recent kernel version DTS moved to a dedicated directory, it's required to split files to per kernel version to follow kernel version directory structure. Also makes use of DEVICE_DTS_DIR to target the correct DTS directory based on the kernel version. Signed-off-by: Christian Marangi --- .../arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | 0 .../boot/dts/qcom-ipq8064-ad7200-c2600.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq8064-ad7200.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-ap161.dts | 0 .../arm/boot/dts/qcom-ipq8064-asus-onhub.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-c2600.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-d7800.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-db149.dts | 0 .../arm/boot/dts/qcom-ipq8064-ea7500-v1.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-ea8500.dts | 0 .../arm/boot/dts/qcom-ipq8064-eax500.dtsi | 0 .../arm/boot/dts/qcom-ipq8064-fap-421e.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-g10.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 0 .../arm/boot/dts/qcom-ipq8064-r7500v2.dts | 0 .../boot/dts/qcom-ipq8064-tplink-onhub.dts | 0 .../arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts | 0 .../arm/boot/dts/qcom-ipq8064-vr2600v.dts | 0 .../arm/boot/dts/qcom-ipq8064-wg2600hp.dts | 0 .../arch/arm/boot/dts/qcom-ipq8064-wpq864.dts | 0 .../arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts | 0 .../arch/arm/boot/dts/qcom-ipq8065-ac400i.dts | 0 .../arm/boot/dts/qcom-ipq8065-nbg6817.dts | 0 .../arm/boot/dts/qcom-ipq8065-nighthawk.dtsi | 0 .../arch/arm/boot/dts/qcom-ipq8065-r7800.dts | 0 .../boot/dts/qcom-ipq8065-rt4230w-rev6.dts | 0 .../arm/boot/dts/qcom-ipq8065-tr4400-v2.dts | 0 .../arch/arm/boot/dts/qcom-ipq8065-xr450.dts | 0 .../arch/arm/boot/dts/qcom-ipq8065-xr500.dts | 0 .../arch/arm/boot/dts/qcom-ipq8068-ap3935.dts | 0 .../boot/dts/qcom-ipq8068-cryptid-common.dtsi | 0 .../arm/boot/dts/qcom-ipq8068-ecw5410.dts | 0 .../arch/arm/boot/dts/qcom-ipq8068-mr42.dts | 0 .../arch/arm/boot/dts/qcom-ipq8068-mr52.dts | 0 .../boot/dts/qcom/qcom-ipq8062-wg2600hp3.dts | 743 ++++++++++++++++++ .../dts/qcom/qcom-ipq8064-ad7200-c2600.dtsi | 487 ++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-ad7200.dts | 168 ++++ .../arm/boot/dts/qcom/qcom-ipq8064-ap148.dts | 219 ++++++ .../arm/boot/dts/qcom/qcom-ipq8064-ap161.dts | 254 ++++++ .../boot/dts/qcom/qcom-ipq8064-asus-onhub.dts | 92 +++ .../arm/boot/dts/qcom/qcom-ipq8064-c2600.dts | 126 +++ .../arm/boot/dts/qcom/qcom-ipq8064-d7800.dts | 485 ++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-db149.dts | 263 +++++++ .../boot/dts/qcom/qcom-ipq8064-ea7500-v1.dts | 120 +++ .../arm/boot/dts/qcom/qcom-ipq8064-ea8500.dts | 126 +++ .../boot/dts/qcom/qcom-ipq8064-eax500.dtsi | 317 ++++++++ .../boot/dts/qcom/qcom-ipq8064-fap-421e.dts | 413 ++++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-g10.dts | 383 +++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi | 545 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-r7500.dts | 415 ++++++++++ .../boot/dts/qcom/qcom-ipq8064-r7500v2.dts | 477 +++++++++++ .../dts/qcom/qcom-ipq8064-tplink-onhub.dts | 209 +++++ .../dts/qcom/qcom-ipq8064-unifi-ac-hd.dts | 315 ++++++++ .../boot/dts/qcom/qcom-ipq8064-vr2600v.dts | 515 ++++++++++++ .../boot/dts/qcom/qcom-ipq8064-wg2600hp.dts | 552 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8064-wpq864.dts | 557 +++++++++++++ .../dts/qcom/qcom-ipq8064-wxr-2533dhp.dts | 622 +++++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8065-ac400i.dts | 318 ++++++++ .../boot/dts/qcom/qcom-ipq8065-nbg6817.dts | 395 ++++++++++ .../boot/dts/qcom/qcom-ipq8065-nighthawk.dtsi | 541 +++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8065-r7800.dts | 46 ++ .../dts/qcom/qcom-ipq8065-rt4230w-rev6.dts | 601 ++++++++++++++ .../boot/dts/qcom/qcom-ipq8065-tr4400-v2.dts | 524 ++++++++++++ .../arm/boot/dts/qcom/qcom-ipq8065-xr450.dts | 44 ++ .../arm/boot/dts/qcom/qcom-ipq8065-xr500.dts | 44 ++ .../arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts | 358 +++++++++ .../dts/qcom/qcom-ipq8068-cryptid-common.dtsi | 236 ++++++ .../boot/dts/qcom/qcom-ipq8068-ecw5410.dts | 332 ++++++++ .../arm/boot/dts/qcom/qcom-ipq8068-mr42.dts | 233 ++++++ .../arm/boot/dts/qcom/qcom-ipq8068-mr52.dts | 258 ++++++ target/linux/ipq806x/image/Makefile | 1 + 73 files changed, 12334 insertions(+) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ap148.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ap161.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-c2600.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-d7800.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-db149.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-g10.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-r7500.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-r7800.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-xr450.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8065-xr500.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8068-mr42.dts (100%) rename target/linux/ipq806x/{files => files-6.1}/arch/arm/boot/dts/qcom-ipq8068-mr52.dts (100%) create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8062-wg2600hp3.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200-c2600.dtsi create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap148.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap161.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-asus-onhub.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-c2600.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-d7800.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-db149.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea7500-v1.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea8500.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-fap-421e.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-g10.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500v2.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-unifi-ac-hd.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-vr2600v.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wg2600hp.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wpq864.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wxr-2533dhp.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-ac400i.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nbg6817.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nighthawk.dtsi create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-r7800.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-rt4230w-rev6.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-tr4400-v2.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr450.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr500.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-cryptid-common.dtsi create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ecw5410.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr42.dts create mode 100644 target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr52.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ap148.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ap148.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ap161.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ap161.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-asus-onhub.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-c2600.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-c2600.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-d7800.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-d7800.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-db149.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-db149.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-g10.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-onhub.dtsi diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-r7500.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-r7500.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-tplink-onhub.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-ac400i.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-r7800.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-r7800.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-xr450.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr450.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-xr450.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-xr500.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-xr500.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-mr42.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-mr42.dts diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-mr52.dts similarity index 100% rename from target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts rename to target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8068-mr52.dts diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8062-wg2600hp3.dts new file mode 100644 index 0000000000..76751910e0 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8062-wg2600hp3.dts @@ -0,0 +1,743 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8062-smb208.dtsi" +#include +#include + +/ { + model = "NEC Platforms Aterm WG2600HP3"; + compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064"; + + memory { + device_type = "memory"; + reg = <0x42000000 0x1e000000>; + }; + + aliases { + label-mac-device = &gmac2; + + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_red; + }; + + keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&buttons_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + mode0 { + label = "mode0"; + gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + + mode1 { + label = "mode1"; + gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&leds_pins>; + pinctrl-names = "default"; + + led_power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>; + }; + + led_power_red: power_red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>; + }; + + active_green { + label = "green:active"; + gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>; + }; + + active_red { + label = "red:active"; + gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_green { + label = "green:wlan2g"; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + + wlan2g_red { + label = "red:wlan2g"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + wlan5g_green { + label = "green:wlan5g"; + gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g_red { + label = "red:wlan5g"; + gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>; + }; + + tv_green { + label = "green:tv"; + gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>; + }; + + tv_red { + label = "red:tv"; + gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>; + }; + + converter_green { + label = "green:converter"; + gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>; + }; + + converter_red { + label = "red:converter"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +/* nand_pins are used for leds_pins, empty the node + * from ipq8064.dtsi + */ +&nand_pins { + /delete-property/ disable; + /delete-property/ pullups; + /delete-property/ hold; +}; + +&qcom_pinmux { + pinctrl-0 = <&akro_pins>; + pinctrl-names = "default"; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + drive-strength = <10>; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + buttons_pins: buttons_pins { + mux { + pins = "gpio22", "gpio24", "gpio40", + "gpio41"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + leds_pins: leds_pins { + mux { + pins = "gpio14", "gpio15", "gpio35", + "gpio36", "gpio38", "gpio42", + "gpio43", "gpio46", "gpio55", + "gpio56", "gpio57", "gpio58"; + function = "gpio"; + bias-pull-down; + }; + + akro2 { + pins = "gpio15", "gpio35", "gpio38", + "gpio42", "gpio43", "gpio46", + "gpio55", "gpio56", "gpio57", + "gpio58"; + drive-strength = <2>; + }; + + akro4 { + pins = "gpio14", "gpio36"; + drive-strength = <4>; + }; + }; + + /* + * Stock firmware has the following settings, so let's do the same. + * I don't sure why these are required. + */ + akro_pins: akro_pinmux { + akro { + pins = "gpio17", "gpio26", "gpio47"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + reset { + pins = "gpio45"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + gmac0_rgmii { + pins = "gpio25"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + }; +}; + +&gsbi5 { + status = "okay"; + qcom,mode = ; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0000000 0x0020000>; + read-only; + }; + + partition@20000 { + label = "MIBIB"; + reg = <0x0020000 0x0020000>; + read-only; + }; + + partition@40000 { + label = "SBL2"; + reg = <0x0040000 0x0040000>; + read-only; + }; + + partition@80000 { + label = "SBL3"; + reg = <0x0080000 0x0080000>; + read-only; + }; + + partition@100000 { + label = "DDRCONFIG"; + reg = <0x0100000 0x0010000>; + read-only; + }; + + partition@110000 { + label = "SSD"; + reg = <0x0110000 0x0010000>; + read-only; + }; + + partition@120000 { + label = "TZ"; + reg = <0x0120000 0x0080000>; + read-only; + }; + + partition@1a0000 { + label = "RPM"; + reg = <0x01a0000 0x0080000>; + read-only; + }; + + partition@220000 { + label = "APPSBL"; + reg = <0x0220000 0x0080000>; + read-only; + }; + + partition@2a0000 { + label = "APPSBLENV"; + reg = <0x02a0000 0x0010000>; + read-only; + }; + + factory: partition@2b0000 { + label = "PRODUCTDATA"; + reg = <0x02b0000 0x0030000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_PRODUCTDATA_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_PRODUCTDATA_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; + }; + + partition@2e0000 { + label = "ART"; + reg = <0x02e0000 0x0040000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@320000 { + label = "TP"; + reg = <0x0320000 0x0040000>; + read-only; + }; + + partition@360000 { + label = "TINY"; + reg = <0x0360000 0x0500000>; + read-only; + }; + + partition@860000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x0860000 0x17a0000>; + }; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + + qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3"; + + nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + force_gen1 = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + + ieee80211-freq-limit = <2400000 2483000>; + qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3"; + + nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + function-enumerator = <1>; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_WAN; + function-enumerator = <2>; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_WAN; + function-enumerator = <3>; + default-state = "keep"; + }; + }; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + default-state = "keep"; + }; + }; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + default-state = "keep"; + }; + }; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + default-state = "keep"; + }; + }; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + default-state = "keep"; + }; + }; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + qca,sgmii-rxclk-falling-edge; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + qcom,id = <1>; + mdiobus = <&mdio0>; + nvmem-cells = <&macaddr_factory_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + mdiobus = <&mdio0>; + nvmem-cells = <&macaddr_factory_6>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200-c2600.dtsi new file mode 100644 index 0000000000..f306201754 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200-c2600.dtsi @@ -0,0 +1,487 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include + +/ { + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + ramoops@42100000 { + compatible = "ramoops"; + reg = <0x42100000 0x40000>; + record-size = <0x4000>; + console-size = <0x4000>; + ftrace-size = <0x4000>; + pmsg-size = <0x4000>; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + label-mac-device = &gmac2; + }; +}; + +&qcom_pinmux { + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + usb0_pwr_en_pin: usb0_pwr_en_pin { + mux { + pins = "gpio25"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + output-high; + }; + }; + + usb1_pwr_en_pin: usb1_pwr_en_pin { + mux { + pins = "gpio23"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + output-high; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "MIBIB"; + reg = <0x20000 0x20000>; + read-only; + }; + + partition@40000 { + label = "SBL2"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "SBL3"; + reg = <0x60000 0x30000>; + read-only; + }; + + partition@90000 { + label = "DDRCONFIG"; + reg = <0x90000 0x10000>; + read-only; + }; + + partition@a0000 { + label = "SSD"; + reg = <0xa0000 0x10000>; + read-only; + }; + + partition@b0000 { + label = "TZ"; + reg = <0xb0000 0x30000>; + read-only; + }; + + partition@e0000 { + label = "RPM"; + reg = <0xe0000 0x20000>; + read-only; + }; + + partition@100000 { + label = "fs-uboot"; + reg = <0x100000 0x70000>; + read-only; + }; + + partition@170000 { + label = "uboot-env"; + reg = <0x170000 0x40000>; + read-only; + }; + + partition@1b0000 { + label = "radio"; + reg = <0x1b0000 0x40000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_radio_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_radio_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@1f0000 { + label = "os-image"; + reg = <0x1f0000 0x400000>; + }; + + partition@5f0000 { + label = "rootfs"; + reg = <0x5f0000 0x1900000>; + }; + + defaultmac: partition@1ef0000 { + label = "default-mac"; + reg = <0x1ef0000 0x00200>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_defaultmac_8: macaddr@8 { + compatible = "mac-base"; + reg = <0x8 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@1ef0200 { + label = "pin"; + reg = <0x1ef0200 0x00200>; + read-only; + }; + + partition@1ef0400 { + label = "product-info"; + reg = <0x1ef0400 0x0fc00>; + read-only; + }; + + partition@1f00000 { + label = "partition-table"; + reg = <0x1f00000 0x10000>; + read-only; + }; + + partition@1f10000 { + label = "soft-version"; + reg = <0x1f10000 0x10000>; + read-only; + }; + + partition@1f20000 { + label = "support-list"; + reg = <0x1f20000 0x10000>; + read-only; + }; + + partition@1f30000 { + label = "profile"; + reg = <0x1f30000 0x10000>; + read-only; + }; + + partition@1f40000 { + label = "default-config"; + reg = <0x1f40000 0x10000>; + read-only; + }; + + partition@1f50000 { + label = "user-config"; + reg = <0x1f50000 0x40000>; + read-only; + }; + + partition@1f90000 { + label = "qos-db"; + reg = <0x1f90000 0x40000>; + read-only; + }; + + partition@1fd0000 { + label = "usb-config"; + reg = <0x1fd0000 0x10000>; + read-only; + }; + + partition@1fe0000 { + label = "log"; + reg = <0x1fe0000 0x20000>; + read-only; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb0_pwr_en_pin>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb1_pwr_en_pin>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_defaultmac_8 (-1)>, <&precal_radio_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_defaultmac_8 0>, <&precal_radio_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_defaultmac_8 1>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_defaultmac_8 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200.dts new file mode 100644 index 0000000000..6e4c9bc773 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ad7200.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include + +#include "qcom-ipq8064-ad7200-c2600.dtsi" + +/ { + model = "TP-Link Talon AD7200"; + compatible = "tplink,ad7200", "qcom,ipq8064"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + led_enable { + label = "led-enable"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + lan { + function = LED_FUNCTION_LAN; + color = ; + gpios = <&qcom_pinmux 2 GPIO_ACTIVE_HIGH>; + }; + + usb1 { + label = "blue:usb1"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "blue:wlan5g"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>; + }; + + usb3 { + label = "blue:usb3"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>; + }; + + wan_orange { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + wan_blue { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + }; + + wlan60g { + label = "blue:wlan60g"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + led_status: status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio53", "gpio54", "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio2", "gpio8", "gpio15", "gpio16", "gpio17", "gpio26", + "gpio33", "gpio55", "gpio56", "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&mdio0 { + switch@10 { + ports { + port@1 { + label = "wan"; + }; + + port@2 { + label = "lan1"; + }; + + port@3 { + label = "lan2"; + }; + + port@4 { + label = "lan3"; + }; + + port@5 { + label = "lan4"; + }; + }; + }; +}; + +&pcie2 { + status = "okay"; + max-link-speed = <1>; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap148.dts new file mode 100644 index 0000000000..bd8f0d6019 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap148.dts @@ -0,0 +1,219 @@ +#include "qcom-ipq8064-v1.0.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ8064/AP-148"; + compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&flash { + partitions { + compatible = "qcom,smem-part"; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap161.dts new file mode 100644 index 0000000000..9d0b451f43 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ap161.dts @@ -0,0 +1,254 @@ +#include "qcom-ipq8064-v1.0.dtsi" + +/ { + model = "Qualcomm IPQ8064/AP161"; + compatible = "qcom,ipq8064-ap161", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + }; +}; + +&qcom_pinmux { + rgmii2_pins: rgmii2-pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62", + "gpio2", "gpio66"; + }; + }; +}; + +&flash { + partitions { + compatible = "qcom,smem-part"; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; +}; + +&pcie2 { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; + + phy3: ethernet-phy@3 { + device_type = "ethernet-phy"; + reg = <3>; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + mdiobus = <&mdio0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + mdiobus = <&mdio0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + mdiobus = <&mdio0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-asus-onhub.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-asus-onhub.dts new file mode 100644 index 0000000000..442bcf19a6 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-asus-onhub.dts @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-onhub.dtsi" +#include +#include +#include + +/ { + model = "ASUS OnHub"; + compatible = "asus,onhub", "google,arkham", "qcom,ipq8064"; +}; + +&qcom_pinmux { + ap3223_pins: ap3223_pinmux { + pins = "gpio22"; + function = "gpio"; + bias-none; + }; + + i2c7_pins: i2c7_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi7"; + }; + data { + pins = "gpio8"; + bias-disable; + }; + clk { + pins = "gpio9"; + bias-disable; + }; + }; +}; + +&gsbi7 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi7_i2c { + status = "okay"; + clock-frequency = <100000>; + pinctrl-0 = <&i2c7_pins>; + pinctrl-names = "default"; + + ap3223@1c { + compatible = "dynaimage,ap3223"; + reg = <0x1c>; + + pinctrl-0 = <&ap3223_pins>; + pinctrl-names = "default"; + + int-gpio = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + }; + + led-controller@32 { + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "red:status"; + led-cur = /bits/ 8 <0xfa>; + max-cur = /bits/ 8 <0xff>; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-c2600.dts new file mode 100644 index 0000000000..b8cb25ede0 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-c2600.dts @@ -0,0 +1,126 @@ +#include + +#include "qcom-ipq8064-ad7200-c2600.dtsi" + +/ { + model = "TP-Link Archer C2600"; + compatible = "tplink,c2600", "qcom,ipq8064"; + + aliases { + led-boot = &power; + led-failsafe = &general; + led-running = &power; + led-upgrade = &general; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + ledswitch { + label = "ledswitch"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + lan { + function = LED_FUNCTION_LAN; + color = ; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>; + }; + + usb4 { + label = "white:usb_4"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb_2"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + wan_amber { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + wan_white { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + general: general { + label = "white:general"; + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio16", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33", + "gpio53", "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-d7800.dts new file mode 100644 index 0000000000..8077c3a090 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-d7800.dts @@ -0,0 +1,485 @@ +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Netgear Nighthawk X4 D7800"; + compatible = "netgear,d7800", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + rsvd@5fe00000 { + reg = <0x5fe00000 0x200000>; + reusable; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &power_white; + led-failsafe = &power_amber; + led-running = &power_white; + led-upgrade = &power_amber; + }; + + chosen { + bootargs = "rootfstype=squashfs noinitrd"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + usb1 { + label = "white:usb1"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb2"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + power_amber: power_amber { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + wan_white { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + wan_amber { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + + esata { + label = "white:esata"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + + power_white: power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wifi { + label = "white:wifi"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", + "gpio24","gpio26", "gpio53", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + usb0_pwr_en_pins: usb0_pwr_en_pins { + mux { + pins = "gpio15"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; + + usb1_pwr_en_pins: usb1_pwr_en_pins { + mux { + pins = "gpio16", "gpio68"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; +}; + +&sata_phy { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb0_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb1_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie2 { + status = "okay"; + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie2_pins>; + pinctrl-names = "default"; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1180000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qcadata@0 { + label = "qcadata"; + reg = <0x0000000 0x0c80000>; + read-only; + }; + + APPSBL@c80000 { + label = "APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + APPSBLENV@1180000 { + label = "APPSBLENV"; + reg = <0x1180000 0x0080000>; + read-only; + }; + + art@1200000 { + label = "art"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + artbak: art@1340000 { + label = "artbak"; + reg = <0x1340000 0x0140000>; + read-only; + }; + + kernel@1480000 { + label = "kernel"; + reg = <0x1480000 0x0400000>; + }; + + ubi@1880000 { + label = "ubi"; + reg = <0x1880000 0x6080000>; + }; + + reserve@7900000 { + label = "reserve"; + reg = <0x7900000 0x0700000>; + read-only; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_art_6 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-db149.dts new file mode 100644 index 0000000000..063f27c6d2 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-db149.dts @@ -0,0 +1,263 @@ +#include "qcom-ipq8064-v1.0.dtsi" + +/ { + model = "Qualcomm IPQ8064/DB149"; + compatible = "qcom,ipq8064-db149", "qcom,ipq8064"; + + aliases { + serial0 = &gsbi2_serial; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; +}; + +&qcom_pinmux { + rgmii0_pins: rgmii0_pins { + mux { + pins = "gpio2", "gpio66"; + drive-strength = <8>; + bias-disable; + }; + }; +}; + +&gsbi2 { + qcom,mode = ; + status = "okay"; + + gsbi2_serial: serial@12490000 { + status = "okay"; + }; +}; + +&gsbi4 { + status = "disabled"; +}; + +&gsbi4_serial { + status = "disabled"; +}; + +&flash { + m25p,fast-read; + + partition@0 { + label = "lowlevel_init"; + reg = <0x0 0x1b0000>; + }; + + partition@1 { + label = "u-boot"; + reg = <0x1b0000 0x80000>; + }; + + partition@2 { + label = "u-boot-env"; + reg = <0x230000 0x40000>; + }; + + partition@3 { + label = "caldata"; + reg = <0x270000 0x40000>; + }; + + partition@4 { + label = "firmware"; + reg = <0x2b0000 0x1d50000>; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +&pcie2 { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + /* + port@6 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + */ + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; + + phy6: ethernet-phy@6 { + reg = <6>; + }; + + phy7: ethernet-phy@7 { + reg = <7>; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + + pinctrl-0 = <&rgmii0_pins>; + pinctrl-names = "default"; +}; + +&gmac1 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <1>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + phy-handle = <&phy6>; +}; + +&gmac3 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <3>; + phy-handle = <&phy7>; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea7500-v1.dts new file mode 100644 index 0000000000..2a565cc2db --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea7500-v1.dts @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include + +#include "qcom-ipq8064-eax500.dtsi" + +/ { + model = "Linksys EA7500 V1 WiFi Router"; + compatible = "linksys,ea7500-v1", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0xe000000>; + device_type = "memory"; + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + /* look for root deviceblock nbr in this bootarg */ + find-rootblock = "ubi.mtd="; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio65", "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio6"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&partitions { + partition@5f80000 { + label = "sysdiag"; + reg = <0x5f80000 0x100000>; + }; + + partition@6080000 { + label = "syscfg"; + reg = <0x6080000 0x1f80000>; + }; +}; + +&mdio0 { + switch@10 { + ports { + port@1 { + label = "wan"; + }; + + port@2 { + label = "lan1"; + }; + + port@3 { + label = "lan2"; + }; + + port@4 { + label = "lan3"; + }; + + port@5 { + label = "lan4"; + }; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea8500.dts new file mode 100644 index 0000000000..d9155081a5 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-ea8500.dts @@ -0,0 +1,126 @@ +#include + +#include "qcom-ipq8064-eax500.dtsi" + +/ { + model = "Linksys EA8500 WiFi Router"; + compatible = "linksys,ea8500", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + wifi { + label = "green:wifi"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio65", "gpio67", "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio6", "gpio53", "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&sata_phy { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&partitions { + partition@5f80000 { + label = "syscfg"; + reg = <0x5f80000 0x2080000>; + }; +}; + +&gmac1 { + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <1>; + qcom,rgmii_delay = <0>; + qcom,emulation = <0>; +}; + +/* LAN */ +&gmac2 { + qcom,phy_mdio_addr = <0>; /* none */ + qcom,poll_required = <0>; /* no polling */ + qcom,rgmii_delay = <0>; + qcom,emulation = <0>; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi new file mode 100644 index 0000000000..e5cc242419 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi @@ -0,0 +1,317 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include + +/ { + chosen { + bootargs = "console=ttyMSM0,115200n8"; + /* append to bootargs adding the root deviceblock nbr from bootloader */ + append-rootblock = "ubi.mtd="; + }; +}; + +&qcom_pinmux { + /* eax500 routers reuse the pcie2 reset pin for switch reset pin */ + switch_reset: switch_reset_pins { + mux { + pins = "gpio63"; + function = "gpio"; + drive-strength = <12>; + bias-pull-up; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + max-link-speed = <1>; +}; + +&pcie1 { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x0c80000>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x0040000 0x0140000>; + read-only; + }; + + partition@180000 { + label = "SBL2"; + reg = <0x0180000 0x0140000>; + read-only; + }; + + partition@2c0000 { + label = "SBL3"; + reg = <0x02c0000 0x0280000>; + read-only; + }; + + partition@540000 { + label = "DDRCONFIG"; + reg = <0x0540000 0x0120000>; + read-only; + }; + + partition@660000 { + label = "SSD"; + reg = <0x0660000 0x0120000>; + read-only; + }; + + partition@780000 { + label = "TZ"; + reg = <0x0780000 0x0280000>; + read-only; + }; + + partition@a00000 { + label = "RPM"; + reg = <0x0a00000 0x0280000>; + read-only; + }; + + art: partition@c80000 { + label = "art"; + reg = <0x0c80000 0x0140000>; + read-only; + }; + + partition@dc0000 { + label = "APPSBL"; + reg = <0x0dc0000 0x0100000>; + read-only; + }; + + partition@ec0000 { + label = "u_env"; + reg = <0x0ec0000 0x0040000>; + }; + + partition@f00000 { + label = "s_env"; + reg = <0x0f00000 0x0040000>; + }; + + partition@f40000 { + label = "devinfo"; + reg = <0x0f40000 0x0040000>; + }; + + partition@f80000 { + label = "kernel1"; + reg = <0x0f80000 0x2800000>; /* 4 MB, spill to rootfs */ + }; + + partition@1380000 { + label = "rootfs1"; + reg = <0x1380000 0x2400000>; + }; + + partition@3780000 { + label = "kernel2"; + reg = <0x3780000 0x2800000>; + }; + + partition@3b80000 { + label = "rootfs2"; + reg = <0x3b80000 0x2400000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + /* Switch from documentation require at least 10ms for reset */ + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + reset-post-delay-us = <12000>; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-fap-421e.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-fap-421e.dts new file mode 100644 index 0000000000..bb66c6c808 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-fap-421e.dts @@ -0,0 +1,413 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8064-smb208.dtsi" +#include +#include + +/ { + model = "Fortinet FAP-421E"; + compatible = "fortinet,fap-421e", "qcom,ipq8064"; + + memory@42000000 { + device_type = "memory"; + reg = <0x42000000 0xe000000>; + }; + + reserved-memory { + rsvd@41200000 { + no-map; + reg = <0x41200000 0x300000>; + }; + wifi_dump@44000000 { + no-map; + reg = <0x44000000 0x600000>; + }; + }; + + aliases { + led-boot = &led_power_yellow; + led-failsafe = &led_power_yellow; + led-running = &led_power_yellow; + led-upgrade = &led_power_yellow; + label-mac-device = &gmac0; + }; + + chosen { + bootargs-override = "console=ttyMSM0,9600n8"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + eth1-amber { + label = "amber:eth1"; + gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>; + }; + + eth1-yellow { + label = "yellow:eth1"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + eth2-amber { + label = "amber:eth2"; + gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>; + }; + + eth2-yellow { + label = "yellow:eth2"; + gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>; + }; + + power-amber { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>; + }; + + led_power_yellow: power-yellow { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>; + }; + + 2g-yellow { + label = "yellow:2g"; + gpios = <&qcom_pinmux 30 GPIO_ACTIVE_LOW>; + }; + + 5g-yellow { + label = "yellow:5g"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + bias-pull-up; + drive-strength = <2>; + pins = "gpio56"; + }; + }; + + led_pins: led_pins { + mux { + bias-pull-down; + drive-strength = <2>; + function = "gpio"; + output-low; + pins = "gpio23"; + }; + }; + + rgmii2_pins: rgmii2-pins { + mux { + bias-disable; + drive-strength = <16>; + function = "rgmii2"; + pins = "gpio66"; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + uart0_pins: uart0_pins { + mux { + bias-disable; + drive-strength = <12>; + function = "gsbi7"; + pins = "gpio6", "gpio7"; + }; + }; + + usb_pwr_en_pins: usb_pwr_en_pins { + mux { + pins = "gpio22"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-low; + }; + }; +}; + +&gsbi7 { + qcom,mode = ; + + status = "okay"; +}; + +&gsbi7_serial{ + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&gsbi5 { + qcom,mode = ; + + status = "okay"; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + m25p,fast-read; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "MIBIB"; + reg = <0x20000 0x20000>; + read-only; + }; + + partition@40000 { + label = "SBL2"; + reg = <0x40000 0x40000>; + read-only; + }; + + partition@80000 { + label = "SBL3"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "DDRCONFIG"; + reg = <0x100000 0x10000>; + read-only; + }; + + partition@110000 { + label = "SSD"; + reg = <0x110000 0x10000>; + read-only; + }; + + partition@120000 { + label = "TZ"; + reg = <0x120000 0x80000>; + read-only; + }; + + partition@1a0000 { + label = "RPM"; + reg = <0x1a0000 0x80000>; + read-only; + }; + + partition@220000 { + label = "APPSBL"; + reg = <0x220000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_appsbl_7ff80: mac-address@7ff80 { + compatible = "mac-base"; + reg = <0x7ff80 0xc>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@2a0000 { + label = "APPSBLENV"; + reg = <0x2a0000 0x40000>; + }; + + partition@2e0000 { + label = "ART"; + reg = <0x2e0000 0x40000>; + read-only; + }; + + partition@320000 { + label = "kernel"; + reg = <0x320000 0x600000>; + }; + + partition@920000 { + label = "ubi"; + reg = <0x920000 0x1400000>; + }; + + partition@1d20000 { + label = "reserved"; + reg = <0x1d20000 0x260000>; + read-only; + }; + + partition@1f80000 { + label = "config"; + reg = <0x1f80000 0x80000>; + read-only; + }; + }; + }; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_appsbl_7ff80 8>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&pcie1 { + status = "okay"; + + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_appsbl_7ff80 16>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + #address-cells = <0x1>; + #size-cells = <0x0>; + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, + <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; +}; + +&gmac0 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <0>; + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + nvmem-cells = <&macaddr_appsbl_7ff80 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + nvmem-cells = <&macaddr_appsbl_7ff80 1>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-g10.dts new file mode 100644 index 0000000000..24273291cb --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-g10.dts @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include +#include + +/ { + compatible = "asrock,g10", "qcom,ipq8064"; + model = "ASRock G10"; + + aliases { + ethernet0 = &gmac1; + ethernet1 = &gmac0; + + led-boot = &led_status_blue; + led-failsafe = &led_status_amber; + led-running = &led_status_blue; + led-upgrade = &led_status_amber; + }; + + chosen { + bootargs-override = "console=ttyMSM0,115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + /* + * this is a bit misleading. Because there are about seven + * multicolor LEDs connected all wired together in parallel. + */ + + status_yellow { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + led_status_amber: status_amber { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + /* + * LED is declared in vendors boardfile but it's not + * working and the manual doesn't mention anything + * about the LED being white. + + status_white { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + */ + }; + + i2c-gpio { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "i2c-gpio"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */ + <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <5>; + i2c-gpio,scl-output-only; + + mcu@50 { + reg = <0x50>; + compatible = "sonix,sn8f25e21"; + }; + }; + + keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + ir-remote { + label = "ir-remote"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps5g { + label = "wps5g"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps2g { + label = "wps2g"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi4_serial { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1200000>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi5g: wifi@1,0 { + reg = <0x00010000 0 0 0 0>; + compatible = "qcom,ath10k"; + qcom,ath10k-calibration-variant = "ASRock-G10"; + }; + }; +}; + +&pcie1 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2g: wifi@1,0 { + reg = <0x00010000 0 0 0 0>; + compatible = "qcom,ath10k"; + qcom,ath10k-calibration-variant = "ASRock-G10"; + }; + }; +}; + +&qcom_pinmux { + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio26"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio15", "gpio16", "gpio64", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + uart0_pins: uart0_pins { + mux { + pins = "gpio10", "gpio11"; + function = "gsbi4"; + drive-strength = <10>; + bias-disable; + }; + }; +}; + +&rpm { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&tcsr { + qcom,usb-ctrl-select = ; +}; + +/delete-node/ &pcie2_pins; +/delete-node/ &pcie2; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi new file mode 100644 index 0000000000..5b8de27ad6 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-onhub.dtsi @@ -0,0 +1,545 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-smb208.dtsi" +#include +#include +#include + +/ { + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac2; + mdio-gpio0 = &mdio; + serial0 = &gsbi4_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + dev { + label = "dev"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + mdio: mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, + <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + }; + }; + }; + + soc { + rng@1a500000 { + status = "disabled"; + }; + + sound { + compatible = "google,storm-audio"; + qcom,model = "ipq806x-storm"; + cpu = <&lpass>; + codec = <&max98357a>; + }; + + lpass: lpass@28100000 { + status = "okay"; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&mi2s_default>; + pinctrl-1 = <&mi2s_idle>; + }; + + max98357a: max98357a { + compatible = "maxim,max98357a"; + #sound-dai-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmode_pins>; + sdmode-gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + rgmii0_pins: rgmii0_pins { + mux { + pins = "gpio2", "gpio66"; + drive-strength = <8>; + bias-disable; + }; + }; + mi2s_pins { + mi2s_default: mi2s_default { + dout { + pins = "gpio32"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + sync { + pins = "gpio27"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + clk { + pins = "gpio28"; + function = "mi2s"; + drive-strength = <16>; + bias-disable; + }; + }; + mi2s_idle: mi2s_idle { + dout { + pins = "gpio32"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + sync { + pins = "gpio27"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + clk { + pins = "gpio28"; + function = "mi2s"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + mdio_pins: mdio_pins { + mux { + pins = "gpio0", "gpio1"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + rst { + pins = "gpio26"; + output-low; + }; + }; + + sdmode_pins: sdmode_pinmux { + pins = "gpio25"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + sdcc1_pins: sdcc1_pinmux { + mux { + pins = "gpio38", "gpio39", "gpio40", + "gpio41", "gpio42", "gpio43", + "gpio44", "gpio45", "gpio46", + "gpio47"; + function = "sdc1"; + }; + cmd { + pins = "gpio45"; + drive-strength = <10>; + bias-pull-up; + }; + data { + pins = "gpio38", "gpio39", "gpio40", + "gpio41", "gpio43", "gpio44", + "gpio46", "gpio47"; + drive-strength = <10>; + bias-pull-up; + }; + clk { + pins = "gpio42"; + drive-strength = <16>; + bias-pull-down; + }; + }; + + i2c1_pins: i2c1_pinmux { + pins = "gpio53", "gpio54"; + function = "gsbi1"; + bias-disable; + }; + + rpm_i2c_pinmux: rpm_i2c_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + /delete-property/ bias-none; + /delete-property/ drive-strength; + }; + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + fw_pinmux { + wp { + pins = "gpio17"; + output-low; + }; + }; + + button_pins: button_pins { + recovery { + pins = "gpio16"; + function = "gpio"; + bias-none; + }; + developer { + pins = "gpio15"; + function = "gpio"; + bias-none; + }; + }; + + spi6_pins: spi6_pins { + mux { + pins = "gpio55", "gpio56", "gpio58"; + function = "gsbi6"; + bias-pull-down; + }; + data { + pins = "gpio55", "gpio56"; + drive-strength = <10>; + }; + cs { + pins = "gpio57"; + drive-strength = <10>; + bias-pull-up; + output-high; + }; + clk { + pins = "gpio58"; + drive-strength = <12>; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + + pinctrl-0 = <&rgmii0_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi1 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi1_i2c { + status = "okay"; + + clock-frequency = <100000>; + + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + powered-while-suspended; + }; +}; + +&gsbi4 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi4_serial { + status = "okay"; +}; + +&gsbi5 { + status = "okay"; + qcom,mode = ; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 0>; + + flash: flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + }; +}; + +&gsbi6 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi6_spi { + status = "okay"; + spi-max-frequency = <25000000>; + + pinctrl-0 = <&spi6_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>; + + dmas = <&adm_dma 8 0xb>, + <&adm_dma 7 0x14>; + dma-names = "rx", "tx"; + + /* + * This "spidev" was included in the manufacturer device tree. I suspect + * it's the (unused) Zigbee radio -- SiliconLabs EM3581 Zigbee? There's + * no driver or binding for this at the moment. + */ + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <25000000>; + }; +}; + +&pcie0 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupt-controller; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + qcom,ath10k-sa-gpio = <2 3 4 0>; + qcom,ath10k-sa-gpio-func = <5 5 5 0>; + }; + }; +}; + +&pcie1 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupt-controller; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + qcom,ath10k-sa-gpio = <2 3 4 0>; + qcom,ath10k-sa-gpio-func = <5 5 5 0>; + }; + }; +}; + +&pcie2 { + status = "okay"; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupt-controller; + + ath10k@0,0 { + reg = <0 0 0 0 0>; + device_type = "pci"; + }; + }; +}; + +&rpm { + pinctrl-0 = <&rpm_i2c_pinmux>; + pinctrl-names = "default"; +}; + +&sdcc1 { + status = "okay"; + pinctrl-0 = <&sdcc1_pins>; + pinctrl-names = "default"; + /delete-property/ mmc-ddr-1_8v; +}; + +&tcsr { + compatible = "qcom,tcsr-ipq8064", "qcom,tcsr", "syscon"; + qcom,usb-ctrl-select = ; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500.dts new file mode 100644 index 0000000000..c2703b05d7 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500.dts @@ -0,0 +1,415 @@ +#include "qcom-ipq8064-v1.0.dtsi" + +#include +#include +#include + +/ { + model = "Netgear Nighthawk X4 R7500"; + compatible = "netgear,r7500", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0xe000000>; + device_type = "memory"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &power_white; + led-failsafe = &power_amber; + led-running = &power_white; + led-upgrade = &power_amber; + }; + + chosen { + bootargs = "rootfstype=squashfs noinitrd"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + usb1 { + label = "white:usb1"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb2"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + power_amber: power_amber { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + wan_white { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + wan_amber { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + + esata { + label = "white:esata"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + + power_white: power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wifi { + label = "white:wifi"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", + "gpio24","gpio26", "gpio53", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&gsbi5 { + status = "disabled"; + + spi@1a280000 { + status = "disabled"; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1180000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qcadata@0 { + label = "qcadata"; + reg = <0x0000000 0x0c80000>; + read-only; + }; + + APPSBL@c80000 { + label = "APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + APPSBLENV@1180000 { + label = "APPSBLENV"; + reg = <0x1180000 0x0080000>; + read-only; + }; + + art: art@1200000 { + label = "art"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; + }; + + kernel@1340000 { + label = "kernel"; + reg = <0x1340000 0x0400000>; + }; + + ubi@1740000 { + label = "ubi"; + reg = <0x1740000 0x1600000>; + }; + + netgear@2d40000 { + label = "netgear"; + reg = <0x2d40000 0x0c00000>; + read-only; + }; + + reserve@3940000 { + label = "reserve"; + reg = <0x3940000 0x46c0000>; + read-only; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&tcsr { + qcom,usb-ctrl-select = ; + compatible = "qcom,tcsr"; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500v2.dts new file mode 100644 index 0000000000..6c52d51ebc --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-r7500v2.dts @@ -0,0 +1,477 @@ +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Netgear Nighthawk X4 R7500v2"; + compatible = "netgear,r7500v2", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + rsvd@5fe00000 { + reg = <0x5fe00000 0x200000>; + reusable; + }; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + chosen { + bootargs = "rootfstype=squashfs noinitrd"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + usb1 { + label = "amber:usb1"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb3 { + label = "amber:usb3"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + status { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + internet { + label = "white:internet"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + + esata { + label = "white:esata"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wifi { + label = "white:wifi"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", + "gpio24","gpio26", "gpio53", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + usb0_pwr_en_pins: usb0_pwr_en_pins { + mux { + pins = "gpio15"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; + + usb1_pwr_en_pins: usb1_pwr_en_pins { + mux { + pins = "gpio16", "gpio68"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; +}; + +&sata_phy { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb0_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb1_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1180000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qcadata@0 { + label = "qcadata"; + reg = <0x0000000 0x0c80000>; + read-only; + }; + + APPSBL@c80000 { + label = "APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + APPSBLENV@1180000 { + label = "APPSBLENV"; + reg = <0x1180000 0x0080000>; + read-only; + }; + + art@1200000 { + label = "art"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + artbak: art@1340000 { + label = "artbak"; + reg = <0x1340000 0x0140000>; + read-only; + }; + + kernel@1480000 { + label = "kernel"; + reg = <0x1480000 0x0400000>; + }; + + ubi@1880000 { + label = "ubi"; + reg = <0x1880000 0x6080000>; + }; + + reserve@7900000 { + label = "reserve"; + reg = <0x7900000 0x0700000>; + read-only; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_art_6 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts new file mode 100644 index 0000000000..6adc6be4ae --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2014 The ChromiumOS Authors + */ + +#include "qcom-ipq8064-onhub.dtsi" +#include +#include +#include + +/ { + model = "TP-Link OnHub"; + compatible = "tplink,onhub", "google,whirlwind-sp5", "qcom,ipq8064"; +}; + +&qcom_pinmux { + i2c7_pins: i2c7_pinmux { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi7"; + }; + data { + pins = "gpio8"; + bias-disable; + }; + clk { + pins = "gpio9"; + bias-disable; + }; + }; +}; + +&gsbi7 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi7_i2c { + status = "okay"; + clock-frequency = <100000>; + pinctrl-0 = <&i2c7_pins>; + pinctrl-names = "default"; + + led-controller@32 { + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + chan-name = "red:status-0"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@1 { + reg = <1>; + color = ; + chan-name = "green:status-0"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@2 { + reg = <2>; + color = ; + chan-name = "blue:status-0"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@3 { + reg = <3>; + color = ; + chan-name = "red:status-1"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status-1"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status-1"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@6 { + reg = <6>; + color = ; + chan-name = "red:status-2"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@7 { + reg = <7>; + color = ; + chan-name = "green:status-2"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "blue:status-2"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + }; + + led-controller@33 { + compatible = "national,lp5523"; + reg = <0x33>; + clock-mode = /bits/ 8 <1>; + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + chan-name = "red:status-3"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@1 { + reg = <1>; + color = ; + chan-name = "green:status-3"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@2 { + reg = <2>; + color = ; + chan-name = "blue:status-3"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@3 { + reg = <3>; + color = ; + chan-name = "red:status-4"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@4 { + reg = <4>; + color = ; + chan-name = "green:status-4"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@5 { + reg = <5>; + color = ; + chan-name = "blue:status-4"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@6 { + reg = <6>; + color = ; + chan-name = "red:status-5"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@7 { + reg = <7>; + color = ; + chan-name = "green:status-5"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + + led@8 { + reg = <8>; + color = ; + chan-name = "blue:status-5"; + linux,default-trigger = "default-on"; + led-cur = /bits/ 8 <0x64>; + max-cur = /bits/ 8 <0x78>; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-unifi-ac-hd.dts new file mode 100644 index 0000000000..fac41897d4 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-unifi-ac-hd.dts @@ -0,0 +1,315 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Ubiquiti UniFi AC HD"; + compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064"; + + aliases { + label-mac-device = &gmac2; + led-boot = &led_dome_white; + led-failsafe = &led_dome_white; + led-running = &led_dome_blue; + led-upgrade = &led_dome_blue; + mdio-gpio0 = &mdio0; + ethernet0 = &gmac2; + ethernet1 = &gmac1; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_dome_blue: dome_blue { + label = "blue:dome"; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + led_dome_white: dome_white { + label = "white:dome"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio9", "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + drive-strength = <10>; + bias-none; + }; + + cs { + pins = "gpio20"; + drive-strength = <12>; + }; + }; +}; + +&CPU_SPC { + status = "disabled"; +}; + +&gsbi5 { + status = "okay"; + + qcom,mode = ; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + cs-gpios = <&qcom_pinmux 20 0>; + + flash@0 { + compatible = "mx25u25635f", "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "MIBIB"; + reg = <0x20000 0x10000>; + read-only; + }; + + partition@30000 { + label = "SBL2"; + reg = <0x30000 0x20000>; + read-only; + }; + + partition@50000 { + label = "SBL3"; + reg = <0x50000 0x30000>; + read-only; + }; + + partition@80000 { + label = "DDRCONFIG"; + reg = <0x80000 0x10000>; + read-only; + }; + + partition@90000 { + label = "SSD"; + reg = <0x90000 0x10000>; + read-only; + }; + + partition@a0000 { + label = "TZ"; + reg = <0xa0000 0x30000>; + read-only; + }; + + partition@d0000 { + label = "RPM"; + reg = <0xd0000 0x20000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0xc0000>; + read-only; + }; + + partition@1b0000 { + label = "APPSBLENV"; + reg = <0x1b0000 0x10000>; + read-only; + }; + + eeprom: partition@1c0000 { + label = "EEPROM"; + reg = <0x1c0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_eeprom_6: macaddr@6 { + reg = <0x6 0x6>; + }; + }; + }; + + partition@1d0000 { + label = "bootselect"; + reg = <0x1d0000 0x10000>; + }; + + partition@1e0000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x1e0000 0xe70000>; + }; + + partition@1050000 { + label = "kernel1"; + reg = <0x1050000 0xe70000>; + read-only; + }; + + partition@1ec0000 { + label = "debug"; + reg = <0x1ec0000 0x100000>; + read-only; + }; + + partition@1fc0000 { + label = "cfg"; + reg = <0x1fc0000 0x40000>; + read-only; + }; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy4: ethernet-phy@4 { + reg = <4>; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + }; +}; + +&gmac1 { + status = "okay"; + + mdiobus = <&mdio0>; + phy-handle = <&phy5>; + phy-mode = "sgmii"; + qcom,id = <1>; + + nvmem-cells = <&macaddr_eeprom_6>; + nvmem-cell-names = "mac-address"; +}; + +&gmac2 { + status = "okay"; + + mdiobus = <&mdio0>; + phy-handle = <&phy4>; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_eeprom_0>; + nvmem-cell-names = "mac-address"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +&tcsr { + status = "okay"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-vr2600v.dts new file mode 100644 index 0000000000..62530efeb1 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-vr2600v.dts @@ -0,0 +1,515 @@ +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "TP-Link Archer VR2600v"; + compatible = "tplink,vr2600v", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &power; + led-failsafe = &general; + led-running = &power; + led-upgrade = &general; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + dect { + label = "dect"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + ledswitch { + label = "ledswitch"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + dsl { + label = "white:dsl"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + lan { + function = LED_FUNCTION_LAN; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "white:wlan2g"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; + }; + + wlan5g { + label = "white:wlan5g"; + gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + phone { + label = "white:phone"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + wan { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + general: general { + label = "white:general"; + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17", + "gpio26", "gpio53", "gpio56", "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "MIBIB"; + reg = <0x20000 0x20000>; + read-only; + }; + + partition@40000 { + label = "SBL2"; + reg = <0x40000 0x40000>; + read-only; + }; + + partition@80000 { + label = "SBL3"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "DDRCONFIG"; + reg = <0x100000 0x10000>; + read-only; + }; + + partition@110000 { + label = "SSD"; + reg = <0x110000 0x10000>; + read-only; + }; + + partition@120000 { + label = "TZ"; + reg = <0x120000 0x80000>; + read-only; + }; + + partition@1a0000 { + label = "RPM"; + reg = <0x1a0000 0x80000>; + read-only; + }; + + partition@220000 { + label = "APPSBL"; + reg = <0x220000 0x80000>; + read-only; + }; + + partition@2a0000 { + label = "APPSBLENV"; + reg = <0x2a0000 0x40000>; + read-only; + }; + + partition@2e0000 { + label = "OLDART"; + reg = <0x2e0000 0x40000>; + read-only; + }; + + partition@320000 { + label = "firmware"; + reg = <0x320000 0xc60000>; + compatible = "openwrt,uimage"; + openwrt,offset = <512>; /* account for pad-extra 512 */ + }; + + /* hole 0xf80000 - 0xfaf100 */ + + partition@faf100 { + label = "default-mac"; + reg = <0xfaf100 0x00200>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_defaultmac_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@fc0000 { + label = "ART"; + reg = <0xfc0000 0x40000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_defaultmac_0 (-1)>, <&precal_ART_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_defaultmac_0 0>, <&precal_ART_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_defaultmac_0 1>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_defaultmac_0 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wg2600hp.dts new file mode 100644 index 0000000000..0afc9219c9 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wg2600hp.dts @@ -0,0 +1,552 @@ +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "NEC Aterm WG2600HP"; + compatible = "nec,wg2600hp", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + mdio-gpio0 = &mdio0; + + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + led-upgrade = &power_green; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + bridge { + label = "bridge"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + + converter { + label = "converter"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + converter_green { + label = "green:converter"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>; + }; + + power_red: power_red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + active_green { + label = "green:active"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + active_red { + label = "red:active"; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>; + }; + + converter_red { + label = "red:converter"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_green { + label = "green:wlan2g"; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_red { + label = "red:wlan2g"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + wlan5g_green { + label = "green:wlan5g"; + gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>; + }; + + wlan5g_red { + label = "red:wlan5g"; + gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>; + }; + + tv_green { + label = "green:tv"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + + tv_red { + label = "red:tv"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&CPU_SPC { + status = "disabled"; +}; + +&adm_dma { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + +switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + qca,sgmii-rxclk-falling-edge; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_PRODUCTDATA_6>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_PRODUCTDATA_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi5 { + status = "okay"; + + qcom,mode = ; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + SBL1@0 { + label = "SBL1"; + reg = <0x0 0x20000>; + read-only; + }; + + MIBIB@20000 { + label = "MIBIB"; + reg = <0x20000 0x20000>; + read-only; + }; + + SBL2@40000 { + label = "SBL2"; + reg = <0x40000 0x40000>; + read-only; + }; + + SBL3@80000 { + label = "SBL3"; + reg = <0x80000 0x80000>; + read-only; + }; + + DDRCONFIG@100000 { + label = "DDRCONFIG"; + reg = <0x100000 0x10000>; + read-only; + }; + + SSD@110000 { + label = "SSD"; + reg = <0x110000 0x10000>; + read-only; + }; + + TZ@120000 { + label = "TZ"; + reg = <0x120000 0x80000>; + read-only; + }; + + RPM@1a0000 { + label = "RPM"; + reg = <0x1a0000 0x80000>; + read-only; + }; + + APPSBL@220000 { + label = "APPSBL"; + reg = <0x220000 0x80000>; + read-only; + }; + + APPSBLENV@2a0000 { + label = "APPSBLENV"; + reg = <0x2a0000 0x10000>; + }; + + PRODUCTDATA: PRODUCTDATA@2b0000 { + label = "PRODUCTDATA"; + reg = <0x2b0000 0x30000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_PRODUCTDATA_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_PRODUCTDATA_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_PRODUCTDATA_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_PRODUCTDATA_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; + }; + + ART@2e0000 { + label = "ART"; + reg = <0x2e0000 0x40000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + TP@320000 { + label = "TP"; + reg = <0x320000 0x40000>; + read-only; + }; + + TINY@360000 { + label = "TINY"; + reg = <0x360000 0x500000>; + read-only; + }; + + firmware@860000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x860000 0x17a0000>; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio16", "gpio54", "gpio24", "gpio25"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14", + "gpio15", "gpio55", "gpio56", "gpio57", "gpio58", + "gpio64", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + usb_pwr_en_pins: usb_pwr_en_pins { + mux { + pins = "gpio22"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-high; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wpq864.dts new file mode 100644 index 0000000000..0fb7e0531d --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wpq864.dts @@ -0,0 +1,557 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (C) 2017 Christian Mehlis + * Copyright (C) 2018 Mathias Kresin + * All rights reserved. + */ + +#include "qcom-ipq8064-v1.0.dtsi" + +#include +#include +#include + +/ { + compatible = "compex,wpq864", "qcom,ipq8064"; + model = "Compex WPQ864"; + + aliases { + mdio-gpio0 = &mdio0; + ethernet0 = &gmac1; + ethernet1 = &gmac0; + + led-boot = &led_pass; + led-failsafe = &led_fail; + led-running = &led_pass; + led-upgrade = &led_pass; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + rss4 { + label = "green:rss4"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + rss3 { + label = "green:rss3"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + rss2 { + label = "orange:rss2"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>; + }; + + rss1 { + label = "red:rss1"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + led_pass: pass { + label = "green:pass"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + led_fail: fail { + label = "green:fail"; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb-pcie { + label = "green:usb-pcie"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + beeper { + compatible = "gpio-beeper"; + + pinctrl-0 = <&beeper_pins>; + pinctrl-names = "default"; + + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + }; +}; + +&rpm { + pinctrl-0 = <&rpm_pins>; + pinctrl-names = "default"; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + mt29f2g08abbeah4@0 { + compatible = "qcom,nandcs"; + + reg = <0>; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x0040000 0x0140000>; + read-only; + }; + + partition@180000 { + label = "0:SBL2"; + reg = <0x0180000 0x0140000>; + read-only; + }; + + partition@2c0000 { + label = "0:SBL3"; + reg = <0x02c0000 0x0280000>; + read-only; + }; + + partition@540000 { + label = "0:DDRCONFIG"; + reg = <0x0540000 0x0120000>; + read-only; + }; + + partition@660000 { + label = "0:SSD"; + reg = <0x0660000 0x0120000>; + read-only; + }; + + partition@780000 { + label = "0:TZ"; + reg = <0x0780000 0x0280000>; + read-only; + }; + + partition@a00000 { + label = "0:RPM"; + reg = <0x0a00000 0x0280000>; + read-only; + }; + + partition@c80000 { + label = "0:APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + partition@1180000 { + label = "0:APPSBLENV"; + reg = <0x1180000 0x0080000>; + }; + + partition@1200000 { + label = "0:ART"; + reg = <0x1200000 0x0140000>; + }; + + partition@1340000 { + label = "ubi"; + reg = <0x1340000 0x4000000>; + }; + + partition@5340000 { + label = "0:BOOTCONFIG"; + reg = <0x5340000 0x0060000>; + }; + + partition@53a0000 { + label = "0:SBL2_1"; + reg = <0x53a0000 0x0140000>; + read-only; + }; + + partition@54e0000 { + label = "0:SBL3_1"; + reg = <0x54e0000 0x0280000>; + read-only; + }; + + partition@5760000 { + label = "0:DDRCONFIG_1"; + reg = <0x5760000 0x0120000>; + read-only; + }; + + partition@5880000 { + label = "0:SSD_1"; + reg = <0x5880000 0x0120000>; + read-only; + }; + + partition@59a0000 { + label = "0:TZ_1"; + reg = <0x59a0000 0x0280000>; + read-only; + }; + + partition@5c20000 { + label = "0:RPM_1"; + reg = <0x5c20000 0x0280000>; + read-only; + }; + + partition@5ea0000 { + label = "0:BOOTCONFIG1"; + reg = <0x5ea0000 0x0060000>; + }; + + partition@5f00000 { + label = "0:APPSBL_1"; + reg = <0x5f00000 0x0500000>; + read-only; + }; + + partition@6400000 { + label = "ubi_1"; + reg = <0x6400000 0x4000000>; + }; + + partition@a400000 { + label = "unused"; + reg = <0xa400000 0x5c00000>; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi4_serial { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; +}; + +&flash { + compatible = "jedec,spi-nor"; +}; + +&sata_phy { + status = "disabled"; +}; + +&sata { + status = "disabled"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; + + rx_eq = <2>; + tx_deamp_3_5db = <32>; + mpll = <160>; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; + + rx_eq = <2>; + tx_deamp_3_5db = <32>; + mpll = <160>; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; +}; + +&pcie1 { + status = "okay"; +}; + +&pcie2 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; +}; + +&qcom_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinctrl0 { + pcie0_pcie2_perst { + pins = "gpio3"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio22", + "gpio23", "gpio24", "gpio25", "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + beeper_pins: beeper_pins { + mux { + pins = "gpio55"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + rpm_pins: rpm_pins { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <10>; + bias-disable; + }; + }; + + uart0_pins: uart0_pins { + mux { + pins = "gpio10", "gpio11"; + function = "gsbi4"; + drive-strength = <10>; + bias-disable; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19"; + function = "gsbi5"; + drive-strength = <10>; + bias-pull-down; + }; + + clk { + pins = "gpio21"; + function = "gsbi5"; + drive-strength = <12>; + bias-pull-down; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; +}; + +&tcsr { + qcom,usb-ctrl-select = ; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wxr-2533dhp.dts new file mode 100644 index 0000000000..5807425830 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-wxr-2533dhp.dts @@ -0,0 +1,622 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include + +/ { + model = "Buffalo WXR-2533DHP"; + compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064"; + + memory@42000000 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + led-boot = &power; + led-failsafe = &diag; + led-running = &power; + led-upgrade = &power; + }; + + chosen { + /* use "ubi_rootfs" volume in "ubi" partition as rootfs */ + bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + usb { + function = LED_FUNCTION_USB; + color = ; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port0 &hub_port1>; + }; + + guestport { + label = "green:guestport"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + diag: diag { + label = "orange:diag"; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + internet_orange { + label = "orange:internet"; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; + }; + + internet_white { + label = "white:internet"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + wireless_orange { + label = "orange:wireless"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + wireless_white { + label = "white:wireless"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + + router_orange { + label = "orange:router"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>; + }; + + router_white { + label = "white:router"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + power { + label = "power"; + gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + eject { + label = "eject"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + guest { + label = "guest"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + ap { + label = "ap"; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + + router { + label = "router"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + + auto { + label = "auto"; + gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + }; +}; + +&nand { + status = "okay"; + + cs@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ubi@0 { + label = "ubi"; + reg = <0x0000000 0x4000000>; + }; + + rootfs_1@4000000 { + label = "rootfs_1"; + reg = <0x4000000 0x4000000>; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_ART_6>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + + nvmem-cells = <&macaddr_ART_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gsbi4_serial { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; +}; + +&gsbi5 { + status = "okay"; + qcom,mode = ; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + SBL1@0 { + label = "SBL1"; + reg = <0x0 0x10000>; + read-only; + }; + + MIBIB@10000 { + label = "MIBIB"; + reg = <0x10000 0x20000>; + read-only; + }; + + SBL2@30000 { + label = "SBL2"; + reg = <0x30000 0x30000>; + read-only; + }; + + SBL3@60000 { + label = "SBL3"; + reg = <0x60000 0x30000>; + read-only; + }; + + DDRCONFIG@90000 { + label = "DDRCONFIG"; + reg = <0x90000 0x10000>; + read-only; + }; + + SSD@a0000 { + label = "SSD"; + reg = <0xa0000 0x10000>; + read-only; + }; + + TZ@b0000 { + label = "TZ"; + reg = <0xb0000 0x30000>; + read-only; + }; + + RPM@e0000 { + label = "RPM"; + reg = <0xe0000 0x20000>; + read-only; + }; + + APPSBL@100000 { + label = "APPSBL"; + reg = <0x100000 0x70000>; + read-only; + }; + + APPSBLENV@170000 { + label = "APPSBLENV"; + reg = <0x170000 0x10000>; + read-only; + }; + + ART@180000 { + label = "ART"; + reg = <0x180000 0x40000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ART_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_ART_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_ART_18: macaddr@18 { + reg = <0x18 0x6>; + }; + + macaddr_ART_1e: macaddr@1e { + reg = <0x1e 0x6>; + }; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + BOOTCONFIG@1c0000 { + label = "BOOTCONFIG"; + reg = <0x1c0000 0x10000>; + read-only; + }; + + APPSBL_1@1d0000 { + label = "APPSBL_1"; + reg = <0x1d0000 0x70000>; + read-only; + }; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&dwc3_0 { + #address-cells = <1>; + #size-cells = <0>; + + hub_port0: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&dwc3_1 { + #address-cells = <1>; + #size-cells = <0>; + + hub_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57", + "gpio58", "gpio64", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22", + "gpio23", "gpio24", "gpio25", "gpio26", "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + uart0_pins: uart0_pins { + mux { + pins = "gpio10", "gpio11"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs{ + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + usb_pwr_en_pins: usb_pwr_en_pins { + mux{ + pins = "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + output-high; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-ac400i.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-ac400i.dts new file mode 100644 index 0000000000..7151f8de52 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-ac400i.dts @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8065-smb208.dtsi" +#include + +/ { + model = "Nokia AC400i"; + compatible = "nokia,ac400i", "qcom,ipq8065", "qcom,ipq8064"; + + aliases { + mdio-gpio0 = &mdio0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + + led-boot = &pwr_red; + led-failsafe = &pwr_red; + led-running = &pwr_green; + led-upgrade = &pwr_green; + }; + + chosen { + bootargs-override = " console=ttyMSM0,115200n8 ubi.mtd=ubi root=/dev/ubiblock0_2"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + 5g_red { + label = "red:5g"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>; + }; + + 5g_green { + label = "green:5g"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + + 2g_red { + label = "red:2g"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + }; + + 2g_green { + label = "green:2g"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; + }; + + eth1_red { + label = "red:eth1"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_HIGH>; + }; + + eth1_green { + label = "green:eth1"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + }; + + eth2_red { + label = "red:eth2"; + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_HIGH>; + }; + + eth2_green { + label = "green:eth2"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>; + }; + + ctrl_red { + label = "red:ctrl"; + gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>; + }; + + ctrl_green { + label = "green:ctrl"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; + }; + + pwr_red: pwr_red { + label = "red:pwr"; + gpios = <&qcom_pinmux 2 GPIO_ACTIVE_LOW>; + }; + + pwr_green: pwr_green { + label = "green:pwr"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19"; + function = "gsbi5"; + drive-strength = <10>; + bias-pull-down; + }; + + clk { + pins = "gpio21"; + function = "gsbi5"; + drive-strength = <12>; + bias-pull-down; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio65", "gpio64", + "gpio53", "gpio54", + "gpio68", "gpio22", + "gpio67", "gpio23", + "gpio55", "gpio56", + "gpio2", "gpio26"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio15"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; + }; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Nokia-AC400i"; + }; + }; +}; + +&pcie1 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Nokia-AC400i"; + }; + }; +}; + +&mdio0 { + status = "okay"; + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + +}; + +//POE +&gmac0 { + status = "okay"; + qcom,id = <0>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + mdiobus = <&mdio0>; + phy-handle = <&phy0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +//LAN1 +&gmac1 { + status = "okay"; + qcom,id = <1>; + + mdiobus = <&mdio0>; + phy-handle = <&phy1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&nand { + status = "okay"; + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + rootfs@0 { + label = "rootfs"; + reg = <0x0000000 0x4000000>; + }; + + rootfs_1@4000000 { + label = "rootfs_1"; + reg = <0x4000000 0x4000000>; + }; + + cfg@8000000 { + label = "cfg"; + reg = <0x8000000 0x8000000>; + }; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nbg6817.dts new file mode 100644 index 0000000000..7d22b4f541 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nbg6817.dts @@ -0,0 +1,395 @@ +#include "qcom-ipq8065-smb208.dtsi" + +#include +#include + +/ { + model = "ZyXEL NBG6817"; + compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + mdio-gpio0 = &mdio0; + sdcc1 = &sdcc1; + + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + chosen { + bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1"; + append-rootblock = "root=/dev/mmcblk0p"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + internet { + label = "white:internet"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + + power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + wifi2g { + label = "amber:wifi2g"; + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>; + }; + + /* wifi2g amber from the manual is missing */ + + wifi5g { + label = "amber:wifi5g"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; + + /* wifi5g amber from the manual is missing */ + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio53", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio9", "gpio26", "gpio33", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + mdio0_pins: mdio0-pins { + clk { + pins = "gpio1"; + input-disable; + }; + }; + + rgmii2_pins: rgmii2-pins { + tx { + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ; + input-disable; + }; + }; + + spi_pins: spi_pins { + cs { + pins = "gpio20"; + drive-strength = <12>; + }; + }; + + usb0_pwr_en_pins: usb0_pwr_en_pins { + mux { + pins = "gpio16", "gpio17"; + function = "gpio"; + drive-strength = <12>; + }; + + pwr { + pins = "gpio17"; + bias-pull-down; + output-high; + }; + + ovc { + pins = "gpio16"; + bias-pull-up; + }; + }; + + usb1_pwr_en_pins: usb1_pwr_en_pins { + mux { + pins = "gpio14", "gpio15"; + function = "gpio"; + drive-strength = <12>; + }; + + pwr { + pins = "gpio14"; + bias-pull-down; + output-high; + }; + + ovc { + pins = "gpio15"; + bias-pull-up; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <51200000>; + reg = <0>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb0_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb1_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <1>; + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <0>; + qcom,rgmii_delay = <1>; + qcom,phy_mii_type = <0>; + qcom,emulation = <0>; + qcom,irq = <255>; + mdiobus = <&mdio0>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <2>; + qcom,phy_mdio_addr = <0>; /* none */ + qcom,poll_required = <0>; /* no polling */ + qcom,rgmii_delay = <0>; + qcom,phy_mii_type = <1>; + qcom,emulation = <0>; + qcom,irq = <258>; + mdiobus = <&mdio0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&sdcc1 { + status = "okay"; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nighthawk.dtsi new file mode 100644 index 0000000000..a7f0b1dbf0 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-nighthawk.dtsi @@ -0,0 +1,541 @@ +#include "qcom-ipq8065-smb208.dtsi" + +#include +#include + +/ { + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + reserved-memory { + rsvd@5fe00000 { + reg = <0x5fe00000 0x200000>; + reusable; + }; + + ramoops@42100000 { + compatible = "ramoops"; + reg = <0x42100000 0x40000>; + record-size = <0x4000>; + console-size = <0x4000>; + ftrace-size = <0x4000>; + pmsg-size = <0x4000>; + }; + }; + + aliases { + label-mac-device = &gmac2; + + led-boot = &power_white; + led-failsafe = &power_amber; + led-running = &power_white; + led-upgrade = &power_amber; + + mdio-gpio0 = &mdio0; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wifi { + label = "wifi"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds: leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + power_white: power_white { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + power_amber: power_amber { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; + }; + + wan_white { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + wan_amber { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + wifi { + label = "white:wifi"; + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; + }; + + wps { + function = LED_FUNCTION_WPS; + color = ; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54", "gpio65"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8", "gpio9", + "gpio22", "gpio23", "gpio24", + "gpio26", "gpio53", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + mdio0_pins: mdio0-pins { + clk { + pins = "gpio1"; + input-disable; + }; + }; + + rgmii2_pins: rgmii2-pins { + tx { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32"; + input-disable; + }; + }; + + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19", "gpio21"; + function = "gsbi5"; + bias-pull-down; + }; + + data { + pins = "gpio18", "gpio19"; + drive-strength = <10>; + }; + + cs { + pins = "gpio20"; + drive-strength = <10>; + bias-pull-up; + }; + + clk { + pins = "gpio21"; + drive-strength = <12>; + }; + }; + + spi6_pins: spi6_pins { + mux { + pins = "gpio55", "gpio56", "gpio58"; + function = "gsbi6"; + bias-pull-down; + }; + + mosi { + pins = "gpio55"; + drive-strength = <12>; + }; + + miso { + pins = "gpio56"; + drive-strength = <14>; + }; + + cs { + pins = "gpio57"; + drive-strength = <12>; + bias-pull-up; + }; + + clk { + pins = "gpio58"; + drive-strength = <12>; + }; + + reset { + pins = "gpio33"; + drive-strength = <10>; + bias-pull-down; + output-high; + }; + }; + + usb0_pwr_en_pins: usb0_pwr_en_pins { + mux { + pins = "gpio15"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; + + usb1_pwr_en_pins: usb1_pwr_en_pins { + mux { + pins = "gpio16", "gpio68"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-high; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x1180000>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "qcadata"; + reg = <0x0000000 0x0c80000>; + read-only; + }; + + partition@c80000 { + label = "APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + partition@1180000 { + label = "APPSBLENV"; + reg = <0x1180000 0x0080000>; + read-only; + }; + + art: partition@1200000 { + label = "art"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + compatible = "mac-base"; + reg = <0x6 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_art_c: macaddr@c { + reg = <0xc 0x6>; + }; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@1340000 { + label = "artbak"; + reg = <0x1340000 0x0140000>; + read-only; + }; + + partition@1480000 { + label = "kernel"; + reg = <0x1480000 0x0400000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac2>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + qcom,id = <1>; + qcom,phy_mdio_addr = <4>; + qcom,poll_required = <0>; + qcom,rgmii_delay = <1>; + qcom,phy_mii_type = <0>; + qcom,emulation = <0>; + qcom,irq = <255>; + mdiobus = <&mdio0>; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_art_6 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + phy-mode = "sgmii"; + qcom,id = <2>; + qcom,phy_mdio_addr = <0>; /* none */ + qcom,poll_required = <0>; /* no polling */ + qcom,rgmii_delay = <0>; + qcom,phy_mii_type = <1>; + qcom,emulation = <0>; + qcom,irq = <258>; + mdiobus = <&mdio0>; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&sata_phy { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; + + pinctrl-0 = <&usb0_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; + + pinctrl-0 = <&usb1_pwr_en_pins>; + pinctrl-names = "default"; +}; + +&pcie0 { + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi0: wifi@1,0 { + compatible = "pci168c,0046"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&pcie1 { + status = "okay"; + + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi1: wifi@1,0 { + compatible = "pci168c,0046"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-r7800.dts new file mode 100644 index 0000000000..3440c52699 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-r7800.dts @@ -0,0 +1,46 @@ +#include "qcom-ipq8065-nighthawk.dtsi" + +/ { + model = "Netgear Nighthawk X4S R7800"; + compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064"; +}; + +&leds { + usb1 { + label = "white:usb1"; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb2"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + esata { + label = "white:esata"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; +}; + +&partitions { + partition@1880000 { + label = "ubi"; + reg = <0x1880000 0x6080000>; + }; + + partition@7900000 { + label = "reserve"; + reg = <0x7900000 0x0700000>; + read-only; + }; +}; + +&wifi0 { + nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; + +&wifi1 { + nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-rt4230w-rev6.dts new file mode 100644 index 0000000000..12f15bd147 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-rt4230w-rev6.dts @@ -0,0 +1,601 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qcom-ipq8065-smb208.dtsi" +#include +#include + +/ { + model = "Askey RT4230W REV6"; + compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x3e000000>; + device_type = "memory"; + }; + + aliases { + led-boot = &ledctrl3; + led-failsafe = &ledctrl1; + led-running = &ledctrl2; + led-upgrade = &ledctrl3; + }; + + chosen { + bootargs = "rootfstype=squashfs noinitrd"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + ledctrl1: ledctrl1 { + label = "ledctrl1"; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; + }; + + ledctrl2: ledctrl2 { + label = "ledctrl2"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + ledctrl3: ledctrl3 { + label = "ledctrl3"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio54", "gpio68"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio22", "gpio23", "gpio24"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + rgmii2_pins: rgmii2-pins { + mux { + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + + tx { + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32"; + input-disable; + }; + }; + + spi_pins: spi_pins { + cs { + pins = "gpio20"; + drive-strength = <12>; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "everspin,mr25h256"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <40000000>; + reg = <0>; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x10c0000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + + partition@40000 { + label = "0:MIBIB"; + reg = <0x0040000 0x0140000>; + read-only; + }; + + partition@180000 { + label = "0:SBL2"; + reg = <0x0180000 0x0140000>; + read-only; + }; + + partition@2c0000 { + label = "0:SBL3"; + reg = <0x02c0000 0x0280000>; + read-only; + }; + + partition@540000 { + label = "0:DDRCONFIG"; + reg = <0x0540000 0x0120000>; + read-only; + }; + + partition@660000 { + label = "0:SSD"; + reg = <0x0660000 0x0120000>; + read-only; + }; + + partition@780000 { + label = "0:TZ"; + reg = <0x0780000 0x0280000>; + read-only; + }; + + partition@a00000 { + label = "0:RPM"; + reg = <0x0a00000 0x0280000>; + read-only; + }; + + partition@c80000 { + label = "0:APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + + partition@1180000 { + label = "0:APPSBLENV"; + reg = <0x1180000 0x0080000>; + }; + + partition@1200000 { + label = "0:ART"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_ART_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_ART_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + + partition@1340000 { + label = "0:BOOTCONFIG"; + reg = <0x1340000 0x0060000>; + read-only; + }; + + partition@13a0000 { + label = "0:SBL2_1"; + reg = <0x13a0000 0x0140000>; + read-only; + }; + + partition@14e0000 { + label = "0:SBL3_1"; + reg = <0x14e0000 0x0280000>; + read-only; + }; + + partition@1760000 { + label = "0:DDRCONFIG_1"; + reg = <0x1760000 0x0120000>; + read-only; + }; + + partition@1880000 { + label = "0:SSD_1"; + reg = <0x1880000 0x0120000>; + read-only; + }; + + partition@19a0000 { + label = "0:TZ_1"; + reg = <0x19a0000 0x0280000>; + read-only; + }; + + partition@1c20000 { + label = "0:RPM_1"; + reg = <0x1c20000 0x0280000>; + read-only; + }; + + partition@1ea0000 { + label = "0:BOOTCONFIG1"; + reg = <0x1ea0000 0x0060000>; + read-only; + }; + + partition@1f00000 { + label = "0:APPSBL_1"; + reg = <0x1f00000 0x0500000>; + read-only; + }; + + partition@2400000 { + label = "ubi"; + reg = <0x2400000 0x1a000000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "wan"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + }; + }; + + port@2 { + reg = <2>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; + + port@3 { + reg = <3>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; + + port@4 { + reg = <4>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; + + port@5 { + reg = <5>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port5>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + }; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + + nvmem-cells = <&macaddr_ART_0>; + nvmem-cell-names = "mac-address"; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <1>; + + nvmem-cells = <&macaddr_ART_6>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi0: wifi@1,0 { + compatible = "pci168c,0046"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&precal_ART_1000>; + nvmem-cell-names = "pre-calibration"; + }; + }; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi1: wifi@1,0 { + compatible = "pci168c,0046"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&precal_ART_5000>; + nvmem-cell-names = "pre-calibration"; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-tr4400-v2.dts new file mode 100644 index 0000000000..8818e95e8d --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-tr4400-v2.dts @@ -0,0 +1,524 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "qcom-ipq8065-smb208.dtsi" +#include +#include + +/ { + model = "Arris TR4400 v2"; + compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064"; + + memory@0 { + reg = <0x42000000 0x1e000000>; + device_type = "memory"; + }; + + aliases { + led-boot = &led_status_blue; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + }; + + chosen { + bootargs = "rootfstype=squashfs noinitrd"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + + wps { + label = "wps"; + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_status_red: status_red { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: status_blue { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qcom_pinmux { + button_pins: button_pins { + mux { + pins = "gpio6", "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio7", "gpio8"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + rgmii2_pins: rgmii2-pins { + tx { + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32"; + input-disable; + }; + }; + + spi_pins: spi_pins { + cs { + pins = "gpio20"; + drive-strength = <12>; + }; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi@1a280000 { + status = "okay"; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "everspin,mr25h256"; + spi-max-frequency = <40000000>; + reg = <0>; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + reg = <0>; + compatible = "qcom,nandcs"; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:SBL1"; + reg = <0x0000000 0x0040000>; + read-only; + }; + partition@40000 { + label = "0:MIBIB"; + reg = <0x0040000 0x0140000>; + read-only; + }; + partition@180000 { + label = "0:SBL2"; + reg = <0x0180000 0x0140000>; + read-only; + }; + partition@2c0000 { + label = "0:SBL3"; + reg = <0x02c0000 0x0280000>; + read-only; + }; + partition@540000 { + label = "0:DDRCONFIG"; + reg = <0x0540000 0x0120000>; + read-only; + }; + partition@660000 { + label = "0:SSD"; + reg = <0x0660000 0x0120000>; + read-only; + }; + partition@780000 { + label = "0:TZ"; + reg = <0x0780000 0x0280000>; + read-only; + }; + partition@a00000 { + label = "0:RPM"; + reg = <0x0a00000 0x0280000>; + read-only; + }; + partition@c80000 { + label = "0:APPSBL"; + reg = <0x0c80000 0x0500000>; + read-only; + }; + partition@1180000 { + label = "0:APPSBLENV"; + reg = <0x1180000 0x0080000>; + }; + partition@1200000 { + label = "0:ART"; + reg = <0x1200000 0x0140000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + precal_ART_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + precal_ART_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + }; + }; + stock_partition@1340000 { + label = "stock_rootfs"; + reg = <0x1340000 0x4000000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "extra"; + reg = <0x0 0x4000000>; + }; + }; + partition@5340000 { + label = "0:BOOTCONFIG"; + reg = <0x5340000 0x0060000>; + read-only; + }; + partition@53a0000 { + label = "0:SBL2_1"; + reg = <0x53a0000 0x0140000>; + read-only; + }; + partition@54e0000 { + label = "0:SBL3_1"; + reg = <0x54e0000 0x0280000>; + read-only; + }; + partition@5760000 { + label = "0:DDRCONFIG_1"; + reg = <0x5760000 0x0120000>; + read-only; + }; + partition@5880000 { + label = "0:SSD_1"; + reg = <0x5880000 0x0120000>; + read-only; + }; + partition@59a0000 { + label = "0:TZ_1"; + reg = <0x59a0000 0x0280000>; + read-only; + }; + partition@5c20000 { + label = "0:RPM_1"; + reg = <0x5c20000 0x0280000>; + read-only; + }; + partition@5ea0000 { + label = "0:BOOTCONFIG1"; + reg = <0x5ea0000 0x0060000>; + read-only; + }; + partition@5f00000 { + label = "0:APPSBL_1"; + reg = <0x5f00000 0x0500000>; + read-only; + }; + stock_partition@6400000 { + label = "stock_rootfs_1"; + reg = <0x6400000 0x4000000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fw_env"; + reg = <0x0 0x100000>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_fw_env_0: macaddr@0 { + reg = <0x00 0x6>; + }; + macaddr_fw_env_6: macaddr@6 { + reg = <0x06 0x6>; + }; + macaddr_fw_env_c: macaddr@c { + reg = <0x0c 0x6>; + }; + macaddr_fw_env_12: macaddr@12 { + reg = <0x12 0x6>; + }; + macaddr_fw_env_18: macaddr@18 { + reg = <0x18 0x6>; + }; + }; + }; + + partition@100000 { + label = "ubi"; + reg = <0x100000 0x9b00000>; + }; + }; + stock_partition@a400000 { + label = "stock_fw_env"; + reg = <0xa400000 0x0100000>; + }; + stock_partition@a500000 { + label = "stock_config"; + reg = <0xa500000 0x0800000>; + }; + stock_partition@ad00000 { + label = "stock_PKI"; + reg = <0xad00000 0x0200000>; + }; + stock_partition@af00000 { + label = "stock_scfgmgr"; + reg = <0xaf00000 0x0100000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + switch@10 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <1000>; + rx-internal-delay-ps = <1000>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan4"; + phy-mode = "internal"; + phy-handle = <&phy_port4>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac1>; + phy-mode = "sgmii"; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + }; + }; + + phy7: ethernet-phy@7 { + reg = <7>; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + qcom,id = <0>; + + nvmem-cells = <&macaddr_fw_env_18>; + nvmem-cell-names = "mac-address"; + + pinctrl-0 = <&rgmii2_pins>; + pinctrl-names = "default"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac1 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <1>; + + nvmem-cells = <&macaddr_fw_env_0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac3 { + status = "okay"; + phy-mode = "sgmii"; + qcom,id = <3>; + phy-handle = <&phy7>; + + nvmem-cells = <&macaddr_fw_env_6>; + nvmem-cell-names = "mac-address"; +}; + +&adm_dma { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie0_pins>; + pinctrl-names = "default"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi0: wifi@1,0 { + compatible = "pci168c,0046"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>; + nvmem-cell-names = "pre-calibration", "mac-address"; + }; + }; +}; + +&pcie1 { + status = "okay"; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie1_pins>; + pinctrl-names = "default"; + max-link-speed = <1>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi1: wifi@1,0 { + compatible = "pci168c,0040"; + reg = <0x00010000 0 0 0 0>; + + nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>; + nvmem-cell-names = "pre-calibration", "mac-address"; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr450.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr450.dts new file mode 100644 index 0000000000..1d4e9d36fe --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr450.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8065-nighthawk.dtsi" + +/ { + model = "Netgear Nighthawk XR450"; + compatible = "netgear,xr450", "qcom,ipq8065", "qcom,ipq8064"; + +}; + +&leds { + usb1 { + label = "white:usb1"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb2"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; +}; + +&partitions { + partition@1880000 { + label = "ubi"; + reg = <0x1880000 0xce00000>; + }; + + partition@e680000 { + label = "reserve"; + reg = <0xe680000 0x0780000>; + read-only; + }; +}; + +&wifi0 { + nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; + +&wifi1 { + nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr500.dts new file mode 100644 index 0000000000..9eef59eaf3 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8065-xr500.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8065-nighthawk.dtsi" + +/ { + model = "Netgear Nighthawk XR500"; + compatible = "netgear,xr500", "qcom,ipq8065", "qcom,ipq8064"; + +}; + +&leds { + usb1 { + label = "white:usb1"; + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; + }; + + usb2 { + label = "white:usb2"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; + }; +}; + +&partitions { + partition@1880000 { + label = "ubi"; + reg = <0x1880000 0xce00000>; + }; + + partition@e680000 { + label = "reserve"; + reg = <0xe680000 0x0780000>; + read-only; + }; +}; + +&wifi0 { + nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; + +&wifi1 { + nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>; + nvmem-cell-names = "mac-address", "pre-calibration"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts new file mode 100644 index 0000000000..0c865ef7c7 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts @@ -0,0 +1,358 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq8064-v2.0.dtsi" + +#include +#include +#include + +/ { + model = "Extreme Networks AP3935"; + compatible = "extreme,ap3935", "qcom,ipq8064"; + + memory@0 { + reg = <0x41400000 0x3ec00000>; + device_type = "memory"; + }; + + aliases { + serial0 = &gsbi7_serial; + serial1 = &gsbi2_serial; + mdio-gpio0 = &mdio0; + ethernet0 = &gmac0; + ethernet1 = &gmac2; + + led-boot = &led_power_green; + led-failsafe = &led_power_orange; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>; + }; + + led_power_orange: power_orange { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>; + }; + + led_wlan2g_green { + label = "green:wlan2g"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_wlan5g_green { + label = "green:wlan5g"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led_lan1_green { + label = "green:lan1"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + led_lan1_orange { + label = "orange:lan1"; + gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>; + }; + + led_lan2_green { + label = "green:lan2"; + gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>; + }; + + led_lan2_orange { + label = "orange:lan2"; + gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>; + }; + }; +}; + + +&qcom_pinmux { + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19"; + function = "gsbi5"; + drive-strength = <10>; + bias-pull-down; + }; + + clk { + pins = "gpio21"; + function = "gsbi5"; + drive-strength = <12>; + bias-pull-down; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio22", "gpio23", "gpio24", "gpio25", + "gpio26", "gpio27", "gpio28", "gpio29"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio56"; + function = "gpio"; + bias-pull-up; + }; + }; +}; + +&gsbi2 { + qcom,mode = ; + status = "okay"; + + gsbi2_serial: serial@12490000 { + status = "okay"; + }; +}; + +&gsbi4 { + qcom,mode = ; + status = "okay"; + + serial@16340000 { + status = "disabled"; + }; +}; + +&gsbi7 { + qcom,mode = ; + status = "okay"; + + gsbi7_serial: serial@16640000 { + status = "okay"; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + cfg1@2a0000 { + compatible = "u-boot,env-redundant-bool"; + label = "CFG1"; + reg = <0x2a0000 0x0010000>; + + ethaddr: ethaddr { + #nvmem-cell-cells = <1>; + }; + }; + + bootpri@2b0000 { + label = "BootPRI"; + reg = <0x2b0000 0x0080000>; + }; + + cfg2@330000 { + label = "CFG2"; + reg = <0x330000 0x0010000>; + }; + + fs@340000 { + label = "FS"; + reg = <0x340000 0x0080000>; + }; + + priimg@3c0000 { + label = "PriImg"; + reg = <0x3c0000 0x0e10000>; + }; + + secimg@11d0000 { + label = "SecImg"; + reg = <0x11d0000 0x0e10000>; + }; + }; + }; + }; +}; + +&pcie0 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&pcie1 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&nand { + status = "okay"; + + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + nand@0 { + compatible = "qcom,nandcs"; + + reg = <0>; + + nand-ecc-strength = <8>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ubi@0 { + label = "ubi"; + reg = <0x0000000 0x20000000>; + }; + }; + }; +}; + +&soc { + mdio1: mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; + }; +}; + +&gmac0 { + status = "okay"; + + qcom,id = <0>; + mdiobus = <&mdio1>; + + phy-mode = "rgmii"; + phy-handle = <&phy1>; + + nvmem-cells = <ðaddr 0>; + nvmem-cell-names = "mac-address"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gmac2 { + status = "okay"; + + qcom,id = <2>; + mdiobus = <&mdio1>; + + phy-mode = "sgmii"; + phy-handle = <&phy2>; + + nvmem-cells = <ðaddr 1>; + nvmem-cell-names = "mac-address"; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-cryptid-common.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-cryptid-common.dtsi new file mode 100644 index 0000000000..a8f43591f9 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-cryptid-common.dtsi @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT + +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +/ { + memory { + device_type = "memory"; + linux,usable-memory = <0x41500000 0x1ea00000>; + reg = <0x40000000 0x20000000>; + }; + + cpus { + idle-states { + CPU_SPC: spc { + status = "disabled"; + }; + }; + }; + + chosen { + bootargs-append = " console=ttyMSM0,115200n8 ubi.mtd=ubi ubi.mtd=art"; + }; +}; + +&qcom_pinmux { + mdio0_pins_active: mdio0_pins_active { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + + clk { + pins = "gpio1"; + input-disable; + }; + }; + + phy_active: phy_active { + phy { + pins = "gpio6", "gpio7"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-high; + }; + }; + + uart1_pins: uart1_pins { + mux { + pins = "gpio51", "gpio52"; + function = "gsbi1"; + drive-strength = <4>; + bias-disable; + }; + }; +}; + +&gsbi1 { + status = "okay"; + qcom,mode = ; + + serial@12450000 { + status = "okay"; + + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + }; +}; + +&pcie0 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x0 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi0: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x10000 0 0 0 0>; + }; + }; +}; + +&pcie1 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x0 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi1: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x10000 0 0 0 0>; + }; + }; +}; + +&pcie2 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x0 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x10000 0 0 0 0>; + }; + }; +}; + +&adm_dma { + status = "okay"; +}; + +&nand { + status = "okay"; + + nand@0 { + compatible = "qcom,nandcs"; + + reg = <0>; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + nand-is-boot-medium; + qcom,boot-partitions = <0x0 0x2140000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "sbl1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "mibib"; + reg = <0x40000 0x140000>; + read-only; + }; + + partition@180000 { + label = "sbl2"; + reg = <0x180000 0x140000>; + read-only; + }; + + partition@2c0000 { + label = "sbl3"; + reg = <0x2c0000 0x280000>; + read-only; + }; + + partition@540000 { + label = "ddrconfig"; + reg = <0x540000 0x120000>; + read-only; + }; + + partition@660000 { + label = "ssd"; + reg = <0x660000 0x120000>; + read-only; + }; + + partition@780000 { + label = "tz"; + reg = <0x780000 0x280000>; + read-only; + }; + + partition@a00000 { + label = "rpm"; + reg = <0xa00000 0x280000>; + read-only; + }; + + partition@1fc0000 { + label = "u-boot"; + reg = <0x1fc0000 0x180000>; + read-only; + }; + + partition@21c0000 { + label = "bootkernel1"; + reg = <0x21c0000 0xa80000>; + }; + + partition@2c40000 { + label = "bootkernel2"; + reg = <0x2c40000 0xa80000>; + }; + + partition@36c0000 { + label = "ubi"; + reg = <0x36c0000 0x46c0000>; + }; + + partition@7d80000 { + label = "art"; + reg = <0x7d80000 0x200000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ecw5410.dts new file mode 100644 index 0000000000..9f6c5fb696 --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ecw5410.dts @@ -0,0 +1,332 @@ +#include "qcom-ipq8064-v2.0-smb208.dtsi" + +#include +#include +#include + +/ { + model = "Edgecore ECW5410"; + compatible = "edgecore,ecw5410", "qcom,ipq8064"; + + reserved-memory { + nss@40000000 { + reg = <0x40000000 0x1000000>; + no-map; + }; + + smem: smem@41000000 { + reg = <0x41000000 0x200000>; + no-map; + }; + + wifi_dump@44000000 { + reg = <0x44000000 0x600000>; + no-map; + }; + }; + + cpus { + idle-states { + CPU_SPC: spc { + status = "disabled"; + }; + }; + }; + + aliases { + serial1 = &gsbi1_serial; + ethernet0 = &gmac2; + ethernet1 = &gmac3; + + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + chosen { + bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power_green: power_green { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; + }; + + wlan2g_green { + label = "green:wlan2g"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>; + }; + + wlan2g_yellow { + label = "yellow:wlan2g"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>; + }; + + wlan5g_green { + label = "green:wlan5g"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + led_power_red: power_red { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>; + }; + + wlan5g_yellow { + label = "yellow:wlan5g"; + gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>; + }; + }; +}; + + +&qcom_pinmux { + spi_pins: spi_pins { + mux { + pins = "gpio18", "gpio19"; + function = "gsbi5"; + drive-strength = <10>; + bias-pull-down; + }; + + clk { + pins = "gpio21"; + function = "gsbi5"; + drive-strength = <12>; + bias-pull-down; + }; + + cs { + pins = "gpio20"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio16", "gpio23", "gpio24", "gpio26", + "gpio28", "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio25"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + uart1_pins: uart1_pins { + mux { + pins = "gpio51", "gpio52", "gpio53", "gpio54"; + function = "gsbi1"; + drive-strength = <12>; + bias-none; + }; + }; +}; + +&gsbi1 { + qcom,mode = ; + status = "okay"; + + serial@12450000 { + status = "okay"; + + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + }; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; + + spi4: spi@1a280000 { + status = "okay"; + spi-max-frequency = <50000000>; + + pinctrl-0 = <&spi_pins>; + pinctrl-names = "default"; + + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "qcom,smem-part"; + }; + }; + }; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L"; + }; + }; +}; + +&pcie2 { + status = "okay"; + + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + /delete-property/ perst-gpios; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "qcom,ath10k"; + status = "okay"; + reg = <0x00010000 0 0 0 0>; + qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L"; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + compatible = "qcom,nandcs"; + + reg = <0>; + + nand-ecc-strength = <4>; + nand-bus-width = <8>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + rootfs1@0 { + label = "rootfs1"; + reg = <0x0000000 0x4000000>; + }; + + rootfs2@4000000 { + label = "rootfs2"; + reg = <0x4000000 0x4000000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins>; + pinctrl-names = "default"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&gmac2 { + status = "okay"; + + qcom,id = <2>; + mdiobus = <&mdio0>; + + phy-mode = "sgmii"; + phy-handle = <&phy1>; +}; + +&gmac3 { + status = "okay"; + + qcom,id = <3>; + mdiobus = <&mdio0>; + + phy-mode = "sgmii"; + phy-handle = <&phy0>; +}; + +&adm_dma { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr42.dts new file mode 100644 index 0000000000..7ec11de56b --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr42.dts @@ -0,0 +1,233 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT + +#include "qcom-ipq8068-cryptid-common.dtsi" + +#include +#include + +/ { + model = "Meraki MR42"; + compatible = "meraki,mr42", "qcom,ipq8064"; + + aliases { + serial1 = &gsbi1_serial; + ethernet0 = &gmac3; + + led-boot = &led_active; + led-failsafe = &led_power; + led-running = &led_active; + led-upgrade = &led_active; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 31 GPIO_ACTIVE_HIGH>; + }; + + led_active: active { + label = "white:active"; + gpios = <&qcom_pinmux 32 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gmac3 { + status = "okay"; + + qcom,id = <3>; + mdiobus = <&mdio0>; + + phy-mode = "sgmii"; + phy-handle = <&phy2>; + + nvmem-cells = <&mac_address 0>; + nvmem-cell-names = "mac-address"; +}; + +&gsbi2 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi2_i2c { + status = "okay"; + + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + + ina2xx@40 { + compatible = "ina219"; + shunt-resistor = <40000>; + reg = <0x40>; + }; + + eeprom@56 { + compatible = "atmel,24c64"; + pagesize = <32>; + reg = <0x56>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + compatible = "mac-base"; + reg = <0x66 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; +}; + +&gsbi6 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi6_i2c { + status = "okay"; + + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + tlc591xx@40 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,tlc59108"; + reg = <0x40>; + + red@0 { + label = "red:user"; + reg = <0x0>; + }; + + green@1 { + label = "green:user"; + reg = <0x1>; + }; + + blue@2 { + label = "blue:user"; + reg = <0x2>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + pinctrl-0 = <&mdio0_pins_active>, <&phy_active>; + pinctrl-names = "default"; + + phy2: ethernet-phy2 { + reg = <2>; + + reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + reset-assert-us = <24000>; + + eee-broken-100tx; + eee-broken-1000t; + }; +}; + +&qcom_pinmux { + i2c0_pins: i2c0_pins { + mux { + pins = "gpio24", "gpio25"; + function = "gsbi2"; + drive-strength = <2>; + bias-pull-up; + input; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio26"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + i2c1_pins: i2c1_pins { + mux { + pins = "gpio29", "gpio30"; + function = "gsbi6"; + drive-strength = <2>; + bias-pull-up; + input; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio31", "gpio32"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-low; + }; + }; +}; + +&wifi0 { + nvmem-cells = <&mac_address 1>; + nvmem-cell-names = "mac-address"; +}; + +&wifi1 { + nvmem-cells = <&mac_address 2>; + nvmem-cell-names = "mac-address"; +}; + +&wifi2 { + nvmem-cells = <&mac_address 3>; + nvmem-cell-names = "mac-address"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr52.dts new file mode 100644 index 0000000000..7512bfb74f --- /dev/null +++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-mr52.dts @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT + +#include "qcom-ipq8068-cryptid-common.dtsi" + +#include +#include + +/ { + model = "Meraki MR52"; + compatible = "meraki,mr52", "qcom,ipq8064"; + + aliases { + serial1 = &gsbi1_serial; + mdio-gpio0 = &mdio_gpio0; + ethernet0 = &gmac2; + ethernet1 = &gmac3; + + led-boot = &led_active; + led-failsafe = &led_power; + led-running = &led_active; + led-upgrade = &led_active; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led_power: power { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&qcom_pinmux 19 GPIO_ACTIVE_HIGH>; + }; + + lan2_green { + label = "green:lan2"; + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; + }; + + lan1_green { + label = "green:lan1"; + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; + }; + + led_active: active { + label = "white:active"; + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; + }; + + lan2_orange { + label = "orange:lan2"; + gpios = <&qcom_pinmux 60 GPIO_ACTIVE_HIGH>; + }; + + lan1_orange { + label = "orange:lan1"; + gpios = <&qcom_pinmux 62 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gmac2 { + status = "okay"; + + qcom,id = <2>; + mdiobus = <&mdio0>; + + phy-mode = "sgmii"; + phy-handle = <&phy0>; + + nvmem-cells = <&mac_address 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac3 { + status = "okay"; + + qcom,id = <3>; + mdiobus = <&mdio_gpio0>; + + phy-mode = "sgmii"; + phy-handle = <&phy4>; + + nvmem-cells = <&mac_address 1>; + nvmem-cell-names = "mac-address"; +}; + +&gsbi7 { + status = "okay"; + qcom,mode = ; +}; + +&gsbi7_i2c { + status = "okay"; + + pinctrl-0 = <&i2c_pins>; + pinctrl-names = "default"; + + ina2xx@45 { + compatible = "ina219"; + shunt-resistor = <80000>; + reg = <0x45>; + }; + + tlc591xx@49 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,tlc59108"; + reg = <0x49>; + + red@0 { + label = "red:user"; + reg = <0x0>; + }; + + green@1 { + label = "green:user"; + reg = <0x1>; + }; + + blue@2 { + label = "blue:user"; + reg = <0x2>; + }; + }; + + eeprom@52 { + compatible = "atmel,24c64"; + pagesize = <32>; + reg = <0x52>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + compatible = "mac-base"; + reg = <0x66 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; +}; + +&qcom_pinmux { + i2c_pins: i2c_pins { + mux { + pins = "gpio8", "gpio9"; + function = "gsbi7"; + drive-strength = <2>; + bias-pull-up; + input; + }; + }; + + led_pins: led_pins { + mux { + pins = "gpio19", "gpio26"; + function = "gpio"; + drive-strength = <12>; + bias-pull-down; + output-low; + }; + }; + + button_pins: button_pins { + mux { + pins = "gpio25"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + input; + }; + }; +}; + +&soc { + mdio_gpio0: mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + pinctrl-0 = <&mdio0_pins_active>, <&phy_active>; + pinctrl-names = "default"; + + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH + &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + phy0: ethernet-phy0 { + reg = <0>; + reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>; + reset-assert-us = <24000>; + }; + + phy4: ethernet-phy4 { + reg = <4>; + reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; + reset-assert-us = <24000>; + }; + }; +}; + +&wifi0 { + nvmem-cells = <&mac_address 4>; + nvmem-cell-names = "mac-address"; +}; + +&wifi1 { + nvmem-cells = <&mac_address 3>; + nvmem-cell-names = "mac-address"; +}; + +&wifi2 { + nvmem-cells = <&mac_address 2>; + nvmem-cell-names = "mac-address"; +}; + +&hs_phy_0 { + status = "okay"; +}; + +&ss_phy_0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&hs_phy_1 { + status = "okay"; +}; + +&ss_phy_1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile index 8c1fc88010..c6be9371e3 100644 --- a/target/linux/ipq806x/image/Makefile +++ b/target/linux/ipq806x/image/Makefile @@ -6,6 +6,7 @@ include $(INCLUDE_DIR)/image.mk define Device/Default PROFILES := Default KERNEL_LOADADDR = 0x42208000 + DEVICE_DTS_DIR = $(if $(CONFIG_TESTING_KERNEL),$$(DTS_DIR)/qcom,$$(DTS_DIR)) DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1))) DEVICE_DTS_CONFIG := config@1 IMAGES := sysupgrade.bin From a705c8c681edd38fdecf25de4c8d5381278d31a2 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:47:20 +0100 Subject: [PATCH 26/31] ipq806x: 6.6: drop upstream kernel patches Drop upstream kernel patches that were straight backport. Signed-off-by: Christian Marangi --- ...kpss-xcc-register-it-as-clk-provider.patch | 60 --- ...c-use-devm-variant-for-clk-notifier-.patch | 27 -- ...c-fix-wrong-parent-order-for-seconda.patch | 46 -- ...c-also-enable-secondary-mux-and-div-.patch | 68 --- ...c-handle-secondary-mux-sourcing-out-.patch | 48 -- ...t-cc-convert-to-devm_clk_hw_register.patch | 104 ----- ...-krait-cc-convert-to-parent_data-API.patch | 414 ------------------ ...q8064-disable-mmc-ddr-1_8v-for-sdcc1.patch | 28 -- ...qcom-tsens-Init-debugfs-only-with-su.patch | 42 -- ...qcom-tsens-Fix-wrong-version-id-dbg_.patch | 29 -- ...qcom-tsens-Rework-debugfs-file-struc.patch | 54 --- 11 files changed, 920 deletions(-) delete mode 100644 target/linux/ipq806x/patches-6.6/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch delete mode 100644 target/linux/ipq806x/patches-6.6/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch delete mode 100644 target/linux/ipq806x/patches-6.6/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch delete mode 100644 target/linux/ipq806x/patches-6.6/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch delete mode 100644 target/linux/ipq806x/patches-6.6/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch delete mode 100644 target/linux/ipq806x/patches-6.6/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch diff --git a/target/linux/ipq806x/patches-6.6/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch b/target/linux/ipq806x/patches-6.6/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch deleted file mode 100644 index 9395f1b241..0000000000 --- a/target/linux/ipq806x/patches-6.6/001-v6.2-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 09be1a39e685d8c5edd471fd1cac9a8f8280d2de Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Tue, 8 Nov 2022 22:17:34 +0100 -Subject: [PATCH] clk: qcom: kpss-xcc: register it as clk provider - -krait-cc use this driver for the secondary mux. Register it as a clk -provider to correctly use this clk in other drivers. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221108211734.3707-1-ansuelsmth@gmail.com ---- - drivers/clk/qcom/kpss-xcc.c | 13 +++++++++---- - 1 file changed, 9 insertions(+), 4 deletions(-) - ---- a/drivers/clk/qcom/kpss-xcc.c -+++ b/drivers/clk/qcom/kpss-xcc.c -@@ -31,12 +31,13 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_t - - static int kpss_xcc_driver_probe(struct platform_device *pdev) - { -+ struct device *dev = &pdev->dev; - const struct of_device_id *id; - void __iomem *base; - struct clk_hw *hw; - const char *name; - -- id = of_match_device(kpss_xcc_match_table, &pdev->dev); -+ id = of_match_device(kpss_xcc_match_table, dev); - if (!id) - return -ENODEV; - -@@ -45,7 +46,7 @@ static int kpss_xcc_driver_probe(struct - return PTR_ERR(base); - - if (id->data) { -- if (of_property_read_string_index(pdev->dev.of_node, -+ if (of_property_read_string_index(dev->of_node, - "clock-output-names", - 0, &name)) - return -ENODEV; -@@ -55,12 +56,16 @@ static int kpss_xcc_driver_probe(struct - base += 0x28; - } - -- hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents, -+ hw = devm_clk_hw_register_mux_parent_data_table(dev, name, aux_parents, - ARRAY_SIZE(aux_parents), 0, - base, 0, 0x3, - 0, aux_parent_map, NULL); -+ if (IS_ERR(hw)) -+ return PTR_ERR(hw); - -- return PTR_ERR_OR_ZERO(hw); -+ of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); -+ -+ return 0; - } - - static struct platform_driver kpss_xcc_driver = { diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch deleted file mode 100644 index 65c1fc17f2..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-01-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 3198106a99e73dbc4c02bd5128cec0997c73af82 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Tue, 8 Nov 2022 22:58:27 +0100 -Subject: [PATCH 1/6] clk: qcom: krait-cc: use devm variant for clk notifier - register - -Use devm variant for clk notifier register and correctly handle free -resource on driver remove. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221108215827.30475-1-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -62,7 +62,7 @@ static int krait_notifier_register(struc - int ret = 0; - - mux->clk_nb.notifier_call = krait_notifier_cb; -- ret = clk_notifier_register(clk, &mux->clk_nb); -+ ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb); - if (ret) - dev_err(dev, "failed to register clock notifier: %d\n", ret); - diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch deleted file mode 100644 index 2dcb69399c..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-02-clk-qcom-krait-cc-fix-wrong-parent-order-for-seconda.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 8e456411abcbf899c04740b9dbb3dcefcd61c946 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 9 Nov 2022 01:56:27 +0100 -Subject: [PATCH 2/6] clk: qcom: krait-cc: fix wrong parent order for secondary - mux - -The secondary mux parent order is swapped. -This currently doesn't cause problems as the secondary mux is used for idle -clk and as a safe clk source while reprogramming the hfpll. - -Each mux have 2 or more output but he always have a safe source to -switch while reprogramming the connected pll. We use a clk notifier to -switch to the correct parent before clk core can apply the correct rate. -The parent to switch is hardcoded in the mux struct. - -For the secondary mux the safe source to use is the qsb parent as it's -the only fixed clk as the acpus_aux is a pll that can source from pxo or -from pll8. - -The hardcoded safe parent for the secondary mux is set to index 0 that -in the secondary mux map is set to 2. - -But the index 0 is actually acpu_aux in the parent list. - -Fix the swapped parents to correctly handle idle frequency and output a -sane clk_summary report. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221109005631.3189-1-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, in - int ret; - struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { -- "acpu_aux", - "qsb", -+ "acpu_aux", - }; - struct clk_init_data init = { - .parent_names = sec_mux_list, diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch deleted file mode 100644 index 6261a940d7..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-03-clk-qcom-krait-cc-also-enable-secondary-mux-and-div-.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 18ae57b1e8abee6c453381470f6e18991d2901a8 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 9 Nov 2022 01:56:28 +0100 -Subject: [PATCH 3/6] clk: qcom: krait-cc: also enable secondary mux and div - clk - -clk-krait ignore any rate change if clk is not flagged as enabled. -Correctly enable the secondary mux and div clk to correctly change rate -instead of silently ignoring the request. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221109005631.3189-2-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++- - 1 file changed, 20 insertions(+), 1 deletion(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id - }; - const char *p_names[1]; - struct clk *clk; -+ int cpu; - - div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); - if (!div) -@@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id - } - - clk = devm_clk_register(dev, &div->hw); -+ if (IS_ERR(clk)) -+ goto err; -+ -+ /* clk-krait ignore any rate change if mux is not flagged as enabled */ -+ if (id < 0) -+ for_each_online_cpu(cpu) -+ clk_prepare_enable(div->hw.clk); -+ else -+ clk_prepare_enable(div->hw.clk); -+ -+err: - kfree(p_names[0]); - kfree(init.name); - -@@ -113,7 +125,7 @@ static int - krait_add_sec_mux(struct device *dev, int id, const char *s, - unsigned int offset, bool unique_aux) - { -- int ret; -+ int cpu, ret; - struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "qsb", -@@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, in - if (ret) - goto unique_aux; - -+ /* clk-krait ignore any rate change if mux is not flagged as enabled */ -+ if (id < 0) -+ for_each_online_cpu(cpu) -+ clk_prepare_enable(mux->hw.clk); -+ else -+ clk_prepare_enable(mux->hw.clk); -+ - unique_aux: - if (unique_aux) - kfree(sec_mux_list[0]); diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch deleted file mode 100644 index fabb299f42..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-04-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch +++ /dev/null @@ -1,48 +0,0 @@ -From e5dc1a4c01510da8438dddfdf4200b79d73990dc Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 9 Nov 2022 01:56:29 +0100 -Subject: [PATCH 4/6] clk: qcom: krait-cc: handle secondary mux sourcing out of - acpu_aux - -Some bootloader may leave the system in an even more undefined state -with the secondary mux of L2 or other cores sourcing out of the acpu_aux -parent. This results in the clk set to the PXO rate or a PLL8 rate. - -The current logic to reset the mux and set them to a defined state only -handle if the mux are configured to source out of QSB. Change this and -force a new and defined state if the current clk is lower than the aux -rate. This way we can handle any wrong configuration where the mux is -sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1), -PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz). - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221109005631.3189-3-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -383,8 +383,8 @@ static int krait_cc_probe(struct platfor - */ - cur_rate = clk_get_rate(l2_pri_mux_clk); - aux_rate = 384000000; -- if (cur_rate == 1) { -- pr_info("L2 @ QSB rate. Forcing new rate.\n"); -+ if (cur_rate < aux_rate) { -+ pr_info("L2 @ Undefined rate. Forcing new rate.\n"); - cur_rate = aux_rate; - } - clk_set_rate(l2_pri_mux_clk, aux_rate); -@@ -394,8 +394,8 @@ static int krait_cc_probe(struct platfor - for_each_possible_cpu(cpu) { - clk = clks[cpu]; - cur_rate = clk_get_rate(clk); -- if (cur_rate == 1) { -- pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); -+ if (cur_rate < aux_rate) { -+ pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu); - cur_rate = aux_rate; - } - diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch deleted file mode 100644 index 049b1fa49f..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-05-clk-qcom-krait-cc-convert-to-devm_clk_hw_register.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 9 Nov 2022 01:56:30 +0100 -Subject: [PATCH 5/6] clk: qcom: krait-cc: convert to devm_clk_hw_register - -clk_register is now deprecated. Convert the driver to devm_clk_hw_register. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221109005631.3189-4-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------ - 1 file changed, 19 insertions(+), 12 deletions(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id - .flags = CLK_SET_RATE_PARENT, - }; - const char *p_names[1]; -- struct clk *clk; -- int cpu; -+ int cpu, ret; - - div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); - if (!div) -@@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id - return -ENOMEM; - } - -- clk = devm_clk_register(dev, &div->hw); -- if (IS_ERR(clk)) -+ ret = devm_clk_hw_register(dev, &div->hw); -+ if (ret) - goto err; - - /* clk-krait ignore any rate change if mux is not flagged as enabled */ -@@ -118,7 +117,7 @@ err: - kfree(p_names[0]); - kfree(init.name); - -- return PTR_ERR_OR_ZERO(clk); -+ return ret; - } - - static int -@@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, in - .ops = &krait_mux_clk_ops, - .flags = CLK_SET_RATE_PARENT, - }; -- struct clk *clk; - - mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); - if (!mux) -@@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, in - if (unique_aux) { - sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); - if (!sec_mux_list[0]) { -- clk = ERR_PTR(-ENOMEM); -+ ret = -ENOMEM; - goto err_aux; - } - } - -- clk = devm_clk_register(dev, &mux->hw); -+ ret = devm_clk_hw_register(dev, &mux->hw); -+ if (ret) -+ goto unique_aux; - -- ret = krait_notifier_register(dev, clk, mux); -+ ret = krait_notifier_register(dev, mux->hw.clk, mux); - if (ret) - goto unique_aux; - -@@ -189,7 +189,7 @@ unique_aux: - kfree(sec_mux_list[0]); - err_aux: - kfree(init.name); -- return PTR_ERR_OR_ZERO(clk); -+ return ret; - } - - static struct clk * -@@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, in - goto err_p2; - } - -- clk = devm_clk_register(dev, &mux->hw); -+ ret = devm_clk_hw_register(dev, &mux->hw); -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err_p3; -+ } -+ -+ clk = mux->hw.clk; - - ret = krait_notifier_register(dev, clk, mux); - if (ret) -- goto err_p3; -+ clk = ERR_PTR(ret); -+ - err_p3: - kfree(p_names[2]); - err_p2: diff --git a/target/linux/ipq806x/patches-6.6/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch b/target/linux/ipq806x/patches-6.6/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch deleted file mode 100644 index 453a37dfc0..0000000000 --- a/target/linux/ipq806x/patches-6.6/002-v6.2-06-clk-qcom-krait-cc-convert-to-parent_data-API.patch +++ /dev/null @@ -1,414 +0,0 @@ -From 56a655e1c41a86445cf2de656649ad93424b2a63 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 9 Nov 2022 01:56:31 +0100 -Subject: [PATCH 6/6] clk: qcom: krait-cc: convert to parent_data API - -Modernize the krait-cc driver to parent-data API and refactor to drop -any use of parent_names. From Documentation all the required clocks should -be declared in DTS so fw_name can be correctly used to get the parents -for all the muxes. .name is also declared to save compatibility with old -DT. - -While at it also drop some hardcoded index and introduce an enum to make -index values more clear. - -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221109005631.3189-5-ansuelsmth@gmail.com ---- - drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++---------------- - 1 file changed, 112 insertions(+), 90 deletions(-) - ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -15,6 +15,16 @@ - - #include "clk-krait.h" - -+enum { -+ cpu0_mux = 0, -+ cpu1_mux, -+ cpu2_mux, -+ cpu3_mux, -+ l2_mux, -+ -+ clks_max, -+}; -+ - static unsigned int sec_mux_map[] = { - 2, - 0, -@@ -69,21 +79,23 @@ static int krait_notifier_register(struc - return ret; - } - --static int -+static struct clk_hw * - krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) - { - struct krait_div2_clk *div; -+ static struct clk_parent_data p_data[1]; - struct clk_init_data init = { -- .num_parents = 1, -+ .num_parents = ARRAY_SIZE(p_data), - .ops = &krait_div2_clk_ops, - .flags = CLK_SET_RATE_PARENT, - }; -- const char *p_names[1]; -+ struct clk_hw *clk; -+ char *parent_name; - int cpu, ret; - - div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); - if (!div) -- return -ENOMEM; -+ return ERR_PTR(-ENOMEM); - - div->width = 2; - div->shift = 6; -@@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id - - init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); - if (!init.name) -- return -ENOMEM; -+ return ERR_PTR(-ENOMEM); - -- init.parent_names = p_names; -- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); -- if (!p_names[0]) { -- kfree(init.name); -- return -ENOMEM; -+ init.parent_data = p_data; -+ parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); -+ if (!parent_name) { -+ clk = ERR_PTR(-ENOMEM); -+ goto err_parent_name; - } - -+ p_data[0].fw_name = parent_name; -+ p_data[0].name = parent_name; -+ - ret = devm_clk_hw_register(dev, &div->hw); -- if (ret) -- goto err; -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err_clk; -+ } -+ -+ clk = &div->hw; - - /* clk-krait ignore any rate change if mux is not flagged as enabled */ - if (id < 0) -@@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id - else - clk_prepare_enable(div->hw.clk); - --err: -- kfree(p_names[0]); -+err_clk: -+ kfree(parent_name); -+err_parent_name: - kfree(init.name); - -- return ret; -+ return clk; - } - --static int -+static struct clk_hw * - krait_add_sec_mux(struct device *dev, int id, const char *s, - unsigned int offset, bool unique_aux) - { - int cpu, ret; - struct krait_mux_clk *mux; -- static const char *sec_mux_list[] = { -- "qsb", -- "acpu_aux", -+ static struct clk_parent_data sec_mux_list[2] = { -+ { .name = "qsb", .fw_name = "qsb" }, -+ {}, - }; - struct clk_init_data init = { -- .parent_names = sec_mux_list, -+ .parent_data = sec_mux_list, - .num_parents = ARRAY_SIZE(sec_mux_list), - .ops = &krait_mux_clk_ops, - .flags = CLK_SET_RATE_PARENT, - }; -+ struct clk_hw *clk; -+ char *parent_name; - - mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); - if (!mux) -- return -ENOMEM; -+ return ERR_PTR(-ENOMEM); - - mux->offset = offset; - mux->lpl = id >= 0; -@@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, in - - init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!init.name) -- return -ENOMEM; -+ return ERR_PTR(-ENOMEM); - - if (unique_aux) { -- sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); -- if (!sec_mux_list[0]) { -- ret = -ENOMEM; -+ parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); -+ if (!parent_name) { -+ clk = ERR_PTR(-ENOMEM); - goto err_aux; - } -+ sec_mux_list[1].fw_name = parent_name; -+ sec_mux_list[1].name = parent_name; -+ } else { -+ sec_mux_list[1].name = "apu_aux"; - } - - ret = devm_clk_hw_register(dev, &mux->hw); -- if (ret) -- goto unique_aux; -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err_clk; -+ } -+ -+ clk = &mux->hw; - - ret = krait_notifier_register(dev, mux->hw.clk, mux); -- if (ret) -- goto unique_aux; -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err_clk; -+ } - - /* clk-krait ignore any rate change if mux is not flagged as enabled */ - if (id < 0) -@@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, in - else - clk_prepare_enable(mux->hw.clk); - --unique_aux: -+err_clk: - if (unique_aux) -- kfree(sec_mux_list[0]); -+ kfree(parent_name); - err_aux: - kfree(init.name); -- return ret; -+ return clk; - } - --static struct clk * --krait_add_pri_mux(struct device *dev, int id, const char *s, -- unsigned int offset) -+static struct clk_hw * -+krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux, -+ int id, const char *s, unsigned int offset) - { - int ret; - struct krait_mux_clk *mux; -- const char *p_names[3]; -+ static struct clk_parent_data p_data[3]; - struct clk_init_data init = { -- .parent_names = p_names, -- .num_parents = ARRAY_SIZE(p_names), -+ .parent_data = p_data, -+ .num_parents = ARRAY_SIZE(p_data), - .ops = &krait_mux_clk_ops, - .flags = CLK_SET_RATE_PARENT, - }; -- struct clk *clk; -+ struct clk_hw *clk; -+ char *hfpll_name; - - mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); - if (!mux) -@@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, in - if (!init.name) - return ERR_PTR(-ENOMEM); - -- p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); -- if (!p_names[0]) { -+ hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); -+ if (!hfpll_name) { - clk = ERR_PTR(-ENOMEM); -- goto err_p0; -+ goto err_hfpll; - } - -- p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); -- if (!p_names[1]) { -- clk = ERR_PTR(-ENOMEM); -- goto err_p1; -- } -+ p_data[0].fw_name = hfpll_name; -+ p_data[0].name = hfpll_name; - -- p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); -- if (!p_names[2]) { -- clk = ERR_PTR(-ENOMEM); -- goto err_p2; -- } -+ p_data[1].hw = hfpll_div; -+ p_data[2].hw = sec_mux; - - ret = devm_clk_hw_register(dev, &mux->hw); - if (ret) { - clk = ERR_PTR(ret); -- goto err_p3; -+ goto err_clk; - } - -- clk = mux->hw.clk; -+ clk = &mux->hw; - -- ret = krait_notifier_register(dev, clk, mux); -+ ret = krait_notifier_register(dev, mux->hw.clk, mux); - if (ret) - clk = ERR_PTR(ret); - --err_p3: -- kfree(p_names[2]); --err_p2: -- kfree(p_names[1]); --err_p1: -- kfree(p_names[0]); --err_p0: -+err_clk: -+ kfree(hfpll_name); -+err_hfpll: - kfree(init.name); - return clk; - } - - /* id < 0 for L2, otherwise id == physical CPU number */ --static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) -+static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux) - { -- int ret; -+ struct clk_hw *hfpll_div, *sec_mux, *pri_mux; - unsigned int offset; - void *p = NULL; - const char *s; -- struct clk *clk; - - if (id >= 0) { - offset = 0x4501 + (0x1000 * id); -@@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct - s = "_l2"; - } - -- ret = krait_add_div(dev, id, s, offset); -- if (ret) { -- clk = ERR_PTR(ret); -+ hfpll_div = krait_add_div(dev, id, s, offset); -+ if (IS_ERR(hfpll_div)) { -+ pri_mux = hfpll_div; - goto err; - } - -- ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); -- if (ret) { -- clk = ERR_PTR(ret); -+ sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); -+ if (IS_ERR(sec_mux)) { -+ pri_mux = sec_mux; - goto err; - } - -- clk = krait_add_pri_mux(dev, id, s, offset); -+ pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); -+ - err: - kfree(p); -- return clk; -+ return pri_mux; - } - - static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) -@@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct o - unsigned int idx = clkspec->args[0]; - struct clk **clks = data; - -- if (idx >= 5) { -+ if (idx >= clks_max) { - pr_err("%s: invalid clock index %d\n", __func__, idx); - return ERR_PTR(-EINVAL); - } -@@ -327,9 +350,8 @@ static int krait_cc_probe(struct platfor - const struct of_device_id *id; - unsigned long cur_rate, aux_rate; - int cpu; -- struct clk *clk; -- struct clk **clks; -- struct clk *l2_pri_mux_clk; -+ struct clk_hw *mux, *l2_pri_mux; -+ struct clk *clk, **clks; - - id = of_match_device(krait_cc_match_table, dev); - if (!id) -@@ -348,21 +370,21 @@ static int krait_cc_probe(struct platfor - } - - /* Krait configurations have at most 4 CPUs and one L2 */ -- clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); -+ clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL); - if (!clks) - return -ENOMEM; - - for_each_possible_cpu(cpu) { -- clk = krait_add_clks(dev, cpu, id->data); -+ mux = krait_add_clks(dev, cpu, id->data); - if (IS_ERR(clk)) - return PTR_ERR(clk); -- clks[cpu] = clk; -+ clks[cpu] = mux->clk; - } - -- l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); -- if (IS_ERR(l2_pri_mux_clk)) -- return PTR_ERR(l2_pri_mux_clk); -- clks[4] = l2_pri_mux_clk; -+ l2_pri_mux = krait_add_clks(dev, -1, id->data); -+ if (IS_ERR(l2_pri_mux)) -+ return PTR_ERR(l2_pri_mux); -+ clks[l2_mux] = l2_pri_mux->clk; - - /* - * We don't want the CPU or L2 clocks to be turned off at late init -@@ -372,7 +394,7 @@ static int krait_cc_probe(struct platfor - * they take over. - */ - for_each_online_cpu(cpu) { -- clk_prepare_enable(l2_pri_mux_clk); -+ clk_prepare_enable(clks[l2_mux]); - WARN(clk_prepare_enable(clks[cpu]), - "Unable to turn on CPU%d clock", cpu); - } -@@ -388,16 +410,16 @@ static int krait_cc_probe(struct platfor - * two different rates to force a HFPLL reinit under all - * circumstances. - */ -- cur_rate = clk_get_rate(l2_pri_mux_clk); -+ cur_rate = clk_get_rate(clks[l2_mux]); - aux_rate = 384000000; - if (cur_rate < aux_rate) { - pr_info("L2 @ Undefined rate. Forcing new rate.\n"); - cur_rate = aux_rate; - } -- clk_set_rate(l2_pri_mux_clk, aux_rate); -- clk_set_rate(l2_pri_mux_clk, 2); -- clk_set_rate(l2_pri_mux_clk, cur_rate); -- pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); -+ clk_set_rate(clks[l2_mux], aux_rate); -+ clk_set_rate(clks[l2_mux], 2); -+ clk_set_rate(clks[l2_mux], cur_rate); -+ pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); - for_each_possible_cpu(cpu) { - clk = clks[cpu]; - cur_rate = clk_get_rate(clk); diff --git a/target/linux/ipq806x/patches-6.6/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch b/target/linux/ipq806x/patches-6.6/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch deleted file mode 100644 index 7e65f4cdff..0000000000 --- a/target/linux/ipq806x/patches-6.6/003-v6.2-ARM-dts-qcom-ipq8064-disable-mmc-ddr-1_8v-for-sdcc1.patch +++ /dev/null @@ -1,28 +0,0 @@ -From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Tue, 25 Oct 2022 01:38:17 +0200 -Subject: [PATCH] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1 - -It was reported non working mmc with this option enabled. -Both mmc for ipq8064 are supplied by a fixed 3.3v regulator so mmc can't -be run at 1.8v. -Disable it to restore correct functionality of this SoC feature. - -Tested-by: Hendrik Koerner -Signed-off-by: Christian Marangi -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20221024233817.27410-1-ansuelsmth@gmail.com ---- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 - - 1 file changed, 1 deletion(-) - ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi -@@ -756,7 +756,6 @@ - non-removable; - cap-sd-highspeed; - cap-mmc-highspeed; -- mmc-ddr-1_8v; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; - dma-names = "tx", "rx"; diff --git a/target/linux/ipq806x/patches-6.6/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch b/target/linux/ipq806x/patches-6.6/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch deleted file mode 100644 index 76df0f5681..0000000000 --- a/target/linux/ipq806x/patches-6.6/004-v6.2-01-thermal-drivers-qcom-tsens-Init-debugfs-only-with-su.patch +++ /dev/null @@ -1,42 +0,0 @@ -From de48d8766afcd97d147699aaff78a338081c9973 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Sat, 22 Oct 2022 14:56:55 +0200 -Subject: [PATCH 1/3] thermal/drivers/qcom/tsens: Init debugfs only with - successful probe - -Calibrate and tsens_register can fail or PROBE_DEFER. This will cause a -double or a wrong init of the debugfs information. Init debugfs only -with successful probe fixing warning about directory already present. - -Signed-off-by: Christian Marangi -Acked-by: Thara Gopinath -Link: https://lore.kernel.org/r/20221022125657.22530-2-ansuelsmth@gmail.com -Signed-off-by: Daniel Lezcano ---- - drivers/thermal/qcom/tsens.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - ---- a/drivers/thermal/qcom/tsens.c -+++ b/drivers/thermal/qcom/tsens.c -@@ -918,8 +918,6 @@ int __init init_common(struct tsens_priv - if (tsens_version(priv) >= VER_0_1) - tsens_enable_irq(priv); - -- tsens_debug_init(op); -- - err_put_device: - put_device(&op->dev); - return ret; -@@ -1156,7 +1154,11 @@ static int tsens_probe(struct platform_d - } - } - -- return tsens_register(priv); -+ ret = tsens_register(priv); -+ if (!ret) -+ tsens_debug_init(pdev); -+ -+ return ret; - } - - static int tsens_remove(struct platform_device *pdev) diff --git a/target/linux/ipq806x/patches-6.6/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch b/target/linux/ipq806x/patches-6.6/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch deleted file mode 100644 index 10f1e36b58..0000000000 --- a/target/linux/ipq806x/patches-6.6/004-v6.2-02-thermal-drivers-qcom-tsens-Fix-wrong-version-id-dbg_.patch +++ /dev/null @@ -1,29 +0,0 @@ -From c7e077e921fa94e0c06c8d14af6c0504c8a5f4bd Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Sat, 22 Oct 2022 14:56:56 +0200 -Subject: [PATCH 2/3] thermal/drivers/qcom/tsens: Fix wrong version id - dbg_version_show - -For VER_0 the version was incorrectly reported as 0.1.0. - -Fix that and correctly report the major version for this old tsens -revision. - -Signed-off-by: Christian Marangi -Link: https://lore.kernel.org/r/20221022125657.22530-3-ansuelsmth@gmail.com -Signed-off-by: Daniel Lezcano ---- - drivers/thermal/qcom/tsens.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/thermal/qcom/tsens.c -+++ b/drivers/thermal/qcom/tsens.c -@@ -692,7 +692,7 @@ static int dbg_version_show(struct seq_f - return ret; - seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver); - } else { -- seq_puts(s, "0.1.0\n"); -+ seq_printf(s, "0.%d.0\n", priv->feat->ver_major); - } - - return 0; diff --git a/target/linux/ipq806x/patches-6.6/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch b/target/linux/ipq806x/patches-6.6/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch deleted file mode 100644 index 63cce7974b..0000000000 --- a/target/linux/ipq806x/patches-6.6/004-v6.2-03-thermal-drivers-qcom-tsens-Rework-debugfs-file-struc.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 89992d95ed1046338c7866ef7bbe6de543a2af91 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Sat, 22 Oct 2022 14:56:57 +0200 -Subject: [PATCH 3/3] thermal/drivers/qcom/tsens: Rework debugfs file structure - -The current tsens debugfs structure is composed by: -- a tsens dir in debugfs with a version file -- a directory for each tsens istance with sensors file to dump all the - sensors value. - -This works on the assumption that we have the same version for each -istance but this assumption seems fragile and with more than one tsens -istance results in the version file not tracking each of them. - -A better approach is to just create a subdirectory for each tsens -istance and put there version and sensors debugfs file. - -Using this new implementation results in less code since debugfs entry -are created only on successful tsens probe. - -Signed-off-by: Christian Marangi -Link: https://lore.kernel.org/r/20221022125657.22530-4-ansuelsmth@gmail.com -Signed-off-by: Daniel Lezcano ---- - drivers/thermal/qcom/tsens.c | 13 +++---------- - 1 file changed, 3 insertions(+), 10 deletions(-) - ---- a/drivers/thermal/qcom/tsens.c -+++ b/drivers/thermal/qcom/tsens.c -@@ -704,21 +704,14 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors); - static void tsens_debug_init(struct platform_device *pdev) - { - struct tsens_priv *priv = platform_get_drvdata(pdev); -- struct dentry *root, *file; - -- root = debugfs_lookup("tsens", NULL); -- if (!root) -+ priv->debug_root = debugfs_lookup("tsens", NULL); -+ if (!priv->debug_root) - priv->debug_root = debugfs_create_dir("tsens", NULL); -- else -- priv->debug_root = root; -- -- file = debugfs_lookup("version", priv->debug_root); -- if (!file) -- debugfs_create_file("version", 0444, priv->debug_root, -- pdev, &dbg_version_fops); - - /* A directory for each instance of the TSENS IP */ - priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root); -+ debugfs_create_file("version", 0444, priv->debug, pdev, &dbg_version_fops); - debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops); - } - #else From a0cbf7f5d563b344dddd0cb66e7a8eef1bf3f15e Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:33:05 +0100 Subject: [PATCH 27/31] ipq806x: 6.6: rework kernel patches for new kernel Rework kernel patches for new kernel. Mainly adaptation for patch related to DTS and changes for the downstream div generalize patch that now use determine_rate. Signed-off-by: Christian Marangi --- ...add-saw-for-l2-cache-and-kraitcc-for.patch | 52 ++---- ...add-opp-table-for-cpu-and-l2-for-ipq.patch | 14 +- ...add-multiple-missing-binding-for-cpu.patch | 25 +-- ...-wrong-nad_pins-definition-for-ipq80.patch | 6 +- ...-MDIO-dedicated-controller-node-for-.patch | 148 ++++++++++++++++-- ...-krait-cache-compatible-for-ipq806x-.patch | 12 +- ...com-add-fab-scaling-node-for-ipq806x.patch | 6 +- ...m-clk-krait-generilize-div-functions.patch | 23 ++- 8 files changed, 192 insertions(+), 94 deletions(-) diff --git a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch index 0a594b2688..228368b6cd 100644 --- a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch +++ b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch @@ -11,11 +11,11 @@ for the secondary mux. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -301,6 +301,12 @@ }; @@ -29,30 +29,7 @@ Tested-by: Jonathan McDowell cxo_board: cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -575,15 +581,30 @@ - clocks = <&gcc PLL8_VOTE>, <&pxo_board>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; -+ #clock-cells = <0>; -+ }; -+ -+ kraitcc: clock-controller { -+ compatible = "qcom,krait-cc-v1"; -+ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, -+ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>; -+ clock-names = "hfpll0", "hfpll1", "hfpll_l2", -+ "acpu0_aux", "acpu1_aux", "acpu_l2_aux", -+ "qsb", "pxo"; -+ #clock-cells = <1>; - }; - - acc0: clock-controller@2088000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02088000 0x1000>, <0x02008000 0x1000>; -+ clock-output-names = "acpu0_aux"; -+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; -+ clock-names = "pll8_vote", "pxo"; -+ #clock-cells = <0>; +@@ -575,7 +581,7 @@ }; saw0: regulator@2089000 { @@ -61,14 +38,7 @@ Tested-by: Jonathan McDowell reg = <0x02089000 0x1000>, <0x02009000 0x1000>; regulator; }; -@@ -591,14 +612,24 @@ - acc1: clock-controller@2098000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02098000 0x1000>, <0x02008000 0x1000>; -+ clock-output-names = "acpu1_aux"; -+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; -+ clock-names = "pll8_vote", "pxo"; -+ #clock-cells = <0>; +@@ -591,11 +612,27 @@ }; saw1: regulator@2099000 { @@ -84,6 +54,16 @@ Tested-by: Jonathan McDowell + regulator; + }; + - nss_common: syscon@03000000 { ++ kraitcc: clock-controller { ++ compatible = "qcom,krait-cc-v1"; ++ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, ++ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>; ++ clock-names = "hfpll0", "hfpll1", "hfpll_l2", ++ "acpu0_aux", "acpu1_aux", "acpu_l2_aux", ++ "qsb", "pxo"; ++ #clock-cells = <1>; ++ }; ++ + nss_common: syscon@3000000 { compatible = "syscon"; reg = <0x03000000 0x0000FFFF>; diff --git a/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch b/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch index 16e924b303..b6359a946e 100644 --- a/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch +++ b/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch @@ -18,11 +18,11 @@ Opp-level is set based on the logic of Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -48,6 +48,105 @@ }; }; @@ -129,8 +129,8 @@ Tested-by: Jonathan McDowell thermal-zones { sensor0-thermal { polling-delay-passive = <0>; ---- a/arch/arm/boot/dts/qcom-ipq8065.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi @@ -6,3 +6,92 @@ model = "Qualcomm Technologies, Inc. IPQ8065"; compatible = "qcom,ipq8065", "qcom,ipq8064"; @@ -224,8 +224,8 @@ Tested-by: Jonathan McDowell + opp-level = <2>; + }; +}; ---- a/arch/arm/boot/dts/qcom-ipq8062.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi @@ -6,3 +6,39 @@ model = "Qualcomm Technologies, Inc. IPQ8062"; compatible = "qcom,ipq8062", "qcom,ipq8064"; diff --git a/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch b/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch index cf27aaa08b..55f02ac5aa 100644 --- a/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch +++ b/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch @@ -10,11 +10,11 @@ definition for ipq8064 dtsi. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -30,6 +30,15 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; @@ -31,7 +31,7 @@ Tested-by: Jonathan McDowell }; cpu1: cpu@1 { -@@ -40,11 +49,35 @@ +@@ -40,12 +49,36 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; @@ -59,6 +59,7 @@ Tested-by: Jonathan McDowell L2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; + qcom,saw = <&saw_l2>; + + clocks = <&kraitcc 4>; @@ -67,8 +68,8 @@ Tested-by: Jonathan McDowell }; }; ---- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi @@ -2,6 +2,18 @@ #include "qcom-ipq8064.dtsi" @@ -88,8 +89,8 @@ Tested-by: Jonathan McDowell &rpm { smb208_regulators: regulators { compatible = "qcom,rpm-smb208-regulators"; ---- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi @@ -2,6 +2,18 @@ #include "qcom-ipq8064-v2.0.dtsi" @@ -109,8 +110,8 @@ Tested-by: Jonathan McDowell &rpm { smb208_regulators: regulators { compatible = "qcom,rpm-smb208-regulators"; ---- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi @@ -2,6 +2,18 @@ #include "qcom-ipq8062.dtsi" @@ -130,8 +131,8 @@ Tested-by: Jonathan McDowell &rpm { smb208_regulators: regulators { compatible = "qcom,rpm-smb208-regulators"; ---- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi @@ -2,6 +2,18 @@ #include "qcom-ipq8065.dtsi" diff --git a/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch b/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch index 6be9334e7d..a06dd00dfc 100644 --- a/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch +++ b/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch @@ -7,11 +7,11 @@ Fix wrong nand_pings definition for bias-disable pins. Signed-off-by: Christian 'Ansuel' Marangi --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 ++----- + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -599,12 +599,9 @@ }; diff --git a/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch b/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch index a35bb3874f..8f6f8a287a 100644 --- a/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch +++ b/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch @@ -9,13 +9,13 @@ correctly use the new tag. Signed-off-by: Christian 'Ansuel' Marangi --- - arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++----------- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++ + arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts | 134 +++++++++++----------- + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 14 +++ 2 files changed, 81 insertions(+), 67 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts -+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts -@@ -25,73 +25,6 @@ +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts +@@ -25,131 +25,6 @@ device_type = "memory"; }; @@ -32,8 +32,6 @@ Signed-off-by: Christian 'Ansuel' Marangi - - switch0: switch@10 { - compatible = "qca,qca8337"; -- #address-cells = <1>; -- #size-cells = <0>; - - dsa,member = <0 0>; - @@ -61,26 +59,86 @@ Signed-off-by: Christian 'Ansuel' Marangi - port@1 { - reg = <1>; - label = "sw1"; +- +- leds { +- #address-cells = <1>; +- #size-cells = <0>; +- +- led@0 { +- reg = <0>; +- color = ; +- function = LED_FUNCTION_LAN; +- default-state = "keep"; +- }; +- }; - }; - - port@2 { - reg = <2>; - label = "sw2"; +- +- leds { +- #address-cells = <1>; +- #size-cells = <0>; +- +- led@0 { +- reg = <0>; +- color = ; +- function = LED_FUNCTION_LAN; +- default-state = "keep"; +- }; +- }; - }; - - port@3 { - reg = <3>; - label = "sw3"; +- +- leds { +- #address-cells = <1>; +- #size-cells = <0>; +- +- led@0 { +- reg = <0>; +- color = ; +- function = LED_FUNCTION_LAN; +- default-state = "keep"; +- }; +- }; - }; - - port@4 { - reg = <4>; - label = "sw4"; +- +- leds { +- #address-cells = <1>; +- #size-cells = <0>; +- +- led@0 { +- reg = <0>; +- color = ; +- function = LED_FUNCTION_LAN; +- default-state = "keep"; +- }; +- }; - }; - - port@5 { - reg = <5>; - label = "sw5"; +- +- leds { +- #address-cells = <1>; +- #size-cells = <0>; +- +- led@0 { +- reg = <0>; +- color = ; +- function = LED_FUNCTION_LAN; +- default-state = "keep"; +- }; +- }; - }; - }; - }; @@ -89,7 +147,7 @@ Signed-off-by: Christian 'Ansuel' Marangi mdio1: mdio-1 { status = "okay"; compatible = "virtual,mdio-gpio"; -@@ -222,6 +155,73 @@ +@@ -222,6 +155,131 @@ status = "okay"; }; @@ -106,8 +164,6 @@ Signed-off-by: Christian 'Ansuel' Marangi + + switch0: switch@10 { + compatible = "qca,qca8337"; -+ #address-cells = <1>; -+ #size-cells = <0>; + + dsa,member = <0 0>; + @@ -135,26 +191,86 @@ Signed-off-by: Christian 'Ansuel' Marangi + port@1 { + reg = <1>; + label = "sw1"; ++ ++ leds { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ color = ; ++ function = LED_FUNCTION_LAN; ++ default-state = "keep"; ++ }; ++ }; + }; + + port@2 { + reg = <2>; + label = "sw2"; ++ ++ leds { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ color = ; ++ function = LED_FUNCTION_LAN; ++ default-state = "keep"; ++ }; ++ }; + }; + + port@3 { + reg = <3>; + label = "sw3"; ++ ++ leds { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ color = ; ++ function = LED_FUNCTION_LAN; ++ default-state = "keep"; ++ }; ++ }; + }; + + port@4 { + reg = <4>; + label = "sw4"; ++ ++ leds { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ color = ; ++ function = LED_FUNCTION_LAN; ++ default-state = "keep"; ++ }; ++ }; + }; + + port@5 { + reg = <5>; + label = "sw5"; ++ ++ leds { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ color = ; ++ function = LED_FUNCTION_LAN; ++ default-state = "keep"; ++ }; ++ }; + }; + }; + }; @@ -163,10 +279,10 @@ Signed-off-by: Christian 'Ansuel' Marangi &gmac0 { status = "okay"; ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -476,6 +476,20 @@ - snps,blen = <16 0 0 0 0 0 0>; + status = "disabled"; }; + mdio0: mdio@37000000 { @@ -183,6 +299,6 @@ Signed-off-by: Christian 'Ansuel' Marangi + status = "disabled"; + }; + - vsdcc_fixed: vsdcc-regulator { - compatible = "regulator-fixed"; - regulator-name = "SDCC Power"; + gmac0: ethernet@37000000 { + device_type = "network"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; diff --git a/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch b/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch index 45f05dd423..77b6f926bd 100644 --- a/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch +++ b/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch @@ -9,12 +9,12 @@ driver correctly probe. Signed-off-by: Christian Marangi --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++----------- + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi -@@ -69,16 +69,6 @@ +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +@@ -69,17 +69,6 @@ min-residency-us = <3000>; }; }; @@ -22,6 +22,7 @@ Signed-off-by: Christian Marangi - L2: l2-cache { - compatible = "cache"; - cache-level = <2>; +- cache-unified; - qcom,saw = <&saw_l2>; - - clocks = <&kraitcc 4>; @@ -31,13 +32,14 @@ Signed-off-by: Christian Marangi }; opp_table_l2: opp_table_l2 { -@@ -1409,6 +1399,16 @@ +@@ -1409,6 +1399,17 @@ #reset-cells = <1>; }; + L2: l2-cache { + compatible = "cache", "qcom,krait-cache"; + cache-level = <2>; ++ cache-unified; + qcom,saw = <&saw_l2>; + + clocks = <&kraitcc 4>; diff --git a/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch b/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch index 24e0ecf619..418e3248ad 100644 --- a/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch +++ b/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch @@ -8,11 +8,11 @@ fabric clk. Signed-off-by: Christian Marangi --- - arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 +++++++++++++++++++ + arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -170,6 +170,18 @@ }; }; diff --git a/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch b/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch index a7c0f046c8..356659d9c0 100644 --- a/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch +++ b/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch @@ -16,22 +16,21 @@ Signed-off-by: Christian Marangi --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c -@@ -97,53 +97,58 @@ const struct clk_ops krait_mux_clk_ops = +@@ -97,53 +97,57 @@ const struct clk_ops krait_mux_clk_ops = EXPORT_SYMBOL_GPL(krait_mux_clk_ops); /* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */ --static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate, -+static long krait_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +-static int krait_div2_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) ++static int krait_div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { -- *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2); -- return DIV_ROUND_UP(*parent_rate, 2); +- req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), req->rate * 2); +- req->rate = DIV_ROUND_UP(req->best_parent_rate, 2); + struct krait_div_clk *d = to_krait_div_clk(hw); + -+ *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), -+ rate * d->divisor); -+ -+ return DIV_ROUND_UP(*parent_rate, d->divisor); ++ req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), ++ req->rate * d->divisor); ++ req->rate = DIV_ROUND_UP(req->best_parent_rate, d->divisor); + return 0; } -static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate, @@ -91,11 +90,11 @@ Signed-off-by: Christian Marangi } -const struct clk_ops krait_div2_clk_ops = { -- .round_rate = krait_div2_round_rate, +- .determine_rate = krait_div2_determine_rate, - .set_rate = krait_div2_set_rate, - .recalc_rate = krait_div2_recalc_rate, +const struct clk_ops krait_div_clk_ops = { -+ .round_rate = krait_div_round_rate, ++ .determine_rate = krait_div_determine_rate, + .set_rate = krait_div_set_rate, + .recalc_rate = krait_div_recalc_rate, }; From 4693100b3fe25ead1d41e96d2f8dd196c473a0c0 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:35:01 +0100 Subject: [PATCH 28/31] ipq806x: 6.6: add pending patch fixing nandc with new kernel Add pending patch fixing nandc with new kerenel due to broken convertion to new nand API. Patch has been sent upstream and will be backported to stable kernel if accepted. Signed-off-by: Christian Marangi --- ...-Fix-broken-misc_cmd_type-in-exec_op.patch | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch diff --git a/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch b/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch new file mode 100644 index 0000000000..5fc2599522 --- /dev/null +++ b/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch @@ -0,0 +1,55 @@ +From b25aac1f55c29048e5a6ab24ab0e2aea12cb4887 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 20 Mar 2024 00:47:58 +0100 +Subject: [PATCH] mtd: rawnand: qcom: Fix broken misc_cmd_type in exec_op + +misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409 +("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was +reworked and generalized but actually dropped the handling of the +RESET_DEVICE command. + +The rework itself was correct with supporting case where a single misc +command is handled, but became problematic by the addition of exiting +early if we didn't had an ERASE or an OP_PROGRAM_PAGE operation. + +Also additional logic was added without clear explaination causing the +erase command to be broken on testing it on a ipq806x nandc. + +Add some additional logic to restore RESET_DEVICE command handling and +fix erase command. + +Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") +Cc: stable@vger.kernel.org +Signed-off-by: Christian Marangi +--- + drivers/mtd/nand/raw/qcom_nandc.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c +index b079605c84d3..b8cff9240b28 100644 +--- a/drivers/mtd/nand/raw/qcom_nandc.c ++++ b/drivers/mtd/nand/raw/qcom_nandc.c +@@ -2815,7 +2815,7 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub + host->cfg0_raw & ~(7 << CW_PER_PAGE)); + nandc_set_reg(chip, NAND_DEV0_CFG1, host->cfg1_raw); + instrs = 3; +- } else { ++ } else if (q_op.cmd_reg != OP_RESET_DEVICE) { + return 0; + } + +@@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub + nandc_set_reg(chip, NAND_EXEC_CMD, 1); + + write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL); +- (q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0, +- 2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc, +- NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL); ++ if (q_op.cmd_reg == OP_BLOCK_ERASE) ++ write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL); + + write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL); + read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL); +-- +2.43.0 + From 224f2fd5676f56d5be98d08dc2f041d5dece8ce1 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:48:41 +0100 Subject: [PATCH 29/31] ipq806x: 6.6: refresh kernel patches Refresh kernel patches using make target/linux/refresh. Signed-off-by: Christian Marangi --- ...tfs-conflicts-with-OpenWrt-auto-mounting.patch | 2 +- ...com-add-saw-for-l2-cache-and-kraitcc-for.patch | 6 +++--- ...com-add-opp-table-for-cpu-and-l2-for-ipq.patch | 2 +- ...com-add-multiple-missing-binding-for-cpu.patch | 2 +- ...-fix-wrong-nad_pins-definition-for-ipq80.patch | 2 +- ...-add-MDIO-dedicated-controller-node-for-.patch | 4 ++-- ...-Add-L2-Krait-Cache-devfreq-scaling-driv.patch | 2 +- ...-add-krait-cache-compatible-for-ipq806x-.patch | 2 +- ...evfreq-add-ipq806x-fabric-scaling-driver.patch | 2 +- ...ts-qcom-add-fab-scaling-node-for-ipq806x.patch | 2 +- ...-qcom-clk-krait-generilize-div-functions.patch | 2 +- ...qcom-Fix-broken-misc_cmd_type-in-exec_op.patch | 15 +++------------ .../patches-6.6/850-soc-add-qualcomm-syscon.patch | 6 +++--- .../900-arm-add-cmdline-override.patch | 4 ++-- ...ompressor-add-option-to-ignore-MEM-ATAGs.patch | 4 ++-- ...ssor-support-for-ATAGs-rootblock-parsing.patch | 12 ++++++------ 16 files changed, 30 insertions(+), 39 deletions(-) diff --git a/target/linux/ipq806x/patches-6.6/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-6.6/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch index e0c195f1ab..d70be98aca 100644 --- a/target/linux/ipq806x/patches-6.6/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch +++ b/target/linux/ipq806x/patches-6.6/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c -@@ -51,7 +51,11 @@ static struct mtd_info *allocate_partiti +@@ -57,7 +57,11 @@ static struct mtd_info *allocate_partiti /* allocate the partition structure */ child = kzalloc(sizeof(*child), GFP_KERNEL); diff --git a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch index 228368b6cd..83eb6f38cd 100644 --- a/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch +++ b/target/linux/ipq806x/patches-6.6/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch @@ -16,7 +16,7 @@ Tested-by: Jonathan McDowell --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi -@@ -301,6 +301,12 @@ +@@ -302,6 +302,12 @@ }; clocks { @@ -29,7 +29,7 @@ Tested-by: Jonathan McDowell cxo_board: cxo_board { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -575,7 +581,7 @@ +@@ -587,7 +593,7 @@ }; saw0: regulator@2089000 { @@ -38,7 +38,7 @@ Tested-by: Jonathan McDowell reg = <0x02089000 0x1000>, <0x02009000 0x1000>; regulator; }; -@@ -591,11 +612,27 @@ +@@ -602,11 +608,27 @@ }; saw1: regulator@2099000 { diff --git a/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch b/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch index b6359a946e..1cf57d018f 100644 --- a/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch +++ b/target/linux/ipq806x/patches-6.6/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch @@ -23,7 +23,7 @@ Tested-by: Jonathan McDowell --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi -@@ -48,6 +48,105 @@ +@@ -49,6 +49,105 @@ }; }; diff --git a/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch b/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch index 55f02ac5aa..e4c9f73c83 100644 --- a/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch +++ b/target/linux/ipq806x/patches-6.6/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch @@ -59,7 +59,7 @@ Tested-by: Jonathan McDowell L2: l2-cache { compatible = "cache"; cache-level = <2>; - cache-unified; + cache-unified; + qcom,saw = <&saw_l2>; + + clocks = <&kraitcc 4>; diff --git a/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch b/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch index a06dd00dfc..a3ac606ae9 100644 --- a/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch +++ b/target/linux/ipq806x/patches-6.6/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch @@ -12,7 +12,7 @@ Signed-off-by: Christian 'Ansuel' Marangi --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi -@@ -599,12 +599,9 @@ +@@ -600,12 +600,9 @@ }; nand_pins: nand_pins { diff --git a/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch b/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch index 8f6f8a287a..b4aa04d7d2 100644 --- a/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch +++ b/target/linux/ipq806x/patches-6.6/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch @@ -147,7 +147,7 @@ Signed-off-by: Christian 'Ansuel' Marangi mdio1: mdio-1 { status = "okay"; compatible = "virtual,mdio-gpio"; -@@ -222,6 +155,131 @@ +@@ -337,6 +212,131 @@ status = "okay"; }; @@ -281,7 +281,7 @@ Signed-off-by: Christian 'Ansuel' Marangi --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi -@@ -476,6 +476,20 @@ +@@ -1429,6 +1429,20 @@ status = "disabled"; }; diff --git a/target/linux/ipq806x/patches-6.6/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch b/target/linux/ipq806x/patches-6.6/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch index 9de7328879..9780f6a30b 100644 --- a/target/linux/ipq806x/patches-6.6/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch +++ b/target/linux/ipq806x/patches-6.6/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch @@ -21,7 +21,7 @@ Signed-off-by: Christian Marangi --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig -@@ -151,6 +151,17 @@ config ARM_SUN8I_A33_MBUS_DEVFREQ +@@ -150,6 +150,17 @@ config ARM_SUN8I_A33_MBUS_DEVFREQ This adds the DEVFREQ driver for the MBUS controller in some Allwinner sun8i (A33 through H3) and sun50i (A64 and H5) SoCs. diff --git a/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch b/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch index 77b6f926bd..92ff75afe6 100644 --- a/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch +++ b/target/linux/ipq806x/patches-6.6/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch @@ -32,7 +32,7 @@ Signed-off-by: Christian Marangi }; opp_table_l2: opp_table_l2 { -@@ -1409,6 +1399,17 @@ +@@ -1392,6 +1381,17 @@ #reset-cells = <1>; }; diff --git a/target/linux/ipq806x/patches-6.6/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch b/target/linux/ipq806x/patches-6.6/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch index c9cd3ebdf7..c359eda2a5 100644 --- a/target/linux/ipq806x/patches-6.6/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch +++ b/target/linux/ipq806x/patches-6.6/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch @@ -15,7 +15,7 @@ Signed-off-by: Christian Marangi --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig -@@ -162,6 +162,17 @@ config ARM_KRAIT_CACHE_DEVFREQ +@@ -161,6 +161,17 @@ config ARM_KRAIT_CACHE_DEVFREQ based on the max frequency across all core and the range set in the device dts. If provided this scale also the regulator attached to the l2 cache. diff --git a/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch b/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch index 418e3248ad..bbdbedd6c2 100644 --- a/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch +++ b/target/linux/ipq806x/patches-6.6/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch @@ -32,7 +32,7 @@ Signed-off-by: Christian Marangi thermal-zones { sensor0-thermal { polling-delay-passive = <0>; -@@ -1409,6 +1421,13 @@ +@@ -1392,6 +1404,13 @@ operating-points-v2 = <&opp_table_l2>; }; diff --git a/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch b/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch index 356659d9c0..45b94ed649 100644 --- a/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch +++ b/target/linux/ipq806x/patches-6.6/122-05-clk-qcom-clk-krait-generilize-div-functions.patch @@ -30,7 +30,7 @@ Signed-off-by: Christian Marangi + req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), + req->rate * d->divisor); + req->rate = DIV_ROUND_UP(req->best_parent_rate, d->divisor); - return 0; + return 0; } -static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate, diff --git a/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch b/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch index 5fc2599522..caa5b070e4 100644 --- a/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch +++ b/target/linux/ipq806x/patches-6.6/130-mtd-rawnand-qcom-Fix-broken-misc_cmd_type-in-exec_op.patch @@ -1,4 +1,4 @@ -From b25aac1f55c29048e5a6ab24ab0e2aea12cb4887 Mon Sep 17 00:00:00 2001 +From 9732c4f2d93a4a39ffc903c88ab7d531a8bb2e74 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 00:47:58 +0100 Subject: [PATCH] mtd: rawnand: qcom: Fix broken misc_cmd_type in exec_op @@ -8,10 +8,6 @@ misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409 reworked and generalized but actually dropped the handling of the RESET_DEVICE command. -The rework itself was correct with supporting case where a single misc -command is handled, but became problematic by the addition of exiting -early if we didn't had an ERASE or an OP_PROGRAM_PAGE operation. - Also additional logic was added without clear explaination causing the erase command to be broken on testing it on a ipq806x nandc. @@ -25,11 +21,9 @@ Signed-off-by: Christian Marangi drivers/mtd/nand/raw/qcom_nandc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c -index b079605c84d3..b8cff9240b28 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c -@@ -2815,7 +2815,7 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub +@@ -2815,7 +2815,7 @@ static int qcom_misc_cmd_type_exec(struc host->cfg0_raw & ~(7 << CW_PER_PAGE)); nandc_set_reg(chip, NAND_DEV0_CFG1, host->cfg1_raw); instrs = 3; @@ -38,7 +32,7 @@ index b079605c84d3..b8cff9240b28 100644 return 0; } -@@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub +@@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struc nandc_set_reg(chip, NAND_EXEC_CMD, 1); write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL); @@ -50,6 +44,3 @@ index b079605c84d3..b8cff9240b28 100644 write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL); read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL); --- -2.43.0 - diff --git a/target/linux/ipq806x/patches-6.6/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq806x/patches-6.6/850-soc-add-qualcomm-syscon.patch index 397c4481ab..3fa60a6abc 100644 --- a/target/linux/ipq806x/patches-6.6/850-soc-add-qualcomm-syscon.patch +++ b/target/linux/ipq806x/patches-6.6/850-soc-add-qualcomm-syscon.patch @@ -2,17 +2,17 @@ From: Christian Lamparter Subject: SoC: add qualcomm syscon --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile -@@ -23,6 +23,7 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o +@@ -26,6 +26,7 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o obj-$(CONFIG_QCOM_SPM) += spm.o obj-$(CONFIG_QCOM_STATS) += qcom_stats.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o +obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o obj-$(CONFIG_QCOM_APR) += apr.o obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o - obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o + obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig -@@ -213,6 +213,13 @@ config QCOM_STATS +@@ -252,6 +252,13 @@ config QCOM_STATS various SoC level low power modes statistics and export to debugfs interface. diff --git a/target/linux/ipq806x/patches-6.6/900-arm-add-cmdline-override.patch b/target/linux/ipq806x/patches-6.6/900-arm-add-cmdline-override.patch index c9583549d0..f8bd1674b8 100644 --- a/target/linux/ipq806x/patches-6.6/900-arm-add-cmdline-override.patch +++ b/target/linux/ipq806x/patches-6.6/900-arm-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1589,6 +1589,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1568,6 +1568,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN endchoice @@ -17,7 +17,7 @@ default "" --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c -@@ -1187,6 +1187,17 @@ int __init early_init_dt_scan_chosen(cha +@@ -1189,6 +1189,17 @@ int __init early_init_dt_scan_chosen(cha if (p != NULL && l > 0) strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE)); diff --git a/target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch b/target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch index 2e4c4de545..ce46f48fa5 100644 --- a/target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch +++ b/target/linux/ipq806x/patches-6.6/901-02-ARM-decompressor-add-option-to-ignore-MEM-ATAGs.patch @@ -20,7 +20,7 @@ Acked-by: Linus Walleij --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1570,6 +1570,18 @@ config ARM_ATAG_DTB_COMPAT +@@ -1549,6 +1549,18 @@ config ARM_ATAG_DTB_COMPAT bootloaders, this option allows zImage to extract the information from the ATAG list and store it at run time into the appended DTB. @@ -41,7 +41,7 @@ Acked-by: Linus Walleij default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER --- a/arch/arm/boot/compressed/atags_to_fdt.c +++ b/arch/arm/boot/compressed/atags_to_fdt.c -@@ -169,6 +169,10 @@ int atags_to_fdt(void *atag_list, void * +@@ -170,6 +170,10 @@ int atags_to_fdt(void *atag_list, void * setprop_string(fdt, "/chosen", "bootargs", atag->u.cmdline.cmdline); } else if (atag->hdr.tag == ATAG_MEM) { diff --git a/target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch b/target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch index 60b80fefe1..1832b6bead 100644 --- a/target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch +++ b/target/linux/ipq806x/patches-6.6/902-ARM-decompressor-support-for-ATAGs-rootblock-parsing.patch @@ -24,7 +24,7 @@ Signed-off-by: Christian Marangi --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1599,6 +1599,16 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1578,6 +1578,16 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -43,9 +43,9 @@ Signed-off-by: Christian Marangi config CMDLINE_OVERRIDE --- a/arch/arm/boot/compressed/atags_to_fdt.c +++ b/arch/arm/boot/compressed/atags_to_fdt.c -@@ -3,7 +3,8 @@ - #include +@@ -4,7 +4,8 @@ #include + #include "misc.h" -#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) +#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) || \ @@ -53,7 +53,7 @@ Signed-off-by: Christian Marangi #define do_extend_cmdline 1 #else #define do_extend_cmdline 0 -@@ -69,6 +70,83 @@ static uint32_t get_cell_size(const void +@@ -70,6 +71,83 @@ static uint32_t get_cell_size(const void return cell_size; } @@ -137,7 +137,7 @@ Signed-off-by: Christian Marangi static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) { char cmdline[COMMAND_LINE_SIZE]; -@@ -86,13 +164,23 @@ static void merge_fdt_bootargs(void *fdt +@@ -87,13 +165,23 @@ static void merge_fdt_bootargs(void *fdt ptr += len - 1; } @@ -177,7 +177,7 @@ Signed-off-by: Christian Marangi #include #include #include -@@ -995,6 +996,17 @@ asmlinkage __visible void __init __no_sa +@@ -929,6 +930,17 @@ void start_kernel(void) pr_notice("Kernel command line: %s\n", saved_command_line); /* parameters may set static keys */ jump_label_init(); From 75acc621be921e8552b549eb5c04e9b019e289f5 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:30:59 +0100 Subject: [PATCH 30/31] ipq806x: 6.6: update config file with missing symbol Update config file with missing symbol added with kernel 6.6. Signed-off-by: Christian Marangi --- target/linux/ipq806x/config-6.6 | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/linux/ipq806x/config-6.6 b/target/linux/ipq806x/config-6.6 index 18325c0346..d1e3eec4fe 100644 --- a/target/linux/ipq806x/config-6.6 +++ b/target/linux/ipq806x/config-6.6 @@ -212,11 +212,13 @@ CONFIG_INITRAMFS_SOURCE="" # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set # CONFIG_IOMMU_IO_PGTABLE_LPAE is not set CONFIG_IOMMU_SUPPORT=y +# CONFIG_IOMMUFD is not set # CONFIG_IPQ_APSS_PLL is not set # CONFIG_IPQ_GCC_4019 is not set # CONFIG_IPQ_GCC_6018 is not set CONFIG_IPQ_GCC_806X=y # CONFIG_IPQ_GCC_8074 is not set +# CONFIG_IPQ_GCC_9574 is not set # CONFIG_IPQ_LCC_806X is not set CONFIG_IRQCHIP=y CONFIG_IRQSTACKS=y @@ -355,15 +357,19 @@ CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y # CONFIG_PHY_QCOM_APQ8064_SATA is not set # CONFIG_PHY_QCOM_EDP is not set +# CONFIG_PHY_QCOM_EUSB2_REPEATER is not set # CONFIG_PHY_QCOM_IPQ4019_USB is not set CONFIG_PHY_QCOM_IPQ806X_SATA=y # CONFIG_PHY_QCOM_IPQ806X_USB is not set +# CONFIG_PHY_QCOM_M31_USB is not set # CONFIG_PHY_QCOM_PCIE2 is not set # CONFIG_PHY_QCOM_QMP is not set # CONFIG_PHY_QCOM_QUSB2 is not set # CONFIG_PHY_QCOM_USB_HS_28NM is not set # CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set # CONFIG_PHY_QCOM_USB_SS is not set +# CONFIG_PHY_QCOM_SGMII_ETH is not set +# CONFIG_PHY_QCOM_SNPS_EUSB2 is not set CONFIG_PINCTRL=y # CONFIG_PINCTRL_APQ8064 is not set # CONFIG_PINCTRL_APQ8084 is not set @@ -409,7 +415,9 @@ CONFIG_QCOM_HFPLL=y CONFIG_QCOM_NET_PHYLIB=y # CONFIG_QCOM_OCMEM is not set # CONFIG_QCOM_PDC is not set +# CONFIG_QCOM_RAMP_CTRL is not set # CONFIG_QCOM_RMTFS_MEM is not set +CONFIG_QCOM_RPM_MASTER_STATS=y CONFIG_QCOM_RPMCC=y # CONFIG_QCOM_RPMH is not set CONFIG_QCOM_SCM=y @@ -425,6 +433,7 @@ CONFIG_QCOM_WDT=y # CONFIG_QCS_GCC_404 is not set # CONFIG_QCS_Q6SSTOP_404 is not set # CONFIG_QCS_TURING_404 is not set +# CONFIG_QDU_GCC_1000 is not set CONFIG_RANDSTRUCT_NONE=y CONFIG_RAS=y CONFIG_RATIONAL=y @@ -447,6 +456,8 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_I2C_AND_SPI=y CONFIG_RTC_MC146818_LIB=y CONFIG_RWSEM_SPIN_ON_OWNER=y +# CONFIG_SA_GCC_8775P is not set +# CONFIG_SA_GPUCC_8775P is not set # CONFIG_SC_CAMCC_7280 is not set # CONFIG_SC_DISPCC_7180 is not set # CONFIG_SC_GCC_7180 is not set @@ -465,6 +476,7 @@ CONFIG_RWSEM_SPIN_ON_OWNER=y # CONFIG_SDM_LPASSCC_845 is not set # CONFIG_SDM_VIDEOCC_845 is not set # CONFIG_SDX_GCC_65 is not set +# CONFIG_SDX_GCC_75 is not set CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_MSM=y @@ -473,6 +485,7 @@ CONFIG_SGL_ALLOC=y CONFIG_SMP=y CONFIG_SMP_ON_UP=y # CONFIG_SM_CAMCC_8450 is not set +# CONFIG_SM_GCC_7150 is not set # CONFIG_SM_GCC_8150 is not set # CONFIG_SM_GCC_8250 is not set # CONFIG_SM_GCC_8450 is not set From ac0e2194ab4ce4b5f72d804046949cc076b595d6 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Wed, 20 Mar 2024 01:37:50 +0100 Subject: [PATCH 31/31] ipq806x: add kernel 6.6 as a testing kernel version Add and enable kernel 6.6 as a testing kernel version. Signed-off-by: Christian Marangi --- target/linux/ipq806x/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/ipq806x/Makefile b/target/linux/ipq806x/Makefile index 74a0007a4e..cd6f3dc2d3 100644 --- a/target/linux/ipq806x/Makefile +++ b/target/linux/ipq806x/Makefile @@ -11,6 +11,7 @@ CPU_SUBTYPE:=neon-vfpv4 SUBTARGETS:=generic chromium KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 KERNELNAME:=zImage Image dtbs