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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2021-03-31 00:22:15 +08:00
commit c548fc99a6
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GPG Key ID: 6850B6345C862176
18 changed files with 249 additions and 31 deletions
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1
.gitignore vendored
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@ -29,3 +29,4 @@ git-src
.project
.cproject
.ccache
.vscode

2
package/libs/libunwind/Makefile
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@ -32,7 +32,7 @@ define Package/libunwind
CATEGORY:=Libraries
TITLE:=The libunwind project
URL:=http://www.nongnu.org/libunwind/
DEPENDS:=@((mips||mipsel||x86_64||arm||aarch64)||(USE_GLIBC&&(powerpc||i386))) +zlib
DEPENDS:=@((mips||mipsel||mips64||x86_64||arm||aarch64)||(USE_GLIBC&&(powerpc||i386))) +zlib
ABI_VERSION:=8
endef

6
package/network/config/firewall/Makefile
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@ -13,9 +13,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git
PKG_SOURCE_DATE:=2020-09-05
PKG_SOURCE_VERSION:=8c2f9fad9ca644af911e0d4113a890c3c84aa738
PKG_MIRROR_HASH:=424a7906ed8957de3e85046248608dec7146078946161a517f8a5af9f536bad1
PKG_SOURCE_DATE:=2021-03-23
PKG_SOURCE_VERSION:=61db17edddb1f05e8107f0dbef6f7d060ce67483
PKG_MIRROR_HASH:=b2eb09816640e14e2dae21fb54ea05c33858fe0004844fe8d99e541a2e19e9c0
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC

12
package/network/services/ppp/patches/610-pppd_compile_fix.patch Normal file
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@ -0,0 +1,12 @@
--- a/pppd/Makefile.linux
+++ b/pppd/Makefile.linux
@@ -48,7 +48,8 @@ MPPE=y
# Uncomment the next line to include support for PPP packet filtering.
# This requires that the libpcap library and headers be installed
# and that the kernel driver support PPP packet filtering.
-#FILTER=y
+# libpcap statically linked in OpenWRT, hence disabled here.
+FILTER=
# Support for precompiled filters
PRECOMPILED_FILTER=y

4
package/network/utils/bpftools/Makefile
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@ -145,6 +145,10 @@ define Build/InstallDev/libbpf
$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/pkgconfig/libbpf.pc \
$(1)/usr/lib/pkgconfig/
$(SED) 's,/usr/include,$$$${prefix}/include,g' \
$(1)/usr/lib/pkgconfig/libbpf.pc
$(SED) 's,/usr/lib,$$$${exec_prefix}/lib,g' \
$(1)/usr/lib/pkgconfig/libbpf.pc
endef
ifeq ($(BUILD_VARIANT),lib)

49
package/utils/busybox/patches/205-udhcpc_allow_zero_length_options.patch Normal file
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@ -0,0 +1,49 @@
From 7eed119b84b0f7efb7ef351940dd895dc2379eb3 Mon Sep 17 00:00:00 2001
From: Russell Senior <russell@personaltelco.net>
Date: Mon, 15 Mar 2021 23:27:58 -0700
Subject: [PATCH v2] udhcpc: ignore zero-length DHCP options
Discovered that the DHCP server on a TrendNet router (unknown model)
provides a zero-length option 12 (Host Name) in the DHCP ACK message. This
has the effect of causing udhcpc to drop the rest of the options, including
option 51 (IP Address Lease Time), 3 (Router), and 6 (Domain Name Server),
most importantly leaving the OpenWrt device with no default gateway.
The TrendNet behavior violates RFC 2132, which in Section 3.14 declares that
option 12 has a miniumum length of 1 octet. It is perhaps not a cosmic coincidence
that I found this behavior on Pi Day.
This patch allows zero length options without bailing out, by simply skipping them.
v2 changelog:
* advance the optionptr by two bytes, not one;
* add a message to warn about the rfc violation;
Signed-off-by: Russell Senior <russell@personaltelco.net>
---
networking/udhcp/common.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/networking/udhcp/common.c b/networking/udhcp/common.c
index 4bc719001..a16fd85d0 100644
--- a/networking/udhcp/common.c
+++ b/networking/udhcp/common.c
@@ -277,8 +277,13 @@ uint8_t* FAST_FUNC udhcp_scan_options(struct dhcp_packet *packet, struct dhcp_sc
goto complain; /* complain and return NULL */
len = 2 + scan_state->optionptr[OPT_LEN];
scan_state->rem -= len;
- /* So far no valid option with length 0 known. */
- if (scan_state->rem < 0 || scan_state->optionptr[OPT_LEN] == 0)
+ /* skip any options with zero length */
+ if (scan_state->optionptr[OPT_LEN] == 0) {
+ scan_state->optionptr += 2;
+ bb_simple_error_msg("warning: zero length DHCP option violates rfc2132, skipping");
+ continue;
+ }
+ if (scan_state->rem < 0)
goto complain; /* complain and return NULL */
if (scan_state->optionptr[OPT_CODE] == DHCP_OPTION_OVERLOAD) {
--
2.30.1

4
target/linux/ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts
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@ -159,10 +159,6 @@
};
};
&hs_uart {
dtr-gpios = <&gpio_ext 15 GPIO_ACTIVE_HIGH>;
};
&eth0 {
status = "okay";

4
target/linux/ath79/dts/ar9344_teltonika_rut955.dts
View File

@ -158,10 +158,6 @@
};
};
&hs_uart {
dtr-gpios = <&gpio_ext 13 GPIO_ACTIVE_HIGH>;
};
&eth0 {
status = "okay";

12
target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi
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@ -154,20 +154,20 @@
&pinmux {
pmx_spi: spi {
// SPI_CS1 on GPIO 3
pinctrl-single,bits = <0x0 0x07000000 0xff000000>;
pinctrl-single,bits = <0x0 0x07000000 0xff000000>;
};
pmx_leds_switch: leds_switch {
// switch port LEDs on GPIO 1, GPIO 13, GPIO 14 and GPIO 22
pinctrl-single,bits = <0x0 0x00002d00 0x0000ff00>,
<0xc 0x002c2b00 0x00ffff00>,
pinctrl-single,bits = <0x00 0x00002d00 0x0000ff00>,
<0x0c 0x002c2b00 0x00ffff00>,
<0x14 0x002a0000 0x00ff0000>;
};
pmx_uart2: uart2 {
// UART1_DTR on GPIO 0, UART1_RD on GPIO 11, UART1_TD on GPIO 18
pinctrl-single,bits = <0x0 0x0 0xff>,
<0x10 0x4f000000 0xff000000>,
<0x3c 0x000b0000 0x00ff0000>;
pinctrl-single,bits = <0x00 0x00000000 0x000000ff>,
<0x10 0x004f0000 0x00ff0000>,
<0x3c 0x000b0000 0x00ff0000>;
};
};

84
target/linux/generic/backport-5.4/780-net-dsa-mt7530-setup-core-clock-even-in-TRGMII-mode.patch Normal file
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@ -0,0 +1,84 @@
From c3b8e07909dbe67b0d580416c1a5257643a73be7 Mon Sep 17 00:00:00 2001
From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Date: Fri, 12 Mar 2021 00:07:03 -0800
Subject: [PATCH] net: dsa: mt7530: setup core clock even in TRGMII mode
A recent change to MIPS ralink reset logic made it so mt7530 actually
resets the switch on platforms such as mt7621 (where bit 2 is the reset
line for the switch). That exposed an issue where the switch would not
function properly in TRGMII mode after a reset.
Reconfigure core clock in TRGMII mode to fix the issue.
Tested on Ubiquiti ER-X (MT7621) with TRGMII mode enabled.
Fixes: 3f9ef7785a9c ("MIPS: ralink: manage low reset lines")
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/mt7530.c | 52 +++++++++++++++++++---------------------
1 file changed, 25 insertions(+), 27 deletions(-)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -427,34 +427,32 @@ mt7530_pad_clk_setup(struct dsa_switch *
TD_DM_DRVP(8) | TD_DM_DRVN(8));
/* Setup core clock for MT7530 */
- if (!trgint) {
- /* Disable MT7530 core clock */
- core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
-
- /* Disable PLL, since phy_device has not yet been created
- * provided for phy_[read,write]_mmd_indirect is called, we
- * provide our own core_write_mmd_indirect to complete this
- * function.
- */
- core_write_mmd_indirect(priv,
- CORE_GSWPLL_GRP1,
- MDIO_MMD_VEND2,
- 0);
-
- /* Set core clock into 500Mhz */
- core_write(priv, CORE_GSWPLL_GRP2,
- RG_GSWPLL_POSDIV_500M(1) |
- RG_GSWPLL_FBKDIV_500M(25));
-
- /* Enable PLL */
- core_write(priv, CORE_GSWPLL_GRP1,
- RG_GSWPLL_EN_PRE |
- RG_GSWPLL_POSDIV_200M(2) |
- RG_GSWPLL_FBKDIV_200M(32));
-
- /* Enable MT7530 core clock */
- core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
- }
+ /* Disable MT7530 core clock */
+ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
+
+ /* Disable PLL, since phy_device has not yet been created
+ * provided for phy_[read,write]_mmd_indirect is called, we
+ * provide our own core_write_mmd_indirect to complete this
+ * function.
+ */
+ core_write_mmd_indirect(priv,
+ CORE_GSWPLL_GRP1,
+ MDIO_MMD_VEND2,
+ 0);
+
+ /* Set core clock into 500Mhz */
+ core_write(priv, CORE_GSWPLL_GRP2,
+ RG_GSWPLL_POSDIV_500M(1) |
+ RG_GSWPLL_FBKDIV_500M(25));
+
+ /* Enable PLL */
+ core_write(priv, CORE_GSWPLL_GRP1,
+ RG_GSWPLL_EN_PRE |
+ RG_GSWPLL_POSDIV_200M(2) |
+ RG_GSWPLL_FBKDIV_200M(32));
+
+ /* Enable MT7530 core clock */
+ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);
/* Setup the MT7530 TRGMII Tx Clock */
core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);

6
target/linux/generic/pending-5.4/761-net-dsa-mt7530-Support-EEE-features.patch
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@ -9,7 +9,7 @@ Content-Transfer-Encoding: 8bit
Signed-off-by: René van Dorst <opensource@vdorst.com>
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -1419,9 +1419,13 @@ static void mt7530_phylink_mac_config(st
@@ -1417,9 +1417,13 @@ static void mt7530_phylink_mac_config(st
switch (state->speed) {
case SPEED_1000:
mcr_new |= PMCR_FORCE_SPEED_1000;
@ -23,7 +23,7 @@ Signed-off-by: René van Dorst <opensource@vdorst.com>
break;
}
if (state->duplex == DUPLEX_FULL) {
@@ -1557,6 +1561,54 @@ mt7530_phylink_mac_link_state(struct dsa
@@ -1555,6 +1559,54 @@ mt7530_phylink_mac_link_state(struct dsa
return 1;
}
@ -78,7 +78,7 @@ Signed-off-by: René van Dorst <opensource@vdorst.com>
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt7530_setup,
@@ -1584,6 +1636,8 @@ static const struct dsa_switch_ops mt753
@@ -1582,6 +1634,8 @@ static const struct dsa_switch_ops mt753
.phylink_mac_config = mt7530_phylink_mac_config,
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
.phylink_mac_link_up = mt7530_phylink_mac_link_up,

1
target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
View File

@ -356,6 +356,7 @@ static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int valu
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
val |= QCA807X_GPIO_FORCE_EN;
val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);

2
target/linux/lantiq/image/vr9.mk
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@ -17,9 +17,11 @@ define Device/arcadyan_arv7519rw22
DEVICE_ALT0_VARIANT := 2.1
DEVICE_ALT1_VENDOR := Astoria Networks
DEVICE_ALT1_MODEL := ARV7519RW22
KERNEL_SIZE := 2048k
IMAGE_SIZE := 31232k
DEVICE_PACKAGES := kmod-usb-dwc2
SUPPORTED_DEVICES += ARV7519RW22
DEFAULT := n
endef
TARGET_DEVICES += arcadyan_arv7519rw22

11
target/linux/mvebu/cortexa9/base-files/etc/uci-defaults/05_fix-compat-version Normal file
View File

@ -0,0 +1,11 @@
. /lib/functions.sh
case "$(board_name)" in
linksys,wrt1900ac-v1|\
linksys,wrt32x)
uci set system.@system[0].compat_version="2.0"
uci commit system
;;
esac
exit 0

8
target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-venom.dts
View File

@ -157,9 +157,9 @@
reg = <0x900000 0x7b00000>; /* 123MB */
};
partition@c00000 {
partition@f00000 {
label = "rootfs1";
reg = <0xc00000 0x7800000>; /* 120MB */
reg = <0xf00000 0x7500000>; /* 117MB */
};
/* kernel2 overlaps with rootfs2 by design */
@ -168,9 +168,9 @@
reg = <0x8400000 0x7b00000>; /* 123MB */
};
partition@8700000 {
partition@8a00000 {
label = "rootfs2";
reg = <0x8700000 0x7800000>; /* 120MB */
reg = <0x8a00000 0x7500000>; /* 117MB */
};
/* last MB is for the BBT, not writable */

21
target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
View File

@ -2,6 +2,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "armada-372x.dtsi"
/ {
@ -37,6 +38,22 @@
enable-active-high;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
switch {
label = "switch";
linux,code = <BTN_0>;
gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
@ -151,12 +168,16 @@
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
mtd-mac-address = <&factory 0x6>;
};
port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
mtd-mac-address = <&factory 0x6>;
};
};

16
target/linux/mvebu/image/cortexa9.mk
View File

@ -8,6 +8,12 @@ define Device/dsa-migration
DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA
endef
define Device/kernel-size-migration
DEVICE_COMPAT_VERSION := 2.0
DEVICE_COMPAT_MESSAGE := Partition design has changed compared to older versions (up to 19.07) due to kernel size restrictions. \
Upgrade via sysupgrade mechanism is not possible, so new installation via factory style image is required.
endef
define Device/buffalo_ls421de
$(Device/NAND-128K)
DEVICE_VENDOR := Buffalo
@ -108,16 +114,15 @@ TARGET_DEVICES += linksys_wrt1900acs
define Device/linksys_wrt1900ac-v1
$(call Device/linksys)
$(Device/dsa-migration)
$(Device/kernel-size-migration)
DEVICE_MODEL := WRT1900AC
DEVICE_VARIANT := v1
DEVICE_ALT0_VENDOR := Linksys
DEVICE_ALT0_MODEL := Mamba
DEVICE_DTS := armada-xp-linksys-mamba
DEVICE_PACKAGES += mwlwifi-firmware-88w8864
KERNEL_SIZE := 3072k
KERNEL_SIZE := 4096k
SUPPORTED_DEVICES += armada-xp-linksys-mamba linksys,mamba
DEFAULT := n
endef
TARGET_DEVICES += linksys_wrt1900ac-v1
@ -148,16 +153,15 @@ TARGET_DEVICES += linksys_wrt3200acm
define Device/linksys_wrt32x
$(call Device/linksys)
$(Device/dsa-migration)
$(Device/kernel-size-migration)
DEVICE_MODEL := WRT32X
DEVICE_ALT0_VENDOR := Linksys
DEVICE_ALT0_MODEL := Venom
DEVICE_DTS := armada-385-linksys-venom
DEVICE_PACKAGES += kmod-btmrvl kmod-mwifiex-sdio mwlwifi-firmware-88w8964
KERNEL_SIZE := 3072k
KERNEL_SIZE := 6144k
KERNEL := kernel-bin | append-dtb
SUPPORTED_DEVICES += armada-385-linksys-venom linksys,venom
DEFAULT := n
endef
TARGET_DEVICES += linksys_wrt32x

37
target/linux/mvebu/patches-5.4/318-armada-xp-linksys-mamba-resize-kernel.patch Normal file
View File

@ -0,0 +1,37 @@
From 258233f00bcd013050efee00c5d9128ef8cd62dd Mon Sep 17 00:00:00 2001
From: Tad <tad@spotco.us>
Date: Fri, 5 Feb 2021 22:32:11 -0500
Subject: [PATCH] ARM: dts: armada-xp-linksys-mamba: Increase kernel
partition to 4MB
Signed-off-by: Tad Davanzo <tad@spotco.us>
---
arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
@@ -456,9 +456,9 @@
reg = <0xa00000 0x2800000>; /* 40MB */
};
- partition@d00000 {
+ partition@e00000 {
label = "rootfs1";
- reg = <0xd00000 0x2500000>; /* 37MB */
+ reg = <0xe00000 0x2400000>; /* 36MB */
};
/* kernel2 overlaps with rootfs2 by design */
@@ -467,9 +467,9 @@
reg = <0x3200000 0x2800000>; /* 40MB */
};
- partition@3500000 {
+ partition@3600000 {
label = "rootfs2";
- reg = <0x3500000 0x2500000>; /* 37MB */
+ reg = <0x3600000 0x2400000>; /* 36MB */
};
/*