diff --git a/include/kernel-6.6 b/include/kernel-6.6 index 6f72804b87..a5048a4e6f 100644 --- a/include/kernel-6.6 +++ b/include/kernel-6.6 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.6 = .56 -LINUX_KERNEL_HASH-6.6.56 = f74812f78e88992c416434cb107639e13a551dbaff36bb90d6346ab16ab71a95 +LINUX_VERSION-6.6 = .57 +LINUX_KERNEL_HASH-6.6.57 = 66ce426ef96f99b8e1ef7ac72e780c730ef8b970f7aa5708501c4274d7abb7b3 diff --git a/package/base-files/files/bin/config_generate b/package/base-files/files/bin/config_generate index 87b62e754e..f634f5b0aa 100755 --- a/package/base-files/files/bin/config_generate +++ b/package/base-files/files/bin/config_generate @@ -314,7 +314,7 @@ generate_static_system() { set system.@system[-1].hostname='ImmortalWrt' set system.@system[-1].timezone='UTC' set system.@system[-1].ttylogin='0' - set system.@system[-1].log_size='64' + set system.@system[-1].log_size='128' set system.@system[-1].urandom_seed='0' delete system.ntp diff --git a/package/base-files/files/lib/functions/uci-defaults.sh b/package/base-files/files/lib/functions/uci-defaults.sh index 8355099c35..5293ce12c0 100644 --- a/package/base-files/files/lib/functions/uci-defaults.sh +++ b/package/base-files/files/lib/functions/uci-defaults.sh @@ -122,6 +122,11 @@ ucidef_set_network_device_path() { _ucidef_set_network_device_common $1 path $2 } +ucidef_set_network_device_path_port() { + _ucidef_set_network_device_common $1 path $2 + _ucidef_set_network_device_common $1 port $3 +} + ucidef_set_network_device_gro() { _ucidef_set_network_device_common $1 gro $2 } diff --git a/package/base-files/files/lib/preinit/10_indicate_preinit b/package/base-files/files/lib/preinit/10_indicate_preinit index a8f7758c84..12f8fc2e21 100644 --- a/package/base-files/files/lib/preinit/10_indicate_preinit +++ b/package/base-files/files/lib/preinit/10_indicate_preinit @@ -65,12 +65,27 @@ preinit_config_switch() { preinit_config_port() { local original + local dev_port local netdev="$1" local path="$2" + local port="$3" [ -d "/sys/devices/$path/net" ] || return - original="$(ls "/sys/devices/$path/net" | head -1)" + + if [ -z "$port" ]; then + original="$(ls "/sys/devices/$path/net" | head -1)" + else + for device in /sys/devices/$path/net/*; do + dev_port="$(cat "$device/dev_port")" + if [ "$dev_port" = "$port" ]; then + original="${device##*/}" + break + fi + done + + [ -z "$original" ] && return + fi [ "$netdev" = "$original" ] && return @@ -109,7 +124,8 @@ preinit_config_board() { json_select "network_device" json_select "$netdev" json_get_vars path path - [ -n "$path" ] && preinit_config_port "$netdev" "$path" + json_get_vars port port + [ -n "$path" ] && preinit_config_port "$netdev" "$path" "$port" json_select .. json_select .. done diff --git a/package/boot/uboot-ath79/Makefile b/package/boot/uboot-ath79/Makefile index 9e64f680b7..52ca1c6c01 100644 --- a/package/boot/uboot-ath79/Makefile +++ b/package/boot/uboot-ath79/Makefile @@ -25,7 +25,14 @@ define U-Boot/ar9344_nec_aterm UBOOT_CONFIG:=nec_ar9344_aterm endef -UBOOT_TARGETS := ar9344_nec_aterm +define U-Boot/qca9558_nec_aterm + NAME:=NEC Aterm series (QCA9558) + BUILD_SUBTARGET:= generic + BUILD_DEVICES:=nec_wg1400hp nec_wg1800hp nec_wg1800hp2 + UBOOT_CONFIG:=nec_qca9558_aterm +endef + +UBOOT_TARGETS := ar9344_nec_aterm qca9558_nec_aterm # don't stage files to bindir, let target/linux/ath79/image/*.mk do that define Package/u-boot/install diff --git a/package/boot/uboot-ath79/patches/001-mips-ath79-add-initial-support-for-QCA955x-SoCs.patch b/package/boot/uboot-ath79/patches/001-mips-ath79-add-initial-support-for-QCA955x-SoCs.patch new file mode 100644 index 0000000000..7d6075c9f6 --- /dev/null +++ b/package/boot/uboot-ath79/patches/001-mips-ath79-add-initial-support-for-QCA955x-SoCs.patch @@ -0,0 +1,1020 @@ +From 7c59f0fe98eb20db8dfbf4d3c67d6043a9efe116 Mon Sep 17 00:00:00 2001 +From: INAGAKI Hiroshi +Date: Sat, 22 Jun 2024 20:45:31 +0900 +Subject: [PATCH 1/2] mips: ath79: add initial support for QCA955x SoCs + +--- + arch/mips/dts/qca955x.dtsi | 70 +++++ + arch/mips/mach-ath79/Kconfig | 9 + + arch/mips/mach-ath79/Makefile | 1 + + .../mach-ath79/include/mach/ar71xx_regs.h | 63 ++++ + arch/mips/mach-ath79/include/mach/ath79.h | 3 + + arch/mips/mach-ath79/qca955x/Makefile | 5 + + arch/mips/mach-ath79/qca955x/clk.c | 286 ++++++++++++++++++ + arch/mips/mach-ath79/qca955x/cpu.c | 7 + + arch/mips/mach-ath79/qca955x/ddr.c | 222 ++++++++++++++ + .../mips/mach-ath79/qca955x/qca955x-ddr-tap.S | 191 ++++++++++++ + 10 files changed, 857 insertions(+) + create mode 100644 arch/mips/dts/qca955x.dtsi + create mode 100644 arch/mips/mach-ath79/qca955x/Makefile + create mode 100644 arch/mips/mach-ath79/qca955x/clk.c + create mode 100644 arch/mips/mach-ath79/qca955x/cpu.c + create mode 100644 arch/mips/mach-ath79/qca955x/ddr.c + create mode 100644 arch/mips/mach-ath79/qca955x/qca955x-ddr-tap.S + +diff --git a/arch/mips/dts/qca955x.dtsi b/arch/mips/dts/qca955x.dtsi +new file mode 100644 +index 0000000000..93bc659743 +--- /dev/null ++++ b/arch/mips/dts/qca955x.dtsi +@@ -0,0 +1,70 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ */ ++ ++#include "skeleton.dtsi" ++ ++/ { ++ compatible = "qca,qca955x"; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "mips,mips74Kc"; ++ reg = <0>; ++ }; ++ }; ++ ++ clocks { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ xtal: xtal { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-output-names = "xtal"; ++ }; ++ }; ++ ++ ahb { ++ compatible = "simple-bus"; ++ ranges; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ apb { ++ compatible = "simple-bus"; ++ ranges; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ uart0: uart@18020000 { ++ compatible = "ns16550"; ++ reg = <0x18020000 0x20>; ++ reg-shift = <2>; ++ ++ status = "disabled"; ++ }; ++ }; ++ ++ spi0: spi@1f000000 { ++ compatible = "qca,ar7100-spi"; ++ reg = <0x1f000000 0x10>; ++ ++ status = "disabled"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++}; +diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig +index 2fa628568a..21ac4b9f95 100644 +--- a/arch/mips/mach-ath79/Kconfig ++++ b/arch/mips/mach-ath79/Kconfig +@@ -34,6 +34,15 @@ config SOC_QCA953X + help + This supports QCA/Atheros qca953x family SOCs. + ++config SOC_QCA955X ++ bool ++ select MIPS_TUNE_74KC ++ select SUPPORT_BIG_ENDIAN ++ select SUPPORTS_CPU_MIPS32_R1 ++ select SUPPORTS_CPU_MIPS32_R2 ++ help ++ This supports QCA/Atheros qca955x family SOCs. ++ + config SOC_QCA956X + bool + select MIPS_TUNE_74KC +diff --git a/arch/mips/mach-ath79/Makefile b/arch/mips/mach-ath79/Makefile +index fbd40c02be..cd8c1f0334 100644 +--- a/arch/mips/mach-ath79/Makefile ++++ b/arch/mips/mach-ath79/Makefile +@@ -7,4 +7,5 @@ obj-y += dram.o + obj-$(CONFIG_SOC_AR933X) += ar933x/ + obj-$(CONFIG_SOC_AR934X) += ar934x/ + obj-$(CONFIG_SOC_QCA953X) += qca953x/ ++obj-$(CONFIG_SOC_QCA955X) += qca955x/ + obj-$(CONFIG_SOC_QCA956X) += qca956x/ +diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +index 5888f6eb28..1e4860ec9c 100644 +--- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h ++++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +@@ -174,11 +174,17 @@ + #define QCA955X_WMAC_BASE \ + (AR71XX_APB_BASE + 0x00100000) + #define QCA955X_WMAC_SIZE 0x20000 ++#define QCA955X_RTC_BASE \ ++ (AR71XX_APB_BASE + 0x00107000) ++#define QCA955X_RTC_SIZE 0x1000 + #define QCA955X_EHCI0_BASE 0x1b000000 + #define QCA955X_EHCI1_BASE 0x1b400000 + #define QCA955X_EHCI_SIZE 0x1000 + #define QCA955X_NFC_BASE 0x1b800200 + #define QCA955X_NFC_SIZE 0xb8 ++#define QCA955X_SRIF_BASE \ ++ (AR71XX_APB_BASE + 0x00116000) ++#define QCA955X_SRIF_SIZE 0x1000 + + #define QCA956X_PCI_MEM_BASE1 0x12000000 + #define QCA956X_PCI_MEM_SIZE 0x02000000 +@@ -285,6 +291,17 @@ + #define QCA953X_DDR_REG_CTL_CONF 0x108 + #define QCA953X_DDR_REG_CONFIG3 0x15c + ++#define QCA955X_DDR_REG_TAP_CTRL2 0x24 ++#define QCA955X_DDR_REG_TAP_CTRL3 0x28 ++#define QCA955X_DDR_REG_DDR2_CONFIG 0xb8 ++#define QCA955X_DDR_REG_DDR2_EMR2 0xbc ++#define QCA955X_DDR_REG_DDR2_EMR3 0xc0 ++#define QCA955X_DDR_REG_BURST 0xc4 ++#define QCA955X_DDR_REG_BURST2 0xc8 ++#define QCA955X_DDR_REG_TIMEOUT_MAX 0xcc ++#define QCA955X_DDR_REG_CTL_CONF 0x108 ++#define QCA955X_DDR_REG_CONFIG3 0x15c ++ + #define QCA956X_DDR_REG_TAP_CTRL2 0x24 + #define QCA956X_DDR_REG_TAP_CTRL3 0x28 + #define QCA956X_DDR_REG_DDR2_CONFIG 0xb8 +@@ -500,6 +517,8 @@ + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 + #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 ++#define QCA955X_PLL_DDR_DIT_FRAC_REG 0x40 ++#define QCA955X_PLL_CPU_DIT_FRAC_REG 0x44 + #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 + + #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 +@@ -508,8 +527,11 @@ + #define QCA955X_PLL_CPU_CONFIG_NINT_MASK 0x3f + #define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 + #define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f ++#define QCA955X_PLL_CPU_CONFIG_RANGE_SHIFT 17 ++#define QCA955X_PLL_CPU_CONFIG_RANGE_MASK 0x3 + #define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 + #define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 ++#define QCA955X_PLL_CPU_CONFIG_PLLPWD BIT(30) + + #define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 + #define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff +@@ -517,8 +539,11 @@ + #define QCA955X_PLL_DDR_CONFIG_NINT_MASK 0x3f + #define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 + #define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f ++#define QCA955X_PLL_DDR_CONFIG_RANGE_SHIFT 21 ++#define QCA955X_PLL_DDR_CONFIG_RANGE_MASK 0x3 + #define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 + #define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 ++#define QCA955X_PLL_DDR_CONFIG_PLLPWD BIT(30) + + #define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) + #define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) +@@ -533,6 +558,24 @@ + #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA955X_PLL_DDR_DIT_NFRAC_MAX_SHIFT 0 ++#define QCA955X_PLL_DDR_DIT_NFRAC_MAX_MASK 0x3ff ++#define QCA955X_PLL_DDR_DIT_NFRAC_MIN_SHIFT 10 ++#define QCA955X_PLL_DDR_DIT_NFRAC_MIN_MASK 0x3ff ++#define QCA955X_PLL_DDR_DIT_NFRAC_STEP_SHIFT 20 ++#define QCA955X_PLL_DDR_DIT_NFRAC_STEP_MASK 0x7f ++#define QCA955X_PLL_DDR_DIT_UPD_CNT_SHIFT 27 ++#define QCA955X_PLL_DDR_DIT_UPD_CNT_MASK 0xf ++ ++#define QCA955X_PLL_CPU_DIT_NFRAC_MAX_SHIFT 0 ++#define QCA955X_PLL_CPU_DIT_NFRAC_MAX_MASK 0x3f ++#define QCA955X_PLL_CPU_DIT_NFRAC_MIN_SHIFT 6 ++#define QCA955X_PLL_CPU_DIT_NFRAC_MIN_MASK 0x3f ++#define QCA955X_PLL_CPU_DIT_NFRAC_STEP_SHIFT 12 ++#define QCA955X_PLL_CPU_DIT_NFRAC_STEP_MASK 0x3f ++#define QCA955X_PLL_CPU_DIT_UPD_CNT_SHIFT 18 ++#define QCA955X_PLL_CPU_DIT_UPD_CNT_MASK 0x3f ++ + #define QCA956X_PLL_CPU_CONFIG_REG 0x00 + #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 + #define QCA956X_PLL_DDR_CONFIG_REG 0x08 +@@ -1027,6 +1070,7 @@ + #define QCA955X_GPIO_REG_OUT_FUNC3 0x38 + #define QCA955X_GPIO_REG_OUT_FUNC4 0x3c + #define QCA955X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA955X_GPIO_REG_IN_ENABLE0 0x44 + #define QCA955X_GPIO_REG_FUNC 0x6c + + #define QCA956X_GPIO_REG_OUT_FUNC0 0x2c +@@ -1220,6 +1264,25 @@ + #define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 + #define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 + ++#define QCA955X_SRIF_BB_DPLL1_REG 0x180 ++#define QCA955X_SRIF_BB_DPLL2_REG 0x184 ++#define QCA955X_SRIF_BB_DPLL3_REG 0x188 ++ ++#define QCA955X_SRIF_CPU_DPLL1_REG 0xf00 ++#define QCA955X_SRIF_CPU_DPLL2_REG 0xf04 ++#define QCA955X_SRIF_CPU_DPLL3_REG 0xf08 ++ ++#define QCA955X_SRIF_DDR_DPLL1_REG 0xec0 ++#define QCA955X_SRIF_DDR_DPLL2_REG 0xec4 ++#define QCA955X_SRIF_DDR_DPLL3_REG 0xec8 ++ ++#define QCA955X_SRIF_PCIE_DPLL1_REG 0xc80 ++#define QCA955X_SRIF_PCIE_DPLL2_REG 0xc84 ++#define QCA955X_SRIF_PCIE_DPLL3_REG 0xc88 ++ ++#define QCA955X_SRIF_PMU1_REG 0xcc0 ++#define QCA955X_SRIF_PMU2_REG 0xcc4 ++ + #define QCA956X_SRIF_BB_DPLL1_REG 0x180 + #define QCA956X_SRIF_BB_DPLL2_REG 0x184 + #define QCA956X_SRIF_BB_DPLL3_REG 0x188 +diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h +index 2eda38885e..445cb2711b 100644 +--- a/arch/mips/mach-ath79/include/mach/ath79.h ++++ b/arch/mips/mach-ath79/include/mach/ath79.h +@@ -148,6 +148,9 @@ int ath79_usb_reset(void); + void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz); + void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz); + ++void qca955x_pll_init(void); ++void qca955x_ddr_init(void); ++ + void qca956x_pll_init(void); + void qca956x_ddr_init(void); + #endif /* __ASM_MACH_ATH79_H */ +diff --git a/arch/mips/mach-ath79/qca955x/Makefile b/arch/mips/mach-ath79/qca955x/Makefile +new file mode 100644 +index 0000000000..a405f9a12d +--- /dev/null ++++ b/arch/mips/mach-ath79/qca955x/Makefile +@@ -0,0 +1,5 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++ ++obj-y += cpu.o ++obj-y += clk.o ++obj-y += ddr.o qca955x-ddr-tap.o +diff --git a/arch/mips/mach-ath79/qca955x/clk.c b/arch/mips/mach-ath79/qca955x/clk.c +new file mode 100644 +index 0000000000..20c93de163 +--- /dev/null ++++ b/arch/mips/mach-ath79/qca955x/clk.c +@@ -0,0 +1,286 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ * ++ * based on QCA956x support and QSDK ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define QCA955X_PLL_CPU_CONFIG_OUTDIV_FMASK \ ++ QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK \ ++ << QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT ++#define QCA955X_PLL_CPU_CONFIG_RANGE_FMASK \ ++ QCA955X_PLL_CPU_CONFIG_RANGE_MASK \ ++ << QCA955X_PLL_CPU_CONFIG_RANGE_SHIFT ++#define QCA955X_PLL_CPU_CONFIG_REFDIV_FMASK \ ++ QCA955X_PLL_CPU_CONFIG_REFDIV_MASK \ ++ << QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT ++#define QCA955X_PLL_CPU_CONFIG_NINT_FMASK \ ++ QCA955X_PLL_CPU_CONFIG_NINT_MASK \ ++ << QCA955X_PLL_CPU_CONFIG_NINT_SHIFT ++#define QCA955X_PLL_CPU_CONFIG_NFRAC_FMASK \ ++ QCA955X_PLL_CPU_CONFIG_NFRAC_MASK \ ++ << QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT ++ ++#define QCA955X_PLL_DDR_CONFIG_OUTDIV_FMASK \ ++ QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK \ ++ << QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT ++#define QCA955X_PLL_DDR_CONFIG_RANGE_FMASK \ ++ QCA955X_PLL_DDR_CONFIG_RANGE_MASK \ ++ << QCA955X_PLL_DDR_CONFIG_RANGE_SHIFT ++#define QCA955X_PLL_DDR_CONFIG_REFDIV_FMASK \ ++ QCA955X_PLL_DDR_CONFIG_REFDIV_MASK \ ++ << QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT ++#define QCA955X_PLL_DDR_CONFIG_NINT_FMASK \ ++ QCA955X_PLL_DDR_CONFIG_NINT_MASK \ ++ << QCA955X_PLL_DDR_CONFIG_NINT_SHIFT ++#define QCA955X_PLL_DDR_CONFIG_NFRAC_FMASK \ ++ QCA955X_PLL_DDR_CONFIG_NFRAC_MASK \ ++ << QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT ++ ++#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_FMASK \ ++ QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK \ ++ << QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT ++#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_FMASK \ ++ QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK \ ++ << QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT ++#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_FMASK \ ++ QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK \ ++ << QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT ++ ++#define QCA955X_PLL_DDR_DIT_UPD_CNT_FMASK \ ++ QCA955X_PLL_DDR_DIT_UPD_CNT_MASK \ ++ << QCA955X_PLL_DDR_DIT_UPD_CNT_SHIFT ++#define QCA955X_PLL_DDR_DIT_NFRAC_STEP_FMASK \ ++ QCA955X_PLL_DDR_DIT_NFRAC_STEP_MASK \ ++ << QCA955X_PLL_DDR_DIT_NFRAC_STEP_SHIFT ++#define QCA955X_PLL_DDR_DIT_NFRAC_MIN_FMASK \ ++ QCA955X_PLL_DDR_DIT_NFRAC_MIN_MASK \ ++ << QCA955X_PLL_DDR_DIT_NFRAC_MIN_SHIFT ++#define QCA955X_PLL_DDR_DIT_NFRAC_MAX_FMASK \ ++ QCA955X_PLL_DDR_DIT_NFRAC_MAX_MASK \ ++ << QCA955X_PLL_DDR_DIT_NFRAC_MAX_SHIFT ++ ++#define QCA955X_PLL_CPU_DIT_UPD_CNT_FMASK \ ++ QCA955X_PLL_CPU_DIT_UPD_CNT_MASK \ ++ << QCA955X_PLL_CPU_DIT_UPD_CNT_SHIFT ++#define QCA955X_PLL_CPU_DIT_NFRAC_STEP_FMASK \ ++ QCA955X_PLL_CPU_DIT_NFRAC_STEP_MASK \ ++ << QCA955X_PLL_CPU_DIT_NFRAC_STEP_SHIFT ++#define QCA955X_PLL_CPU_DIT_NFRAC_MIN_FMASK \ ++ QCA955X_PLL_CPU_DIT_NFRAC_MIN_MASK \ ++ << QCA955X_PLL_CPU_DIT_NFRAC_MIN_SHIFT ++#define QCA955X_PLL_CPU_DIT_NFRAC_MAX_FMASK \ ++ QCA955X_PLL_CPU_DIT_NFRAC_MAX_MASK \ ++ << QCA955X_PLL_CPU_DIT_NFRAC_MAX_SHIFT ++ ++#define PLL_SRIF_DPLL2_KI_MASK GENMASK(29, 26) ++#define PLL_SRIF_DPLL2_KD_MASK GENMASK(25, 19) ++#define PLL_SRIF_DPLL2_PLL_PWD_MASK BIT(16) ++#define PLL_SRIF_DPLL2_DELTA_MASK GENMASK(12, 7) ++ ++#define PLL_SRIF_DPLL2_DEFAULT \ ++ FIELD_PREP(PLL_SRIF_DPLL2_KI_MASK, 0x4) | \ ++ FIELD_PREP(PLL_SRIF_DPLL2_KD_MASK, 0x60) | \ ++ FIELD_PREP(PLL_SRIF_DPLL2_PLL_PWD_MASK, 0x1) | \ ++ FIELD_PREP(PLL_SRIF_DPLL2_DELTA_MASK, 0x1e) ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++static u32 qca955x_get_xtal(void) ++{ ++ u32 val; ++ ++ val = ath79_get_bootstrap(); ++ if (val & QCA955X_BOOTSTRAP_REF_CLK_40) ++ return 40000000; ++ else ++ return 25000000; ++} ++ ++int get_serial_clock(void) ++{ ++ return qca955x_get_xtal(); ++} ++ ++void qca955x_pll_init(void) ++{ ++ void __iomem *srif_regs = map_physmem(QCA955X_SRIF_BASE, ++ QCA955X_SRIF_SIZE, MAP_NOCACHE); ++ void __iomem *pll_regs = map_physmem(AR71XX_PLL_BASE, ++ AR71XX_PLL_SIZE, MAP_NOCACHE); ++ ++ /* 10.33.2 Baseband DPLL2 */ ++ writel(PLL_SRIF_DPLL2_DEFAULT, ++ srif_regs + QCA955X_SRIF_BB_DPLL2_REG); ++ ++ /* 10.33.2 PCIE DPLL2 */ ++ writel(PLL_SRIF_DPLL2_DEFAULT, ++ srif_regs + QCA955X_SRIF_PCIE_DPLL2_REG); ++ ++ /* 10.33.2 DDR DPLL2 */ ++ writel(PLL_SRIF_DPLL2_DEFAULT, ++ srif_regs + QCA955X_SRIF_DDR_DPLL2_REG); ++ ++ /* 10.33.2 CPU DPLL2 */ ++ writel(PLL_SRIF_DPLL2_DEFAULT, ++ srif_regs + QCA955X_SRIF_CPU_DPLL2_REG); ++ ++ /* pll_bypass_set */ ++ setbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS); ++ setbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS); ++ setbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS); ++ ++ /* init_cpu_pll (720_600_240) */ ++ writel(QCA955X_PLL_CPU_CONFIG_PLLPWD | ++ FIELD_PREP(QCA955X_PLL_CPU_CONFIG_OUTDIV_FMASK, 0x0) | ++ FIELD_PREP(QCA955X_PLL_CPU_CONFIG_RANGE_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_CPU_CONFIG_REFDIV_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_CPU_CONFIG_NINT_FMASK, 0x12), ++ pll_regs + QCA955X_PLL_CPU_CONFIG_REG); ++ ++ /* init_ddr_pll (720_600_240) */ ++ writel(QCA955X_PLL_DDR_CONFIG_PLLPWD | ++ FIELD_PREP(QCA955X_PLL_DDR_CONFIG_OUTDIV_FMASK, 0x0) | ++ FIELD_PREP(QCA955X_PLL_DDR_CONFIG_RANGE_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_DDR_CONFIG_REFDIV_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_DDR_CONFIG_NINT_FMASK, 0xf), ++ pll_regs + QCA955X_PLL_DDR_CONFIG_REG); ++ ++ /* init_ahb_pll (720_600_240) */ ++ writel(/* use CPU PLL for AHB (0) */ ++ /* use DDR PLL for DDR (0) */ ++ /* use CPU PLL for CPU (0) */ ++ FIELD_PREP(QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_FMASK, 0x2) | ++ FIELD_PREP(QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_FMASK, 0x0) | ++ FIELD_PREP(QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_FMASK, 0x0) | ++ QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS | ++ QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS | ++ QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS, ++ pll_regs + QCA955X_PLL_CLK_CTRL_REG); ++ ++ /* pll_pwd_unset */ ++ clrbits_be32(pll_regs + QCA955X_PLL_CPU_CONFIG_REG, ++ QCA955X_PLL_CPU_CONFIG_PLLPWD); ++ clrbits_be32(pll_regs + QCA955X_PLL_DDR_CONFIG_REG, ++ QCA955X_PLL_DDR_CONFIG_PLLPWD); ++ ++ /* outdiv_unset */ ++ clrbits_be32(pll_regs + QCA955X_PLL_CPU_CONFIG_REG, ++ QCA955X_PLL_CPU_CONFIG_OUTDIV_FMASK); ++ clrbits_be32(pll_regs + QCA955X_PLL_DDR_CONFIG_REG, ++ QCA955X_PLL_DDR_CONFIG_OUTDIV_FMASK); ++ ++ /* pll_bypass_unset */ ++ clrbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS); ++ clrbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS); ++ clrbits_be32(pll_regs + QCA955X_PLL_CLK_CTRL_REG, ++ QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS); ++ ++ /* ddr_pll_dither_unset */ ++ writel(FIELD_PREP(QCA955X_PLL_DDR_DIT_UPD_CNT_FMASK, 0xf) | ++ FIELD_PREP(QCA955X_PLL_DDR_DIT_NFRAC_STEP_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_DDR_DIT_NFRAC_MIN_FMASK, 0x0) | ++ FIELD_PREP(QCA955X_PLL_DDR_DIT_NFRAC_MAX_FMASK, 0x3ff), ++ pll_regs + QCA955X_PLL_DDR_DIT_FRAC_REG); ++ ++ /* cpu_pll_dither_unset */ ++ writel(FIELD_PREP(QCA955X_PLL_CPU_DIT_UPD_CNT_FMASK, 0xf) | ++ FIELD_PREP(QCA955X_PLL_CPU_DIT_NFRAC_STEP_FMASK, 0x1) | ++ FIELD_PREP(QCA955X_PLL_CPU_DIT_NFRAC_MIN_FMASK, 0x0) | ++ FIELD_PREP(QCA955X_PLL_CPU_DIT_NFRAC_MAX_FMASK, 0x3f), ++ pll_regs + QCA955X_PLL_CPU_DIT_FRAC_REG); ++} ++ ++int get_clocks(void) ++{ ++ void __iomem *regs; ++ u32 pll, cpu_pll, ddr_pll, clk_ctrl; ++ u32 cpu_clk, ddr_clk, ahb_clk; ++ u32 outdiv, refdiv, nint, nfrac, postdiv; ++ u32 xtal = qca955x_get_xtal(); ++ ++ regs = map_physmem(AR71XX_PLL_BASE, AR71XX_PLL_SIZE, ++ MAP_NOCACHE); ++ pll = readl(regs + QCA955X_PLL_CPU_CONFIG_REG); ++ outdiv = FIELD_GET(QCA955X_PLL_CPU_CONFIG_OUTDIV_FMASK, pll); ++ refdiv = FIELD_GET(QCA955X_PLL_CPU_CONFIG_REFDIV_FMASK, pll); ++ nint = FIELD_GET(QCA955X_PLL_CPU_CONFIG_NINT_FMASK, pll); ++ nfrac = FIELD_GET(QCA955X_PLL_CPU_CONFIG_NFRAC_FMASK, pll); ++ ++ cpu_pll = (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); ++ ++ pll = readl(regs + QCA955X_PLL_DDR_CONFIG_REG); ++ outdiv = FIELD_GET(QCA955X_PLL_DDR_CONFIG_OUTDIV_FMASK, pll); ++ refdiv = FIELD_GET(QCA955X_PLL_DDR_CONFIG_REFDIV_FMASK, pll); ++ nint = FIELD_GET(QCA955X_PLL_DDR_CONFIG_NINT_FMASK, pll); ++ nfrac = FIELD_GET(QCA955X_PLL_DDR_CONFIG_NFRAC_FMASK, pll); ++ ++ ddr_pll = (xtal * (nint + (nfrac >> 9))) / (refdiv * (1 << outdiv)); ++ ++ clk_ctrl = readl(regs + QCA955X_PLL_CLK_CTRL_REG); ++ ++ postdiv = FIELD_GET(QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_FMASK, clk_ctrl); ++ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) ++ cpu_clk = xtal; ++ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) ++ cpu_clk = ddr_pll / (postdiv + 1); ++ else ++ cpu_clk = cpu_pll / (postdiv + 1); ++ ++ postdiv = FIELD_GET(QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_FMASK, clk_ctrl); ++ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) ++ ddr_clk = xtal; ++ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) ++ ddr_clk = cpu_pll / (postdiv + 1); ++ else ++ ddr_clk = ddr_pll / (postdiv + 1); ++ ++ postdiv = FIELD_GET(QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_FMASK, clk_ctrl); ++ if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) ++ ahb_clk = xtal; ++ else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) ++ ahb_clk = ddr_pll; ++ else ++ ahb_clk = cpu_pll; ++ ahb_clk /= (postdiv + 1); ++ ++ gd->cpu_clk = cpu_clk; ++ gd->mem_clk = ddr_clk; ++ gd->bus_clk = ahb_clk; ++ ++ debug("cpu_clk=%u, ddr_clk=%u, bus_clk=%u\n", ++ cpu_clk, ddr_clk, ahb_clk); ++ ++ return 0; ++} ++ ++ulong get_bus_freq(ulong dummy) ++{ ++ if (!gd->bus_clk) ++ get_clocks(); ++ return gd->bus_clk; ++} ++ ++ulong get_ddr_freq(ulong dummy) ++{ ++ if (!gd->mem_clk) ++ get_clocks(); ++ return gd->mem_clk; ++} +diff --git a/arch/mips/mach-ath79/qca955x/cpu.c b/arch/mips/mach-ath79/qca955x/cpu.c +new file mode 100644 +index 0000000000..9405871444 +--- /dev/null ++++ b/arch/mips/mach-ath79/qca955x/cpu.c +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ */ ++ ++/* The lowlevel_init() is not needed on QCA955X */ ++void lowlevel_init(void) {} +diff --git a/arch/mips/mach-ath79/qca955x/ddr.c b/arch/mips/mach-ath79/qca955x/ddr.c +new file mode 100644 +index 0000000000..654a410d95 +--- /dev/null ++++ b/arch/mips/mach-ath79/qca955x/ddr.c +@@ -0,0 +1,222 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ * ++ * Based on QCA956x support and QSDK ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DDR_CONFIG_CAS_LATENCY_MSB_MASK BIT(31) ++#define DDR_CONFIG_OPEN_PAGE_MASK BIT(30) ++#define DDR_CONFIG_CAS_LATENCY_MASK GENMASK(29, 27) ++#define DDR_CONFIG_TMRD_MASK GENMASK(26, 23) ++#define DDR_CONFIG_TRFC_MASK GENMASK(22, 17) ++#define DDR_CONFIG_TRRD_MASK GENMASK(16, 13) ++#define DDR_CONFIG_TRP_MASK GENMASK(12, 9) ++#define DDR_CONFIG_TRCD_MASK GENMASK(8, 5) ++#define DDR_CONFIG_TRAS_MASK GENMASK(4, 0) ++ ++#define DDR_CONFIG2_HALF_WIDTH_LOW_MASK BIT(31) ++#define DDR_CONFIG2_SWAP_A26_A27_MASK BIT(30) ++#define DDR_CONFIG2_GATE_OPEN_LATENCY_MASK GENMASK(29, 26) ++#define DDR_CONFIG2_TWTR_MASK GENMASK(25, 21) ++#define DDR_CONFIG2_TRTP_MASK GENMASK(20, 17) ++#define DDR_CONFIG2_TRTW_MASK GENMASK(16, 12) ++#define DDR_CONFIG2_TWR_MASK GENMASK(11, 8) ++#define DDR_CONFIG2_CKE_MASK BIT(7) ++#define DDR_CONFIG2_CNTL_OE_EN_MASK BIT(5) ++#define DDR_CONFIG2_BURST_LENGTH_MASK GENMASK(3, 0) ++ ++#define DDR_CTL_CONFIG_SRAM_TSEL_MASK GENMASK(31, 30) ++#define DDR_CTL_CONFIG_GE0_SRAM_SYNC_MASK BIT(20) ++#define DDR_CTL_CONFIG_GE1_SRAM_SYNC_MASK BIT(19) ++#define DDR_CTL_CONFIG_USB_SRAM_SYNC_MASK BIT(18) ++#define DDR_CTL_CONFIG_PCIE_SRAM_SYNC_MASK BIT(17) ++#define DDR_CTL_CONFIG_WMAC_SRAM_SYNC_MASK BIT(16) ++#define DDR_CTL_CONFIG_MISC_SRC1_SRAM_SYNC_MASK BIT(15) ++#define DDR_CTL_CONFIG_MISC_SRC2_SRAM_SYNC_MASK BIT(14) ++#define DDR_CTL_CONFIG_PAD_DDR2_SEL_MASK BIT(6) ++#define DDR_CTL_CONFIG_CPU_DDR_SYNC_MASK BIT(2) ++#define DDR_CTL_CONFIG_HALF_WIDTH_MASK BIT(1) ++ ++#define RST_BOOTSTRAP_DDR_WIDTH_MASK BIT(3) ++ ++#define PMU2_PGM_MASK BIT(21) ++#define PMU2_LDO_TUNE_MASK GENMASK(20, 19) ++ ++/* ++* DDR2 DDR1 ++* 0x40c3 25MHz 0x4186 25Mhz ++* 0x4138 40MHz 0x4270 40Mhz ++*/ ++#define CFG_DDR2_REFRESH_VAL 0x4138 ++ ++#define CFG_DDR2_CONFIG_VAL \ ++ DDR_CONFIG_CAS_LATENCY_MSB_MASK | DDR_CONFIG_OPEN_PAGE_MASK | \ ++ FIELD_PREP(DDR_CONFIG_CAS_LATENCY_MASK, 0x4) | \ ++ FIELD_PREP(DDR_CONFIG_TMRD_MASK, 0xf) | \ ++ FIELD_PREP(DDR_CONFIG_TRFC_MASK, 0x15) | \ ++ FIELD_PREP(DDR_CONFIG_TRRD_MASK, 0x7) | \ ++ FIELD_PREP(DDR_CONFIG_TRP_MASK, 0x9) | \ ++ FIELD_PREP(DDR_CONFIG_TRCD_MASK, 0x9) | \ ++ FIELD_PREP(DDR_CONFIG_TRAS_MASK, 0x1b) ++ ++#define CFG_DDR2_CONFIG2_VAL \ ++ DDR_CONFIG2_HALF_WIDTH_LOW_MASK | /* SWAP_A26_A27 is off */ \ ++ FIELD_PREP(DDR_CONFIG2_GATE_OPEN_LATENCY_MASK, 0xb) | \ ++ FIELD_PREP(DDR_CONFIG2_TWTR_MASK, 0x15) | \ ++ FIELD_PREP(DDR_CONFIG2_TRTP_MASK, 0x9) | \ ++ FIELD_PREP(DDR_CONFIG2_TRTW_MASK, 0xe) | \ ++ FIELD_PREP(DDR_CONFIG2_TWR_MASK, 0x1) | \ ++ DDR_CONFIG2_CKE_MASK | DDR_CONFIG2_CNTL_OE_EN_MASK | \ ++ FIELD_PREP(DDR_CONFIG2_BURST_LENGTH_MASK, 0x8) ++ ++#define CFG_DDR2_CONFIG3_VAL 0x0000000a ++#define CFG_DDR2_EXT_MODE_VAL1 0x782 ++#define CFG_DDR2_EXT_MODE_VAL2 0x402 ++#define CFG_DDR2_MODE_VAL_INIT 0x153 ++#define CFG_DDR2_MODE_VAL 0x53 ++#define CFG_DDR2_TAP_VAL 0x10 ++#define CFG_DDR2_EN_TWL_VAL 0x00001e7d ++#define CFG_DDR2_RD_DATA_THIS_CYCLE_VAL_16 0xffff ++#define CFG_DDR2_RD_DATA_THIS_CYCLE_VAL_32 0xff ++ ++#define CFG_DDR_CTL_CONFIG \ ++ FIELD_PREP(DDR_CTL_CONFIG_SRAM_TSEL_MASK, 0x1) | \ ++ DDR_CTL_CONFIG_GE0_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_GE1_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_USB_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_PCIE_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_WMAC_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_MISC_SRC1_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_MISC_SRC2_SRAM_SYNC_MASK | \ ++ DDR_CTL_CONFIG_PAD_DDR2_SEL_MASK /* for DDR2 */ ++ /* CPU_DDR_SYNC is off (CPU clk != DDR clk) */ ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++void qca955x_ddr_init(void) ++{ ++ u32 cycle_val = CFG_DDR2_RD_DATA_THIS_CYCLE_VAL_32; ++ u32 ctl_config = CFG_DDR_CTL_CONFIG; ++ void __iomem *ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, ++ MAP_NOCACHE); ++ void __iomem *srif_regs = map_physmem(QCA955X_SRIF_BASE, QCA955X_SRIF_SIZE, ++ MAP_NOCACHE); ++ ++ /* 16bit */ ++ if (!(ath79_get_bootstrap() & RST_BOOTSTRAP_DDR_WIDTH_MASK)) ++ { ++ ctl_config |= DDR_CTL_CONFIG_HALF_WIDTH_MASK; ++ cycle_val = CFG_DDR2_RD_DATA_THIS_CYCLE_VAL_16; ++ } ++ ++ writel(0x10, ddr_regs + AR71XX_DDR_REG_CONTROL); ++ udelay(10); ++ ++ writel(0x20, ddr_regs + AR71XX_DDR_REG_CONTROL); ++ udelay(10); ++ ++ writel(ctl_config, ddr_regs + QCA955X_DDR_REG_CTL_CONF); ++ udelay(10); ++ ++ writel(cycle_val, ddr_regs + AR71XX_DDR_REG_RD_CYCLE); ++ udelay(100); ++ ++ writel(0x74444444, ddr_regs + QCA955X_DDR_REG_BURST); ++ udelay(100); ++ ++ writel(0x44444444, ddr_regs + QCA955X_DDR_REG_BURST2); ++ udelay(100); ++ ++ writel(0xfffff, ddr_regs + QCA955X_DDR_REG_TIMEOUT_MAX); ++ udelay(100); ++ ++ writel(CFG_DDR2_CONFIG_VAL, ddr_regs + AR71XX_DDR_REG_CONFIG); ++ udelay(100); ++ ++ writel(CFG_DDR2_CONFIG2_VAL, ddr_regs + AR71XX_DDR_REG_CONFIG2); ++ udelay(100); ++ ++ writel(CFG_DDR2_CONFIG3_VAL, ddr_regs + QCA955X_DDR_REG_CONFIG3); ++ udelay(100); ++ ++ writel(CFG_DDR2_EN_TWL_VAL, ddr_regs + QCA955X_DDR_REG_DDR2_CONFIG); ++ udelay(100); ++ ++ writel(CFG_DDR2_CONFIG2_VAL | 0x80, ++ ddr_regs + AR71XX_DDR_REG_CONFIG2); /* CKE Enable */ ++ udelay(100); ++ ++ writel(0x8, ddr_regs + AR71XX_DDR_REG_CONTROL); /* Precharge */ ++ udelay(10); ++ ++ writel(0x10, ddr_regs + AR71XX_DDR_REG_CONTROL); /* EMR2 */ ++ udelay(10); ++ ++ writel(0x20, ddr_regs + AR71XX_DDR_REG_CONTROL); /* EMR3 */ ++ udelay(10); ++ ++ /* EMR DLL enable, Reduced Driver Impedance control, Differential DQS disabled */ ++ writel(CFG_DDR2_EXT_MODE_VAL2, ddr_regs + AR71XX_DDR_REG_EMR); ++ udelay(100); ++ ++ writel(0x2, ddr_regs + AR71XX_DDR_REG_CONTROL); /* EMR write */ ++ udelay(10); ++ ++ writel(CFG_DDR2_MODE_VAL_INIT, ddr_regs + AR71XX_DDR_REG_MODE); ++ udelay(1000); ++ ++ writel(0x1, ddr_regs + AR71XX_DDR_REG_CONTROL); /* MR Write */ ++ udelay(10); ++ ++ writel(0x8, ddr_regs + AR71XX_DDR_REG_CONTROL); /* Precharge */ ++ udelay(10); ++ ++ writel(0x4, ddr_regs + AR71XX_DDR_REG_CONTROL); /* Auto Refresh */ ++ udelay(10); ++ ++ writel(0x4, ddr_regs + AR71XX_DDR_REG_CONTROL); /* Auto Refresh */ ++ udelay(10); ++ ++ /* Issue MRS to remove DLL out-of-reset */ ++ writel(CFG_DDR2_MODE_VAL, ddr_regs + AR71XX_DDR_REG_MODE); ++ udelay(100); ++ ++ writel(0x1, ddr_regs + AR71XX_DDR_REG_CONTROL); /* MR write */ ++ udelay(100); ++ ++ writel(CFG_DDR2_EXT_MODE_VAL1, ddr_regs + AR71XX_DDR_REG_EMR); ++ udelay(100); ++ ++ writel(0x2, ddr_regs + AR71XX_DDR_REG_CONTROL); /* EMR write */ ++ udelay(100); ++ ++ writel(CFG_DDR2_EXT_MODE_VAL2, ddr_regs + AR71XX_DDR_REG_EMR); ++ udelay(100); ++ ++ writel(0x2, ddr_regs + AR71XX_DDR_REG_CONTROL); /* EMR write */ ++ udelay(100); ++ ++ writel(CFG_DDR2_REFRESH_VAL, ddr_regs + AR71XX_DDR_REG_REFRESH); ++ udelay(100); ++ ++ writel(CFG_DDR2_TAP_VAL, ddr_regs + AR71XX_DDR_REG_TAP_CTRL0); ++ writel(CFG_DDR2_TAP_VAL, ddr_regs + AR71XX_DDR_REG_TAP_CTRL1); ++ writel(CFG_DDR2_TAP_VAL, ddr_regs + QCA955X_DDR_REG_TAP_CTRL2); ++ writel(CFG_DDR2_TAP_VAL, ddr_regs + QCA955X_DDR_REG_TAP_CTRL3); ++ ++ writel(0x633c8176, srif_regs + QCA955X_SRIF_PMU1_REG); ++ /* Set DDR2 Voltage to 1.8 volts */ ++ writel(PMU2_PGM_MASK | FIELD_PREP(PMU2_LDO_TUNE_MASK, 0x3), ++ srif_regs + QCA955X_SRIF_PMU2_REG); ++} +diff --git a/arch/mips/mach-ath79/qca955x/qca955x-ddr-tap.S b/arch/mips/mach-ath79/qca955x/qca955x-ddr-tap.S +new file mode 100644 +index 0000000000..1c117a5b69 +--- /dev/null ++++ b/arch/mips/mach-ath79/qca955x/qca955x-ddr-tap.S +@@ -0,0 +1,191 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ * ++ * Based on QSDK ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ .set noreorder ++ ++LEAF(ddr_tap_tuning) ++ li a0, 0xbd007f00 ++ sw zero, 0x0(a0) /* Place where the tap values are saved and used for SWEEP */ ++ sw zero, 0x4(a0) /* Place where the number of passing taps are saved. */ ++ sw zero, 0x14(a0) /* Place where the last pass tap value is stored */ ++ li a1, 0xaa55aa55 /* Indicates that the First pass tap value is not found */ ++ sw a1, 0x10(a0) /* Place where the First pass tap value is stored */ ++ nop ++ ++ li a0, CKSEG1ADDR(AR71XX_RESET_BASE) ++ lw a1, 0x1c(a0) /* Reading the RST_RESET_ADDRESS */ ++ li a2, 0x08000000 /* Setting the RST_RESET_RTC_RESET */ ++ or a1, a1, a2 ++ sw a1, 0x1c(a0) ++ ++ li a3, 0xffffffff ++ xor a2, a2, a3 ++ and a1, a1, a2 ++ sw a1, 0x1c(a0) /* Taking the RTC out of RESET */ ++ nop ++ ++ li a0, CKSEG1ADDR(QCA955X_RTC_BASE) ++ li a1, 0x1 ++ sw a1, 0x0040(a0) /* RTC_SYNC_RESET_ADDRESS */ ++ ++ li a2, 0x2 ++ ++_poll_for_RTC_ON: ++ lw a1, 0x0044(a0) /* RTC_SYNC_STATUS_ADDRESS */ ++ and a1, a2, a1 ++ bne a1, a2, _poll_for_RTC_ON ++ nop ++ ++_CHANGE_TAPS: ++ li t0, 0xbd007f00 /* Read the current value of the TAP for programming */ ++ lw t1, 0x0(t0) ++ li t2, 0x00000000 ++ or t3, t1, t2 ++ ++ li t0, CKSEG1ADDR(AR71XX_DDR_CTRL_BASE) ++ sw t3, 0x1c(t0) /* TAP_CONTROL_0_ADDRESS */ ++ sw t3, 0x20(t0) /* TAP_CONTROL_1_ADDRESS */ ++ sw t3, 0x24(t0) /* TAP_CONTROL_2_ADDRESS */ ++ sw t3, 0x28(t0) /* TAP_CONTROL_3_ADDRESS */ ++ ++ li t1, 0x00000010 /* Running the test 8 times */ ++ sw t1, 0x0068(t0) /* PERF_COMP_ADDR_1_ADDRESS */ ++ ++ li t1, 0xfa5de83f /* 4 Row Address Bits, 4 Column Address Bits, 2 BA bits */ ++ sw t1, 0x002c(t0) /* PERF_MASK_ADDR_0_ADDRESS */ ++ ++ li t1, 0x545fc332 ++ sw t1, 0x0070(t0) /* PERF_COMP_AHB_GE0_1_ADDRESS */ ++ ++ li t1, 0xaba03ccd ++ sw t1, 0x0040(t0) /* PERF_COMP_AHB_GE1_0_ADDRESS */ ++ ++ li t1, 0x545fc332 ++ sw t1, 0x0078(t0) /* PERF_COMP_AHB_GE1_1_ADDRESS */ ++ ++ li t1, 0xaba03ccd ++ sw t1, 0x0034(t0) /* PERF_MASK_AHB_GE0_0_ADDRESS */ ++ ++ li t1, 0x545fc332 ++ sw t1, 0x006c(t0) /* PERF_MASK_AHB_GE0_1_ADDRESS */ ++ ++ li t1, 0xaba03ccd ++ sw t1, 0x003c(t0) /* PERF_MASK_AHB_GE1_0_ADDRESS */ ++ ++ li t1, 0x545fc332 ++ sw t1, 0x0074(t0) /* PERF_MASK_AHB_GE1_1_ADDRESS */ ++ ++ li t1, 0xaba03ccd ++ sw t1, 0x0038(t0) /* PERF_COMP_AHB_GE0_0_ADDRESS */ ++ ++ li t1, 0x00000001 ++ sw t1, 0x011c(t0) /* DDR_BIST_ADDRESS */ ++ ++ li t2, 0x1 ++ ++_bist_done_poll: ++ lw t1, 0x0120(t0) /* DDR_BIST_STATUS_ADDRESS */ ++ and t1, t1, t2 ++ bne t1, t2, _bist_done_poll ++ nop ++ ++ lw t1, 0x0120(t0) /* DDR_BIST_STATUS_ADDRESS */ ++ li t4, 0x000001fe ++ and t2, t1, t4 ++ srl t2, t2, 0x1 /* no. of Pass Runs */ ++ ++ li t5, 0x00000000 ++ sw t5, 0x011c(t0) /* DDR_BIST_ADDRESS - Stop the DDR BIST test */ ++ ++ li t5, 0x0001fe00 ++ and t5, t5, t1 ++ bnez t5, _iterate_tap /* This is a redundant compare but nevertheless - Comparing the FAILS */ ++ nop ++ ++ lw t1, 0x0068(t0) /* PERF_COMP_ADDR_1_ADDRESS */ ++ li t3, 0x000001fe ++ and t3, t3, t1 ++ srl t3, t3, 0x1 /* No. of runs in the config register. */ ++ bne t3, t2, _iterate_tap ++ nop ++ ++pass_tap: ++ li t0, 0xbd007f00 ++ lw t1, 0x4(t0) ++ addiu t1, t1, 0x1 ++ sw t1, 0x4(t0) ++ ++ li t0, 0xbd007f10 ++ lw t1, 0x0(t0) ++ li t2, 0xaa55aa55 ++ beq t1, t2, _first_pass ++ nop ++ ++ li t0, 0xbd007f00 ++ lw t1, 0x0(t0) ++ li t0, 0xbd007f10 ++ sw t1, 0x4(t0) ++ nop ++ b _iterate_tap ++ nop ++ ++_first_pass: ++ li t0, 0xbd007f00 ++ lw t1, 0x0(t0) ++ li t0, 0xbd007f10 ++ sw t1, 0x0(t0) ++ sw t1, 0x4(t0) ++ nop ++ ++_iterate_tap: ++ li t0, 0xbd007f00 ++ lw t1, 0x0(t0) ++ li t2, 0x3f ++ beq t1, t2, _STOP_TEST ++ nop ++ addiu t1, t1, 0x1 ++ sw t1, 0x0(t0) ++ nop ++ b _CHANGE_TAPS ++ nop ++ ++_STOP_TEST: ++ li t0, 0xbd007f00 ++ lw t1, 0x4(t0) ++ bnez t1, _load_center_tap ++ nop ++ li t3, 0x8 /* Default Tap to be used */ ++ b _load_tap_into_reg ++ nop ++ ++_load_center_tap: ++ li t0, 0xbd007f10 ++ lw t1, 0x0(t0) ++ lw t2, 0x4(t0) ++ add t3, t1, t2 ++ srl t3, t3, 0x1 ++ li t4, 0x3f ++ and t3, t3, t4 ++ ++_load_tap_into_reg: ++ li t0, CKSEG1ADDR(AR71XX_DDR_CTRL_BASE) ++ sw t3, 0x1c(t0) /* TAP_CONTROL_0_ADDRESS */ ++ sw t3, 0x20(t0) /* TAP_CONTROL_1_ADDRESS */ ++ sw t3, 0x24(t0) /* TAP_CONTROL_2_ADDRESS */ ++ sw t3, 0x28(t0) /* TAP_CONTROL_3_ADDRESS */ ++ ++ nop ++ jr ra ++ nop ++ END(ddr_tap_tuning) +-- +2.43.0 + diff --git a/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch b/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch index 833a7425b7..5d87d22651 100644 --- a/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch +++ b/package/boot/uboot-ath79/patches/400-ath79-add-support-for-NEC-AR9344-Aterm-series.patch @@ -70,7 +70,7 @@ Subject: [PATCH] ath79: add support for NEC AR9344 Aterm series +/delete-node/ &spi0; --- a/arch/mips/mach-ath79/Kconfig +++ b/arch/mips/mach-ath79/Kconfig -@@ -58,6 +58,10 @@ config TARGET_AP152 +@@ -67,6 +67,10 @@ config TARGET_AP152 bool "AP152 Reference Board" select SOC_QCA956X @@ -81,7 +81,7 @@ Subject: [PATCH] ath79: add support for NEC AR9344 Aterm series config BOARD_TPLINK_WDR4300 bool "TP-Link WDR4300 Board" select SOC_AR934X -@@ -67,6 +71,7 @@ endchoice +@@ -76,6 +80,7 @@ endchoice source "board/qca/ap121/Kconfig" source "board/qca/ap143/Kconfig" source "board/qca/ap152/Kconfig" diff --git a/package/boot/uboot-ath79/patches/401-mips-ath79-add-support-for-NEC-QCA9558-Aterm-series.patch b/package/boot/uboot-ath79/patches/401-mips-ath79-add-support-for-NEC-QCA9558-Aterm-series.patch new file mode 100644 index 0000000000..c06dae28f0 --- /dev/null +++ b/package/boot/uboot-ath79/patches/401-mips-ath79-add-support-for-NEC-QCA9558-Aterm-series.patch @@ -0,0 +1,284 @@ +From 3e01c3042fdc638f6edc57a6e64a111a785589fd Mon Sep 17 00:00:00 2001 +From: INAGAKI Hiroshi +Date: Sun, 23 Jun 2024 04:09:14 +0900 +Subject: [PATCH 2/2] mips: ath79: add support for NEC QCA9558 Aterm series + +mips: ath79: cleanup defconfig for NEC QCA9558 Aterm series +--- + arch/mips/dts/Makefile | 1 + + arch/mips/dts/nec,qca9558-aterm.dts | 32 +++++++++++++ + arch/mips/mach-ath79/Kconfig | 5 ++ + board/nec/qca9558_aterm/Kconfig | 30 ++++++++++++ + board/nec/qca9558_aterm/Makefile | 3 ++ + board/nec/qca9558_aterm/qca9558_aterm.c | 58 +++++++++++++++++++++++ + configs/nec_qca9558_aterm_defconfig | 61 +++++++++++++++++++++++++ + include/configs/nec_qca9558_aterm.h | 28 ++++++++++++ + 8 files changed, 218 insertions(+) + create mode 100644 arch/mips/dts/nec,qca9558-aterm.dts + create mode 100644 board/nec/qca9558_aterm/Kconfig + create mode 100644 board/nec/qca9558_aterm/Makefile + create mode 100644 board/nec/qca9558_aterm/qca9558_aterm.c + create mode 100644 configs/nec_qca9558_aterm_defconfig + create mode 100644 include/configs/nec_qca9558_aterm.h + +--- a/arch/mips/dts/Makefile ++++ b/arch/mips/dts/Makefile +@@ -25,6 +25,7 @@ dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += + dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += mrvl,octeon-ebb7304.dtb + dtb-$(CONFIG_TARGET_OCTEON_NIC23) += mrvl,octeon-nic23.dtb + dtb-$(CONFIG_BOARD_NEC_AR9344_ATERM) += nec,ar9344-aterm.dtb ++dtb-$(CONFIG_BOARD_NEC_QCA9558_ATERM) += nec,qca9558-aterm.dtb + dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb + dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb + dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb +--- /dev/null ++++ b/arch/mips/dts/nec,qca9558-aterm.dts +@@ -0,0 +1,32 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ */ ++ ++/dts-v1/; ++#include "qca955x.dtsi" ++ ++/ { ++ model = "NEC Aterm series (QCA9558)"; ++ compatible = "nec,qca9558-aterm", "qca,qca955x"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:9600n8"; ++ }; ++}; ++ ++&uart0 { ++ clock-frequency = <40000000>; ++ status = "okay"; ++}; ++ ++&xtal { ++ clock-frequency = <40000000>; ++}; ++ ++/* delete unused node to reduce dtb size */ ++/delete-node/ &spi0; +--- a/arch/mips/mach-ath79/Kconfig ++++ b/arch/mips/mach-ath79/Kconfig +@@ -71,6 +71,10 @@ config BOARD_NEC_AR9344_ATERM + bool "NEC Aterm series Boards (AR9344)" + select SOC_AR934X + ++config BOARD_NEC_QCA9558_ATERM ++ bool "NEC Aterm series Boards (QCA9558)" ++ select SOC_QCA955X ++ + config BOARD_TPLINK_WDR4300 + bool "TP-Link WDR4300 Board" + select SOC_AR934X +@@ -81,6 +85,7 @@ source "board/qca/ap121/Kconfig" + source "board/qca/ap143/Kconfig" + source "board/qca/ap152/Kconfig" + source "board/nec/ar9344_aterm/Kconfig" ++source "board/nec/qca9558_aterm/Kconfig" + source "board/tplink/wdr4300/Kconfig" + + endmenu +--- /dev/null ++++ b/board/nec/qca9558_aterm/Kconfig +@@ -0,0 +1,30 @@ ++if BOARD_NEC_QCA9558_ATERM ++ ++config SYS_VENDOR ++ default "nec" ++ ++config SYS_SOC ++ default "ath79" ++ ++config SYS_BOARD ++ default "qca9558_aterm" ++ ++config SYS_CONFIG_NAME ++ default "nec_qca9558_aterm" ++ ++config TEXT_BASE ++ default 0x9f000000 ++ ++config SYS_DCACHE_SIZE ++ default 32768 ++ ++config SYS_DCACHE_LINE_SIZE ++ default 32 ++ ++config SYS_ICACHE_SIZE ++ default 65536 ++ ++config SYS_ICACHE_LINE_SIZE ++ default 32 ++ ++endif +--- /dev/null ++++ b/board/nec/qca9558_aterm/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++ ++obj-y = qca9558_aterm.o +--- /dev/null ++++ b/board/nec/qca9558_aterm/qca9558_aterm.c +@@ -0,0 +1,58 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) INAGAKI Hiroshi ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static void aterm_pinmux_config(void) ++{ ++ void __iomem *regs = map_physmem(AR71XX_GPIO_BASE, ++ AR71XX_GPIO_SIZE, MAP_NOCACHE); ++ ++ /* Disable JTAG */ ++ writel(0x2, regs + QCA955X_GPIO_REG_FUNC); ++ ++ /* Configure default GPIO OE/SET regs */ ++ writel(0xa6031f, regs + AR71XX_GPIO_REG_OE); ++ writel(0x402800, regs + AR71XX_GPIO_REG_SET); ++ ++ /* Configure pin multiplexing */ ++ writel(0x00000000, regs + QCA955X_GPIO_REG_OUT_FUNC0); ++ writel(0x0c080900, regs + QCA955X_GPIO_REG_OUT_FUNC1); ++ writel(0x00160000, regs + QCA955X_GPIO_REG_OUT_FUNC2); ++ writel(0x00000000, regs + QCA955X_GPIO_REG_OUT_FUNC3); ++ writel(0x00000000, regs + QCA955X_GPIO_REG_OUT_FUNC4); ++ writel(0x00000000, regs + QCA955X_GPIO_REG_OUT_FUNC5); ++ writel(0x00000908, regs + QCA955X_GPIO_REG_IN_ENABLE0); ++} ++ ++#ifdef CONFIG_DEBUG_UART_BOARD_INIT ++void board_debug_uart_init(void) ++{ ++ aterm_pinmux_config(); ++} ++#endif ++ ++#ifdef CONFIG_BOARD_EARLY_INIT_F ++int board_early_init_f(void) ++{ ++#ifndef CONFIG_DEBUG_UART_BOARD_INIT ++ aterm_pinmux_config(); ++#endif ++ ++#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) ++ qca955x_pll_init(); ++ qca955x_ddr_init(); ++#endif ++ ++ return 0; ++} ++#endif +--- /dev/null ++++ b/configs/nec_qca9558_aterm_defconfig +@@ -0,0 +1,61 @@ ++CONFIG_MIPS=y ++CONFIG_SYS_MALLOC_LEN=0x40000 ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_DEFAULT_DEVICE_TREE="nec,qca9558-aterm" ++CONFIG_SYS_LOAD_ADDR=0x83000000 ++CONFIG_ARCH_ATH79=y ++CONFIG_BOARD_NEC_QCA9558_ATERM=y ++CONFIG_SYS_MIPS_TIMER_FREQ=280000000 ++CONFIG_MIPS_RELOCATION_TABLE_SIZE=0x4000 ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_TIMESTAMP=y ++CONFIG_BOOTDELAY=3 ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_USE_BOOTARGS=y ++CONFIG_BOOTARGS="console=ttyS0,115200" ++CONFIG_USE_BOOTCOMMAND=y ++CONFIG_BOOTCOMMAND="bootm 0x9f040000" ++# CONFIG_DISPLAY_BOARDINFO is not set ++CONFIG_BOARD_EARLY_INIT_F=y ++CONFIG_SYS_MALLOC_BOOTPARAMS=y ++# CONFIG_CMDLINE_EDITING is not set ++# CONFIG_AUTO_COMPLETE is not set ++# CONFIG_SYS_LONGHELP is not set ++CONFIG_SYS_MAXARGS=32 ++# CONFIG_SYS_XTRACE is not set ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_CONSOLE is not set ++# CONFIG_BOOTM_PLAN9 is not set ++# CONFIG_BOOTM_RTEMS is not set ++# CONFIG_BOOTM_VXWORKS is not set ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_FDT is not set ++# CONFIG_CMD_RUN is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_EXPORTENV is not set ++# CONFIG_CMD_IMPORTENV is not set ++# CONFIG_CMD_EDITENV is not set ++# CONFIG_CMD_SAVEENV is not set ++# CONFIG_CMD_ENV_EXISTS is not set ++# CONFIG_CMD_CRC32 is not set ++# CONFIG_CMD_DM is not set ++# CONFIG_CMD_LOADS is not set ++# CONFIG_CMD_ECHO is not set ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SOURCE is not set ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_CMD_SLEEP is not set ++# CONFIG_ISO_PARTITION is not set ++# CONFIG_OF_TAG_MIGRATE is not set ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++# CONFIG_NET is not set ++CONFIG_CLK=y ++# CONFIG_GPIO is not set ++# CONFIG_I2C is not set ++# CONFIG_INPUT is not set ++# CONFIG_POWER is not set ++CONFIG_DM_SERIAL=y ++CONFIG_SYS_NS16550=y ++# CONFIG_GZIP is not set +--- /dev/null ++++ b/include/configs/nec_qca9558_aterm.h +@@ -0,0 +1,28 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2024 INAGAKI Hiroshi ++ */ ++ ++#ifndef __NEC_QCA9558_ATERM_H ++#define __NEC_QCA9558_ATERM_H ++ ++#define CFG_SYS_SDRAM_BASE 0x80000000 ++ ++#define CFG_SYS_INIT_RAM_ADDR 0xbd000000 ++#define CFG_SYS_INIT_RAM_SIZE 0x8000 ++ ++/* ++ * Serial Port ++ */ ++#define CFG_SYS_NS16550_CLK 40000000 ++ ++/* ++ * Command ++ */ ++/* Miscellaneous configurable options */ ++ ++/* ++ * Diagnostics ++ */ ++ ++#endif /* __NEC_QCA9558_ATERM_H */ diff --git a/package/boot/uboot-mvebu/Makefile b/package/boot/uboot-mvebu/Makefile index 535180f4c8..d4c86aca29 100644 --- a/package/boot/uboot-mvebu/Makefile +++ b/package/boot/uboot-mvebu/Makefile @@ -8,10 +8,10 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2024.04 +PKG_VERSION:=2024.10 PKG_RELEASE:=1 -PKG_HASH:=18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a +PKG_HASH:=b28daf4ac17e43156363078bf510297584137f6df50fced9b12df34f61a92fb0 include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk @@ -77,6 +77,9 @@ UBOOT_TARGETS:= \ eDPU \ rb5009 +UBOOT_CUSTOMIZE_CONFIG := \ + --disable TOOLS_MKEFICAPSULE + define Package/u-boot/install $(if $(findstring cortexa53,$(BUILD_SUBTARGET)),,$(Package/u-boot/install/default)) endef diff --git a/package/boot/uboot-mvebu/patches/0001-arm-mvebu-turris_omnia-Enable-LTO-by-default-on-Turr.patch b/package/boot/uboot-mvebu/patches/0001-arm-mvebu-turris_omnia-Enable-LTO-by-default-on-Turr.patch deleted file mode 100644 index 3381e055f4..0000000000 --- a/package/boot/uboot-mvebu/patches/0001-arm-mvebu-turris_omnia-Enable-LTO-by-default-on-Turr.patch +++ /dev/null @@ -1,30 +0,0 @@ -From ca4ecdce4cdcfab7df101b5df6ddad43d2f549e1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Thu, 4 Apr 2024 09:50:50 +0200 -Subject: [PATCH] arm: mvebu: turris_omnia: Enable LTO by default on Turris - Omnia -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -U-Boot builds for Turris Omnia are approaching the limit of 0xf0000 -bytes, which is the size of the U-Boot partition on Omnia. - -Enable LTO to get more size optimized binaries. - -Signed-off-by: Marek Behún -Reviewed-by: Stefan Roese ---- - configs/turris_omnia_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/configs/turris_omnia_defconfig -+++ b/configs/turris_omnia_defconfig -@@ -31,6 +31,7 @@ CONFIG_AHCI=y - CONFIG_OF_BOARD_FIXUP=y - CONFIG_SYS_MEMTEST_START=0x00800000 - CONFIG_SYS_MEMTEST_END=0x00ffffff -+CONFIG_LTO=y - CONFIG_HAS_BOARD_SIZE_LIMIT=y - CONFIG_BOARD_SIZE_LIMIT=983040 - CONFIG_FIT=y diff --git a/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch b/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch deleted file mode 100644 index f32f246022..0000000000 --- a/package/boot/uboot-mvebu/patches/100-mvebu-armada-8k-respect-CONFIG_DISTRO_DEFAULTS.patch +++ /dev/null @@ -1,38 +0,0 @@ -From a322b1cbb3f3e606d33a11fd18df20811e5c16f2 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Fri, 21 Jun 2024 11:41:30 +0200 -Subject: [PATCH 1/3] mvebu: armada-8k: respect CONFIG_DISTRO_DEFAULTS - -Currently, Armada 8k config header is setting boot devices and including - regardless of the CONFIG_DISTRO_DEFAULTS being -enabled or not, thus populating the environment for distro boot even on -devices that have no need for it. - -So, lets simply respect the value of CONFIG_DISTRO_DEFAULTS. - -Signed-off-by: Robert Marko ---- - include/configs/mvebu_armada-8k.h | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - ---- a/include/configs/mvebu_armada-8k.h -+++ b/include/configs/mvebu_armada-8k.h -@@ -30,7 +30,7 @@ - /* - * PCI configuration - */ -- -+#ifdef CONFIG_DISTRO_DEFAULTS - #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ -@@ -40,6 +40,9 @@ - func(DHCP, dhcp, na) - - #include -+#else -+#define BOOTENV -+#endif - - #define CFG_EXTRA_ENV_SETTINGS \ - "scriptaddr=0x6d00000\0" \ diff --git a/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch b/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch index eb7bbdbf48..0fe3a4cbb6 100644 --- a/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch +++ b/package/boot/uboot-mvebu/patches/101-net-mvpp2-fix-10GBase-R-support.patch @@ -18,7 +18,7 @@ Signed-off-by: Robert Marko --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c -@@ -3255,6 +3255,76 @@ static int gop_gpcs_reset(struct mvpp2_p +@@ -3254,6 +3254,76 @@ static int gop_gpcs_reset(struct mvpp2_p return 0; } @@ -95,7 +95,7 @@ Signed-off-by: Robert Marko static int gop_mpcs_mode(struct mvpp2_port *port) { u32 val; -@@ -3397,7 +3467,10 @@ static int gop_port_init(struct mvpp2_po +@@ -3396,7 +3466,10 @@ static int gop_port_init(struct mvpp2_po num_of_act_lanes = 2; mac_num = 0; /* configure PCS */ diff --git a/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch b/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch index b1b94cc566..4730532100 100644 --- a/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch +++ b/package/boot/uboot-mvebu/patches/102-arm-mvebu-add-support-for-MikroTik-RB5009UG-S-IN.patch @@ -31,7 +31,7 @@ Signed-off-by: Robert Marko --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -333,6 +333,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ +@@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-3720-uDPU.dtb \ armada-7040-db-nand.dtb \ armada-7040-db.dtb \ diff --git a/package/firmware/linux-firmware/Makefile b/package/firmware/linux-firmware/Makefile index 43a9833555..de69360aff 100644 --- a/package/firmware/linux-firmware/Makefile +++ b/package/firmware/linux-firmware/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=linux-firmware -PKG_VERSION:=20240909 +PKG_VERSION:=20241017 PKG_RELEASE:=1 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=943fbd19883cf8eadf89e0b22422549db056557b1ecd30a56400615971369671 +PKG_HASH:=a26c38ef5a83272f2b98ce8bf8ca1865a852a3deea49ce5a8dd804b914351273 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/linux-firmware/realtek.mk b/package/firmware/linux-firmware/realtek.mk index 0889796a12..c2ab1c9d0d 100644 --- a/package/firmware/linux-firmware/realtek.mk +++ b/package/firmware/linux-firmware/realtek.mk @@ -64,6 +64,13 @@ define Package/rtl8192de-firmware/install endef $(eval $(call BuildPackage,rtl8192de-firmware)) +Package/rtl8192du-firmware = $(call Package/firmware-default,RealTek RTL8192DU firmware,,LICENCE.rtlwifi_firmware.txt) +define Package/rtl8192du-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi + $(INSTALL_DATA) $(PKG_BUILD_DIR)/rtlwifi/rtl8192dufw.bin $(1)/lib/firmware/rtlwifi +endef +$(eval $(call BuildPackage,rtl8192du-firmware)) + Package/rtl8192eu-firmware = $(call Package/firmware-default,RealTek RTL8192EU firmware,,LICENCE.rtlwifi_firmware.txt) define Package/rtl8192eu-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index d5966e7b3d..d741e201e2 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -538,6 +538,44 @@ endef $(eval $(call KernelPackage,dsa)) + +define KernelPackage/dsa-b53 + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Broadcom BCM53xx managed switch DSA support + DEPENDS:=+kmod-dsa + KCONFIG:=CONFIG_B53 \ + CONFIG_NET_DSA_TAG_BRCM \ + CONFIG_NET_DSA_TAG_BRCM_LEGACY \ + CONFIG_NET_DSA_TAG_BRCM_PREPEND + FILES:= \ + $(LINUX_DIR)/drivers/net/dsa/b53/b53_common.ko \ + $(LINUX_DIR)/net/dsa/tag_brcm.ko + AUTOLOAD:=$(call AutoProbe,b53_common) +endef + +define KernelPackage/dsa-b53/description + Broadcom BCM53xx managed switch support +endef + +$(eval $(call KernelPackage,dsa-b53)) + + +define KernelPackage/dsa-b53-mdio + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=B53 MDIO connected switch DSA driver + DEPENDS:=+kmod-dsa-b53 + KCONFIG:=CONFIG_B53_MDIO_DRIVER + FILES:=$(LINUX_DIR)/drivers/net/dsa/b53/b53_mdio.ko + AUTOLOAD:=$(call AutoProbe,b53_mdio) +endef + +define KernelPackage/dsa-b53-mdio/description + B53 MDIO connected switch driver +endef + +$(eval $(call KernelPackage,dsa-b53-mdio)) + + define KernelPackage/dsa-tag-dsa SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Marvell DSA type DSA and EDSA taggers @@ -608,36 +646,6 @@ endef $(eval $(call KernelPackage,swconfig)) -define KernelPackage/switch-bcm53xx - SUBMENU:=$(NETWORK_DEVICES_MENU) - TITLE:=Broadcom bcm53xx switch support - DEPENDS:=+kmod-swconfig - KCONFIG:=CONFIG_SWCONFIG_B53 - FILES:=$(LINUX_DIR)/drivers/net/phy/b53/b53_common.ko - AUTOLOAD:=$(call AutoLoad,42,b53_common) -endef - -define KernelPackage/switch-bcm53xx/description - Broadcom bcm53xx switch support -endef - -$(eval $(call KernelPackage,switch-bcm53xx)) - -define KernelPackage/switch-bcm53xx-mdio - SUBMENU:=$(NETWORK_DEVICES_MENU) - TITLE:=Broadcom bcm53xx switch MDIO support - DEPENDS:=+kmod-switch-bcm53xx - KCONFIG:=CONFIG_SWCONFIG_B53_PHY_DRIVER - FILES:=$(LINUX_DIR)/drivers/net/phy/b53/b53_mdio.ko - AUTOLOAD:=$(call AutoLoad,42,b53_mdio) -endef - -define KernelPackage/switch-bcm53xx-mdio/description - Broadcom bcm53xx switch MDIO support -endef - -$(eval $(call KernelPackage,switch-bcm53xx-mdio)) - define KernelPackage/switch-ip17xx SUBMENU:=$(NETWORK_DEVICES_MENU) @@ -1589,7 +1597,7 @@ define KernelPackage/mlx4-core CONFIG_MLX4_CORE=y \ CONFIG_MLX4_CORE_GEN2=y \ CONFIG_MLX4_DEBUG=n - AUTOLOAD:=$(call AutoProbe,mlx4_core mlx4_en) + AUTOLOAD:=$(call AutoLoad,36,mlx4_core mlx4_en,1) endef define KernelPackage/mlx4-core/description @@ -1621,7 +1629,7 @@ define KernelPackage/mlx5-core CONFIG_MLX5_TC_CT=n \ CONFIG_MLX5_TLS=n \ CONFIG_MLX5_VFIO_PCI=n - AUTOLOAD:=$(call AutoProbe,mlx5_core) + AUTOLOAD:=$(call AutoLoad,36,mlx5_core,1) endef define KernelPackage/mlx5-core/description @@ -1854,7 +1862,7 @@ define KernelPackage/igc DEPENDS:=@PCI_SUPPORT +kmod-ptp KCONFIG:=CONFIG_IGC FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/igc/igc.ko - AUTOLOAD:=$(call AutoProbe,igc) + AUTOLOAD:=$(call AutoLoad,34,igc,1) endef define KernelPackage/igc/description diff --git a/package/kernel/mac80211/realtek.mk b/package/kernel/mac80211/realtek.mk index 2eaed210e1..4a6f10cddc 100644 --- a/package/kernel/mac80211/realtek.mk +++ b/package/kernel/mac80211/realtek.mk @@ -1,10 +1,10 @@ PKG_DRIVERS += \ rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common rtl8192d-common \ - rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723-common rtl8723be rtl8723bs rtl8821ae \ - rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-sdio rtw88-8821c rtw88-8822b rtw88-8822c \ - rtw88-8723x rtw88-8723d rtw88-8821ce rtw88-8821cu rtw88-8822be rtw88-8822bu \ - rtw88-8822ce rtw88-8822cu rtw88-8723de rtw88-8723ds rtw88-8723du \ - rtw89 rtw89-pci rtw89-8851be rtw89-8852ae rtw89-8852b-common \ + rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8192du rtl8723-common rtl8723be \ + rtl8723bs rtl8821ae rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-sdio rtw88-8821c \ + rtw88-8822b rtw88-8822c rtw88-8723x rtw88-8723d rtw88-8821ce rtw88-8821cu \ + rtw88-8822be rtw88-8822bu rtw88-8822ce rtw88-8822cu rtw88-8723de rtw88-8723ds \ + rtw88-8723du rtw89 rtw89-pci rtw89-8851be rtw89-8852ae rtw89-8852b-common \ rtw89-8852be rtw89-8852ce rtw89-8922ae config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI @@ -16,6 +16,7 @@ config-$(call config_package,rtl8192ce) += RTL8192CE config-$(call config_package,rtl8192se) += RTL8192SE config-$(call config_package,rtl8192d-common) += RTL8192D_COMMON config-$(call config_package,rtl8192de) += RTL8192DE +config-$(call config_package,rtl8192du) += RTL8192DU config-$(call config_package,rtl8192cu) += RTL8192CU config-$(call config_package,rtl8821ae) += RTL8821AE config-$(CONFIG_PACKAGE_RTLWIFI_DEBUG) += RTLWIFI_DEBUG @@ -146,6 +147,14 @@ define KernelPackage/rtl8192de AUTOLOAD:=$(call AutoProbe,rtl8192de) endef +define KernelPackage/rtl8192du + $(call KernelPackage/mac80211/Default) + TITLE:=Realtek RTL8192DU support + DEPENDS+= +kmod-rtlwifi-usb +kmod-rtl8192d-common +rtl8192du-firmware + FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtl8192du/rtl8192du.ko + AUTOLOAD:=$(call AutoProbe,rtl8192du) +endef + define KernelPackage/rtl8192cu $(call KernelPackage/mac80211/Default) TITLE:=Realtek RTL8192CU/RTL8188CU support diff --git a/package/kernel/mwlwifi/Makefile b/package/kernel/mwlwifi/Makefile index 94e687ce4a..3f2d5e0949 100644 --- a/package/kernel/mwlwifi/Makefile +++ b/package/kernel/mwlwifi/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mwlwifi -PKG_RELEASE=1 +PKG_RELEASE=2 PKG_LICENSE:=ISC PKG_LICENSE_FILES:= diff --git a/package/kernel/mwlwifi/patches/001-Fix-compilation-warning-with-64-bit-system.patch b/package/kernel/mwlwifi/patches/001-Fix-compilation-warning-with-64-bit-system.patch deleted file mode 100644 index ee64e05047..0000000000 --- a/package/kernel/mwlwifi/patches/001-Fix-compilation-warning-with-64-bit-system.patch +++ /dev/null @@ -1,165 +0,0 @@ -From ed4422e98ababf956674da3438ac42b3aa32c66e Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Wed, 10 May 2023 00:41:06 +0200 -Subject: [PATCH] Fix compilation warning with 64 bit system - -Use %zu and %zd where possible for ssize_t and size_t. -Use PTR_ERR to correctly convert to negative error. -Use universal pointer to support both 32 and 64bit systems. - -Fix compilation warning: -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/fwcmd.c: In function 'mwl_fwcmd_get_fw_core_dump': -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/fwcmd.c:3608:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] - 3608 | (const void *)((u32)pcmd + - | ^ -In file included from ./include/linux/device.h:15, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/device.h:3, - from ./include/linux/dma-mapping.h:7, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/dma-mapping.h:3, - from ./include/linux/skbuff.h:31, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/skbuff.h:3, - from ./include/linux/if_ether.h:19, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/if_ether.h:3, - from ./include/linux/etherdevice.h:20, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/etherdevice.h:3, - from /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:20: -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c: In function 'pcie_tx_init_ndp': -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:38: error: format '%d' expects argument of type 'int', but argument 3 has type 'long unsigned int' [-Werror=format=] - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -./include/linux/dev_printk.h:110:30: note: in definition of macro 'dev_printk_index_wrap' - 110 | _p_func(dev, fmt, ##__VA_ARGS__); \ - | ^~~ -./include/linux/dev_printk.h:144:56: note: in expansion of macro 'dev_fmt' - 144 | dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__) - | ^~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211/net/cfg80211.h:8828:9: note: in expansion of macro 'dev_err' - 8828 | dev_err(&(wiphy)->dev, format, ##args) - | ^~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:17: note: in expansion of macro 'wiphy_err' - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ^~~~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:67: note: format string is defined here - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ~^ - | | - | int - | %ld -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:38: error: format '%d' expects argument of type 'int', but argument 4 has type 'long unsigned int' [-Werror=format=] - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -./include/linux/dev_printk.h:110:30: note: in definition of macro 'dev_printk_index_wrap' - 110 | _p_func(dev, fmt, ##__VA_ARGS__); \ - | ^~~ -./include/linux/dev_printk.h:144:56: note: in expansion of macro 'dev_fmt' - 144 | dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__) - | ^~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211/net/cfg80211.h:8828:9: note: in expansion of macro 'dev_err' - 8828 | dev_err(&(wiphy)->dev, format, ##args) - | ^~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:17: note: in expansion of macro 'wiphy_err' - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ^~~~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.c:338:71: note: format string is defined here - 338 | wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", - | ~^ - | | - | int - | %ld - CC [M] /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/debugfs.o -In file included from ./include/linux/device.h:15, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/device.h:3, - from ./include/linux/dma-mapping.h:7, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/dma-mapping.h:3, - from ./include/linux/skbuff.h:31, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/skbuff.h:3, - from ./include/linux/if_ether.h:19, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/if_ether.h:3, - from ./include/linux/etherdevice.h:20, - from /home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211-backport/linux/etherdevice.h:3, - from /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.c:19: -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.c: In function 'pcie_bf_mimo_ctrl_decode': -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.c:1325:37: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] - 1325 | filename, (unsigned int)fp_data); - | ^ -./include/linux/dev_printk.h:110:37: note: in definition of macro 'dev_printk_index_wrap' - 110 | _p_func(dev, fmt, ##__VA_ARGS__); \ - | ^~~~~~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/staging_dir/target-aarch64_cortex-a53_musl/usr/include/mac80211/net/cfg80211.h:8828:9: note: in expansion of macro 'dev_err' - 8828 | dev_err(&(wiphy)->dev, format, ##args) - | ^~~~~~~ -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.c:1324:17: note: in expansion of macro 'wiphy_err' - 1324 | wiphy_err(priv->hw->wiphy, "Error opening %s! %x\n", - | ^~~~~~~~~ -cc1: all warnings being treated as errors -make[4]: *** [scripts/Makefile.build:289: /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/tx_ndp.o] Error 1 -make[4]: *** Waiting for unfinished jobs.... -cc1: all warnings being treated as errors -make[4]: *** [scripts/Makefile.build:289: /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.o] Error 1 -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/debugfs.c: In function 'mwl_debugfs_regrdwr_read': -/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/debugfs.c:1335:43: error: format '%d' expects argument of type 'int', but argument 4 has type 'ssize_t' {aka 'long int'} [-Werror=format=] - 1335 | "error: %d(%u 0x%08x 0x%08x)\n", - | ~^ - | | - | int - | %ld - 1336 | ret, priv->reg_type, priv->reg_offset, - | ~~~ - | | - | ssize_t {aka long int} -cc1: all warnings being treated as errors - -Signed-off-by: Christian Marangi ---- - debugfs.c | 2 +- - hif/fwcmd.c | 2 +- - hif/pcie/8964/tx_ndp.c | 2 +- - hif/pcie/pcie.c | 4 ++-- - 4 files changed, 5 insertions(+), 5 deletions(-) - ---- a/debugfs.c -+++ b/debugfs.c -@@ -1342,7 +1342,7 @@ done: - priv->reg_value); - else - len += scnprintf(p + len, size - len, -- "error: %d(%u 0x%08x 0x%08x)\n", -+ "error: %zd(%u 0x%08x 0x%08x)\n", - ret, priv->reg_type, priv->reg_offset, - priv->reg_value); - ---- a/hif/fwcmd.c -+++ b/hif/fwcmd.c -@@ -3623,7 +3623,7 @@ int mwl_fwcmd_get_fw_core_dump(struct ie - core_dump->size_kb = pcmd->cmd_data.coredump.size_kb; - core_dump->flags = pcmd->cmd_data.coredump.flags; - memcpy(buff, -- (const void *)((u32)pcmd + -+ (const void *)((uintptr_t)pcmd + - sizeof(struct hostcmd_cmd_get_fw_core_dump) - - sizeof(struct hostcmd_cmd_get_fw_core_dump_)), - MAX_CORE_DUMP_BUFFER); ---- a/hif/pcie/8964/tx_ndp.c -+++ b/hif/pcie/8964/tx_ndp.c -@@ -336,7 +336,7 @@ int pcie_tx_init_ndp(struct ieee80211_hw - - if (sizeof(struct pcie_tx_ctrl_ndp) > - sizeof(tx_info->driver_data)) { -- wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", -+ wiphy_err(hw->wiphy, "driver data is not enough: %zu (%zu)\n", - sizeof(struct pcie_tx_ctrl_ndp), - sizeof(tx_info->driver_data)); - return -ENOMEM; ---- a/hif/pcie/pcie.c -+++ b/hif/pcie/pcie.c -@@ -1466,8 +1466,8 @@ static void pcie_bf_mimo_ctrl_decode(struct mwl_priv *priv, - &fp_data->f_pos); - filp_close(fp_data, current->files); - } else { -- wiphy_err(priv->hw->wiphy, "Error opening %s! %x\n", -- filename, (unsigned int)fp_data); -+ wiphy_err(priv->hw->wiphy, "Error opening %s! %ld\n", -+ filename, PTR_ERR(fp_data)); - } - - #if LINUX_VERSION_CODE < KERNEL_VERSION(5,10,0) diff --git a/package/kernel/mwlwifi/patches/001-Simplify-coredump-memcpy-in-mwl_fwcmd_get_fw_core_dump.patch b/package/kernel/mwlwifi/patches/001-Simplify-coredump-memcpy-in-mwl_fwcmd_get_fw_core_dump.patch new file mode 100644 index 0000000000..4b0feeb17e --- /dev/null +++ b/package/kernel/mwlwifi/patches/001-Simplify-coredump-memcpy-in-mwl_fwcmd_get_fw_core_dump.patch @@ -0,0 +1,35 @@ +From 8daab38dfc1fe4d3df9fb5fc18610b942d5cc3b2 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 12 May 2024 14:28:19 +0200 +Subject: [PATCH] Simplify coredump memcpy in mwl_fwcmd_get_fw_core_dump + +Simplify coredump memcpy in mwl_fwcmd_get_fw_core_dump. Instead of doing +fragile address additions, just access the buffer member in pcmd and +reference the pointer. + +This fix a compilation warning in 64Bit system: + +/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/fwcmd.c: In function 'mwl_fwcmd_get_fw_core_dump': /home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/fwcmd.c:3608:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] +3608 | (const void *)((u32)pcmd + +| ^ + +Signed-off-by: Christian Marangi +--- + hif/fwcmd.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +--- a/hif/fwcmd.c ++++ b/hif/fwcmd.c +@@ -3622,11 +3622,7 @@ int mwl_fwcmd_get_fw_core_dump(struct ie + core_dump->context = pcmd->cmd_data.coredump.context; + core_dump->size_kb = pcmd->cmd_data.coredump.size_kb; + core_dump->flags = pcmd->cmd_data.coredump.flags; +- memcpy(buff, +- (const void *)((u32)pcmd + +- sizeof(struct hostcmd_cmd_get_fw_core_dump) - +- sizeof(struct hostcmd_cmd_get_fw_core_dump_)), +- MAX_CORE_DUMP_BUFFER); ++ memcpy(buff, pcmd->buffer, MAX_CORE_DUMP_BUFFER); + + mutex_unlock(&priv->fwcmd_mutex); + diff --git a/package/kernel/mwlwifi/patches/002-Correctly-use-PTR_ERR-in-pcie_bf_mimo_ctrl_decode.patch b/package/kernel/mwlwifi/patches/002-Correctly-use-PTR_ERR-in-pcie_bf_mimo_ctrl_decode.patch new file mode 100644 index 0000000000..f204e9fe73 --- /dev/null +++ b/package/kernel/mwlwifi/patches/002-Correctly-use-PTR_ERR-in-pcie_bf_mimo_ctrl_decode.patch @@ -0,0 +1,32 @@ +From 37c7a798719f1d04326d36c35711c4249bc7492e Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 12 May 2024 14:32:20 +0200 +Subject: [PATCH] Correctly use PTR_ERR in pcie_bf_mimo_ctrl_decode + +Correctly use PTR_ERR instead of cast to unsigned int in +pcie_bf_mimo_ctrl_decode if fp_data pointer contains errors. + +This fix a compilation warning on 64Bit: + +/home/ansuel/openwrt-ansuel/openwrt/build_dir/target-aarch64_cortex-a53_musl/linux-ipq807x_generic/mwlwifi-2023-04-29-6a436714/hif/pcie/pcie.c:1325:37: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] +1325 | filename, (unsigned int)fp_data); +| ^ + +Signed-off-by: Christian Marangi +--- + hif/pcie/pcie.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/hif/pcie/pcie.c ++++ b/hif/pcie/pcie.c +@@ -1466,8 +1466,8 @@ static void pcie_bf_mimo_ctrl_decode(str + &fp_data->f_pos); + filp_close(fp_data, current->files); + } else { +- wiphy_err(priv->hw->wiphy, "Error opening %s! %x\n", +- filename, (unsigned int)fp_data); ++ wiphy_err(priv->hw->wiphy, "Error opening %s! %ld\n", ++ filename, PTR_ERR(fp_data)); + } + + #if LINUX_VERSION_CODE < KERNEL_VERSION(5,10,0) diff --git a/package/kernel/mwlwifi/patches/003-Use-zu-and-zd-for-ssize_t-and-size_t.patch b/package/kernel/mwlwifi/patches/003-Use-zu-and-zd-for-ssize_t-and-size_t.patch new file mode 100644 index 0000000000..d615e13380 --- /dev/null +++ b/package/kernel/mwlwifi/patches/003-Use-zu-and-zd-for-ssize_t-and-size_t.patch @@ -0,0 +1,36 @@ +From 5fe83bd36c035099a6d721a8e42cf3d04a1ce2b6 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 12 May 2024 14:36:32 +0200 +Subject: [PATCH] Use %zu and %zd for ssize_t and size_t + +Use %zu and %zu for ssize_t and size_t to fix compilation warning on +64Bit. + +Signed-off-by: Christian Marangi +--- + debugfs.c | 2 +- + hif/pcie/8964/tx_ndp.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/debugfs.c ++++ b/debugfs.c +@@ -1342,7 +1342,7 @@ done: + priv->reg_value); + else + len += scnprintf(p + len, size - len, +- "error: %d(%u 0x%08x 0x%08x)\n", ++ "error: %zd(%u 0x%08x 0x%08x)\n", + ret, priv->reg_type, priv->reg_offset, + priv->reg_value); + +--- a/hif/pcie/8964/tx_ndp.c ++++ b/hif/pcie/8964/tx_ndp.c +@@ -336,7 +336,7 @@ int pcie_tx_init_ndp(struct ieee80211_hw + + if (sizeof(struct pcie_tx_ctrl_ndp) > + sizeof(tx_info->driver_data)) { +- wiphy_err(hw->wiphy, "driver data is not enough: %d (%d)\n", ++ wiphy_err(hw->wiphy, "driver data is not enough: %zu (%zu)\n", + sizeof(struct pcie_tx_ctrl_ndp), + sizeof(tx_info->driver_data)); + return -ENOMEM; diff --git a/package/kernel/mwlwifi/patches/004-Fix-debugfs-compilation-warning-in-mwl_debugfs_info_read.patch b/package/kernel/mwlwifi/patches/004-Fix-debugfs-compilation-warning-in-mwl_debugfs_info_read.patch new file mode 100644 index 0000000000..0c1eae7e6b --- /dev/null +++ b/package/kernel/mwlwifi/patches/004-Fix-debugfs-compilation-warning-in-mwl_debugfs_info_read.patch @@ -0,0 +1,28 @@ +From 44419b1feae3eedda21cdc71da9acb611ca1a6fd Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 12 May 2024 14:42:01 +0200 +Subject: [PATCH] Fix debugfs compilation warning in mwl_debugfs_info_read + +Fix debugfs compilation warning on 64Bit mwl_debugfs_info_read by +casing for uintptr_t and use %zx. + +Signed-off-by: Christian Marangi +--- + debugfs.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/debugfs.c ++++ b/debugfs.c +@@ -364,10 +364,10 @@ static ssize_t mwl_debugfs_info_read(str + "-----------------------=> address| address|qlen|fw_desc_cnt\n"); + spin_lock_irqsave(&pcie_priv->tx_desc_lock, flags); + len += scnprintf(p + len, size - len, +- "wcb_base0 : %x => %8x|%8p|%4d|%d\n", get_hw_spec->wcb_base0, *((unsigned int *)le32_to_cpu(get_hw_spec->wcb_base0)),(void *)*((unsigned int *)le32_to_cpu(get_hw_spec->wcb_base0)),skb_queue_len(&pcie_priv->txq[0]),pcie_priv->fw_desc_cnt[0]); ++ "wcb_base0 : %x => %8px|%8p|%4d|%d\n", get_hw_spec->wcb_base0, (void *)(uintptr_t)le32_to_cpu(get_hw_spec->wcb_base0),(void *)(uintptr_t)le32_to_cpu(get_hw_spec->wcb_base0),skb_queue_len(&pcie_priv->txq[0]),pcie_priv->fw_desc_cnt[0]); + for(i = 0; i < SYSADPT_TOTAL_TX_QUEUES - 1; i++) + len += scnprintf(p + len, size - len, +- "wcb_base[%2d]: %x => %8x|%8p|%4d|%d\n", i, get_hw_spec->wcb_base[i], *((unsigned int *)le32_to_cpu(get_hw_spec->wcb_base[i])),(void *)*((unsigned int *)le32_to_cpu(get_hw_spec->wcb_base[i])),skb_queue_len(&pcie_priv->txq[i + 1]),pcie_priv->fw_desc_cnt[i + 1]); ++ "wcb_base[%2d]: %x => %8px|%8p|%4d|%d\n", i, get_hw_spec->wcb_base[i], (void *)(uintptr_t)le32_to_cpu(get_hw_spec->wcb_base[i]),(void *)(uintptr_t)le32_to_cpu(get_hw_spec->wcb_base[i]),skb_queue_len(&pcie_priv->txq[i + 1]),pcie_priv->fw_desc_cnt[i + 1]); + spin_unlock_irqrestore(&pcie_priv->tx_desc_lock, flags); + } + diff --git a/package/kernel/mwlwifi/patches/005-Use-BUILD_BUG_ON.patch b/package/kernel/mwlwifi/patches/005-Use-BUILD_BUG_ON.patch new file mode 100644 index 0000000000..d8c527b99b --- /dev/null +++ b/package/kernel/mwlwifi/patches/005-Use-BUILD_BUG_ON.patch @@ -0,0 +1,32 @@ +From dba74289f74095944b39fc96b069c512b5321b7a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 12 May 2024 14:53:45 +0200 +Subject: [PATCH] Use BUILD_BUG_ON instead of checking size at runtime for + pcie_tx_init_ndp + +Use BUILD_BUG_ON instead of checking size at runtime for +pcie_tx_init_ndp. + +Signed-off-by: Christian Marangi +--- + hif/pcie/8964/tx_ndp.c | 9 ++------- + 1 file changed, 2 insertions(+), 7 deletions(-) + +--- a/hif/pcie/8964/tx_ndp.c ++++ b/hif/pcie/8964/tx_ndp.c +@@ -334,13 +334,8 @@ int pcie_tx_init_ndp(struct ieee80211_hw + struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(&skb); + int rc; + +- if (sizeof(struct pcie_tx_ctrl_ndp) > +- sizeof(tx_info->driver_data)) { +- wiphy_err(hw->wiphy, "driver data is not enough: %zu (%zu)\n", +- sizeof(struct pcie_tx_ctrl_ndp), +- sizeof(tx_info->driver_data)); +- return -ENOMEM; +- } ++ BUILD_BUG_ON(sizeof(struct pcie_tx_ctrl_ndp) > ++ sizeof(tx_info->driver_data)); + + rc = pcie_tx_ring_alloc_ndp(priv); + if (rc) { diff --git a/package/kernel/mwlwifi/patches/004-mwlwifi-fix-PCIe-DT-node-null-pointer-dereference.patch b/package/kernel/mwlwifi/patches/010-mwlwifi-fix-PCIe-DT-node-null-pointer-dereference.patch similarity index 100% rename from package/kernel/mwlwifi/patches/004-mwlwifi-fix-PCIe-DT-node-null-pointer-dereference.patch rename to package/kernel/mwlwifi/patches/010-mwlwifi-fix-PCIe-DT-node-null-pointer-dereference.patch diff --git a/package/kernel/mwlwifi/patches/005-mac80211_update.patch b/package/kernel/mwlwifi/patches/020-mac80211_update.patch similarity index 99% rename from package/kernel/mwlwifi/patches/005-mac80211_update.patch rename to package/kernel/mwlwifi/patches/020-mac80211_update.patch index 2ceee4732d..1c5d581939 100644 --- a/package/kernel/mwlwifi/patches/005-mac80211_update.patch +++ b/package/kernel/mwlwifi/patches/020-mac80211_update.patch @@ -304,7 +304,7 @@ } if (++tx_send_head_new >= MAX_NUM_TX_DESC) -@@ -488,7 +488,7 @@ void pcie_tx_done_ndp(struct ieee80211_h +@@ -483,7 +483,7 @@ void pcie_tx_done_ndp(struct ieee80211_h } pcie_tx_prepare_info(priv, 0, tx_info); @@ -313,7 +313,7 @@ bypass_ack: if (++tx_done_tail >= MAX_TX_RING_DONE_SIZE) -@@ -601,13 +601,13 @@ void pcie_tx_xmit_ndp(struct ieee80211_h +@@ -596,13 +596,13 @@ void pcie_tx_xmit_ndp(struct ieee80211_h ack_skb = skb_copy(skb, GFP_ATOMIC); ack_info = IEEE80211_SKB_CB(ack_skb); pcie_tx_prepare_info(priv, 0, ack_info); diff --git a/package/network/utils/iptables/Makefile b/package/network/utils/iptables/Makefile index 2fc7977038..0d5bbb1c5d 100644 --- a/package/network/utils/iptables/Makefile +++ b/package/network/utils/iptables/Makefile @@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=iptables PKG_VERSION:=1.8.8 -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_SOURCE_URL:=https://netfilter.org/projects/iptables/files PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 diff --git a/package/network/utils/iptables/patches/104-nft-track-each-register-individually.patch b/package/network/utils/iptables/patches/104-nft-track-each-register-individually.patch new file mode 100644 index 0000000000..166dc86fa1 --- /dev/null +++ b/package/network/utils/iptables/patches/104-nft-track-each-register-individually.patch @@ -0,0 +1,1054 @@ +From f315af1cf88714702dcc51dc00b109df3d52e9e9 Mon Sep 17 00:00:00 2001 +From: Florian Westphal +Date: Fri, 23 Sep 2022 14:17:08 +0200 +Subject: nft: track each register individually + +Instead of assuming only one register is used, track all 16 regs +individually. + +This avoids need for the 'PREV_PAYLOAD' hack and also avoids the need to +clear out old flags: + +When we see that register 'x' will be written to, that register state is +reset automatically. + +Existing dissector decodes +ip saddr 1.2.3.4 meta l4proto tcp +... as +-s 6.0.0.0 -p tcp + +iptables-nft -s 1.2.3.4 -p tcp is decoded correctly because the expressions +are ordered like: + +meta l4proto tcp ip saddr 1.2.3.4 + | +... and 'meta l4proto' did clear the PAYLOAD flag. + +The simpler fix is: + ctx->flags &= ~NFT_XT_CTX_PAYLOAD; + +in nft_parse_cmp(), but that breaks dissection of '1-42', because +the second compare ('cmp lte 42') will not find the +payload expression anymore. + +Link: https://lore.kernel.org/netfilter-devel/20220922143544.GA22541@breakpoint.cc/T/#t +Signed-off-by: Florian Westphal +Reviewed-by: Phil Sutter +--- + iptables/nft-arp.c | 57 +++++++------- + iptables/nft-bridge.c | 102 +++++++++++++++---------- + iptables/nft-ipv4.c | 49 ++++++------ + iptables/nft-ipv6.c | 36 ++++----- + iptables/nft-shared.c | 205 +++++++++++++++++++++++++++++++++++--------------- + iptables/nft-shared.h | 110 ++++++++++++++++++++------- + 6 files changed, 360 insertions(+), 199 deletions(-) + +--- a/iptables/nft-arp.c ++++ b/iptables/nft-arp.c +@@ -160,25 +160,27 @@ static int nft_arp_add(struct nft_handle + return ret; + } + +-static void nft_arp_parse_meta(struct nft_xt_ctx *ctx, struct nftnl_expr *e, ++static void nft_arp_parse_meta(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, ++ struct nftnl_expr *e, + struct iptables_command_state *cs) + { + struct arpt_entry *fw = &cs->arp; + uint8_t flags = 0; + +- parse_meta(ctx, e, ctx->meta.key, fw->arp.iniface, fw->arp.iniface_mask, ++ parse_meta(ctx, e, reg->meta_dreg.key, fw->arp.iniface, fw->arp.iniface_mask, + fw->arp.outiface, fw->arp.outiface_mask, + &flags); + + fw->arp.invflags |= flags; + } + +-static void parse_mask_ipv4(struct nft_xt_ctx *ctx, struct in_addr *mask) ++static void parse_mask_ipv4(const struct nft_xt_ctx_reg *reg, struct in_addr *mask) + { +- mask->s_addr = ctx->bitwise.mask[0]; ++ mask->s_addr = reg->bitwise.mask[0]; + } + +-static bool nft_arp_parse_devaddr(struct nft_xt_ctx *ctx, ++static bool nft_arp_parse_devaddr(const struct nft_xt_ctx_reg *reg, + struct nftnl_expr *e, + struct arpt_devaddr_info *info) + { +@@ -192,18 +194,17 @@ static bool nft_arp_parse_devaddr(struct + + get_cmp_data(e, info->addr, ETH_ALEN, &inv); + +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- memcpy(info->mask, ctx->bitwise.mask, ETH_ALEN); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ memcpy(info->mask, reg->bitwise.mask, ETH_ALEN); ++ else + memset(info->mask, 0xff, +- min(ctx->payload.len, ETH_ALEN)); +- } ++ min(reg->payload.len, ETH_ALEN)); + + return inv; + } + + static void nft_arp_parse_payload(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -213,7 +214,7 @@ static void nft_arp_parse_payload(struct + uint8_t ar_hln; + bool inv; + +- switch (ctx->payload.offset) { ++ switch (reg->payload.offset) { + case offsetof(struct arphdr, ar_hrd): + get_cmp_data(e, &ar_hrd, sizeof(ar_hrd), &inv); + fw->arp.arhrd = ar_hrd; +@@ -243,43 +244,39 @@ static void nft_arp_parse_payload(struct + fw->arp.invflags |= IPT_INV_ARPOP; + break; + default: +- if (ctx->payload.offset == sizeof(struct arphdr)) { +- if (nft_arp_parse_devaddr(ctx, e, &fw->arp.src_devaddr)) ++ if (reg->payload.offset == sizeof(struct arphdr)) { ++ if (nft_arp_parse_devaddr(reg, e, &fw->arp.src_devaddr)) + fw->arp.invflags |= IPT_INV_SRCDEVADDR; +- } else if (ctx->payload.offset == sizeof(struct arphdr) + ++ } else if (reg->payload.offset == sizeof(struct arphdr) + + fw->arp.arhln) { + get_cmp_data(e, &addr, sizeof(addr), &inv); + fw->arp.src.s_addr = addr.s_addr; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv4(ctx, &fw->arp.smsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ parse_mask_ipv4(reg, &fw->arp.smsk); ++ else + memset(&fw->arp.smsk, 0xff, +- min(ctx->payload.len, ++ min(reg->payload.len, + sizeof(struct in_addr))); +- } + + if (inv) + fw->arp.invflags |= IPT_INV_SRCIP; +- } else if (ctx->payload.offset == sizeof(struct arphdr) + ++ } else if (reg->payload.offset == sizeof(struct arphdr) + + fw->arp.arhln + + sizeof(struct in_addr)) { +- if (nft_arp_parse_devaddr(ctx, e, &fw->arp.tgt_devaddr)) ++ if (nft_arp_parse_devaddr(reg, e, &fw->arp.tgt_devaddr)) + fw->arp.invflags |= IPT_INV_TGTDEVADDR; +- } else if (ctx->payload.offset == sizeof(struct arphdr) + ++ } else if (reg->payload.offset == sizeof(struct arphdr) + + fw->arp.arhln + + sizeof(struct in_addr) + + fw->arp.arhln) { + get_cmp_data(e, &addr, sizeof(addr), &inv); + fw->arp.tgt.s_addr = addr.s_addr; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv4(ctx, &fw->arp.tmsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ parse_mask_ipv4(reg, &fw->arp.tmsk); ++ else + memset(&fw->arp.tmsk, 0xff, +- min(ctx->payload.len, ++ min(reg->payload.len, + sizeof(struct in_addr))); +- } + + if (inv) + fw->arp.invflags |= IPT_INV_DSTIP; +--- a/iptables/nft-bridge.c ++++ b/iptables/nft-bridge.c +@@ -170,6 +170,7 @@ static int nft_bridge_add(struct nft_han + } + + static void nft_bridge_parse_meta(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -177,9 +178,9 @@ static void nft_bridge_parse_meta(struct + uint8_t invflags = 0; + char iifname[IFNAMSIZ] = {}, oifname[IFNAMSIZ] = {}; + +- parse_meta(ctx, e, ctx->meta.key, iifname, NULL, oifname, NULL, &invflags); ++ parse_meta(ctx, e, reg->meta_dreg.key, iifname, NULL, oifname, NULL, &invflags); + +- switch (ctx->meta.key) { ++ switch (reg->meta_dreg.key) { + case NFT_META_BRI_IIFNAME: + if (invflags & IPT_INV_VIA_IN) + cs->eb.invflags |= EBT_ILOGICALIN; +@@ -206,6 +207,7 @@ static void nft_bridge_parse_meta(struct + } + + static void nft_bridge_parse_payload(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -215,7 +217,7 @@ static void nft_bridge_parse_payload(str + bool inv; + int i; + +- switch (ctx->payload.offset) { ++ switch (reg->payload.offset) { + case offsetof(struct ethhdr, h_dest): + get_cmp_data(e, addr, sizeof(addr), &inv); + for (i = 0; i < ETH_ALEN; i++) +@@ -223,13 +225,11 @@ static void nft_bridge_parse_payload(str + if (inv) + fw->invflags |= EBT_IDEST; + +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- memcpy(fw->destmsk, ctx->bitwise.mask, ETH_ALEN); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ memcpy(fw->destmsk, reg->bitwise.mask, ETH_ALEN); ++ else + memset(&fw->destmsk, 0xff, +- min(ctx->payload.len, ETH_ALEN)); +- } ++ min(reg->payload.len, ETH_ALEN)); + fw->bitmask |= EBT_IDEST; + break; + case offsetof(struct ethhdr, h_source): +@@ -238,13 +238,11 @@ static void nft_bridge_parse_payload(str + fw->sourcemac[i] = addr[i]; + if (inv) + fw->invflags |= EBT_ISOURCE; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- memcpy(fw->sourcemsk, ctx->bitwise.mask, ETH_ALEN); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ memcpy(fw->sourcemsk, reg->bitwise.mask, ETH_ALEN); ++ else + memset(&fw->sourcemsk, 0xff, +- min(ctx->payload.len, ETH_ALEN)); +- } ++ min(reg->payload.len, ETH_ALEN)); + fw->bitmask |= EBT_ISOURCE; + break; + case offsetof(struct ethhdr, h_proto): +@@ -294,28 +292,53 @@ lookup_check_iphdr_payload(uint32_t base + /* Make sure previous payload expression(s) is/are consistent and extract if + * matching on source or destination address and if matching on MAC and IP or + * only MAC address. */ +-static int lookup_analyze_payloads(const struct nft_xt_ctx *ctx, ++static int lookup_analyze_payloads(struct nft_xt_ctx *ctx, ++ enum nft_registers sreg, ++ uint32_t key_len, + bool *dst, bool *ip) + { ++ const struct nft_xt_ctx_reg *reg; ++ uint32_t sreg_count; + int val, val2 = -1; + +- if (ctx->flags & NFT_XT_CTX_PREV_PAYLOAD) { +- val = lookup_check_ether_payload(ctx->prev_payload.base, +- ctx->prev_payload.offset, +- ctx->prev_payload.len); ++ reg = nft_xt_ctx_get_sreg(ctx, sreg); ++ if (!reg) ++ return -1; ++ ++ if (reg->type != NFT_XT_REG_PAYLOAD) { ++ ctx->errmsg = "lookup reg is not payload type"; ++ return -1; ++ } ++ ++ sreg_count = sreg; ++ switch (key_len) { ++ case 12: /* ether + ipv4addr */ ++ val = lookup_check_ether_payload(reg->payload.base, ++ reg->payload.offset, ++ reg->payload.len); + if (val < 0) { + DEBUGP("unknown payload base/offset/len %d/%d/%d\n", +- ctx->prev_payload.base, ctx->prev_payload.offset, +- ctx->prev_payload.len); ++ reg->payload.base, reg->payload.offset, ++ reg->payload.len); + return -1; + } +- if (!(ctx->flags & NFT_XT_CTX_PAYLOAD)) { +- DEBUGP("Previous but no current payload?\n"); ++ ++ sreg_count += 2; ++ ++ reg = nft_xt_ctx_get_sreg(ctx, sreg_count); ++ if (!reg) { ++ ctx->errmsg = "next lookup register is invalid"; ++ return -1; ++ } ++ ++ if (reg->type != NFT_XT_REG_PAYLOAD) { ++ ctx->errmsg = "next lookup reg is not payload type"; + return -1; + } +- val2 = lookup_check_iphdr_payload(ctx->payload.base, +- ctx->payload.offset, +- ctx->payload.len); ++ ++ val2 = lookup_check_iphdr_payload(reg->payload.base, ++ reg->payload.offset, ++ reg->payload.len); + if (val2 < 0) { + DEBUGP("unknown payload base/offset/len %d/%d/%d\n", + ctx->payload.base, ctx->payload.offset, +@@ -325,18 +348,20 @@ static int lookup_analyze_payloads(const + DEBUGP("mismatching payload match offsets\n"); + return -1; + } +- } else if (ctx->flags & NFT_XT_CTX_PAYLOAD) { +- val = lookup_check_ether_payload(ctx->payload.base, +- ctx->payload.offset, +- ctx->payload.len); ++ break; ++ case 4: /* ipv4addr */ ++ val = lookup_check_ether_payload(reg->payload.base, ++ reg->payload.offset, ++ reg->payload.len); + if (val < 0) { + DEBUGP("unknown payload base/offset/len %d/%d/%d\n", + ctx->payload.base, ctx->payload.offset, + ctx->payload.len); + return -1; + } +- } else { +- DEBUGP("unknown LHS of lookup expression\n"); ++ break; ++ default: ++ ctx->errmsg = "unsupported lookup key length"; + return -1; + } + +@@ -413,14 +438,17 @@ static void nft_bridge_parse_lookup(stru + size_t poff, size; + uint32_t cnt; + +- if (lookup_analyze_payloads(ctx, &is_dst, &have_ip)) +- return; +- + s = set_from_lookup_expr(ctx, e); + if (!s) + xtables_error(OTHER_PROBLEM, + "BUG: lookup expression references unknown set"); + ++ if (lookup_analyze_payloads(ctx, ++ nftnl_expr_get_u32(e, NFTNL_EXPR_LOOKUP_SREG), ++ nftnl_set_get_u32(s, NFTNL_SET_KEY_LEN), ++ &is_dst, &have_ip)) ++ return; ++ + cnt = nftnl_set_get_u32(s, NFTNL_SET_DESC_SIZE); + + for (ematch = ctx->cs->match_list; ematch; ematch = ematch->next) { +@@ -468,8 +496,6 @@ static void nft_bridge_parse_lookup(stru + if (set_elems_to_among_pairs(among_data->pairs + poff, s, cnt)) + xtables_error(OTHER_PROBLEM, + "ebtables among pair parsing failed"); +- +- ctx->flags &= ~(NFT_XT_CTX_PAYLOAD | NFT_XT_CTX_PREV_PAYLOAD); + } + + static void parse_watcher(void *object, struct ebt_match **match_list, +--- a/iptables/nft-ipv4.c ++++ b/iptables/nft-ipv4.c +@@ -115,28 +115,28 @@ static bool nft_ipv4_is_same(const struc + b->fw.ip.iniface_mask, b->fw.ip.outiface_mask); + } + +-static void get_frag(struct nft_xt_ctx *ctx, struct nftnl_expr *e, bool *inv) ++static bool get_frag(const struct nft_xt_ctx_reg *reg, struct nftnl_expr *e) + { + uint8_t op; + + /* we assume correct mask and xor */ +- if (!(ctx->flags & NFT_XT_CTX_BITWISE)) +- return; ++ if (!reg->bitwise.set) ++ return false; + + /* we assume correct data */ + op = nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_OP); + if (op == NFT_CMP_EQ) +- *inv = true; +- else +- *inv = false; ++ return true; + +- ctx->flags &= ~NFT_XT_CTX_BITWISE; ++ return false; + } + +-static void nft_ipv4_parse_meta(struct nft_xt_ctx *ctx, struct nftnl_expr *e, ++static void nft_ipv4_parse_meta(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, ++ struct nftnl_expr *e, + struct iptables_command_state *cs) + { +- switch (ctx->meta.key) { ++ switch (reg->meta_dreg.key) { + case NFT_META_L4PROTO: + cs->fw.ip.proto = nftnl_expr_get_u8(e, NFTNL_EXPR_CMP_DATA); + if (nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_OP) == NFT_CMP_NEQ) +@@ -146,17 +146,18 @@ static void nft_ipv4_parse_meta(struct n + break; + } + +- parse_meta(ctx, e, ctx->meta.key, cs->fw.ip.iniface, cs->fw.ip.iniface_mask, ++ parse_meta(ctx, e, reg->meta_dreg.key, cs->fw.ip.iniface, cs->fw.ip.iniface_mask, + cs->fw.ip.outiface, cs->fw.ip.outiface_mask, + &cs->fw.ip.invflags); + } + +-static void parse_mask_ipv4(struct nft_xt_ctx *ctx, struct in_addr *mask) ++static void parse_mask_ipv4(const struct nft_xt_ctx_reg *sreg, struct in_addr *mask) + { +- mask->s_addr = ctx->bitwise.mask[0]; ++ mask->s_addr = sreg->bitwise.mask[0]; + } + + static void nft_ipv4_parse_payload(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *sreg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -164,16 +165,15 @@ static void nft_ipv4_parse_payload(struc + uint8_t proto; + bool inv; + +- switch(ctx->payload.offset) { ++ switch (sreg->payload.offset) { + case offsetof(struct iphdr, saddr): + get_cmp_data(e, &addr, sizeof(addr), &inv); + cs->fw.ip.src.s_addr = addr.s_addr; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv4(ctx, &cs->fw.ip.smsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; ++ if (sreg->bitwise.set) { ++ parse_mask_ipv4(sreg, &cs->fw.ip.smsk); + } else { + memset(&cs->fw.ip.smsk, 0xff, +- min(ctx->payload.len, sizeof(struct in_addr))); ++ min(sreg->payload.len, sizeof(struct in_addr))); + } + + if (inv) +@@ -182,13 +182,11 @@ static void nft_ipv4_parse_payload(struc + case offsetof(struct iphdr, daddr): + get_cmp_data(e, &addr, sizeof(addr), &inv); + cs->fw.ip.dst.s_addr = addr.s_addr; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv4(ctx, &cs->fw.ip.dmsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (sreg->bitwise.set) ++ parse_mask_ipv4(sreg, &cs->fw.ip.dmsk); ++ else + memset(&cs->fw.ip.dmsk, 0xff, +- min(ctx->payload.len, sizeof(struct in_addr))); +- } ++ min(sreg->payload.len, sizeof(struct in_addr))); + + if (inv) + cs->fw.ip.invflags |= IPT_INV_DSTIP; +@@ -201,13 +199,12 @@ static void nft_ipv4_parse_payload(struc + break; + case offsetof(struct iphdr, frag_off): + cs->fw.ip.flags |= IPT_F_FRAG; +- inv = false; +- get_frag(ctx, e, &inv); ++ inv = get_frag(sreg, e); + if (inv) + cs->fw.ip.invflags |= IPT_INV_FRAG; + break; + default: +- DEBUGP("unknown payload offset %d\n", ctx->payload.offset); ++ DEBUGP("unknown payload offset %d\n", sreg->payload.offset); + break; + } + } +--- a/iptables/nft-ipv6.c ++++ b/iptables/nft-ipv6.c +@@ -104,10 +104,12 @@ static bool nft_ipv6_is_same(const struc + b->fw6.ipv6.outiface_mask); + } + +-static void nft_ipv6_parse_meta(struct nft_xt_ctx *ctx, struct nftnl_expr *e, ++static void nft_ipv6_parse_meta(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, ++ struct nftnl_expr *e, + struct iptables_command_state *cs) + { +- switch (ctx->meta.key) { ++ switch (reg->meta_dreg.key) { + case NFT_META_L4PROTO: + cs->fw6.ipv6.proto = nftnl_expr_get_u8(e, NFTNL_EXPR_CMP_DATA); + if (nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_OP) == NFT_CMP_NEQ) +@@ -117,17 +119,19 @@ static void nft_ipv6_parse_meta(struct n + break; + } + +- parse_meta(ctx, e, ctx->meta.key, cs->fw6.ipv6.iniface, ++ parse_meta(ctx, e, reg->meta_dreg.key, cs->fw6.ipv6.iniface, + cs->fw6.ipv6.iniface_mask, cs->fw6.ipv6.outiface, + cs->fw6.ipv6.outiface_mask, &cs->fw6.ipv6.invflags); + } + +-static void parse_mask_ipv6(struct nft_xt_ctx *ctx, struct in6_addr *mask) ++static void parse_mask_ipv6(const struct nft_xt_ctx_reg *reg, ++ struct in6_addr *mask) + { +- memcpy(mask, ctx->bitwise.mask, sizeof(struct in6_addr)); ++ memcpy(mask, reg->bitwise.mask, sizeof(struct in6_addr)); + } + + static void nft_ipv6_parse_payload(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *reg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -135,17 +139,15 @@ static void nft_ipv6_parse_payload(struc + uint8_t proto; + bool inv; + +- switch (ctx->payload.offset) { ++ switch (reg->payload.offset) { + case offsetof(struct ip6_hdr, ip6_src): + get_cmp_data(e, &addr, sizeof(addr), &inv); + memcpy(cs->fw6.ipv6.src.s6_addr, &addr, sizeof(addr)); +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv6(ctx, &cs->fw6.ipv6.smsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ parse_mask_ipv6(reg, &cs->fw6.ipv6.smsk); ++ else + memset(&cs->fw6.ipv6.smsk, 0xff, +- min(ctx->payload.len, sizeof(struct in6_addr))); +- } ++ min(reg->payload.len, sizeof(struct in6_addr))); + + if (inv) + cs->fw6.ipv6.invflags |= IP6T_INV_SRCIP; +@@ -153,13 +155,11 @@ static void nft_ipv6_parse_payload(struc + case offsetof(struct ip6_hdr, ip6_dst): + get_cmp_data(e, &addr, sizeof(addr), &inv); + memcpy(cs->fw6.ipv6.dst.s6_addr, &addr, sizeof(addr)); +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- parse_mask_ipv6(ctx, &cs->fw6.ipv6.dmsk); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { ++ if (reg->bitwise.set) ++ parse_mask_ipv6(reg, &cs->fw6.ipv6.dmsk); ++ else + memset(&cs->fw6.ipv6.dmsk, 0xff, +- min(ctx->payload.len, sizeof(struct in6_addr))); +- } ++ min(reg->payload.len, sizeof(struct in6_addr))); + + if (inv) + cs->fw6.ipv6.invflags |= IP6T_INV_DSTIP; +--- a/iptables/nft-shared.c ++++ b/iptables/nft-shared.c +@@ -295,6 +295,16 @@ nft_create_match(struct nft_xt_ctx *ctx, + struct iptables_command_state *cs, + const char *name); + ++static uint32_t get_meta_mask(struct nft_xt_ctx *ctx, enum nft_registers sreg) ++{ ++ struct nft_xt_ctx_reg *reg = nft_xt_ctx_get_sreg(ctx, sreg); ++ ++ if (reg->bitwise.set) ++ return reg->bitwise.mask[0]; ++ ++ return ~0u; ++} ++ + static int parse_meta_mark(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { + struct xt_mark_mtinfo1 *mark; +@@ -312,12 +322,7 @@ static int parse_meta_mark(struct nft_xt + + value = nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_DATA); + mark->mark = value; +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- memcpy(&mark->mask, &ctx->bitwise.mask, sizeof(mark->mask)); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } else { +- mark->mask = 0xffffffff; +- } ++ mark->mask = get_meta_mask(ctx, nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_SREG)); + + return 0; + } +@@ -451,20 +456,40 @@ void get_cmp_data(struct nftnl_expr *e, + *inv = false; + } + +-static void nft_meta_set_to_target(struct nft_xt_ctx *ctx) ++static void nft_meta_set_to_target(struct nft_xt_ctx *ctx, ++ struct nftnl_expr *e) + { + struct xtables_target *target; ++ struct nft_xt_ctx_reg *sreg; ++ enum nft_registers sregnum; + struct xt_entry_target *t; + unsigned int size; + const char *targname; + +- switch (ctx->meta.key) { ++ sregnum = nftnl_expr_get_u32(e, NFTNL_EXPR_META_SREG); ++ sreg = nft_xt_ctx_get_sreg(ctx, sregnum); ++ if (!sreg) ++ return; ++ ++ if (sreg->meta_sreg.set == 0) ++ return; ++ ++ switch (sreg->meta_sreg.key) { + case NFT_META_NFTRACE: +- if (ctx->immediate.data[0] == 0) ++ if ((sreg->type != NFT_XT_REG_IMMEDIATE)) { ++ ctx->errmsg = "meta nftrace but reg not immediate"; + return; ++ } ++ ++ if (sreg->immediate.data[0] == 0) { ++ ctx->errmsg = "trace is cleared"; ++ return; ++ } ++ + targname = "TRACE"; + break; + default: ++ ctx->errmsg = "meta sreg key not supported"; + return; + } + +@@ -486,51 +511,74 @@ static void nft_meta_set_to_target(struc + + static void nft_parse_meta(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { +- ctx->meta.key = nftnl_expr_get_u32(e, NFTNL_EXPR_META_KEY); ++ struct nft_xt_ctx_reg *reg; + +- if (nftnl_expr_is_set(e, NFTNL_EXPR_META_SREG) && +- (ctx->flags & NFT_XT_CTX_IMMEDIATE) && +- nftnl_expr_get_u32(e, NFTNL_EXPR_META_SREG) == ctx->immediate.reg) { +- ctx->flags &= ~NFT_XT_CTX_IMMEDIATE; +- nft_meta_set_to_target(ctx); ++ if (nftnl_expr_is_set(e, NFTNL_EXPR_META_SREG)) { ++ nft_meta_set_to_target(ctx, e); + return; + } + +- ctx->reg = nftnl_expr_get_u32(e, NFTNL_EXPR_META_DREG); +- ctx->flags |= NFT_XT_CTX_META; ++ reg = nft_xt_ctx_get_dreg(ctx, nftnl_expr_get_u32(e, NFTNL_EXPR_META_DREG)); ++ if (!reg) ++ return; ++ ++ reg->meta_dreg.key = nftnl_expr_get_u32(e, NFTNL_EXPR_META_KEY); ++ reg->type = NFT_XT_REG_META_DREG; + } + + static void nft_parse_payload(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { +- if (ctx->flags & NFT_XT_CTX_PAYLOAD) { +- memcpy(&ctx->prev_payload, &ctx->payload, +- sizeof(ctx->prev_payload)); +- ctx->flags |= NFT_XT_CTX_PREV_PAYLOAD; +- } ++ enum nft_registers regnum = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_DREG); ++ struct nft_xt_ctx_reg *reg = nft_xt_ctx_get_dreg(ctx, regnum); + +- ctx->reg = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_DREG); +- ctx->payload.base = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_BASE); +- ctx->payload.offset = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_OFFSET); +- ctx->payload.len = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_LEN); +- ctx->flags |= NFT_XT_CTX_PAYLOAD; ++ if (!reg) ++ return; ++ ++ reg->type = NFT_XT_REG_PAYLOAD; ++ reg->payload.base = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_BASE); ++ reg->payload.offset = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_OFFSET); ++ reg->payload.len = nftnl_expr_get_u32(e, NFTNL_EXPR_PAYLOAD_LEN); + } + + static void nft_parse_bitwise(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { +- uint32_t reg, len; ++ enum nft_registers sregnum = nftnl_expr_get_u32(e, NFTNL_EXPR_BITWISE_SREG); ++ enum nft_registers dregnum = nftnl_expr_get_u32(e, NFTNL_EXPR_BITWISE_DREG); ++ struct nft_xt_ctx_reg *sreg = nft_xt_ctx_get_sreg(ctx, sregnum); ++ struct nft_xt_ctx_reg *dreg = sreg; + const void *data; ++ uint32_t len; + +- reg = nftnl_expr_get_u32(e, NFTNL_EXPR_BITWISE_SREG); +- if (ctx->reg && reg != ctx->reg) ++ if (!sreg) + return; + +- reg = nftnl_expr_get_u32(e, NFTNL_EXPR_BITWISE_DREG); +- ctx->reg = reg; ++ if (sregnum != dregnum) { ++ dreg = nft_xt_ctx_get_sreg(ctx, dregnum); /* sreg, do NOT clear ... */ ++ if (!dreg) ++ return; ++ ++ *dreg = *sreg; /* .. and copy content instead */ ++ } ++ + data = nftnl_expr_get(e, NFTNL_EXPR_BITWISE_XOR, &len); +- memcpy(ctx->bitwise.xor, data, len); ++ ++ if (len > sizeof(dreg->bitwise.xor)) { ++ ctx->errmsg = "bitwise xor too large"; ++ return; ++ } ++ ++ memcpy(dreg->bitwise.xor, data, len); ++ + data = nftnl_expr_get(e, NFTNL_EXPR_BITWISE_MASK, &len); +- memcpy(ctx->bitwise.mask, data, len); +- ctx->flags |= NFT_XT_CTX_BITWISE; ++ ++ if (len > sizeof(dreg->bitwise.mask)) { ++ ctx->errmsg = "bitwise mask too large"; ++ return; ++ } ++ ++ memcpy(dreg->bitwise.mask, data, len); ++ ++ dreg->bitwise.set = true; + } + + static struct xtables_match * +@@ -835,6 +883,8 @@ static void nft_parse_transport(struct n + struct nftnl_expr *e, + struct iptables_command_state *cs) + { ++ struct nft_xt_ctx_reg *sreg; ++ enum nft_registers reg; + uint32_t sdport; + uint16_t port; + uint8_t proto, op; +@@ -855,7 +905,17 @@ static void nft_parse_transport(struct n + nftnl_expr_get(e, NFTNL_EXPR_CMP_DATA, &len); + op = nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_OP); + +- switch(ctx->payload.offset) { ++ reg = nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_SREG); ++ sreg = nft_xt_ctx_get_sreg(ctx, reg); ++ if (!sreg) ++ return; ++ ++ if (sreg->type != NFT_XT_REG_PAYLOAD) { ++ ctx->errmsg = "sgreg not payload"; ++ return; ++ } ++ ++ switch(sreg->payload.offset) { + case 0: /* th->sport */ + switch (len) { + case 2: /* load sport only */ +@@ -881,10 +941,9 @@ static void nft_parse_transport(struct n + uint8_t flags = nftnl_expr_get_u8(e, NFTNL_EXPR_CMP_DATA); + uint8_t mask = ~0; + +- if (ctx->flags & NFT_XT_CTX_BITWISE) { +- memcpy(&mask, &ctx->bitwise.mask, sizeof(mask)); +- ctx->flags &= ~NFT_XT_CTX_BITWISE; +- } ++ if (sreg->bitwise.set) ++ memcpy(&mask, &sreg->bitwise.mask, sizeof(mask)); ++ + nft_parse_tcp_flags(ctx, cs, op, flags, mask); + } + return; +@@ -892,6 +951,7 @@ static void nft_parse_transport(struct n + } + + static void nft_parse_transport_range(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *sreg, + struct nftnl_expr *e, + struct iptables_command_state *cs) + { +@@ -921,7 +981,7 @@ static void nft_parse_transport_range(st + from = ntohs(nftnl_expr_get_u16(e, NFTNL_EXPR_RANGE_FROM_DATA)); + to = ntohs(nftnl_expr_get_u16(e, NFTNL_EXPR_RANGE_TO_DATA)); + +- switch(ctx->payload.offset) { ++ switch (sreg->payload.offset) { + case 0: + nft_parse_th_port_range(ctx, cs, proto, from, to, -1, -1, op); + return; +@@ -934,30 +994,40 @@ static void nft_parse_transport_range(st + + static void nft_parse_cmp(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { ++ struct nft_xt_ctx_reg *sreg; + uint32_t reg; + + reg = nftnl_expr_get_u32(e, NFTNL_EXPR_CMP_SREG); +- if (ctx->reg && reg != ctx->reg) ++ ++ sreg = nft_xt_ctx_get_sreg(ctx, reg); ++ if (!sreg) + return; + +- if (ctx->flags & NFT_XT_CTX_META) { +- ctx->h->ops->parse_meta(ctx, e, ctx->cs); +- ctx->flags &= ~NFT_XT_CTX_META; +- } +- /* bitwise context is interpreted from payload */ +- if (ctx->flags & NFT_XT_CTX_PAYLOAD) { +- switch (ctx->payload.base) { ++ switch (sreg->type) { ++ case NFT_XT_REG_UNDEF: ++ ctx->errmsg = "cmp sreg undef"; ++ break; ++ case NFT_XT_REG_META_DREG: ++ ctx->h->ops->parse_meta(ctx, sreg, e, ctx->cs); ++ break; ++ case NFT_XT_REG_PAYLOAD: ++ switch (sreg->payload.base) { + case NFT_PAYLOAD_LL_HEADER: + if (ctx->h->family == NFPROTO_BRIDGE) +- ctx->h->ops->parse_payload(ctx, e, ctx->cs); ++ ctx->h->ops->parse_payload(ctx, sreg, e, ctx->cs); + break; + case NFT_PAYLOAD_NETWORK_HEADER: +- ctx->h->ops->parse_payload(ctx, e, ctx->cs); ++ ctx->h->ops->parse_payload(ctx, sreg, e, ctx->cs); + break; + case NFT_PAYLOAD_TRANSPORT_HEADER: + nft_parse_transport(ctx, e, ctx->cs); + break; + } ++ ++ break; ++ default: ++ ctx->errmsg = "cmp sreg has unknown type"; ++ break; + } + } + +@@ -976,18 +1046,22 @@ static void nft_parse_immediate(struct n + int verdict; + + if (nftnl_expr_is_set(e, NFTNL_EXPR_IMM_DATA)) { ++ struct nft_xt_ctx_reg *dreg; + const void *imm_data; + uint32_t len; + + imm_data = nftnl_expr_get_data(e, NFTNL_EXPR_IMM_DATA, &len); ++ dreg = nft_xt_ctx_get_dreg(ctx, nftnl_expr_get_u32(e, NFTNL_EXPR_IMM_DREG)); ++ if (!dreg) ++ return; + +- if (len > sizeof(ctx->immediate.data)) ++ if (len > sizeof(dreg->immediate.data)) + return; + +- memcpy(ctx->immediate.data, imm_data, len); +- ctx->immediate.len = len; +- ctx->immediate.reg = nftnl_expr_get_u32(e, NFTNL_EXPR_IMM_DREG); +- ctx->flags |= NFT_XT_CTX_IMMEDIATE; ++ memcpy(dreg->immediate.data, imm_data, len); ++ dreg->immediate.len = len; ++ dreg->type = NFT_XT_REG_IMMEDIATE; ++ + return; + } + +@@ -1124,20 +1198,29 @@ static void nft_parse_lookup(struct nft_ + + static void nft_parse_range(struct nft_xt_ctx *ctx, struct nftnl_expr *e) + { ++ struct nft_xt_ctx_reg *sreg; + uint32_t reg; + + reg = nftnl_expr_get_u32(e, NFTNL_EXPR_RANGE_SREG); +- if (reg != ctx->reg) +- return; ++ sreg = nft_xt_ctx_get_sreg(ctx, reg); + +- if (ctx->flags & NFT_XT_CTX_PAYLOAD) { +- switch (ctx->payload.base) { ++ switch (sreg->type) { ++ case NFT_XT_REG_UNDEF: ++ ctx->errmsg = "range sreg undef"; ++ break; ++ case NFT_XT_REG_PAYLOAD: ++ switch (sreg->payload.base) { + case NFT_PAYLOAD_TRANSPORT_HEADER: +- nft_parse_transport_range(ctx, e, ctx->cs); ++ nft_parse_transport_range(ctx, sreg, e, ctx->cs); + break; + default: ++ ctx->errmsg = "range with unknown payload base"; + break; + } ++ break; ++ default: ++ ctx->errmsg = "range sreg type unsupported"; ++ break; + } + } + +--- a/iptables/nft-shared.h ++++ b/iptables/nft-shared.h +@@ -38,13 +38,41 @@ struct xtables_args; + struct nft_handle; + struct xt_xlate; + +-enum { +- NFT_XT_CTX_PAYLOAD = (1 << 0), +- NFT_XT_CTX_META = (1 << 1), +- NFT_XT_CTX_BITWISE = (1 << 2), +- NFT_XT_CTX_IMMEDIATE = (1 << 3), +- NFT_XT_CTX_PREV_PAYLOAD = (1 << 4), +- NFT_XT_CTX_RANGE = (1 << 5), ++enum nft_ctx_reg_type { ++ NFT_XT_REG_UNDEF, ++ NFT_XT_REG_PAYLOAD, ++ NFT_XT_REG_IMMEDIATE, ++ NFT_XT_REG_META_DREG, ++}; ++ ++struct nft_xt_ctx_reg { ++ enum nft_ctx_reg_type type:8; ++ ++ union { ++ struct { ++ uint32_t base; ++ uint32_t offset; ++ uint32_t len; ++ } payload; ++ struct { ++ uint32_t data[4]; ++ uint8_t len; ++ } immediate; ++ struct { ++ uint32_t key; ++ } meta_dreg; ++ }; ++ ++ struct { ++ uint32_t mask[4]; ++ uint32_t xor[4]; ++ bool set; ++ } bitwise; ++ ++ struct { ++ uint32_t key; ++ bool set; ++ } meta_sreg; + }; + + struct nft_xt_ctx { +@@ -58,25 +86,51 @@ struct nft_xt_ctx { + struct xt_udp *udp; + } tcpudp; + +- uint32_t reg; +- struct { +- uint32_t base; +- uint32_t offset; +- uint32_t len; +- } payload, prev_payload; +- struct { +- uint32_t key; +- } meta; +- struct { +- uint32_t data[4]; +- uint32_t len, reg; +- } immediate; +- struct { +- uint32_t mask[4]; +- uint32_t xor[4]; +- } bitwise; ++ struct nft_xt_ctx_reg regs[1 + 16]; ++ ++ const char *errmsg; + }; + ++static inline struct nft_xt_ctx_reg *nft_xt_ctx_get_sreg(struct nft_xt_ctx *ctx, enum nft_registers reg) ++{ ++ switch (reg) { ++ case NFT_REG_VERDICT: ++ return &ctx->regs[0]; ++ case NFT_REG_1: ++ return &ctx->regs[1]; ++ case NFT_REG_2: ++ return &ctx->regs[5]; ++ case NFT_REG_3: ++ return &ctx->regs[9]; ++ case NFT_REG_4: ++ return &ctx->regs[13]; ++ case NFT_REG32_00...NFT_REG32_15: ++ return &ctx->regs[reg - NFT_REG32_00]; ++ default: ++ ctx->errmsg = "Unknown register requested"; ++ break; ++ } ++ ++ return NULL; ++} ++ ++static inline void nft_xt_reg_clear(struct nft_xt_ctx_reg *r) ++{ ++ r->type = 0; ++ r->bitwise.set = false; ++ r->meta_sreg.set = false; ++} ++ ++static inline struct nft_xt_ctx_reg *nft_xt_ctx_get_dreg(struct nft_xt_ctx *ctx, enum nft_registers reg) ++{ ++ struct nft_xt_ctx_reg *r = nft_xt_ctx_get_sreg(ctx, reg); ++ ++ if (r) ++ nft_xt_reg_clear(r); ++ ++ return r; ++} ++ + struct nft_family_ops { + int (*add)(struct nft_handle *h, struct nftnl_rule *r, + struct iptables_command_state *cs); +@@ -84,9 +138,13 @@ struct nft_family_ops { + const struct iptables_command_state *cs_b); + void (*print_payload)(struct nftnl_expr *e, + struct nftnl_expr_iter *iter); +- void (*parse_meta)(struct nft_xt_ctx *ctx, struct nftnl_expr *e, ++ void (*parse_meta)(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *sreg, ++ struct nftnl_expr *e, + struct iptables_command_state *cs); +- void (*parse_payload)(struct nft_xt_ctx *ctx, struct nftnl_expr *e, ++ void (*parse_payload)(struct nft_xt_ctx *ctx, ++ const struct nft_xt_ctx_reg *sreg, ++ struct nftnl_expr *e, + struct iptables_command_state *cs); + void (*parse_lookup)(struct nft_xt_ctx *ctx, struct nftnl_expr *e); + void (*set_goto_flag)(struct iptables_command_state *cs); diff --git a/package/utils/firmware-utils/Makefile b/package/utils/firmware-utils/Makefile index 3dcac6bcf1..65b7048f96 100644 --- a/package/utils/firmware-utils/Makefile +++ b/package/utils/firmware-utils/Makefile @@ -7,9 +7,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2024-06-20 -PKG_SOURCE_VERSION:=6ac44974185a3e7dc7848e97b964339948e817a7 -PKG_MIRROR_HASH:=ee5b29f45593750a6806cfa7cad3fd766b321b44107a6b481b890efe82a7dbf5 +PKG_SOURCE_DATE:=2024-10-16 +PKG_SOURCE_VERSION:=88fbd52666e3b3f83ebab40f95b84f265824a729 +PKG_MIRROR_HASH:=4809421286257a91b2f29e79b7bbd0852a72c6e82169b340036cca5703881232 PKG_FLAGS:=nonshared PKG_BUILD_DEPENDS:=openssl zlib diff --git a/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts b/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts index 81290479b0..932144c227 100644 --- a/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts +++ b/target/linux/ath79/dts/ar7242_buffalo_wzr-hp-g450h.dts @@ -79,6 +79,7 @@ qca,no-eeprom; #gpio-cells = <2>; gpio-controller; + qca,tx-gain-buffalo; }; }; diff --git a/target/linux/ath79/dts/qca9558_aruba_ap-115.dts b/target/linux/ath79/dts/qca9558_aruba_ap-115.dts index a5318b6cdd..7a59bda6eb 100644 --- a/target/linux/ath79/dts/qca9558_aruba_ap-115.dts +++ b/target/linux/ath79/dts/qca9558_aruba_ap-115.dts @@ -98,10 +98,9 @@ ath9k: wifi@0,0 { compatible = "pci168c,0033"; reg = <0x0000 0 0 0 0>; - qca,no-eeprom; - nvmem-cells = <&macaddr_oemdata_1d 1>; - nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_oemdata_1d 1>, <&cal_oemdata_5000>; + nvmem-cell-names = "mac-address", "calibration"; }; }; @@ -161,7 +160,7 @@ reg = <0x100000 0xe00000>; }; - oemdata: partition@fe0000 { + partition@fe0000 { label = "oemdata"; reg = <0xfe0000 0x010000>; read-only; @@ -176,6 +175,14 @@ reg = <0x1d 0x6>; #nvmem-cell-cells = <1>; }; + + cal_oemdata_1000: calibration@1000 { + reg = <0x1000 0x440>; + }; + + cal_oemdata_5000: calibration@5000 { + reg = <0x5000 0x440>; + }; }; }; @@ -190,9 +197,8 @@ &wmac { status = "okay"; - qca,no-eeprom; - nvmem-cells = <&macaddr_oemdata_1d 0>; - nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_oemdata_1d 0>, <&cal_oemdata_1000>; + nvmem-cell-names = "mac-address", "calibration"; }; &mdio0 { diff --git a/target/linux/ath79/dts/qca9558_nec_aterm.dtsi b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi new file mode 100644 index 0000000000..76d39c2ee7 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_aterm.dtsi @@ -0,0 +1,371 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include +#include + +#include "qca955x.dtsi" + +/ { + chosen { + /* + * don't specify bootargs property in DeviceTree to + * enable a console with a default baudrate (9600) + * or passed console= parameter from the bootloader + */ + /delete-property/ bootargs; + stdout-path = &uart0; + }; + + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + label-mac-device = ð0; + }; + + i2c { + compatible = "i2c-gpio"; + + pinctrl-names = "default"; + pinctrl-0 = <&pmx_gpio_i2c_pins>; + sda-gpios = <&gpio 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + #address-cells = <1>; + #size-cells = <0>; + + gpio1: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + reset-gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + gpio-controller; + #gpio-cells = <2>; + + usb-hub-reset { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins>; + + button-wps { + label = "wps"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-eco { + label = "eco"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + switch-bridge { + label = "br"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + switch-converter { + label = "cnv"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + color = ; + function = "converter"; + }; + + led-1 { + label = "green:converter"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + color = ; + function = "converter"; + }; + + led-2 { + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + color = ; + function = "tv"; + }; + + led-3 { + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + color = ; + function = "tv"; + }; + + led-4 { + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + }; + + led-5 { + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + linux,default-trigger = "phy0tpt"; + }; + + led-6 { + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + }; + + led-7 { + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + linux,default-trigger = "phy1tpt"; + }; + + led-8 { + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WAN_ONLINE; + }; + + led-9 { + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_WAN_ONLINE; + }; + + led_power_red: led-10 { + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led_power_green: led-11 { + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_POWER; + default-state = "on"; + }; + }; + + regulator { + compatible = "regulator-fixed"; + regulator-name = "usb-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * since the OEM bootloader requires unknown + * filesystem on firmware area, needs to be + * replaced to u-boot before OpenWrt installation + */ + partition@0 { + label = "bootloader"; + reg = <0x000000 0x020000>; + }; + + /* not compatible with u-boot */ + partition@20000 { + label = "config"; + reg = <0x020000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_config_6: macaddr@6 { + reg = <0x6 0x6>; + }; + + macaddr_config_c: macaddr@c { + reg = <0xc 0x6>; + }; + + macaddr_config_12: macaddr@12 { + reg = <0x12 0x6>; + }; + }; + }; + + partition@30000 { + label = "art"; + reg = <0x030000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + cal_art_1000: calibration@1000 { + reg = <0x1000 0x440>; + }; + + cal_art_5000: calibration@5000 { + reg = <0x5000 0x844>; + }; + }; + }; + + partition@40000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x040000 0xfc0000>; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + + qca,ar8327-initvals = < + 0x04 0x00080080 /* PORT0_PAD_MODE_CTRL */ + 0x08 0x00000000 /* PORT5_PAD_MODE_CTRL */ + 0x0c 0x07600000 /* PORT6_PAD_MODE_CTRL */ + 0x10 0xa12613a0 /* POWER_ON_STRAP */ + 0x50 0xcc36cc36 /* LED_CTRL0 */ + 0x54 0xca36ca36 /* LED_CTRL1 */ + 0x58 0xc936c936 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x0000007e /* PORT6_STATUS */ + 0xe0 0xc74164d0 /* SGMII_CONTROL */ + >; + }; +}; + +ð0 { + status = "okay"; + + nvmem-cells = <&macaddr_config_c>; + nvmem-cell-names = "mac-address"; + phy-handle = <&phy0>; + qca955x-sgmii-fixup; + + gmac-config { + device = <&gmac>; + + rgmii-enabled = <1>; + rxdv-delay = <2>; + rxd-delay = <2>; + }; +}; + +ð1 { + status = "okay"; + + nvmem-cells = <&macaddr_config_6>; + nvmem-cell-names = "mac-address"; + pll-data = <0x03000000 0x00000101 0x00001616>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gpio { + switch-reset { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&pcie0 { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,003c"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&cal_art_5000>, <&macaddr_config_12>; + nvmem-cell-names = "calibration", "mac-address"; + }; +}; + +&pinmux { + /* mux GPIO19/20 as GPIO instead of native I2C on QCA9558 */ + pmx_gpio_i2c_pins: gpio-i2c-pins { + pinctrl-single,bits = <0x10 0x0 0xff000000>, + <0x14 0x0 0xff>; + }; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + + /delete-node/ port@1; + + /* NEC uPD720114 */ + hub@1 { + compatible = "usb0409,005a"; + reg = <1>; + }; +}; + +&wmac { + status = "okay"; + + nvmem-cells = <&cal_art_1000>, <&macaddr_config_0>; + nvmem-cell-names = "calibration", "mac-address"; +}; diff --git a/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts b/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts new file mode 100644 index 0000000000..bfcac09d55 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_wg1400hp.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca9558_nec_aterm.dtsi" + +/ { + compatible = "nec,wg1400hp", "qca,qca9558"; + model = "NEC Aterm WG1400HP"; +}; + +ð0 { + pll-data = <0x5a000000 0x00000101 0x00001616>; +}; diff --git a/target/linux/ath79/dts/qca9558_nec_wg1800hp.dts b/target/linux/ath79/dts/qca9558_nec_wg1800hp.dts new file mode 100644 index 0000000000..47679c5869 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_wg1800hp.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca9558_nec_aterm.dtsi" + +/ { + compatible = "nec,wg1800hp", "qca,qca9558"; + model = "NEC Aterm WG1800HP"; +}; + +ð0 { + pll-data = <0x5a000000 0x00000101 0x00001616>; +}; diff --git a/target/linux/ath79/dts/qca9558_nec_wg1800hp2.dts b/target/linux/ath79/dts/qca9558_nec_wg1800hp2.dts new file mode 100644 index 0000000000..39dec5b2c4 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_nec_wg1800hp2.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca9558_nec_aterm.dtsi" + +/ { + compatible = "nec,wg1800hp2", "qca,qca9558"; + model = "NEC Aterm WG1800HP2"; +}; + +ð0 { + pll-data = <0x96000000 0x00000101 0x00001616>; +}; diff --git a/target/linux/ath79/dts/qca955x.dtsi b/target/linux/ath79/dts/qca955x.dtsi index c6cf83d4da..f8318b8f65 100644 --- a/target/linux/ath79/dts/qca955x.dtsi +++ b/target/linux/ath79/dts/qca955x.dtsi @@ -64,8 +64,8 @@ compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; reg = <0x18030000 4>, <0x18030004 4>; - reset-names = "usb-phy", "usb-suspend-override"; - resets = <&rst 4>, <&rst 3>; + reset-names = "usb-phy-analog", "usb-phy", "usb-suspend-override"; + resets = <&rst 11>, <&rst 4>, <&rst 3>; #phy-cells = <0>; @@ -76,8 +76,8 @@ compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy"; reg = <0x18030010 4>, <0x18030014 4>; - reset-names = "usb-phy", "usb-suspend-override"; - resets = <&rst2 4>, <&rst2 3>; + reset-names = "usb-phy-analog", "usb-phy", "usb-suspend-override"; + resets = <&rst2 11>, <&rst2 4>, <&rst2 3>; #phy-cells = <0>; diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index 742892a2f3..2ad4c899e0 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -189,6 +189,9 @@ ath79_setup_interfaces() ;; belkin,f9j1108-v2|\ belkin,f9k1115-v2|\ + nec,wg1400hp|\ + nec,wg1800hp|\ + nec,wg1800hp2|\ tplink,archer-c5-v1|\ tplink,archer-c7-v1|\ tplink,archer-c7-v2|\ @@ -569,9 +572,7 @@ ath79_setup_interfaces() "0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:lan" ;; ubnt,edgeswitch-8xp) - ucidef_set_interface_wan "eth1" - ucidef_add_switch "switch0" \ - "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "4:lan:5" "5:lan:6" "6:lan:7" "7:lan:8" "8@eth0" + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8" "eth1" ;; ubnt,routerstation-pro) ucidef_set_interface_wan "eth0" diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom index 6341c56a8b..17639ad439 100644 --- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom +++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom @@ -9,9 +9,6 @@ board=$(board_name) case "$FIRMWARE" in "ath9k-eeprom-ahb-18100000.wmac.bin") case $board in - aruba,ap-115) - caldata_extract "oemdata" 0x1000 0x440 - ;; asus,pl-ac56|\ asus,rp-ac51|\ asus,rp-ac66) @@ -73,9 +70,6 @@ case "$FIRMWARE" in ;; "ath9k-eeprom-pci-0000:00:00.0.bin") case $board in - aruba,ap-115) - caldata_extract "oemdata" 0x5000 0x440 - ;; avm,fritz300e) caldata_extract_reverse "urloader" 0x1541 0x440 ;; diff --git a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh index c61c48b00e..0e314dd311 100644 --- a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh +++ b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh @@ -17,6 +17,17 @@ platform_check_image() { ubnt,routerstation-pro) platform_check_image_redboot_fis "$1" ;; + nec,wg1400hp|\ + nec,wg1800hp|\ + nec,wg1800hp2) + local uboot_mtd=$(find_mtd_part "bootloader") + + # check "U-Boot ." string in the "bootloader" partition + if ! grep -q "U-Boot [0-9]\{4\}\.[0-9]\{2\}" $uboot_mtd; then + v "The bootloader doesn't seem to be replaced to U-Boot!" + return 1 + fi + ;; *) return 0 ;; diff --git a/target/linux/ath79/image/generic-ubnt.mk b/target/linux/ath79/image/generic-ubnt.mk index 05a5719f39..2e2498b2c4 100644 --- a/target/linux/ath79/image/generic-ubnt.mk +++ b/target/linux/ath79/image/generic-ubnt.mk @@ -58,8 +58,9 @@ TARGET_DEVICES += ubnt_edgeswitch-5xp define Device/ubnt_edgeswitch-8xp $(Device/ubnt-sw) DEVICE_MODEL := EdgeSwitch 8XP - DEVICE_PACKAGES += kmod-switch-bcm53xx-mdio - DEFAULT := n + DEVICE_PACKAGES += kmod-dsa-b53-mdio + DEVICE_COMPAT_VERSION := 1.1 + DEVICE_COMPAT_MESSAGE := Config cannot be migrated from swconfig to DSA endef TARGET_DEVICES += ubnt_edgeswitch-8xp diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index 3cb093099a..c662083db3 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -1,4 +1,5 @@ include ./common-buffalo.mk +include ./common-nec.mk include ./common-netgear.mk include ./common-senao.mk include ./common-tp-link.mk @@ -2062,6 +2063,36 @@ define Device/nec_wg1200cr endef TARGET_DEVICES += nec_wg1200cr +define Device/nec_wg1400hp + SOC := qca9558 + DEVICE_MODEL := Aterm WG1400HP + IMAGE_SIZE := 16128k + NEC_FW_TYPE := H040b + $(Device/nec-netbsd-aterm) + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += nec_wg1400hp + +define Device/nec_wg1800hp + SOC := qca9558 + DEVICE_MODEL := Aterm WG1800HP + IMAGE_SIZE := 16128k + NEC_FW_TYPE := H040a + $(Device/nec-netbsd-aterm) + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += nec_wg1800hp + +define Device/nec_wg1800hp2 + SOC := qca9558 + DEVICE_MODEL := Aterm WG1800HP2 + IMAGE_SIZE := 16128k + NEC_FW_TYPE := H049 + $(Device/nec-netbsd-aterm) + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += nec_wg1800hp2 + define Device/nec_wg800hp SOC := qca9563 DEVICE_VENDOR := NEC diff --git a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h index 9dc7c0f817..62474ff047 100644 --- a/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h +++ b/target/linux/ath79/image/lzma-loader/src/ar71xx_regs.h @@ -741,5 +741,7 @@ #define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6) #define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 +#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c +#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ath79/image/lzma-loader/src/board.c b/target/linux/ath79/image/lzma-loader/src/board.c index 0d92f3174b..1445108508 100644 --- a/target/linux/ath79/image/lzma-loader/src/board.c +++ b/target/linux/ath79/image/lzma-loader/src/board.c @@ -51,9 +51,12 @@ static void tlwr1043nd_init(void) static inline void tlwr1043nd_init(void) {} #endif -#ifdef CONFIG_BOARD_MERAKI_MR18 +#if defined(CONFIG_BOARD_MERAKI_MR18) || \ + defined(CONFIG_BOARD_NEC_WG1400HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP2) -static int mr18_extract_sgmii_res_cal(void) +static int extract_qca955x_sgmii_res_cal(void) { unsigned int base; unsigned int reversed_sgmii_value; @@ -138,7 +141,7 @@ static void qca955x_device_reset_clear(unsigned int mask) WRITEREG(reg, t & ~mask); } -static void mr18_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) +static void setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) { unsigned int ethbase, pllbase, t; @@ -166,16 +169,18 @@ static void mr18_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS)) ; } +#endif +#ifdef CONFIG_BOARD_MERAKI_MR18 static inline void mr18_init(void) { int res; printf("Meraki MR18\n"); - res = mr18_extract_sgmii_res_cal(); + res = extract_qca955x_sgmii_res_cal(); if (res >= 0) - mr18_setup_qca955x_eth_serdes_cal(res); + setup_qca955x_eth_serdes_cal(res); } #else @@ -213,26 +218,16 @@ static inline void huawei_ap_init(void) static inline void huawei_ap_init(void) {} #endif -#if defined(CONFIG_BOARD_NEC_WG600HP) || \ +#if defined(CONFIG_BOARD_NEC_WG1400HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP2) || \ + defined(CONFIG_BOARD_NEC_WG600HP) || \ defined(CONFIG_BOARD_NEC_WR8750N) || \ defined(CONFIG_BOARD_NEC_WR9500N) - -#define AR934X_PLL_SWITCH_CLK_CTRL_REG 0x24 -#define AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL BIT(0) - -static inline void nec_aterm_init(void) +static inline void nec_aterm_reset_common(void) { - unsigned int reg, val; + unsigned int reg = KSEG1ADDR(AR71XX_RESET_BASE); - printf("NEC Aterm series (AR9344)\n"); - - /* set REFCLK=40MHz to switch PLL */ - reg = KSEG1ADDR(AR71XX_PLL_BASE); - val = READREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG); - val &= ~AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL; - WRITEREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG, val); - - reg = KSEG1ADDR(AR71XX_RESET_BASE); #ifndef LOADADDR /* * This is for initramfs-factory image. @@ -262,6 +257,29 @@ static inline void nec_aterm_init(void) * booting from stock bootloader */ WRITEREG(reg + AR71XX_RESET_REG_WDOG, 0xffffffff); +} +#endif + +#if defined(CONFIG_BOARD_NEC_WG600HP) || \ + defined(CONFIG_BOARD_NEC_WR8750N) || \ + defined(CONFIG_BOARD_NEC_WR9500N) + +#define AR934X_PLL_SWITCH_CLK_CTRL_REG 0x24 +#define AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL BIT(0) + +static inline void nec_aterm_init(void) +{ + unsigned int reg, val; + + printf("NEC Aterm series (AR9344)\n"); + + /* set REFCLK=40MHz to switch PLL */ + reg = KSEG1ADDR(AR71XX_PLL_BASE); + val = READREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG); + val &= ~AR934X_PLL_SWITCH_CLK_CTRL_SWITCHCLK_SEL; + WRITEREG(reg + AR934X_PLL_SWITCH_CLK_CTRL_REG, val); + + nec_aterm_reset_common(); /* * deassert some RESET bits not handled by drivers @@ -270,11 +288,61 @@ static inline void nec_aterm_init(void) * - ETH_SWITCH(_ANALOG): eth0 * - RTC : wmac */ + reg = KSEG1ADDR(AR71XX_RESET_BASE); val = READREG(reg + AR934X_RESET_REG_RESET_MODULE); val &= ~(AR934X_RESET_ETH_SWITCH | AR934X_RESET_ETH_SWITCH_ANALOG | AR934X_RESET_RTC); WRITEREG(reg + AR934X_RESET_REG_RESET_MODULE, val); } +#elif defined(CONFIG_BOARD_NEC_WG1400HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP) || \ + defined(CONFIG_BOARD_NEC_WG1800HP2) + +#define QCA955X_GMAC_MR_AN_CONTROL_PHY_RESET_MASK BIT(15) +#define QCA955X_GMAC_MR_AN_CONTROL_FULL_DUPLEX_MASK BIT(8) +#define QCA955X_GMAC_MR_AN_CONTROL_SPEED_SEL1_MASK BIT(6) + +#define QCA955X_GMAC_SGMII_CONFIG_SPEED_SHIFT 6 + #define QCA955X_GMAC_SGMII_CONFIG_SPEED_1000M 0x2 +#define QCA955X_GMAC_SGMII_CONFIG_FORCE_SPEED_MASK BIT(5) +#define QCA955X_GMAC_SGMII_CONFIG_MODE_CTRL_SHIFT 0 + #define QCA955X_GMAC_SGMII_CONFIG_MODE_SGMII 0x2 + +static inline void nec_aterm_init(void) +{ + unsigned int reg, val; + int ret; + + printf("NEC Aterm series (QCA9558)\n"); + + nec_aterm_reset_common(); + + printf("\nCalibrating SGMII\n"); + ret = extract_qca955x_sgmii_res_cal(); + if (ret >= 0) + setup_qca955x_eth_serdes_cal(ret); + + /* set SGMII force mode to make eth1 working */ + printf("\nConfiguring SGMII force mode\n"); + reg = KSEG1ADDR(QCA955X_GMAC_BASE); + WRITEREG(reg + QCA955X_GMAC_REG_SGMII_CONFIG, + QCA955X_GMAC_SGMII_CONFIG_SPEED_1000M + << QCA955X_GMAC_SGMII_CONFIG_SPEED_SHIFT | + QCA955X_GMAC_SGMII_CONFIG_FORCE_SPEED_MASK | + QCA955X_GMAC_SGMII_CONFIG_MODE_SGMII + << QCA955X_GMAC_SGMII_CONFIG_MODE_CTRL_SHIFT); + printf(" SGMII_CONFIG : 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_SGMII_CONFIG)); + val = QCA955X_GMAC_MR_AN_CONTROL_FULL_DUPLEX_MASK | + QCA955X_GMAC_MR_AN_CONTROL_SPEED_SEL1_MASK; + WRITEREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL, + val | QCA955X_GMAC_MR_AN_CONTROL_PHY_RESET_MASK); + printf(" MR_AN_CONTROL: 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL)); + WRITEREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL, val); + printf(" MR_AN_CONTROL: 0x%08x\n", + READREG(reg + QCA955X_GMAC_REG_MR_AN_CONTROL)); +} #else static inline void nec_aterm_init(void) {} #endif diff --git a/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch b/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch index 720c3bfcdd..c5b01b7dad 100644 --- a/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch +++ b/target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch @@ -751,7 +751,7 @@ SVN-Revision: 35130 EXPORT_SYMBOL(xfrm_parse_spi); --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c -@@ -4221,14 +4221,16 @@ static bool tcp_parse_aligned_timestamp( +@@ -4262,14 +4262,16 @@ static bool tcp_parse_aligned_timestamp( { const __be32 *ptr = (const __be32 *)(th + 1); diff --git a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch index 9470fb9694..1135b31d4f 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch @@ -14,7 +14,7 @@ We don't agree with upstream revert so undo it. --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -489,8 +489,10 @@ static void xhci_pci_quirks(struct devic +@@ -490,8 +490,10 @@ static void xhci_pci_quirks(struct devic pdev->device == 0x3432) xhci->quirks |= XHCI_BROKEN_STREAMS; diff --git a/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch b/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch index 8a04903f7d..5301066196 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch @@ -23,7 +23,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h -@@ -239,6 +239,9 @@ +@@ -242,6 +242,9 @@ #define USB_VENDOR_ID_BAANTO 0x2453 #define USB_DEVICE_ID_BAANTO_MT_190W2 0x0100 @@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell #define USB_VENDOR_ID_BELKIN 0x050d #define USB_DEVICE_ID_FLIP_KVM 0x3201 -@@ -1394,6 +1397,9 @@ +@@ -1404,6 +1407,9 @@ #define USB_VENDOR_ID_XIAOMI 0x2717 #define USB_DEVICE_ID_MI_SILENT_MOUSE 0x5014 diff --git a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch index 948610d576..ca49ada4e7 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0482-xhci-quirks-add-link-TRB-quirk-for-VL805.patch @@ -24,7 +24,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -492,6 +492,7 @@ static void xhci_pci_quirks(struct devic +@@ -493,6 +493,7 @@ static void xhci_pci_quirks(struct devic if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; diff --git a/target/linux/bcm27xx/patches-6.6/950-0483-usb-xhci-borrow-upstream-TRB_FETCH-quirk-on-VL805-ho.patch b/target/linux/bcm27xx/patches-6.6/950-0483-usb-xhci-borrow-upstream-TRB_FETCH-quirk-on-VL805-ho.patch index db80559069..e76a413d67 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0483-usb-xhci-borrow-upstream-TRB_FETCH-quirk-on-VL805-ho.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0483-usb-xhci-borrow-upstream-TRB_FETCH-quirk-on-VL805-ho.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -493,6 +493,7 @@ static void xhci_pci_quirks(struct devic +@@ -494,6 +494,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; diff --git a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch index 9af7fc8176..a7d255db40 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0484-usb-xhci-add-VLI_SS_BULK_OUT_BUG-quirk.patch @@ -90,7 +90,7 @@ Signed-off-by: Jonathan Bell /* Allow 3 retries for everything but isoc, set CErr = 3 */ --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -494,6 +494,7 @@ static void xhci_pci_quirks(struct devic +@@ -495,6 +495,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_ZHAOXIN_TRB_FETCH; diff --git a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch index 45cf1b5725..935ed89c08 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch @@ -47,7 +47,7 @@ Signed-off-by: Jonathan Bell /* Device for a quirk */ #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 -@@ -294,6 +296,16 @@ static int xhci_pci_reinit(struct xhci_h +@@ -295,6 +297,16 @@ static int xhci_pci_reinit(struct xhci_h return 0; } @@ -64,7 +64,7 @@ Signed-off-by: Jonathan Bell static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) { struct pci_dev *pdev = to_pci_dev(dev); -@@ -495,6 +507,8 @@ static void xhci_pci_quirks(struct devic +@@ -496,6 +508,8 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_ZHAOXIN_TRB_FETCH; xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; diff --git a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch index f771fc8750..7d3a139a77 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch @@ -212,7 +212,7 @@ Signed-off-by: Jonathan Bell }, --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c -@@ -1202,6 +1202,24 @@ static void dwc3_config_threshold(struct +@@ -1208,6 +1208,24 @@ static void dwc3_config_threshold(struct } } @@ -237,7 +237,7 @@ Signed-off-by: Jonathan Bell /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure -@@ -1267,6 +1285,8 @@ static int dwc3_core_init(struct dwc3 *d +@@ -1273,6 +1291,8 @@ static int dwc3_core_init(struct dwc3 *d dwc3_set_incr_burst_type(dwc); @@ -246,7 +246,7 @@ Signed-off-by: Jonathan Bell ret = dwc3_phy_power_on(dwc); if (ret) goto err_exit_phy; -@@ -1356,6 +1376,24 @@ static int dwc3_core_init(struct dwc3 *d +@@ -1362,6 +1382,24 @@ static int dwc3_core_init(struct dwc3 *d dwc3_config_threshold(dwc); @@ -271,7 +271,7 @@ Signed-off-by: Jonathan Bell return 0; err_power_off_phy: -@@ -1499,6 +1537,7 @@ static void dwc3_get_properties(struct d +@@ -1505,6 +1543,7 @@ static void dwc3_get_properties(struct d u8 tx_thr_num_pkt_prd = 0; u8 tx_max_burst_prd = 0; u8 tx_fifo_resize_max_num; @@ -279,7 +279,7 @@ Signed-off-by: Jonathan Bell const char *usb_psy_name; int ret; -@@ -1521,6 +1560,9 @@ static void dwc3_get_properties(struct d +@@ -1527,6 +1566,9 @@ static void dwc3_get_properties(struct d */ tx_fifo_resize_max_num = 6; @@ -289,7 +289,7 @@ Signed-off-by: Jonathan Bell dwc->maximum_speed = usb_get_maximum_speed(dev); dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev); dwc->dr_mode = usb_get_dr_mode(dev); -@@ -1642,6 +1684,9 @@ static void dwc3_get_properties(struct d +@@ -1648,6 +1690,9 @@ static void dwc3_get_properties(struct d dwc->dis_split_quirk = device_property_read_bool(dev, "snps,dis-split-quirk"); @@ -299,7 +299,7 @@ Signed-off-by: Jonathan Bell dwc->lpm_nyet_threshold = lpm_nyet_threshold; dwc->tx_de_emphasis = tx_de_emphasis; -@@ -1659,6 +1704,8 @@ static void dwc3_get_properties(struct d +@@ -1665,6 +1710,8 @@ static void dwc3_get_properties(struct d dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; dwc->tx_max_burst_prd = tx_max_burst_prd; @@ -308,7 +308,7 @@ Signed-off-by: Jonathan Bell dwc->imod_interval = 0; dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num; -@@ -1934,6 +1981,12 @@ static int dwc3_probe(struct platform_de +@@ -1940,6 +1987,12 @@ static int dwc3_probe(struct platform_de dwc3_get_properties(dwc); diff --git a/target/linux/bcm27xx/patches-6.6/950-0550-hwmon-Add-RP1-ADC-and-temperature-driver.patch b/target/linux/bcm27xx/patches-6.6/950-0550-hwmon-Add-RP1-ADC-and-temperature-driver.patch index ca71f80a14..2a68b62c30 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0550-hwmon-Add-RP1-ADC-and-temperature-driver.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0550-hwmon-Add-RP1-ADC-and-temperature-driver.patch @@ -13,7 +13,7 @@ Signed-off-by: Phil Elwell --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -2367,6 +2367,13 @@ config SENSORS_INTEL_M10_BMC_HWMON +@@ -2371,6 +2371,13 @@ config SENSORS_INTEL_M10_BMC_HWMON sensors monitor various telemetry data of different components on the card, e.g. board temperature, FPGA core temperature/voltage/current. diff --git a/target/linux/bcm27xx/patches-6.6/950-0585-drm-vc4-Introduce-generation-number-enum.patch b/target/linux/bcm27xx/patches-6.6/950-0585-drm-vc4-Introduce-generation-number-enum.patch index ce5361905b..0e810a1f4e 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0585-drm-vc4-Introduce-generation-number-enum.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0585-drm-vc4-Introduce-generation-number-enum.patch @@ -832,7 +832,7 @@ Signed-off-by: Maxime Ripard return; mutex_init(&vc4file->perfmon.lock); -@@ -126,7 +126,7 @@ void vc4_perfmon_close_file(struct vc4_f +@@ -131,7 +131,7 @@ void vc4_perfmon_close_file(struct vc4_f { struct vc4_dev *vc4 = vc4file->dev; @@ -841,7 +841,7 @@ Signed-off-by: Maxime Ripard return; mutex_lock(&vc4file->perfmon.lock); -@@ -146,7 +146,7 @@ int vc4_perfmon_create_ioctl(struct drm_ +@@ -151,7 +151,7 @@ int vc4_perfmon_create_ioctl(struct drm_ unsigned int i; int ret; @@ -850,7 +850,7 @@ Signed-off-by: Maxime Ripard return -ENODEV; if (!vc4->v3d) { -@@ -200,7 +200,7 @@ int vc4_perfmon_destroy_ioctl(struct drm +@@ -205,7 +205,7 @@ int vc4_perfmon_destroy_ioctl(struct drm struct drm_vc4_perfmon_destroy *req = data; struct vc4_perfmon *perfmon; @@ -859,7 +859,7 @@ Signed-off-by: Maxime Ripard return -ENODEV; if (!vc4->v3d) { -@@ -228,7 +228,7 @@ int vc4_perfmon_get_values_ioctl(struct +@@ -233,7 +233,7 @@ int vc4_perfmon_get_values_ioctl(struct struct vc4_perfmon *perfmon; int ret; diff --git a/target/linux/bcm27xx/patches-6.6/950-0586-drm-vc4-Make-v3d-paths-unavailable-on-any-generation.patch b/target/linux/bcm27xx/patches-6.6/950-0586-drm-vc4-Make-v3d-paths-unavailable-on-any-generation.patch index 04aa4bc0bb..9ab0a6d152 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0586-drm-vc4-Make-v3d-paths-unavailable-on-any-generation.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0586-drm-vc4-Make-v3d-paths-unavailable-on-any-generation.patch @@ -432,7 +432,7 @@ Signed-off-by: Maxime Ripard return; mutex_init(&vc4file->perfmon.lock); -@@ -126,7 +126,7 @@ void vc4_perfmon_close_file(struct vc4_f +@@ -131,7 +131,7 @@ void vc4_perfmon_close_file(struct vc4_f { struct vc4_dev *vc4 = vc4file->dev; @@ -441,7 +441,7 @@ Signed-off-by: Maxime Ripard return; mutex_lock(&vc4file->perfmon.lock); -@@ -146,7 +146,7 @@ int vc4_perfmon_create_ioctl(struct drm_ +@@ -151,7 +151,7 @@ int vc4_perfmon_create_ioctl(struct drm_ unsigned int i; int ret; @@ -450,7 +450,7 @@ Signed-off-by: Maxime Ripard return -ENODEV; if (!vc4->v3d) { -@@ -200,7 +200,7 @@ int vc4_perfmon_destroy_ioctl(struct drm +@@ -205,7 +205,7 @@ int vc4_perfmon_destroy_ioctl(struct drm struct drm_vc4_perfmon_destroy *req = data; struct vc4_perfmon *perfmon; @@ -459,7 +459,7 @@ Signed-off-by: Maxime Ripard return -ENODEV; if (!vc4->v3d) { -@@ -228,7 +228,7 @@ int vc4_perfmon_get_values_ioctl(struct +@@ -233,7 +233,7 @@ int vc4_perfmon_get_values_ioctl(struct struct vc4_perfmon *perfmon; int ret; diff --git a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch index e089be3f37..557bb033ef 100644 --- a/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch +++ b/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch @@ -16,7 +16,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c -@@ -1366,6 +1366,9 @@ static int dwc3_core_init(struct dwc3 *d +@@ -1372,6 +1372,9 @@ static int dwc3_core_init(struct dwc3 *d if (dwc->parkmode_disable_hs_quirk) reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS; @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) && (dwc->maximum_speed == USB_SPEED_HIGH || dwc->maximum_speed == USB_SPEED_FULL)) -@@ -1664,6 +1667,8 @@ static void dwc3_get_properties(struct d +@@ -1670,6 +1673,8 @@ static void dwc3_get_properties(struct d "snps,parkmode-disable-ss-quirk"); dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev, "snps,parkmode-disable-hs-quirk"); diff --git a/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch b/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch index b05a8276df..3049223910 100644 --- a/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch +++ b/target/linux/bcm27xx/patches-6.6/950-1141-fs-ntfs3-Fix-memory-corruption-when-page_size-change.patch @@ -25,7 +25,7 @@ Signed-off-by: Dom Cobley --- a/fs/ntfs3/fslog.c +++ b/fs/ntfs3/fslog.c -@@ -3914,6 +3914,8 @@ check_restart_area: +@@ -3929,6 +3929,8 @@ check_restart_area: log->l_size = log->orig_file_size; log->page_size = norm_file_page(t32, &log->l_size, t32 == DefaultLogPageSize); diff --git a/target/linux/gemini/patches-6.6/0001-net-ethernet-cortina-Drop-TSO-support.patch b/target/linux/gemini/patches-6.6/0001-net-ethernet-cortina-Drop-TSO-support.patch deleted file mode 100644 index 6fbd0487eb..0000000000 --- a/target/linux/gemini/patches-6.6/0001-net-ethernet-cortina-Drop-TSO-support.patch +++ /dev/null @@ -1,78 +0,0 @@ -From f8001196455311eb128fcafd98cb2050a70218df Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Sat, 6 Jan 2024 01:12:22 +0100 -Subject: [PATCH 4/4] net: ethernet: cortina: Drop TSO support - -The recent change to allow large frames without hardware checksumming -slotted in software checksumming in the driver if hardware could not -do it. - -This will however upset TSO (TCP Segment Offloading). Typical -error dumps includes this: - -skb len=2961 headroom=222 headlen=66 tailroom=0 -(...) -WARNING: CPU: 0 PID: 956 at net/core/dev.c:3259 skb_warn_bad_offload+0x7c/0x108 -gemini-ethernet-port: caps=(0x0000010000154813, 0x00002007ffdd7889) - -And the packets do not go through. - -The TSO implementation is bogus: a TSO enabled driver must propagate -the skb_shinfo(skb)->gso_size value to the TSO engine on the NIC. - -Drop the size check and TSO offloading features for now: this -needs to be fixed up properly. - -After this ethernet works fine on Gemini devices with a direct connected -PHY such as D-Link DNS-313. - -Also tested to still be working with a DSA switch using the Gemini -ethernet as conduit interface. - -Link: https://lore.kernel.org/netdev/CANn89iJLfxng1sYL5Zk0mknXpyYQPCp83m3KgD2KJ2_hKCpEUg@mail.gmail.com/ -Suggested-by: Eric Dumazet -Fixes: d4d0c5b4d279 ("net: ethernet: cortina: Handle large frames") -Signed-off-by: Linus Walleij -Reviewed-by: Eric Dumazet -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/cortina/gemini.c | 15 ++------------- - 1 file changed, 2 insertions(+), 13 deletions(-) - ---- a/drivers/net/ethernet/cortina/gemini.c -+++ b/drivers/net/ethernet/cortina/gemini.c -@@ -79,8 +79,7 @@ MODULE_PARM_DESC(debug, "Debug level (0= - #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) - - #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ -- NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ -- NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) -+ NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM) - - /** - * struct gmac_queue_page - page buffer per-page info -@@ -1148,23 +1147,13 @@ static int gmac_map_tx_bufs(struct net_d - struct gmac_txdesc *txd; - skb_frag_t *skb_frag; - dma_addr_t mapping; -- unsigned short mtu; - void *buffer; - int ret; - -- mtu = ETH_HLEN; -- mtu += netdev->mtu; -- if (skb->protocol == htons(ETH_P_8021Q)) -- mtu += VLAN_HLEN; -- -+ /* TODO: implement proper TSO using MTU in word3 */ - word1 = skb->len; - word3 = SOF_BIT; - -- if (word1 > mtu) { -- word1 |= TSS_MTU_ENABLE_BIT; -- word3 |= mtu; -- } -- - if (skb->len >= ETH_FRAME_LEN) { - /* Hardware offloaded checksumming isn't working on frames - * bigger than 1514 bytes. A hypothesis about this is that the diff --git a/target/linux/gemini/patches-6.6/0004-net-ethernet-cortina-Restore-TSO-support.patch b/target/linux/gemini/patches-6.6/0004-net-ethernet-cortina-Restore-TSO-support.patch deleted file mode 100644 index 809941a95d..0000000000 --- a/target/linux/gemini/patches-6.6/0004-net-ethernet-cortina-Restore-TSO-support.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 30fcba19ed88997a2909e4a68b4d39ff371357c3 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Wed, 1 May 2024 21:46:31 +0200 -Subject: [PATCH 1/5] net: ethernet: cortina: Restore TSO support - -An earlier commit deleted the TSO support in the Cortina Gemini -driver because the driver was confusing gso_size and MTU, -probably because what the Linux kernel calls "gso_size" was -called "MTU" in the datasheet. - -Restore the functionality properly reading the gso_size from -the skbuff. - -Tested with iperf3, running a server on a different machine -and client on the device with the cortina gemini ethernet: - -Connecting to host 192.168.1.2, port 5201 -60008000.ethernet-port eth0: segment offloading mss = 05ea len=1c8a -60008000.ethernet-port eth0: segment offloading mss = 05ea len=1c8a -60008000.ethernet-port eth0: segment offloading mss = 05ea len=27da -60008000.ethernet-port eth0: segment offloading mss = 05ea len=0b92 -60008000.ethernet-port eth0: segment offloading mss = 05ea len=2bda -(...) - -(The hardware MSS 0x05ea here includes the ethernet headers.) - -If I disable all segment offloading on the receiving host and -dump packets using tcpdump -xx like this: - -ethtool -K enp2s0 gro off gso off tso off -tcpdump -xx -i enp2s0 host 192.168.1.136 - -I get segmented packages such as this when running iperf3: - -23:16:54.024139 IP OpenWrt.lan.59168 > Fecusia.targus-getdata1: -Flags [.], seq 1486:2934, ack 1, win 4198, -options [nop,nop,TS val 3886192908 ecr 3601341877], length 1448 -0x0000: fc34 9701 a0c6 14d6 4da8 3c4f 0800 4500 -0x0010: 05dc 16a0 4000 4006 9aa1 c0a8 0188 c0a8 -0x0020: 0102 e720 1451 ff25 9822 4c52 29cf 8010 -0x0030: 1066 ac8c 0000 0101 080a e7a2 990c d6a8 -(...) -0x05c0: 5e49 e109 fe8c 4617 5e18 7a82 7eae d647 -0x05d0: e8ee ae64 dc88 c897 3f8a 07a4 3a33 6b1b -0x05e0: 3501 a30f 2758 cc44 4b4a - -Several such packets often follow after each other verifying -the segmentation into 0x05a8 (1448) byte packages also on the -reveiving end. As can be seen, the ethernet frames are -0x05ea (1514) in size. - -Performance with iperf3 before this patch: ~15.5 Mbit/s -Performance with iperf3 after this patch: ~175 Mbit/s - -This was running a 60 second test (twice) the best measurement -was 179 Mbit/s. - -For comparison if I run iperf3 with UDP I get around 1.05 Mbit/s -both before and after this patch. - -While this is a gigabit ethernet interface, the CPU is a cheap -D-Link DIR-685 router (based on the ARMv5 Faraday FA526 at -~50 MHz), and the software is not supposed to drive traffic, -as the device has a DSA chip, so this kind of numbers can be -expected. - -Fixes: ac631873c9e7 ("net: ethernet: cortina: Drop TSO support") -Reviewed-by: Eric Dumazet -Signed-off-by: Linus Walleij ---- - drivers/net/ethernet/cortina/gemini.c | 23 +++++++++++++++++++---- - 1 file changed, 19 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/cortina/gemini.c -+++ b/drivers/net/ethernet/cortina/gemini.c -@@ -79,7 +79,8 @@ MODULE_PARM_DESC(debug, "Debug level (0= - #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) - - #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ -- NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM) -+ NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ -+ NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) - - /** - * struct gmac_queue_page - page buffer per-page info -@@ -1148,13 +1149,25 @@ static int gmac_map_tx_bufs(struct net_d - skb_frag_t *skb_frag; - dma_addr_t mapping; - void *buffer; -+ u16 mss; - int ret; - -- /* TODO: implement proper TSO using MTU in word3 */ - word1 = skb->len; - word3 = SOF_BIT; - -- if (skb->len >= ETH_FRAME_LEN) { -+ mss = skb_shinfo(skb)->gso_size; -+ if (mss) { -+ /* This means we are dealing with TCP and skb->len is the -+ * sum total of all the segments. The TSO will deal with -+ * chopping this up for us. -+ */ -+ /* The accelerator needs the full frame size here */ -+ mss += skb_tcp_all_headers(skb); -+ netdev_dbg(netdev, "segment offloading mss = %04x len=%04x\n", -+ mss, skb->len); -+ word1 |= TSS_MTU_ENABLE_BIT; -+ word3 |= mss; -+ } else if (skb->len >= ETH_FRAME_LEN) { - /* Hardware offloaded checksumming isn't working on frames - * bigger than 1514 bytes. A hypothesis about this is that the - * checksum buffer is only 1518 bytes, so when the frames get -@@ -1169,7 +1182,9 @@ static int gmac_map_tx_bufs(struct net_d - return ret; - } - word1 |= TSS_BYPASS_BIT; -- } else if (skb->ip_summed == CHECKSUM_PARTIAL) { -+ } -+ -+ if (skb->ip_summed == CHECKSUM_PARTIAL) { - int tcp = 0; - - /* We do not switch off the checksumming on non TCP/UDP diff --git a/target/linux/generic/backport-6.6/777-netfilter-xtables-fix-typo-causing-some-targets-to-not-load-on-IPv6.patch b/target/linux/generic/backport-6.6/777-netfilter-xtables-fix-typo-causing-some-targets-to-not-load-on-IPv6.patch new file mode 100644 index 0000000000..d29c7d463d --- /dev/null +++ b/target/linux/generic/backport-6.6/777-netfilter-xtables-fix-typo-causing-some-targets-to-not-load-on-IPv6.patch @@ -0,0 +1,43 @@ +Subject: [PATCH v2] netfilter: xtables: fix typo causing some targets to not load on IPv6 +Date: Sat, 19 Oct 2024 08:05:07 +0300 [thread overview] +Message-ID: <20241019-xtables-typos-v2-1-6b8b1735dc8e@0upti.me> (raw) + +These were added with the wrong family in 4cdc55e, which seems +to just have been a typo, but now ip6tables rules with --set-mark +don't work anymore, which is pretty bad. + +Fixes: 0bfcb7b71e73 ("netfilter: xtables: avoid NFPROTO_UNSPEC where needed") +Reviewed-by: Phil Sutter +Signed-off-by: Ilya Katsnelson +--- +Changes in v2: +- Fixed a typo in the commit message (that's karma). +- Replaced a reference to backport commit. +- Link to v1: https://lore.kernel.org/r/20241018-xtables-typos-v1-1-02a51789c0ec@0upti.me +--- + net/netfilter/xt_NFLOG.c | 2 +- + net/netfilter/xt_mark.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/net/netfilter/xt_NFLOG.c ++++ b/net/netfilter/xt_NFLOG.c +@@ -79,7 +79,7 @@ static struct xt_target nflog_tg_reg[] _ + { + .name = "NFLOG", + .revision = 0, +- .family = NFPROTO_IPV4, ++ .family = NFPROTO_IPV6, + .checkentry = nflog_tg_check, + .destroy = nflog_tg_destroy, + .target = nflog_tg, +--- a/net/netfilter/xt_mark.c ++++ b/net/netfilter/xt_mark.c +@@ -62,7 +62,7 @@ static struct xt_target mark_tg_reg[] __ + { + .name = "MARK", + .revision = 2, +- .family = NFPROTO_IPV4, ++ .family = NFPROTO_IPV6, + .target = mark_tg, + .targetsize = sizeof(struct xt_mark_tginfo2), + .me = THIS_MODULE, diff --git a/target/linux/generic/backport-6.6/835-v6.9-net-phy-add-support-for-PHY-LEDs-polarity-modes.patch b/target/linux/generic/backport-6.6/835-v6.9-net-phy-add-support-for-PHY-LEDs-polarity-modes.patch index 104f961c02..1fe0e3f890 100644 --- a/target/linux/generic/backport-6.6/835-v6.9-net-phy-add-support-for-PHY-LEDs-polarity-modes.patch +++ b/target/linux/generic/backport-6.6/835-v6.9-net-phy-add-support-for-PHY-LEDs-polarity-modes.patch @@ -28,7 +28,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -3201,6 +3201,7 @@ static int of_phy_led(struct phy_device +@@ -3202,6 +3202,7 @@ static int of_phy_led(struct phy_device struct device *dev = &phydev->mdio.dev; struct led_init_data init_data = {}; struct led_classdev *cdev; @@ -36,7 +36,7 @@ Signed-off-by: Jakub Kicinski struct phy_led *phyled; u32 index; int err; -@@ -3218,6 +3219,21 @@ static int of_phy_led(struct phy_device +@@ -3219,6 +3220,21 @@ static int of_phy_led(struct phy_device if (index > U8_MAX) return -EINVAL; diff --git a/target/linux/generic/backport-6.6/841-v6.13-net-phy-support-active-high-property-for-PHY-LEDs.patch b/target/linux/generic/backport-6.6/841-v6.13-net-phy-support-active-high-property-for-PHY-LEDs.patch index 02706ccd3f..729a315623 100644 --- a/target/linux/generic/backport-6.6/841-v6.13-net-phy-support-active-high-property-for-PHY-LEDs.patch +++ b/target/linux/generic/backport-6.6/841-v6.13-net-phy-support-active-high-property-for-PHY-LEDs.patch @@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -3219,11 +3219,17 @@ static int of_phy_led(struct phy_device +@@ -3220,11 +3220,17 @@ static int of_phy_led(struct phy_device if (index > U8_MAX) return -EINVAL; diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6 index 124bda430d..a2864a236a 100644 --- a/target/linux/generic/config-6.6 +++ b/target/linux/generic/config-6.6 @@ -2291,6 +2291,7 @@ CONFIG_HARDEN_BRANCH_HISTORY=y # CONFIG_HID_MAGICMOUSE is not set # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MCP2200 is not set # CONFIG_HID_MCP2221 is not set # CONFIG_HID_MEGAWORLD_FF is not set # CONFIG_HID_MICROSOFT is not set diff --git a/target/linux/generic/hack-6.6/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-6.6/645-netfilter-connmark-introduce-set-dscpmark.patch index 444f8edfea..bb802857d6 100644 --- a/target/linux/generic/hack-6.6/645-netfilter-connmark-introduce-set-dscpmark.patch +++ b/target/linux/generic/hack-6.6/645-netfilter-connmark-introduce-set-dscpmark.patch @@ -195,20 +195,37 @@ Signed-off-by: Kevin Darbyshire-Bryant return connmark_tg_shift(skb, info); } -@@ -167,6 +194,16 @@ static struct xt_target connmark_tg_reg[ - .targetsize = sizeof(struct xt_connmark_tginfo2), +@@ -168,6 +195,16 @@ static struct xt_target connmark_tg_reg[ .destroy = connmark_tg_destroy, .me = THIS_MODULE, -+ }, + }, + { + .name = "CONNMARK", + .revision = 3, -+ .family = NFPROTO_UNSPEC, ++ .family = NFPROTO_IPV4, + .checkentry = connmark_tg_check, + .target = connmark_tg_v3, + .targetsize = sizeof(struct xt_connmark_tginfo3), + .destroy = connmark_tg_destroy, + .me = THIS_MODULE, - } ++ }, + #if IS_ENABLED(CONFIG_IP6_NF_IPTABLES) + { + .name = "CONNMARK", +@@ -189,6 +226,16 @@ static struct xt_target connmark_tg_reg[ + .destroy = connmark_tg_destroy, + .me = THIS_MODULE, + }, ++ { ++ .name = "CONNMARK", ++ .revision = 3, ++ .family = NFPROTO_IPV6, ++ .checkentry = connmark_tg_check, ++ .target = connmark_tg_v3, ++ .targetsize = sizeof(struct xt_connmark_tginfo3), ++ .destroy = connmark_tg_destroy, ++ .me = THIS_MODULE, ++ }, + #endif }; diff --git a/target/linux/generic/pending-6.6/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-6.6/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch index 2e5d956437..96e1a19db4 100644 --- a/target/linux/generic/pending-6.6/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch +++ b/target/linux/generic/pending-6.6/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch @@ -161,7 +161,7 @@ Signed-off-by: Felix Fietkau struct rtnl_link { rtnl_doit_func doit; -@@ -4949,7 +4949,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu +@@ -4978,7 +4978,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu brport_nla_put_flag(skb, flags, mask, IFLA_BRPORT_MCAST_FLOOD, BR_MCAST_FLOOD) || brport_nla_put_flag(skb, flags, mask, diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi index 961b4be56b..bf2fc0e37e 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-mf287_common.dtsi @@ -159,10 +159,6 @@ label = "lan4"; }; -&qpic_bam { - status = "okay"; -}; - &usb2_hs_phy { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts index f895e2c110..8515f3c034 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts @@ -149,10 +149,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { mdio_pins: mdio_pinmux { mux_1 { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts index 9300568986..e065ef0168 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac-c2.dts @@ -114,6 +114,10 @@ }; }; +&qpic_bam { + status = "okay"; +}; + &tlmm { nand_pins: nand-pins { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi index 119ba4b7fe..352c05e856 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-e2600ac.dtsi @@ -116,10 +116,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { i2c_0_pins: i2c-0-pinmux { mux { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts index 52af1f125e..b1a04012fb 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-hap-ac3-lte6-kit.dts @@ -227,10 +227,6 @@ }; }; -&qpic_bam { - status = "okay"; -}; - &blsp1_uart1 { status = "okay"; pinctrl-0 = <&serial_pins>; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts index 7c0194ccc0..f5a985b6d1 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-mf289f.dts @@ -339,10 +339,6 @@ label = "lan"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { i2c_0_pins: i2c_0_pinmux { mux { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi index bd7565ac02..0418176066 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-orbi.dtsi @@ -132,10 +132,6 @@ vqmmc-supply = <&vqmmc>; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { mdio_pins: mdio_pinmux { mux_1 { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi index 67d9f21f71..db00859878 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-u4019.dtsi @@ -90,10 +90,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { mdio_pins: mdio_pinmux { mux_1 { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi index ce8d66680a..54e3cc7818 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03.dtsi @@ -249,10 +249,6 @@ }; }; -&qpic_bam { - status = "okay"; -}; - &gmac { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts index d6aaf93b29..3db61b1e37 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-whw03v2.dts @@ -202,6 +202,10 @@ }; }; +&qpic_bam { + status = "okay"; +}; + &swport4 { nvmem-cell-names = "mac-address"; nvmem-cells = <&macaddr_gmac1>; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts index cb7d3a918f..644329419d 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts @@ -312,10 +312,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &switch { status = "okay"; }; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi index b494d0ab1c..16b2cd3c80 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-x1pro.dtsi @@ -91,10 +91,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { mdio_pins: mdio_pinmux { mux_1 { diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts index 823431dcf1..6227027266 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts @@ -132,10 +132,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &tlmm { /* * In addition to the Pins listed below, diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts index 3bf9f8c42b..48e0bb903e 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap3915i.dts @@ -114,10 +114,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &mdio { status = "okay"; pinctrl-0 = <&mdio_pins>; diff --git a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts index 04b55b1abf..1eb6ea2eb8 100644 --- a/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts +++ b/target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ws-ap391x.dts @@ -171,10 +171,6 @@ status = "okay"; }; -&qpic_bam { - status = "okay"; -}; - &gmac { status = "okay"; }; diff --git a/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch index b796de9c11..3dd996bccc 100644 --- a/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch +++ b/target/linux/lantiq/patches-6.6/0001-MIPS-lantiq-add-pcie-driver.patch @@ -5535,7 +5535,7 @@ Signed-off-by: John Crispin unsigned long type); --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h -@@ -1108,6 +1108,12 @@ +@@ -1110,6 +1110,12 @@ #define PCI_DEVICE_ID_SGI_IOC3 0x0003 #define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 diff --git a/target/linux/mediatek/files/drivers/leds/leds-smartrg-system.c b/target/linux/mediatek/files/drivers/leds/leds-smartrg-system.c index 5e1e3a3542..c1770aa81b 100644 --- a/target/linux/mediatek/files/drivers/leds/leds-smartrg-system.c +++ b/target/linux/mediatek/files/drivers/leds/leds-smartrg-system.c @@ -163,6 +163,7 @@ srg_led_probe(struct i2c_client *client) { struct device_node *np = client->dev.of_node, *child; struct srg_led_ctrl *sysled_ctrl; + int err; sysled_ctrl = devm_kzalloc(&client->dev, sizeof(*sysled_ctrl), GFP_KERNEL); if (!sysled_ctrl) @@ -170,11 +171,13 @@ srg_led_probe(struct i2c_client *client) sysled_ctrl->client = client; - mutex_init(&sysled_ctrl->lock); + err = devm_mutex_init(&client->dev, &sysled_ctrl->lock); + if (err) + return err; i2c_set_clientdata(client, sysled_ctrl); - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { if (srg_led_init_led(sysled_ctrl, child)) continue; @@ -193,15 +196,6 @@ static void srg_led_disable(struct i2c_client *client) srg_led_i2c_write(sysled_ctrl, i, 0); } -static void -srg_led_remove(struct i2c_client *client) -{ - struct srg_led_ctrl *sysled_ctrl = i2c_get_clientdata(client); - - srg_led_disable(client); - mutex_destroy(&sysled_ctrl->lock); -} - static const struct i2c_device_id srg_led_id[] = { { "srg-sysled", 0 }, { } @@ -220,7 +214,7 @@ static struct i2c_driver srg_sysled_driver = { .of_match_table = of_srg_led_match, }, .probe = srg_led_probe, - .remove = srg_led_remove, + .remove = srg_led_disable, .id_table = srg_led_id, }; module_i2c_driver(srg_sysled_driver); diff --git a/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch b/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch index d4a533917b..983434e666 100644 --- a/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch +++ b/target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch @@ -26,7 +26,7 @@ Cc: Robert Marko --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -783,6 +783,14 @@ config SENSORS_IBMPOWERNV +@@ -785,6 +785,14 @@ config SENSORS_IBMPOWERNV This driver can also be built as a module. If so, the module will be called ibmpowernv. diff --git a/target/linux/ramips/dts/mt7621_gemtek_wvrtm-127acn.dts b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-127acn.dts new file mode 100644 index 0000000000..5cc287f6cc --- /dev/null +++ b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-127acn.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_gemtek_wvrtm-1xxacn.dtsi" + +/ { + compatible = "gemtek,wvrtm-127acn", "mediatek,mt7621-soc"; + model = "Gemtek WVRTM-127ACN"; +}; + +&nvmem_layout { + eeprom_factory_8000: eeprom@8000 { + reg = <0x8000 0x200>; + }; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_8000>; + nvmem-cell-names = "eeprom"; + ieee80211-freq-limit = <5000000 6000000>; + + led { + led-sources = <2>; + led-active-low; + }; + }; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>; + nvmem-cell-names = "eeprom", "mac-address"; + ieee80211-freq-limit = <2400000 2500000>; + + led { + led-sources = <0>; + led-active-low; + }; + }; +}; + +&ports { + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan1"; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_gemtek_wvrtm-130acn.dts b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-130acn.dts new file mode 100644 index 0000000000..eb5c079901 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-130acn.dts @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_gemtek_wvrtm-1xxacn.dtsi" + +/ { + compatible = "gemtek,wvrtm-130acn", "mediatek,mt7621-soc"; + model = "Gemtek WVRTM-130ACN"; +}; + +&eeprom_factory_0 { + reg = <0x0 0x4da8>; +}; + +&macaddr_factory_4 { + compatible = "mac-base"; + #nvmem-cell-cells = <1>; +}; + +&keys { + button-2 { + label = "power"; + gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + linux,code = ; + }; +}; + +&leds { + led-7 { + gpios = <&gpio_hc595 7 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_WPS; + color = ; + }; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + #address-cells = <2>; + #size-cells = <0>; + + band@0 { + /* 2.4 GHz */ + reg = <0>; + nvmem-cells = <&macaddr_factory_4 (-1)>; + nvmem-cell-names = "mac-address"; + /* led_pin 0 */ + }; + + band@1 { + /* 5 GHz */ + reg = <1>; + nvmem-cells = <&macaddr_factory_4 0>; + nvmem-cell-names = "mac-address"; + /* led_pin 2 */ + }; + + led { + led-sources = <2>; + led-active-low; + }; + }; +}; + +&ports { + port@0 { + status = "okay"; + label = "lan1"; + }; + + port@1 { + status = "okay"; + label = "lan2"; + }; + + port@2 { + status = "okay"; + label = "lan3"; + }; + + port@3 { + status = "okay"; + label = "lan4"; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_gemtek_wvrtm-1xxacn.dtsi b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-1xxacn.dtsi new file mode 100644 index 0000000000..da334508ec --- /dev/null +++ b/target/linux/ramips/dts/mt7621_gemtek_wvrtm-1xxacn.dtsi @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" +#include +#include +#include + +/ { + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + label-mac-device = &gmac0; + }; + + chosen { + bootargs-override = "console=ttyS0,115200n1"; + }; + + gpio-export { + compatible = "gpio-export"; + + poe_24v_port4 { + gpio-export,name = "24v-poe:port4"; + gpio-export,output = <0>; + gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + }; + }; + + keys: keys { + compatible = "gpio-keys"; + + button-0 { + label = "wps"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + button-1 { + label = "reset"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + num-chipselects = <0>; + + gpio_hc595: gpio_hc595@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <1000000>; + }; + }; + + leds: leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&gpio_hc595 0 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_INDICATOR; + color = ; + function-enumerator = <0>; + }; + + led-1 { + gpios = <&gpio_hc595 1 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_INDICATOR; + color = ; + function-enumerator = <1>; + }; + + led-2 { + gpios = <&gpio_hc595 2 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_INDICATOR; + color = ; + function-enumerator = <2>; + }; + + led-3 { + gpios = <&gpio_hc595 3 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_INDICATOR; + color = ; + function-enumerator = <3>; + }; + + led-4 { + gpios = <&gpio_hc595 4 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_INDICATOR; + color = ; + function-enumerator = <4>; + }; + + led_power: led-5 { + gpios = <&gpio_hc595 5 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_POWER; + color = ; + }; + + led-6 { + gpios = <&gpio_hc595 6 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_STATUS; + color = ; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x8000000>; + }; + + reg_usb_vbus: regulator { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ubi-concat { + compatible = "mtd-concat"; + devices = <&ubiconcat0 &ubiconcat1 &ubiconcat2 &ubiconcat3>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x0 0x7380000>; + }; + }; + }; +}; + +ðernet { + pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_e000>; + nvmem-cell-names = "mac-address"; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "u-boot2"; + reg = <0x100000 0x100000>; + read-only; + }; + + partition@200000 { + label = "factory"; + reg = <0x200000 0x100000>; + read-only; + + nvmem_layout: nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x200>; + }; + + macaddr_factory_4: eeprom@4 { + reg = <0x4 0x6>; + }; + + macaddr_factory_e000: macaddr@e000 { + reg = <0xe000 0x6>; + }; + }; + }; + + partition@300000 { + label = "u-boot-env"; + reg = <0x300000 0x280000>; + read-only; + }; + + partition@580000 { + label = "u-boot-env2"; + reg = <0x580000 0x280000>; + read-only; + }; + + partition@800000 { + label = "firmware"; + reg = <0x800000 0x2000000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + ubiconcat0: partition@400000 { + label = "ubiconcat0"; + reg = <0x400000 0x1c00000>; + }; + }; + + ubiconcat1: partition@2800000 { + label = "Kernel2"; + reg = <0x2800000 0x2000000>; + }; + + ubiconcat2: partition@4800000 { + label = "Storage1"; + reg = <0x4800000 0x1c00000>; + }; + + ubiconcat3: partition@6400000 { + label = "Storage2"; + reg = <0x6400000 0x1b80000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&sdhci { + status = "okay"; +}; + +&state_default { + gpio { + groups = "rgmii2", "uart3"; + function = "gpio"; + }; +}; + +&switch0 { + ports: ports { + port@4 { + status = "okay"; + label = "wan"; + nvmem-cells = <&macaddr_factory_e000>; + nvmem-cell-names = "mac-address"; + }; + }; +}; + +&xhci { + vbus-supply = <®_usb_vbus>; + vusb33-supply = <®_3p3v>; +}; diff --git a/target/linux/ramips/dts/mt7621_mikrotik_routerboard-760igs.dts b/target/linux/ramips/dts/mt7621_mikrotik_routerboard-760igs.dts index c9d07cf96c..ba2cc4556a 100644 --- a/target/linux/ramips/dts/mt7621_mikrotik_routerboard-760igs.dts +++ b/target/linux/ramips/dts/mt7621_mikrotik_routerboard-760igs.dts @@ -4,7 +4,7 @@ / { compatible = "mikrotik,routerboard-760igs", "mediatek,mt7621-soc"; - model = "MikroTik RouterBOARD 760iGS"; + model = "MikroTik RouterBOARD 760iGS (hEX S)"; aliases { led-boot = &led_pwr; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 8b050f869c..d99eb881b3 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -1384,6 +1384,29 @@ define Device/gehua_ghl-r-001 endef TARGET_DEVICES += gehua_ghl-r-001 +define Device/gemtek_wvrtm-1xxacn + $(Device/nand) + $(Device/uimage-lzma-loader) + IMAGE_SIZE := 122368k + DEVICE_VENDOR := Gemtek + DEVICE_PACKAGES := kmod-gpio-nxp-74hc164 kmod-spi-gpio \ + kmod-usb3 -uboot-envtools +endef + +define Device/gemtek_wvrtm-127acn + $(Device/gemtek_wvrtm-1xxacn) + DEVICE_MODEL := WVRTM-127ACN + DEVICE_PACKAGES += kmod-mt7603 kmod-mt76x2 +endef +TARGET_DEVICES += gemtek_wvrtm-127acn + +define Device/gemtek_wvrtm-130acn + $(Device/gemtek_wvrtm-1xxacn) + DEVICE_MODEL := WVRTM-130ACN + DEVICE_PACKAGES += kmod-mt7615-firmware +endef +TARGET_DEVICES += gemtek_wvrtm-130acn + define Device/glinet_gl-mt1300 $(Device/dsa-migration) IMAGE_SIZE := 32448k diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index 2c0e090876..c84fbaeb7a 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -81,6 +81,7 @@ ramips_setup_interfaces() beeline,smartbox-giga|\ elecom,wmc-x1800gst|\ elecom,wrc-x1800gs|\ + gemtek,wvrtm-127acn|\ glinet,gl-mt1300|\ iodata,wn-deax1800gr|\ iptime,a3002mesh|\ diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index bdbcc8b3f9..2055bf2e9d 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -99,6 +99,8 @@ platform_do_upgrade() { h3c,tx1806|\ haier,har-20s2u1|\ hiwifi,hc5962|\ + gemtek,wvrtm-127acn|\ + gemtek,wvrtm-130acn|\ iptime,a3004t|\ iptime,ax2004m|\ iptime,t5004|\ diff --git a/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch b/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch index 318039fb4c..f0d8c80fd5 100644 --- a/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch +++ b/target/linux/ramips/patches-6.6/821-SPI-ralink-add-Ralink-SoC-spi-driver.patch @@ -41,7 +41,7 @@ Acked-by: John Crispin obj-$(CONFIG_SPI_SC18IS602) += spi-sc18is602.o --- /dev/null +++ b/drivers/spi/spi-rt2880.c -@@ -0,0 +1,519 @@ +@@ -0,0 +1,473 @@ +/* + * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver + * @@ -167,8 +167,6 @@ Acked-by: John Crispin +#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \ + SPI_CS_HIGH) + -+static atomic_t hw_reset_count = ATOMIC_INIT(0); -+ +struct rt2880_spi { + struct spi_master *master; + void __iomem *base; @@ -451,33 +449,25 @@ Acked-by: John Crispin + +static int rt2880_spi_probe(struct platform_device *pdev) +{ ++ struct device *dev = &pdev->dev; + struct spi_master *master; + struct rt2880_spi *rs; + void __iomem *base; -+ struct resource *r; + struct clk *clk; + int ret; + -+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ base = devm_ioremap_resource(&pdev->dev, r); ++ base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + -+ clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(clk)) { -+ dev_err(&pdev->dev, "unable to get SYS clock\n"); -+ return PTR_ERR(clk); -+ } ++ clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(clk)) ++ return dev_err_probe(dev, PTR_ERR(clk), "unable to get SYS clock"); + -+ ret = clk_prepare_enable(clk); -+ if (ret) -+ goto err_clk; -+ -+ master = spi_alloc_master(&pdev->dev, sizeof(*rs)); -+ if (master == NULL) { -+ dev_dbg(&pdev->dev, "master allocation failed\n"); -+ ret = -ENOMEM; -+ goto err_clk; ++ master = devm_spi_alloc_master(dev, sizeof(*rs)); ++ if (!master) { ++ dev_err(dev, "master allocation failed\n"); ++ return -ENOMEM; + } + + master->dev.of_node = pdev->dev.of_node; @@ -491,50 +481,16 @@ Acked-by: John Crispin + master->set_cs = rt2880_spi_set_cs; + master->transfer_one = rt2880_spi_transfer_one, + -+ dev_set_drvdata(&pdev->dev, master); -+ + rs = spi_master_get_devdata(master); + rs->master = master; + rs->base = base; + rs->clk = clk; + -+ if (atomic_inc_return(&hw_reset_count) == 1) { -+ ret = device_reset(&pdev->dev); -+ if (ret) { -+ dev_err(&pdev->dev, "device_reset error.\n"); -+ goto err_master; -+ } -+ } ++ ret = device_reset(&pdev->dev); ++ if (ret) ++ return ret; + -+ ret = devm_spi_register_master(&pdev->dev, master); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "devm_spi_register_master error.\n"); -+ goto err_master; -+ } -+ -+ return ret; -+ -+err_master: -+ spi_master_put(master); -+ kfree(master); -+err_clk: -+ clk_disable_unprepare(clk); -+ -+ return ret; -+} -+ -+static int rt2880_spi_remove(struct platform_device *pdev) -+{ -+ struct spi_master *master; -+ struct rt2880_spi *rs; -+ -+ master = dev_get_drvdata(&pdev->dev); -+ rs = spi_master_get_devdata(master); -+ -+ clk_disable_unprepare(rs->clk); -+ atomic_dec(&hw_reset_count); -+ -+ return 0; ++ return devm_spi_register_master(dev, master); +} + +MODULE_ALIAS("platform:" DRIVER_NAME); @@ -548,11 +504,9 @@ Acked-by: John Crispin +static struct platform_driver rt2880_spi_driver = { + .driver = { + .name = DRIVER_NAME, -+ .owner = THIS_MODULE, + .of_match_table = rt2880_spi_match, + }, + .probe = rt2880_spi_probe, -+ .remove = rt2880_spi_remove, +}; + +module_platform_driver(rt2880_spi_driver); diff --git a/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch b/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch index 8e1095ab00..4a7ad8f6fa 100644 --- a/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch +++ b/target/linux/ramips/patches-6.6/835-asoc-add-mt7620-support.patch @@ -5,7 +5,6 @@ Subject: [PATCH 48/53] asoc: add mt7620 support Signed-off-by: John Crispin --- - arch/mips/ralink/of.c | 2 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/ralink/Kconfig | 15 ++ @@ -60,7 +59,7 @@ Signed-off-by: John Crispin +obj-$(CONFIG_SND_RALINK_SOC_I2S) += snd-soc-ralink-i2s.o --- /dev/null +++ b/sound/soc/ralink/ralink-i2s.c -@@ -0,0 +1,968 @@ +@@ -0,0 +1,941 @@ +/* + * Copyright (C) 2010, Lars-Peter Clausen + * Copyright (C) 2016 Michael Lee @@ -869,20 +868,20 @@ Signed-off-by: John Crispin +{ + const struct of_device_id *match; + struct device_node *np = pdev->dev.of_node; -+ struct ralink_i2s *i2s; ++ struct device *dev = &pdev->dev; + struct resource *res; ++ struct ralink_i2s *i2s; + int irq, ret; + u32 dma_req; + struct rt_i2s_data *data; + -+ i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); ++ i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL); + if (!i2s) + return -ENOMEM; + -+ platform_set_drvdata(pdev, i2s); -+ i2s->dev = &pdev->dev; ++ i2s->dev = dev; + -+ match = of_match_device(ralink_i2s_match_table, &pdev->dev); ++ match = of_match_device(ralink_i2s_match_table, dev); + if (!match) + return -EINVAL; + data = (struct rt_i2s_data *)match->data; @@ -892,68 +891,49 @@ Signed-off-by: John Crispin + data->refclk_setup(); + + if (of_property_read_u32(np, "txdma-req", &dma_req)) { -+ dev_err(&pdev->dev, "no txdma-req define\n"); ++ dev_err(dev, "no txdma-req define\n"); + return -EINVAL; + } + i2s->txdma_req = (u16)dma_req; + if (!(i2s->flags & RALINK_FLAGS_TXONLY)) { + if (of_property_read_u32(np, "rxdma-req", &dma_req)) { -+ dev_err(&pdev->dev, "no rxdma-req define\n"); ++ dev_err(dev, "no rxdma-req define\n"); + return -EINVAL; + } + i2s->rxdma_req = (u16)dma_req; + } + -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ i2s->regs = devm_ioremap_resource(&pdev->dev, res); ++ i2s->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(i2s->regs)) + return PTR_ERR(i2s->regs); + -+ i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->regs, ++ i2s->regmap = devm_regmap_init_mmio(dev, i2s->regs, + &ralink_i2s_regmap_config); -+ if (IS_ERR(i2s->regmap)) { -+ dev_err(&pdev->dev, "regmap init failed\n"); -+ return PTR_ERR(i2s->regmap); -+ } ++ if (IS_ERR(i2s->regmap)) ++ return dev_err_probe(dev, PTR_ERR(i2s->regmap), "regmap init failed"); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { -+ dev_err(&pdev->dev, "failed to get irq\n"); ++ dev_err(dev, "failed to get irq\n"); + return -EINVAL; + } + +#if (RALINK_I2S_INT_EN) -+ ret = devm_request_irq(&pdev->dev, irq, ralink_i2s_irq, -+ 0, dev_name(&pdev->dev), i2s); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request irq\n"); -+ return ret; -+ } ++ ret = devm_request_irq(dev, irq, ralink_i2s_irq, ++ 0, dev_name(dev), i2s); ++ if (ret) ++ return dev_err_probe(dev, ret, "failed to request irq"); +#endif + -+ i2s->clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(i2s->clk)) { -+ dev_err(&pdev->dev, "no clock defined\n"); -+ return PTR_ERR(i2s->clk); -+ } -+ -+ ret = clk_prepare_enable(i2s->clk); -+ if (ret) -+ return ret; ++ i2s->clk = devm_clk_get_enabled(dev, NULL); ++ if (IS_ERR(i2s->clk)) ++ return dev_err_probe(dev, PTR_ERR(i2s->clk), "no clock defined"); + + ralink_i2s_init_dma_data(i2s, res); + -+ ret = device_reset(&pdev->dev); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to reset device\n"); -+ goto err_clk_disable; -+ } -+ -+ ret = ralink_i2s_debugfs_create(i2s); -+ if (ret) { -+ dev_err(&pdev->dev, "create debugfs failed\n"); -+ goto err_clk_disable; -+ } ++ ret = device_reset(dev); ++ if (ret) ++ return dev_err_probe(dev, ret, "failed to reset device\n"); + + /* enable 24bits support */ + if (i2s->flags & RALINK_FLAGS_24BIT) { @@ -981,28 +961,21 @@ Signed-off-by: John Crispin + memset(&ralink_i2s_dai.capture, sizeof(ralink_i2s_dai.capture), + 0); + -+ ret = devm_snd_soc_register_component(&pdev->dev, &ralink_i2s_component, ++ ret = devm_snd_soc_register_component(dev, &ralink_i2s_component, + &ralink_i2s_dai, 1); + if (ret) -+ goto err_debugfs; ++ return ret; + -+ ret = devm_snd_dmaengine_pcm_register(&pdev->dev, ++ ret = devm_snd_dmaengine_pcm_register(dev, + &ralink_dmaengine_pcm_config, + SND_DMAENGINE_PCM_FLAG_COMPAT); + if (ret) -+ goto err_debugfs; ++ return ret; + + dev_info(i2s->dev, "mclk %luMHz\n", clk_get_rate(i2s->clk) / 1000000); + -+ return 0; -+ -+err_debugfs: -+ ralink_i2s_debugfs_remove(i2s); -+ -+err_clk_disable: -+ clk_disable_unprepare(i2s->clk); -+ -+ return ret; ++ platform_set_drvdata(pdev, i2s); ++ return ralink_i2s_debugfs_create(i2s); +} + +static int ralink_i2s_remove(struct platform_device *pdev) @@ -1010,7 +983,6 @@ Signed-off-by: John Crispin + struct ralink_i2s *i2s = platform_get_drvdata(pdev); + + ralink_i2s_debugfs_remove(i2s); -+ clk_disable_unprepare(i2s->clk); + + return 0; +} diff --git a/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch b/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch index c21c286edf..663a9bfe7d 100644 --- a/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch +++ b/target/linux/ramips/patches-6.6/840-serial-add-ugly-custom-baud-rate-hack.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c -@@ -480,6 +480,9 @@ uart_get_baud_rate(struct uart_port *por +@@ -482,6 +482,9 @@ uart_get_baud_rate(struct uart_port *por break; } diff --git a/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch index a08056d8d9..560a2efeac 100644 --- a/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch +++ b/target/linux/ramips/patches-6.6/850-awake-rt305x-dwc2-controller.patch @@ -1,6 +1,6 @@ --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c -@@ -493,6 +493,12 @@ static int dwc2_driver_probe(struct plat +@@ -481,6 +481,12 @@ static int dwc2_driver_probe(struct plat if (retval) return retval; diff --git a/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c index 07664f9f38..710c65bc11 100644 --- a/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c @@ -2326,7 +2326,7 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv) } snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); - ret = of_mdiobus_register(priv->mii_bus, mii_np); + ret = devm_of_mdiobus_register(&priv->pdev->dev, priv->mii_bus, mii_np); err_put_node: of_node_put(mii_np); @@ -2334,18 +2334,6 @@ err_put_node: return ret; } -static int rtl838x_mdio_remove(struct rtl838x_eth_priv *priv) -{ - pr_debug("%s called\n", __func__); - if (!priv->mii_bus) - return 0; - - mdiobus_unregister(priv->mii_bus); - mdiobus_free(priv->mii_bus); - - return 0; -} - static netdev_features_t rtl838x_fix_features(struct net_device *dev, netdev_features_t features) { @@ -2489,11 +2477,9 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) rxringlen = MAX_ENTRIES / rxrings; rxringlen = rxringlen > MAX_RXLEN ? MAX_RXLEN : rxringlen; - dev = alloc_etherdev_mqs(sizeof(struct rtl838x_eth_priv), TXRINGS, rxrings); - if (!dev) { - err = -ENOMEM; - goto err_free; - } + dev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(struct rtl838x_eth_priv), TXRINGS, rxrings); + if (!dev) + return -ENOMEM; SET_NETDEV_DEV(dev, &pdev->dev); priv = netdev_priv(dev); @@ -2504,16 +2490,14 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) resource_size(res), res->name); if (!mem) { dev_err(&pdev->dev, "cannot request memory space\n"); - err = -ENXIO; - goto err_free; + return -ENXIO; } dev->mem_start = mem->start; dev->mem_end = mem->end; } else { dev_err(&pdev->dev, "cannot request IO resource\n"); - err = -ENXIO; - goto err_free; + return -ENXIO; } /* Allocate buffer memory */ @@ -2522,8 +2506,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) (void *)&dev->mem_start, GFP_KERNEL); if (!priv->membase) { dev_err(&pdev->dev, "cannot allocate DMA buffer\n"); - err = -ENOMEM; - goto err_free; + return -ENOMEM; } /* Allocate ring-buffer space at the end of the allocated memory */ @@ -2581,7 +2564,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) dev->irq = platform_get_irq(pdev, 0); if (dev->irq < 0) { dev_err(&pdev->dev, "cannot obtain network-device IRQ\n"); - goto err_free; + return err; } err = devm_request_irq(&pdev->dev, dev->irq, priv->r->net_irq, @@ -2589,7 +2572,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) if (err) { dev_err(&pdev->dev, "%s: could not acquire interrupt: %d\n", __func__, err); - goto err_free; + return err; } rtl8380_init_mac(priv); @@ -2628,11 +2611,11 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) err = rtl838x_mdio_init(priv); if (err) - goto err_free; + return err; - err = register_netdev(dev); + err = devm_register_netdev(&pdev->dev, dev); if (err) - goto err_free; + return err; for (int i = 0; i < priv->rxrings; i++) { priv->rx_qs[i].id = i; @@ -2646,8 +2629,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) err = of_get_phy_mode(dn, &phy_mode); if (err < 0) { dev_err(&pdev->dev, "incorrect phy-mode\n"); - err = -EINVAL; - goto err_free; + return -EINVAL; } priv->pcs.ops = &rtl838x_pcs_ops; @@ -2658,19 +2640,11 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev) phylink = phylink_create(&priv->phylink_config, pdev->dev.fwnode, phy_mode, &rtl838x_phylink_ops); - if (IS_ERR(phylink)) { - err = PTR_ERR(phylink); - goto err_free; - } + if (IS_ERR(phylink)) + return PTR_ERR(phylink); priv->phylink = phylink; return 0; - -err_free: - pr_err("Error setting up netdev, freeing it again.\n"); - free_netdev(dev); - - return err; } static int rtl838x_eth_remove(struct platform_device *pdev) @@ -2680,16 +2654,12 @@ static int rtl838x_eth_remove(struct platform_device *pdev) if (dev) { pr_info("Removing platform driver for rtl838x-eth\n"); - rtl838x_mdio_remove(priv); rtl838x_hw_stop(priv); netif_tx_stop_all_queues(dev); for (int i = 0; i < priv->rxrings; i++) netif_napi_del(&priv->rx_qs[i].napi); - - unregister_netdev(dev); - free_netdev(dev); } return 0; diff --git a/target/linux/rockchip/patches-6.6/035-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch b/target/linux/rockchip/patches-6.6/035-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch index 0583b70f89..3ae1c54ef2 100644 --- a/target/linux/rockchip/patches-6.6/035-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch +++ b/target/linux/rockchip/patches-6.6/035-v6.7-usb-dwc3-add-optional-PHY-interface-clocks.patch @@ -18,7 +18,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c -@@ -839,8 +839,20 @@ static int dwc3_clk_enable(struct dwc3 * +@@ -845,8 +845,20 @@ static int dwc3_clk_enable(struct dwc3 * if (ret) goto disable_ref_clk; @@ -39,7 +39,7 @@ Signed-off-by: Greg Kroah-Hartman disable_ref_clk: clk_disable_unprepare(dwc->ref_clk); disable_bus_clk: -@@ -850,6 +862,8 @@ disable_bus_clk: +@@ -856,6 +868,8 @@ disable_bus_clk: static void dwc3_clk_disable(struct dwc3 *dwc) { @@ -48,7 +48,7 @@ Signed-off-by: Greg Kroah-Hartman clk_disable_unprepare(dwc->susp_clk); clk_disable_unprepare(dwc->ref_clk); clk_disable_unprepare(dwc->bus_clk); -@@ -1878,6 +1892,20 @@ static int dwc3_get_clocks(struct dwc3 * +@@ -1884,6 +1898,20 @@ static int dwc3_get_clocks(struct dwc3 * } } diff --git a/target/linux/x86/base-files/etc/board.d/02_network b/target/linux/x86/base-files/etc/board.d/02_network index c4c2d3fa21..dc744db05d 100644 --- a/target/linux/x86/base-files/etc/board.d/02_network +++ b/target/linux/x86/base-files/etc/board.d/02_network @@ -34,6 +34,32 @@ cisco-mx100-hw) dell-emc-edge620) ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3 eth7" "eth6" ;; +gowin-solution-co-ltd-gw-mb-u01) + ucidef_set_network_device_path "eth1" "pci0000:00/0000:00:1c.0/0000:01:00.0/0000:02:02.0/0000:04:00.0" + ucidef_set_network_device_path "eth2" "pci0000:00/0000:00:1c.0/0000:01:00.0/0000:02:00.0/0000:03:00.0" + ucidef_set_network_device_path "eth3" "pci0000:00/0000:00:1c.2/0000:07:00.0/0000:08:02.0/0000:0a:00.0" + ucidef_set_network_device_path "eth4" "pci0000:00/0000:00:1c.2/0000:07:00.0/0000:08:00.0/0000:09:00.0" + ucidef_set_network_device_path "poe" "pci0000:00/0000:00:1c.2/0000:07:00.0/0000:08:06.0/0000:0b:00.0" + + sfp_device="pci0000:00/0000:00:1d.0" + sfp_device_path="/sys/devices/$sfp_device" + + pci_count="$(ls -d $sfp_device_path/0000:*:00.* 2>/dev/null | wc -l)" + if [ "$pci_count" -eq 2 ]; then + sfp_port1="$(basename $sfp_device_path/0000:*:00.1)" + sfp_port2="$(basename $sfp_device_path/0000:*:00.0)" + + ucidef_set_network_device_path "sfp1" "$sfp_device/$sfp_port1" + ucidef_set_network_device_path "sfp2" "$sfp_device/$sfp_port2" + elif [ "$pci_count" -eq 1 ]; then + sfp_port="$(basename $sfp_device_path/0000:*:00.0)" + + ucidef_set_network_device_path_port "sfp1" "$sfp_device/$sfp_port" "1" + ucidef_set_network_device_path_port "sfp2" "$sfp_device/$sfp_port" "0" + fi + + ucidef_set_interface_lan "eth1 eth2 eth3 eth4" + ;; pc-engines-apu1|pc-engines-apu2|pc-engines-apu3) ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0" ;; diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile index fc2ff17c73..ddf2b55ab1 100644 --- a/tools/firmware-utils/Makefile +++ b/tools/firmware-utils/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2024-09-22 -PKG_SOURCE_VERSION:=ed9c97fa3305c70cf08f9b11869cafdae5ea5068 -PKG_MIRROR_HASH:=be743cfa5c5de736ed28e1b62f17b5fe2c7f04509432d4b0f951bc5745b6befe +PKG_SOURCE_DATE:=2024-10-16 +PKG_SOURCE_VERSION:=88fbd52666e3b3f83ebab40f95b84f265824a729 +PKG_MIRROR_HASH:=4809421286257a91b2f29e79b7bbd0852a72c6e82169b340036cca5703881232 include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk