From: Peter Geis <pgwipeout@gmail.com>
To: Simon Glass <sjg@chromium.org>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	Kever Yang <kever.yang@rock-chips.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 07/11] rockchip: rk3568: add boot device detection
Date: Mon, 21 Feb 2022 20:31:26 -0500	[thread overview]
Message-ID: <20220222013131.3114990-8-pgwipeout@gmail.com> (raw)
In-Reply-To: <20220222013131.3114990-1-pgwipeout@gmail.com>

Enable rk3568 spl to detect which device it was booted from.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 arch/arm/mach-rockchip/rk3568/rk3568.c | 8 ++++++++
 1 file changed, 8 insertions(+)

--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
+#include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/grf_rk3568.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <dt-bindings/clock/rk3568-cru.h>
@@ -23,6 +24,7 @@
 #define SGRF_SOC_CON4			0x10
 #define EMMC_HPROT_SECURE_CTRL		0x03
 #define SDMMC0_HPROT_SECURE_CTRL	0x01
+
 /* PMU_GRF_GPIO0D_IOMUX_L */
 enum {
 	GPIO0D1_SHIFT		= 4,
@@ -43,6 +45,12 @@ enum {
 	UART2_IO_SEL_M0		= 0,
 };
 
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe310000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@fe300000/flash@0",
+	[BROM_BOOTSOURCE_SD] = "/mmc@fe2b0000",
+};
+
 static struct mm_region rk3568_mem_map[] = {
 	{
 		.virt = 0x0UL,