c057db94f8
Siflower SF21A6826/SF21H8898 are a family of RISC-V SoCs with: * Quad-core T-Head C908 (1.125G for SF21A6826, 1.25G for SF21H8898) * DDR3/DDR4 memory controller * 1 QSGMII 4x1G * 1 SGMII/2500Base-X 2.5G * 1 additional RGMII on SF21H8898 * Network offloading engine for L2 switching and L3 NAT * 2 PCIE Gen2 lanes, operating in either one PCIE Gen2x2 or two PCIE Gen2x1 mode * 1 USB2.0 Link: https://github.com/openwrt/openwrt/pull/17115 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
47 lines
1.8 KiB
Diff
47 lines
1.8 KiB
Diff
From: Qingfang Deng <qingfang.deng@siflower.com.cn>
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Date: Sat, 14 Sep 2024 12:00:59 +0800
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Subject: [PATCH 14/20] riscv: add an option for efficient unaligned access
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Some riscv cpus like T-Head C908 allows unaligned memory access,
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and we don't need to force an alignment on compiler level.
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Add an option for that.
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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---
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arch/riscv/Kconfig | 11 +++++++++++
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arch/riscv/Makefile | 2 ++
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2 files changed, 13 insertions(+)
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--- a/arch/riscv/Kconfig
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+++ b/arch/riscv/Kconfig
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@@ -639,6 +639,17 @@ config THREAD_SIZE_ORDER
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Specify the Pages of thread stack size (from 4KB to 64KB), which also
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affects irq stack size, which is equal to thread stack size.
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+config RISCV_EFFICIENT_UNALIGNED_ACCESS
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+ bool "Assume the system supports fast unaligned memory accesses"
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+ depends on NONPORTABLE
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+ select HAVE_EFFICIENT_UNALIGNED_ACCESS
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+ help
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+ Assume that the system supports fast unaligned memory accesses. When
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+ enabled, this option improves the performance of the kernel on such
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+ systems. However, the kernel and userspace programs will run much more
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+ slowly, or will not be able to run at all, on systems that do not
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+ support efficient unaligned memory accesses.
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+
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endmenu # "Platform type"
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menu "Kernel features"
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--- a/arch/riscv/Makefile
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+++ b/arch/riscv/Makefile
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@@ -104,7 +104,9 @@ KBUILD_AFLAGS_MODULE += $(call as-option
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# unaligned accesses. While unaligned accesses are explicitly allowed in the
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# RISC-V ISA, they're emulated by machine mode traps on all extant
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# architectures. It's faster to have GCC emit only aligned accesses.
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+ifneq ($(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS),y)
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KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
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+endif
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ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
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prepare: stack_protector_prepare
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