de8a2afc84
Imported from linux-rockchip tree: https://github.com/armbian/linux-rockchip/tree/rk-6.1-rkr5/drivers/mtd/nand/spi Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> (cherry picked from commit df588a6827a26410a1b66f618aa11152d83bd6cb)
291 lines
8.8 KiB
Diff
291 lines
8.8 KiB
Diff
From 205a24e34751220c3ba04f0ac6ecc734e56ed225 Mon Sep 17 00:00:00 2001
|
|
From: Jon Lin <jon.lin@rock-chips.com>
|
|
Date: Sun, 17 Oct 2021 09:59:10 +0800
|
|
Subject: [PATCH] mtd: spinand: Support fmsh
|
|
|
|
FM25S01A, FM25S02A, FM25S01
|
|
|
|
Change-Id: I7e0ceec39c57dc591d77a4ebde599ad326cf25b7
|
|
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
|
---
|
|
drivers/mtd/nand/spi/Makefile | 2 +-
|
|
drivers/mtd/nand/spi/core.c | 1 +
|
|
drivers/mtd/nand/spi/fmsh.c | 122 ++++++++++++++++++++++++++++++++++
|
|
include/linux/mtd/spinand.h | 1 +
|
|
4 files changed, 125 insertions(+), 1 deletion(-)
|
|
create mode 100644 drivers/mtd/nand/spi/fmsh.c
|
|
|
|
--- a/drivers/mtd/nand/spi/Makefile
|
|
+++ b/drivers/mtd/nand/spi/Makefile
|
|
@@ -1,6 +1,6 @@
|
|
# SPDX-License-Identifier: GPL-2.0
|
|
|
|
spinand-objs := core.o esmt.o foresee.o etron.o gigadevice.o macronix.o micron.o paragon.o
|
|
-spinand-objs += dosilicon.o
|
|
+spinand-objs += dosilicon.o fmsh.o
|
|
spinand-objs += toshiba.o winbond.o xtx.o
|
|
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
|
|
--- a/drivers/mtd/nand/spi/core.c
|
|
+++ b/drivers/mtd/nand/spi/core.c
|
|
@@ -828,6 +828,7 @@ static const struct nand_ops spinand_ops
|
|
static const struct spinand_manufacturer *spinand_manufacturers[] = {
|
|
&dosilicon_spinand_manufacturer,
|
|
&etron_spinand_manufacturer,
|
|
+ &fmsh_spinand_manufacturer,
|
|
&gigadevice_spinand_manufacturer,
|
|
¯onix_spinand_manufacturer,
|
|
µn_spinand_manufacturer,
|
|
--- /dev/null
|
|
+++ b/drivers/mtd/nand/spi/fmsh.c
|
|
@@ -0,0 +1,240 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+/*
|
|
+ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd.
|
|
+ *
|
|
+ * Authors:
|
|
+ * Dingqiang Lin <jon.lin@rock-chips.com>
|
|
+ */
|
|
+
|
|
+#ifndef __UBOOT__
|
|
+#include <linux/device.h>
|
|
+#include <linux/kernel.h>
|
|
+#endif
|
|
+#include <linux/mtd/spinand.h>
|
|
+
|
|
+#define SPINAND_MFR_FMSH 0xA1
|
|
+
|
|
+static SPINAND_OP_VARIANTS(read_cache_variants,
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
|
|
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
|
|
+
|
|
+static SPINAND_OP_VARIANTS(write_cache_variants,
|
|
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
|
|
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
|
|
+
|
|
+static SPINAND_OP_VARIANTS(update_cache_variants,
|
|
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
|
|
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
|
|
+
|
|
+static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ return -ERANGE;
|
|
+}
|
|
+
|
|
+static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ if (section)
|
|
+ return -ERANGE;
|
|
+
|
|
+ region->offset = 2;
|
|
+ region->length = 62;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
|
|
+ .ecc = fm25s01a_ooblayout_ecc,
|
|
+ .rfree = fm25s01a_ooblayout_free,
|
|
+};
|
|
+
|
|
+static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ if (section)
|
|
+ return -ERANGE;
|
|
+
|
|
+ region->offset = 64;
|
|
+ region->length = 64;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ if (section)
|
|
+ return -ERANGE;
|
|
+
|
|
+ region->offset = 2;
|
|
+ region->length = 62;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
|
|
+ .ecc = fm25s01_ooblayout_ecc,
|
|
+ .rfree = fm25s01_ooblayout_free,
|
|
+};
|
|
+
|
|
+/*
|
|
+ * ecc bits: 0xC0[4,6]
|
|
+ * [0b000], No bit errors were detected;
|
|
+ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not
|
|
+ * reach Flipping Bits;
|
|
+ * [0b101], Bit error count equals the bit flip
|
|
+ * detection threshold
|
|
+ * [0b010], Multiple bit errors were detected and
|
|
+ * not corrected.
|
|
+ * others, Reserved.
|
|
+ */
|
|
+static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand,
|
|
+ u8 status)
|
|
+{
|
|
+ struct nand_device *nand = spinand_to_nand(spinand);
|
|
+ u8 eccsr = (status & GENMASK(6, 4)) >> 4;
|
|
+
|
|
+ if (eccsr <= 1 || eccsr == 3)
|
|
+ return eccsr;
|
|
+ else if (eccsr == 5)
|
|
+ return nand->eccreq.strength;
|
|
+ else
|
|
+ return -EBADMSG;
|
|
+}
|
|
+
|
|
+static int fm25g0xd_ooblayout_ecc(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ if (section)
|
|
+ return -ERANGE;
|
|
+
|
|
+ region->offset = 64;
|
|
+ region->length = 64;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int fm25g0xd_ooblayout_free(struct mtd_info *mtd, int section,
|
|
+ struct mtd_oob_region *region)
|
|
+{
|
|
+ if (section)
|
|
+ return -ERANGE;
|
|
+
|
|
+ /* Reserve 2 bytes for the BBM. */
|
|
+ region->offset = 2;
|
|
+ region->length = 62;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct mtd_ooblayout_ops fm25g0xd_ooblayout = {
|
|
+ .ecc = fm25g0xd_ooblayout_ecc,
|
|
+ .rfree = fm25g0xd_ooblayout_free,
|
|
+};
|
|
+
|
|
+/*
|
|
+ * ecc bits: 0xC0[4,6]
|
|
+ * [0x0], No bit errors were detected;
|
|
+ * [0x001, 0x011], Bit errors were detected and corrected. Not
|
|
+ * reach Flipping Bits;
|
|
+ * [0x100], Bit error count equals the bit flip
|
|
+ * detectionthreshold
|
|
+ * [0x101, 0x110], Reserved;
|
|
+ * [0x111], Multiple bit errors were detected and
|
|
+ * not corrected.
|
|
+ */
|
|
+static int fm25g0xd_ecc_get_status(struct spinand_device *spinand,
|
|
+ u8 status)
|
|
+{
|
|
+ struct nand_device *nand = spinand_to_nand(spinand);
|
|
+ u8 eccsr = (status & GENMASK(6, 4)) >> 4;
|
|
+
|
|
+ if (eccsr <= 3)
|
|
+ return 0;
|
|
+ else if (eccsr == 4)
|
|
+ return nand->eccreq.strength;
|
|
+ else
|
|
+ return -EBADMSG;
|
|
+}
|
|
+
|
|
+static const struct spinand_info fmsh_spinand_table[] = {
|
|
+ SPINAND_INFO("FM25S01A",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
|
|
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
|
|
+ NAND_ECCREQ(1, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ 0,
|
|
+ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
|
|
+ SPINAND_INFO("FM25S02A",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5),
|
|
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
|
|
+ NAND_ECCREQ(1, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ SPINAND_HAS_QE_BIT,
|
|
+ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
|
|
+ SPINAND_INFO("FM25S01",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
|
|
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
|
+ NAND_ECCREQ(1, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ 0,
|
|
+ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
|
|
+ SPINAND_INFO("FM25LS01",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5),
|
|
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
|
+ NAND_ECCREQ(1, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ 0,
|
|
+ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
|
|
+ SPINAND_INFO("FM25S01BI3",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
|
|
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
|
+ NAND_ECCREQ(8, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ SPINAND_HAS_QE_BIT,
|
|
+ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)),
|
|
+ SPINAND_INFO("FM25S02BI3-DND-A-G3",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD6),
|
|
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
|
+ NAND_ECCREQ(8, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ SPINAND_HAS_QE_BIT,
|
|
+ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)),
|
|
+ SPINAND_INFO("FM25G02D",
|
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),
|
|
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
|
|
+ NAND_ECCREQ(4, 512),
|
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
+ &write_cache_variants,
|
|
+ &update_cache_variants),
|
|
+ SPINAND_HAS_QE_BIT,
|
|
+ SPINAND_ECCINFO(&fm25g0xd_ooblayout, fm25g0xd_ecc_get_status)),
|
|
+};
|
|
+
|
|
+static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
|
|
+};
|
|
+
|
|
+const struct spinand_manufacturer fmsh_spinand_manufacturer = {
|
|
+ .id = SPINAND_MFR_FMSH,
|
|
+ .name = "FMSH",
|
|
+ .chips = fmsh_spinand_table,
|
|
+ .nchips = ARRAY_SIZE(fmsh_spinand_table),
|
|
+ .ops = &fmsh_spinand_manuf_ops,
|
|
+};
|
|
--- a/include/linux/mtd/spinand.h
|
|
+++ b/include/linux/mtd/spinand.h
|
|
@@ -246,6 +246,7 @@ struct spinand_manufacturer {
|
|
/* SPI NAND manufacturers */
|
|
extern const struct spinand_manufacturer dosilicon_spinand_manufacturer;
|
|
extern const struct spinand_manufacturer etron_spinand_manufacturer;
|
|
+extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
|
|
extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
|
|
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
|
|
extern const struct spinand_manufacturer micron_spinand_manufacturer;
|