84 lines
3.1 KiB
Diff
84 lines
3.1 KiB
Diff
From bebad6bd4fbdc448ad3b337ad281b813e68f6f53 Mon Sep 17 00:00:00 2001
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From: Andy Yan <andy.yan@rock-chips.com>
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Date: Mon, 11 Dec 2023 19:57:30 +0800
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Subject: [PATCH] drm/rockchip: vop2: set half_block_en bit in all mode
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At first we thought the half_block_en bit in AFBCD_CTRL register
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only work in afbc mode. But the fact is that it control the line
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buffer in all mode(afbc/tile/linear), so we need configure it in
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all case.
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As the cluster windows of rk3568 only supports afbc format
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so is therefore not affected.
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Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
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Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Link: https://patchwork.freedesktop.org/patch/msgid/20231211115730.1784893-1-andyshrk@163.com
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---
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drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++++++++++++++------
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1 file changed, 18 insertions(+), 7 deletions(-)
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--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -530,6 +530,18 @@ static bool rockchip_vop2_mod_supported(
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return vop2_convert_afbc_format(format) >= 0;
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}
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+/*
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+ * 0: Full mode, 16 lines for one tail
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+ * 1: half block mode, 8 lines one tail
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+ */
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+static bool vop2_half_block_enable(struct drm_plane_state *pstate)
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+{
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+ if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90))
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+ return false;
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+ else
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+ return true;
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+}
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+
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static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate,
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bool afbc_half_block_en)
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{
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@@ -1155,6 +1167,7 @@ static void vop2_plane_atomic_update(str
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bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90;
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struct rockchip_gem_object *rk_obj;
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unsigned long offset;
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+ bool half_block_en;
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bool afbc_en;
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dma_addr_t yrgb_mst;
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dma_addr_t uv_mst;
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@@ -1247,6 +1260,7 @@ static void vop2_plane_atomic_update(str
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dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
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format = vop2_convert_format(fb->format->format);
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+ half_block_en = vop2_half_block_enable(pstate);
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drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
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vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h,
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@@ -1254,6 +1268,9 @@ static void vop2_plane_atomic_update(str
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&fb->format->format,
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afbc_en ? "AFBC" : "", &yrgb_mst);
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+ if (vop2_cluster_window(win))
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+ vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
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+
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if (afbc_en) {
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u32 stride;
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@@ -1294,13 +1311,7 @@ static void vop2_plane_atomic_update(str
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vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap);
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vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0);
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vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
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- if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) {
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- vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0);
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- transform_offset = vop2_afbc_transform_offset(pstate, false);
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- } else {
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- vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1);
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- transform_offset = vop2_afbc_transform_offset(pstate, true);
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- }
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+ transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
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vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
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vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);
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vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset);
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