51 lines
1.7 KiB
Diff
51 lines
1.7 KiB
Diff
From d1f8face0fc1298c88ef4a0479c3027b46ca2c77 Mon Sep 17 00:00:00 2001
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From: Andy Yan <andy.yan@rock-chips.com>
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Date: Mon, 11 Dec 2023 19:57:52 +0800
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Subject: [PATCH] drm/rockchip: vop2: Add write mask for VP config done
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The write mask bit is used to make sure when writing
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config done bit for one VP will not overwrite the other.
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Unfortunately, the write mask bit is missing on
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rk3566/8, that means when we write to these bits,
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it will not take any effect.
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We need this to make the vop work properly after
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rk3566/8 variants.
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Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Link: https://patchwork.freedesktop.org/patch/msgid/20231211115752.1785013-1-andyshrk@163.com
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---
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drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 15 +++++++++++++--
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1 file changed, 13 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -267,12 +267,23 @@ static bool vop2_cluster_window(const st
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return win->data->feature & WIN_FEATURE_CLUSTER;
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}
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+/*
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+ * Note:
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+ * The write mask function is documented but missing on rk3566/8, writes
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+ * to these bits have no effect. For newer soc(rk3588 and following) the
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+ * write mask is needed for register writes.
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+ *
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+ * GLB_CFG_DONE_EN has no write mask bit.
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+ *
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+ */
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static void vop2_cfg_done(struct vop2_video_port *vp)
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{
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struct vop2 *vop2 = vp->vop2;
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+ u32 val = RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN;
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- regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE,
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- BIT(vp->id) | RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN);
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+ val |= BIT(vp->id) | (BIT(vp->id) << 16);
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+
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+ regmap_set_bits(vop2->map, RK3568_REG_CFG_DONE, val);
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}
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static void vop2_win_disable(struct vop2_win *win)
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