5872633b9d
Adds latest 6.6 patches from the Raspberry Pi repository. These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.6.y/ With the following command: git format-patch -N v6.6.83..HEAD (HEAD -> 08d4e8f52256bd422d8a1f876411603f627d0a82) Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> (cherry picked from commit 251f76c1c67d62c585d799c38dab31e1385d2ad5)
130 lines
3.6 KiB
Diff
130 lines
3.6 KiB
Diff
From 32c319ba2f2fd662a3b7bd042515cd650807dbff Mon Sep 17 00:00:00 2001
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From: Stefan Wahren <wahrenst@gmx.net>
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Date: Sat, 1 Feb 2025 13:50:46 +0100
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Subject: [PATCH] drm/v3d: Add clock handling
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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[ Upstream commit 4dd40b5f9c3d89b67af0dbe059cf4a51aac6bf06 ]
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Since the initial commit 57692c94dcbe ("drm/v3d: Introduce a new DRM driver
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for Broadcom V3D V3.x+") the struct v3d_dev reserved a pointer for
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an optional V3D clock. But there wasn't any code, which fetched it.
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So add the missing clock handling before accessing any V3D registers.
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Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
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Reviewed-by: Maíra Canal <mcanal@igalia.com>
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Signed-off-by: Maíra Canal <mcanal@igalia.com>
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Link: https://patchwork.freedesktop.org/patch/msgid/20250201125046.33030-1-wahrenst@gmx.net
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[ Maíra: Backported to the downstream repository ]
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Signed-off-by: Maíra Canal <mcanal@igalia.com>
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---
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drivers/gpu/drm/v3d/v3d_drv.c | 44 ++++++++++++++++++++++-------------
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1 file changed, 28 insertions(+), 16 deletions(-)
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--- a/drivers/gpu/drm/v3d/v3d_drv.c
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+++ b/drivers/gpu/drm/v3d/v3d_drv.c
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@@ -232,11 +232,21 @@ static int v3d_platform_drm_probe(struct
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if (ret)
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return ret;
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+ v3d->clk = devm_clk_get_optional(dev, NULL);
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+ if (IS_ERR(v3d->clk))
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+ return dev_err_probe(dev, PTR_ERR(v3d->clk), "Failed to get V3D clock\n");
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+
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+ ret = clk_prepare_enable(v3d->clk);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Couldn't enable the V3D clock\n");
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+ return ret;
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+ }
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+
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mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
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mask = DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
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ret = dma_set_mask_and_coherent(dev, mask);
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if (ret)
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- return ret;
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+ goto clk_disable;
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v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
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@@ -251,32 +261,29 @@ static int v3d_platform_drm_probe(struct
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ret = PTR_ERR(v3d->reset);
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if (ret == -EPROBE_DEFER)
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- return ret;
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+ goto clk_disable;
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v3d->reset = NULL;
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ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
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if (ret) {
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dev_err(dev,
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"Failed to get reset control or bridge regs\n");
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- return ret;
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+ goto clk_disable;
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}
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}
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- v3d->clk = devm_clk_get(dev, NULL);
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- if (IS_ERR_OR_NULL(v3d->clk)) {
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- if (PTR_ERR(v3d->clk) != -EPROBE_DEFER)
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- dev_err(dev, "Failed to get clock (%ld)\n", PTR_ERR(v3d->clk));
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- return PTR_ERR(v3d->clk);
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- }
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-
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node = rpi_firmware_find_node();
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- if (!node)
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- return -EINVAL;
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+ if (!node) {
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+ ret = -EINVAL;
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+ goto clk_disable;
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+ }
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firmware = rpi_firmware_get(node);
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of_node_put(node);
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- if (!firmware)
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- return -EPROBE_DEFER;
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+ if (!firmware) {
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+ ret = -EPROBE_DEFER;
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+ goto clk_disable;
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+ }
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v3d->clk_up_rate = rpi_firmware_clk_get_max_rate(firmware,
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RPI_FIRMWARE_V3D_CLK_ID);
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@@ -293,14 +300,15 @@ static int v3d_platform_drm_probe(struct
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if (v3d->ver < 41) {
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ret = map_regs(v3d, &v3d->gca_regs, "gca");
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if (ret)
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- return ret;
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+ goto clk_disable;
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}
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v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
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GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
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if (!v3d->mmu_scratch) {
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dev_err(dev, "Failed to allocate MMU scratch page\n");
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- return -ENOMEM;
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+ ret = -ENOMEM;
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+ goto clk_disable;
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}
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ret = v3d_gem_init(drm);
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@@ -326,6 +334,8 @@ gem_destroy:
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v3d_gem_destroy(drm);
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dma_free:
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dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
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+clk_disable:
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+ clk_disable_unprepare(v3d->clk);
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return ret;
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}
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@@ -340,6 +350,8 @@ static void v3d_platform_drm_remove(stru
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dma_free_wc(v3d->drm.dev, 4096, v3d->mmu_scratch,
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v3d->mmu_scratch_paddr);
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+
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+ clk_disable_unprepare(v3d->clk);
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}
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static struct platform_driver v3d_platform_driver = {
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