42 lines
1.3 KiB
Diff
42 lines
1.3 KiB
Diff
Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
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Date: Thu, 15 Aug 2019 19:28:23 +0200
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Message-Id: <20190815172823.12028-1-robimarko@gmail.com>
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Sender: linux-arm-msm-owner@vger.kernel.org
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List-ID: <linux-arm-msm.vger.kernel.org>
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IPQ4019 has a built in SD/eMMC controller which is supported by the
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SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
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So lets add the appropriate node for it.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -226,6 +226,18 @@
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status = "disabled";
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};
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+ sdhci: sdhci@7824900 {
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+ compatible = "qcom,sdhci-msm-v4";
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+ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
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+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "hc_irq", "pwr_irq";
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+ bus-width = <8>;
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+ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
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+ <&gcc GCC_DCD_XO_CLK>;
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+ clock-names = "core", "iface", "xo";
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+ status = "disabled";
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+ };
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+
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blsp_dma: dma@7884000 {
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compatible = "qcom,bam-v1.7.0";
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reg = <0x07884000 0x23000>;
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