39 lines
1.3 KiB
Diff
39 lines
1.3 KiB
Diff
From 4ab080257de13d5e859a614bd56c78ff30688588 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Sat, 21 Jan 2023 19:01:39 +0000
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Subject: [PATCH] rockchip: Align FIT image data to SD/MMC block length
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SPL load FIT images by reading the data aligned to block length.
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Block length aligned image data is read directly to the load address.
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Unaligned image data is written to an offset of the load address and
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then the data is memcpy to the load address.
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This adds a small overhead of having to memcpy unaligned data, something
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that normally is not an issue.
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However, TF-A may have a segment that should be loaded into SRAM, e.g.
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vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
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8KiB PMU SRAM. Having the image data for such segment unaligned result
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in segment being written to and memcpy from beyond the SRAM boundary, in
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the end this results in invalid data in SRAM.
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Aligning the FIT and its external data to MMC block length to work
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around such issue.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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---
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Makefile | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/Makefile
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+++ b/Makefile
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@@ -1450,7 +1450,7 @@ MKIMAGEFLAGS_u-boot.itb =
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else
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MKIMAGEFLAGS_u-boot.itb = -E
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endif
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-MKIMAGEFLAGS_u-boot.itb += -B 0x8
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+MKIMAGEFLAGS_u-boot.itb += -B 0x200
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ifdef U_BOOT_ITS
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u-boot.itb: u-boot-nodtb.bin \
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