--- a/arch/arm/boot/dts/s5pv210.dtsi
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -95,6 +95,16 @@
 			status = "disabled";
 		};
 
+        nand: nand@b0000000 {
+            compatible = "samsung,s5pv210-nand";
+            reg = <0xb0e00000 0x40>, <0xb0e20000 0x200>;
+            clocks = <&clocks CLK_NANDXL>, <&clocks CLK_NFCON>;
+            clock-names = "nandxl", "nand";
+            #address-cells = <1>;
+            #size-cells = <1>;
+            status = "disabled";
+        };
+
 		chipid@e0000000 {
 			compatible = "samsung,s5pv210-chipid";
 			reg = <0xe0000000 0x1000>;
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -181,6 +181,12 @@ config MTD_NAND_S3C2410_CLKSTOP
 	  when the is NAND chip selected or released, but will save
 	  approximately 5mA of power when there is nothing happening.
 
+config MTD_NAND_S5PXX
+    tristate "NAND Flash support for Samsung S5Pxx SoCs"
+    depends on ARCH_S5PV210
+    help
+        This enables the NAND flash controller on the S5Pxx SoCs
+
 config MTD_NAND_TANGO
 	tristate "NAND Flash support for Tango chips"
 	depends on ARCH_TANGO || COMPILE_TEST
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_NAND_DENALI_DT)	+= dena
 obj-$(CONFIG_MTD_NAND_AU1550)		+= au1550nd.o
 obj-$(CONFIG_MTD_NAND_BF5XX)		+= bf5xx_nand.o
 obj-$(CONFIG_MTD_NAND_S3C2410)		+= s3c2410.o
+obj-$(CONFIG_MTD_NAND_S5PXX)       += s5pxx_nand.o
 obj-$(CONFIG_MTD_NAND_TANGO)		+= tango_nand.o
 obj-$(CONFIG_MTD_NAND_DAVINCI)		+= davinci_nand.o
 obj-$(CONFIG_MTD_NAND_DISKONCHIP)	+= diskonchip.o
