ramips: ralink-gpio: use irqchip helpers to register driver

The gpiolib has already introduced a general GPIO irqchip framework
to initialize the GPIO irqchip[1]. This patch will make use of it
to simplify the legacy Ralink GPIO driver codes. This patch also
includes some code readability improvements.

[1] 1425052097b5 ("gpio: add IRQ chip helpers in gpiolib")
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16764
Signed-off-by: Robert Marko <robimarko@gmail.com>

target/linux/ramips/mt7620/config-6.6

@@ -54,6 +54,7 @@ CONFIG_EARLY_PRINTK=y
 CONFIG_ETHERNET_PACKET_MANGLE=y
 CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
+CONFIG_FORCE_NR_CPUS=y
 CONFIG_FS_IOMAP=y
 CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
@@ -81,6 +82,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GLOB=y
+CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 # CONFIG_GPIO_MT7621 is not set
@@ -181,7 +183,6 @@ CONFIG_PINCTRL_MTK_MTMIPS=y
 CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_RALINK=y
-# CONFIG_RALINK_GDMA is not set
 CONFIG_RALINK_WDT=y
 CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y

target/linux/ramips/mt7621/config-6.6

@@ -92,7 +92,6 @@ CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_MT7621=y
-# CONFIG_GPIO_RALINK is not set
 CONFIG_GPIO_WATCHDOG=y
 # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set
 CONFIG_GRO_CELLS=y

target/linux/ramips/mt76x8/config-6.6

@@ -52,6 +52,7 @@ CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
+CONFIG_FORCE_NR_CPUS=y
 CONFIG_FS_IOMAP=y
 CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
@@ -175,7 +176,6 @@ CONFIG_PINCTRL_MTK_MTMIPS=y
 CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_RALINK=y
-# CONFIG_RALINK_GDMA is not set
 # CONFIG_RALINK_WDT is not set
 CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y

target/linux/ramips/patches-6.6/801-DT-Add-documentation-for-gpio-ralink.patch

@@ -1,18 +1,18 @@
 From: John Crispin <blogic@openwrt.org>
 Date: Sun, 28 Jul 2013 19:45:30 +0200
-Subject: [PATCH 1/3] DT: Add documentation for gpio-ralink
+Subject: [PATCH 1/2] DT: Add documentation for gpio-ralink
 
 Describe gpio-ralink binding.
 
 Signed-off-by: John Crispin <blogic@openwrt.org>
 ---
- .../devicetree/bindings/gpio/gpio-ralink.txt  | 36 +++++++++++++++++++
+ .../devicetree/bindings/gpio/gpio-ralink.txt  | 42 +++++++++++++++++++
- 1 file changed, 36 insertions(+)
+ 1 file changed, 42 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt
 
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
-@@ -0,0 +1,36 @@
+@@ -0,0 +1,42 @@
 +Ralink SoC GPIO controller bindings
 +
 +Required properties:
@@ -29,6 +29,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +- ralink,register-map : The register layout depends on the GPIO bank and actual
 +		SoC type. Register offsets need to be in this order.
 +		[ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]
++- interrupt-controller : marks this as an interrupt controller
++- #interrupt-cells : a standard two-cell interrupt flag, see
++  interrupt-controller/interrupts.txt
 +
 +Example:
 +
@@ -40,6 +43,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +
 +		reg = <0x600 0x34>;
 +
++		interrupt-controller;
++		#interrupt-cells = <2>;
++
 +		interrupt-parent = <&intc>;
 +		interrupts = <6>;
 +

target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch

@@ -1,34 +1,35 @@
 From: John Crispin <blogic@openwrt.org>
 Date: Mon, 4 Aug 2014 20:36:29 +0200
-Subject: [PATCH 2/3] GPIO: MIPS: ralink: add gpio driver for ralink SoC
+Subject: [PATCH 2/2] GPIO: MIPS: ralink: add gpio driver for ralink SoC
 
 Add gpio driver for Ralink SoC. This driver makes the gpio core on
 RT2880, RT305x, rt3352, rt3662, rt3883, rt5350 and mt7620 work.
 
 Signed-off-by: John Crispin <blogic@openwrt.org>
 ---
- drivers/gpio/Kconfig       |   7 +
+ drivers/gpio/Kconfig       |   8 ++
  drivers/gpio/Makefile      |   1 +
- drivers/gpio/gpio-ralink.c | 273 +++++++++++++++++++++++++++++++++++++
+ drivers/gpio/gpio-ralink.c | 230 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 281 insertions(+)
+ 3 files changed, 239 insertions(+)
  create mode 100644 drivers/gpio/gpio-ralink.c
 
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
-@@ -594,6 +594,13 @@ config GPIO_SNPS_CREG
+@@ -509,6 +509,14 @@ config GPIO_PXA
- 	  where only several fields in register belong to GPIO lines and
+ 	help
- 	  each GPIO line owns a field with different length and on/off value.
+ 	  Say yes here to support the PXA GPIO device.
  
 +config GPIO_RALINK
 +	bool "Ralink GPIO Support"
-+	depends on RALINK
++	depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620 
 +	select GPIO_GENERIC
++	select GPIOLIB_IRQCHIP
 +	help
 +	  Say yes here to support the Ralink SoC GPIO device
 +
- config GPIO_SPEAR_SPICS
+ config GPIO_RCAR
- 	bool "ST SPEAr13xx SPI Chip Select as GPIO support"
+ 	tristate "Renesas R-Car and RZ/G GPIO support"
- 	depends on PLAT_SPEAR
+ 	depends on ARCH_RENESAS || COMPILE_TEST
 --- a/drivers/gpio/Makefile
 +++ b/drivers/gpio/Makefile
 @@ -130,6 +130,7 @@ obj-$(CONFIG_GPIO_PISOSR)		+= gpio-pisos
@@ -41,7 +42,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  obj-$(CONFIG_GPIO_RCAR)			+= gpio-rcar.o
 --- /dev/null
 +++ b/drivers/gpio/gpio-ralink.c
-@@ -0,0 +1,273 @@
+@@ -0,0 +1,230 @@
 +/*
 + * This program is free software; you can redistribute it and/or modify it
 + * under the terms of the GNU General Public License version 2 as published
@@ -51,14 +52,13 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 + */
 +
-+#include <linux/module.h>
++#include <linux/err.h>
-+#include <linux/io.h>
 +#include <linux/gpio/driver.h>
-+#include <linux/spinlock.h>
-+#include <linux/platform_device.h>
-+#include <linux/of_irq.h>
-+#include <linux/irqdomain.h>
 +#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
 +
 +enum ralink_gpio_reg {
 +	GPIO_REG_INT = 0,
@@ -80,27 +80,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +
 +	spinlock_t lock;
 +	void __iomem *membase;
-+	struct irq_domain *domain;
++	int gpio_irq;
-+	int irq;
 +
 +	u32 rising;
 +	u32 falling;
 +};
 +
-+#define MAP_MAX	4
-+static struct irq_domain *irq_map[MAP_MAX];
-+static int irq_map_count;
-+static atomic_t irq_refcount = ATOMIC_INIT(0);
-+
-+static inline struct ralink_gpio_chip *to_ralink_gpio(struct gpio_chip *chip)
-+{
-+	struct ralink_gpio_chip *rg;
-+
-+	rg = container_of(chip, struct ralink_gpio_chip, chip);
-+
-+	return rg;
-+}
-+
 +static inline void rt_gpio_w32(struct ralink_gpio_chip *rg, u8 reg, u32 val)
 +{
 +	iowrite32(val, rg->membase + rg->regs[reg]);
@@ -111,44 +96,31 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	return ioread32(rg->membase + rg->regs[reg]);
 +}
 +
-+static int ralink_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
++static irqreturn_t ralink_gpio_irq_handler(int irq, void *data)
 +{	
-+	struct ralink_gpio_chip *rg = to_ralink_gpio(chip);
++	struct gpio_chip *gc = data;
++	struct ralink_gpio_chip *rg = gpiochip_get_data(gc);
++	irqreturn_t ret = IRQ_NONE;
++	unsigned long pending;
++	int bit;
 +
-+	if (rg->irq < 1)
++	pending = rt_gpio_r32(rg, GPIO_REG_INT);
-+		return -1;
++	for_each_set_bit(bit, &pending, rg->chip.ngpio) {
-+
++		generic_handle_domain_irq(gc->irq.domain, bit);
-+	return irq_create_mapping(rg->domain, pin);
++		rt_gpio_w32(rg, GPIO_REG_INT, BIT(bit));
-+}
++		ret |= IRQ_HANDLED;
-+
-+static void ralink_gpio_irq_handler(struct irq_desc *desc)
-+{
-+	int i;
-+
-+	for (i = 0; i < irq_map_count; i++) {
-+		struct irq_domain *domain = irq_map[i];
-+		struct ralink_gpio_chip *rg;
-+		unsigned long pending;
-+		int bit;
-+
-+		rg = (struct ralink_gpio_chip *) domain->host_data;
-+		pending = rt_gpio_r32(rg, GPIO_REG_INT);
-+
-+		for_each_set_bit(bit, &pending, rg->chip.ngpio) {
-+			u32 map = irq_find_mapping(domain, bit);
-+			generic_handle_irq(map);
-+			rt_gpio_w32(rg, GPIO_REG_INT, BIT(bit));
-+		}
 +	}
++
++	return ret;
 +}
 +
 +static void ralink_gpio_irq_unmask(struct irq_data *d)
 +{
-+	struct ralink_gpio_chip *rg;
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct ralink_gpio_chip *rg = gpiochip_get_data(gc);
 +	unsigned long flags;
 +	u32 rise, fall;
 +
-+	rg = (struct ralink_gpio_chip *) d->domain->host_data;
 +	rise = rt_gpio_r32(rg, GPIO_REG_RENA);
 +	fall = rt_gpio_r32(rg, GPIO_REG_FENA);
 +
@@ -160,11 +132,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +
 +static void ralink_gpio_irq_mask(struct irq_data *d)
 +{
-+	struct ralink_gpio_chip *rg;
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct ralink_gpio_chip *rg = gpiochip_get_data(gc);
 +	unsigned long flags;
 +	u32 rise, fall;
 +
-+	rg = (struct ralink_gpio_chip *) d->domain->host_data;
 +	rise = rt_gpio_r32(rg, GPIO_REG_RENA);
 +	fall = rt_gpio_r32(rg, GPIO_REG_FENA);
 +
@@ -176,11 +148,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +
 +static int ralink_gpio_irq_type(struct irq_data *d, unsigned int type)
 +{
-+	struct ralink_gpio_chip *rg;
++	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
++	struct ralink_gpio_chip *rg = gpiochip_get_data(gc);
 +	u32 mask = BIT(d->hwirq);
 +
-+	rg = (struct ralink_gpio_chip *) d->domain->host_data;
-+
 +	if (type == IRQ_TYPE_PROBE) {
 +		if ((rg->rising | rg->falling) & mask)
 +			return 0;
@@ -202,55 +173,15 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +}
 +
 +static struct irq_chip ralink_gpio_irq_chip = {
-+	.name		= "GPIO",
++	.name		= "gpio-ralink",
 +	.irq_unmask	= ralink_gpio_irq_unmask,
 +	.irq_mask	= ralink_gpio_irq_mask,
 +	.irq_mask_ack	= ralink_gpio_irq_mask,
 +	.irq_set_type	= ralink_gpio_irq_type,
++	.flags		= IRQCHIP_IMMUTABLE,
++	GPIOCHIP_IRQ_RESOURCE_HELPERS,
 +};
 +
-+static int gpio_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
-+{
-+	irq_set_chip_and_handler(irq, &ralink_gpio_irq_chip, handle_level_irq);
-+	irq_set_handler_data(irq, d);
-+
-+	return 0;
-+}
-+
-+static const struct irq_domain_ops irq_domain_ops = {
-+	.xlate = irq_domain_xlate_onecell,
-+	.map = gpio_map,
-+};
-+
-+static void ralink_gpio_irq_init(struct device_node *np,
-+				 struct ralink_gpio_chip *rg)
-+{
-+	if (irq_map_count >= MAP_MAX)
-+		return;
-+
-+	rg->irq = irq_of_parse_and_map(np, 0);
-+	if (!rg->irq)
-+		return;
-+
-+	rg->domain = irq_domain_add_linear(np, rg->chip.ngpio,
-+					   &irq_domain_ops, rg);
-+	if (!rg->domain) {
-+		dev_err(rg->chip.parent, "irq_domain_add_linear failed\n");
-+		return;
-+	}
-+
-+	irq_map[irq_map_count++] = rg->domain;
-+
-+	rt_gpio_w32(rg, GPIO_REG_RENA, 0x0);
-+	rt_gpio_w32(rg, GPIO_REG_FENA, 0x0);
-+
-+	if (!atomic_read(&irq_refcount))
-+		irq_set_chained_handler(rg->irq, ralink_gpio_irq_handler);
-+	atomic_inc(&irq_refcount);
-+
-+	dev_info(rg->chip.parent, "registering %d irq handlers\n", rg->chip.ngpio);
-+}
-+
 +static int ralink_gpio_probe(struct platform_device *pdev)
 +{
 +	struct device *dev = &pdev->dev;
@@ -282,14 +213,42 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +			NULL, 0);
 +	if (ret)
 +		return dev_err_probe(dev, ret, "bgpio_init() failed\n");
-+	rg->chip.request = gpiochip_generic_request;
-+	rg->chip.to_irq = ralink_gpio_to_irq;
-+	rg->chip.free = gpiochip_generic_free;
 +
 +	/* set polarity to low for all lines */
 +	rt_gpio_w32(rg, GPIO_REG_POL, 0);
 +
-+	ralink_gpio_irq_init(np, rg);
++	rg->gpio_irq = platform_get_irq(pdev, 0);
++	if (rg->gpio_irq < 0)
++		return rg->gpio_irq;
++
++	if (rg->gpio_irq) {
++		struct gpio_irq_chip *girq;
++
++		/*
++		 * Directly request the irq here instead of passing
++		 * a flow-handler because the irq is shared.
++		 */
++		ret = devm_request_irq(dev, rg->gpio_irq,
++				       ralink_gpio_irq_handler, IRQF_SHARED,
++				       NULL, &rg->chip);
++		if (ret) {
++			dev_err(dev, "Error requesting IRQ %d: %d\n",
++				rg->gpio_irq, ret);
++			return ret;
++		}
++
++		girq = &rg->chip.irq;
++		gpio_irq_chip_set_chip(girq, &ralink_gpio_irq_chip);
++		/* This will let us handle the parent IRQ in the driver */
++		girq->parent_handler = NULL;
++		girq->num_parents = 0;
++		girq->parents = NULL;
++		girq->default_type = IRQ_TYPE_NONE;
++		girq->handler = handle_simple_irq;
++
++		rt_gpio_w32(rg, GPIO_REG_RENA, 0);
++		rt_gpio_w32(rg, GPIO_REG_FENA, 0);
++	}
 +
 +	return devm_gpiochip_add_data(dev, &rg->chip, rg);
 +}
@@ -303,8 +262,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +static struct platform_driver ralink_gpio_driver = {
 +	.probe = ralink_gpio_probe,
 +	.driver = {
-+		.name = "rt2880_gpio",
++		.name = "ralink_gpio",
-+		.owner = THIS_MODULE,
 +		.of_match_table = ralink_gpio_match,
 +	},
 +};

target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch

@@ -1,43 +0,0 @@
-From: Daniel Santos <daniel.santos@pobox.com>
-Date: Sun, 4 Nov 2018 20:24:32 -0600
-Subject: [PATCH 3/3] gpio-ralink: Add support for GPIO as interrupt-controller
-
-Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
----
- Documentation/devicetree/bindings/gpio/gpio-ralink.txt | 6 ++++++
- drivers/gpio/gpio-ralink.c                             | 2 +-
- 2 files changed, 7 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
-+++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
-@@ -14,6 +14,9 @@ Required properties:
- - ralink,register-map : The register layout depends on the GPIO bank and actual
- 		SoC type. Register offsets need to be in this order.
- 		[ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]
-+- interrupt-controller : marks this as an interrupt controller
-+- #interrupt-cells : a standard two-cell interrupt flag, see
-+  interrupt-controller/interrupts.txt
- 
- Example:
- 
-@@ -25,6 +28,9 @@ Example:
- 
- 		reg = <0x600 0x34>;
- 
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+
- 		interrupt-parent = <&intc>;
- 		interrupts = <6>;
- 
---- a/drivers/gpio/gpio-ralink.c
-+++ b/drivers/gpio/gpio-ralink.c
-@@ -174,7 +174,7 @@ static int gpio_map(struct irq_domain *d
- }
- 
- static const struct irq_domain_ops irq_domain_ops = {
--	.xlate = irq_domain_xlate_onecell,
-+	.xlate = irq_domain_xlate_twocell,
- 	.map = gpio_map,
- };
- 

target/linux/ramips/rt288x/config-6.6

@@ -45,6 +45,7 @@ CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
+CONFIG_FORCE_NR_CPUS=y
 CONFIG_FS_IOMAP=y
 CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
@@ -72,6 +73,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GLOB=y
+CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_RALINK=y

target/linux/ramips/rt305x/config-6.6

@@ -48,6 +48,7 @@ CONFIG_DTC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
+CONFIG_FORCE_NR_CPUS=y
 CONFIG_FS_IOMAP=y
 CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
@@ -75,6 +76,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GLOB=y
+CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_RALINK=y
@@ -160,7 +162,6 @@ CONFIG_PINCTRL_RT305X=y
 CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_RALINK=y
-# CONFIG_RALINK_GDMA is not set
 # CONFIG_RALINK_ILL_ACC is not set
 CONFIG_RALINK_WDT=y
 CONFIG_RANDSTRUCT_NONE=y

target/linux/ramips/rt3883/config-6.6

@@ -48,6 +48,7 @@ CONFIG_EARLY_PRINTK=y
 CONFIG_ETHERNET_PACKET_MANGLE=y
 CONFIG_EXCLUSIVE_SYSTEM_RAM=y
 CONFIG_FIXED_PHY=y
+CONFIG_FORCE_NR_CPUS=y
 CONFIG_FS_IOMAP=y
 CONFIG_FUNCTION_ALIGNMENT=0
 CONFIG_FWNODE_MDIO=y
@@ -75,6 +76,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
 CONFIG_GENERIC_SMP_IDLE_THREAD=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GLOB=y
+CONFIG_GPIOLIB_IRQCHIP=y
 CONFIG_GPIO_CDEV=y
 CONFIG_GPIO_GENERIC=y
 CONFIG_GPIO_RALINK=y
@@ -160,7 +162,6 @@ CONFIG_PINCTRL_RT3883=y
 CONFIG_PREEMPT_NONE_BUILD=y
 CONFIG_PTP_1588_CLOCK_OPTIONAL=y
 CONFIG_RALINK=y
-# CONFIG_RALINK_GDMA is not set
 CONFIG_RALINK_WDT=y
 CONFIG_RANDSTRUCT_NONE=y
 CONFIG_RATIONAL=y