openwrt/target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch
Álvaro Fernández Rojas 1eab9b8a9b generic: 6.6: backport upstream v6.15 Realtek PHY patches
bfc17c1658353 net: phy: realtek: disable PHY-mode EEE
fabcfd6d10999 net: phy: realtek: add defines for shadowed c45 standard registers
8af2136e77989 net: phy: realtek: add helper RTL822X_VND2_C22_REG
02d3b306ac2f0 net: phy: realtek: switch from paged to MMD ops in rtl822x functions
da681ed73fb98 net: phy: realtek: improve mmd register access for internal PHY's
0bea93fdbaf86 net: phy: realtek: use string choices helpers
51773846fab24 net: phy: realtek: make HWMON support a user-visible Kconfig symbol

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry picked from commit 7673a165a955269773eb604d3678d86d0bb7f49c)
2025-04-23 08:38:32 +02:00

43 lines
1.4 KiB
Diff

From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
*/
#define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -892,6 +896,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
+ if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
+ ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ else
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ if (ret < 0)
+ return ret;
+
/* Disable SGMII AN */
ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
if (ret < 0)