24ade65ab5
This patch series will provide better support for Mediatek ethernet and add support for Airoha AN8855. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
145 lines
4.5 KiB
Diff
145 lines
4.5 KiB
Diff
From 5ac929fd1ab1d0dc77b9167952aea7cafdb8619f Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Tue, 17 Dec 2024 16:39:55 +0800
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Subject: [PATCH 08/10] net: mediatek: make sgmii/usxgmii optional
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Not all platforms supports sgmii and/or usxgmii. So we add Kconfig
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options for these features and enable them only for supported
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platforms.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/net/Kconfig | 12 ++++++++++++
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drivers/net/mtk_eth.c | 39 +++++++++++++++++++++++++++++----------
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2 files changed, 41 insertions(+), 10 deletions(-)
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--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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@@ -975,6 +975,18 @@ config MEDIATEK_ETH
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This Driver support MediaTek Ethernet GMAC
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Say Y to enable support for the MediaTek Ethernet GMAC.
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+if MEDIATEK_ETH
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+
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+config MTK_ETH_SGMII
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+ bool
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+ default y if ARCH_MEDIATEK && !TARGET_MT7623
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+
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+config MTK_ETH_XGMII
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+ bool
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+ default y if TARGET_MT7987 || TARGET_MT7988
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+
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+endif # MEDIATEK_ETH
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+
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config HIFEMAC_ETH
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bool "HiSilicon Fast Ethernet Controller"
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select DM_CLK
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--- a/drivers/net/mtk_eth.c
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+++ b/drivers/net/mtk_eth.c
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@@ -1505,7 +1505,7 @@ static void mtk_10gbaser_init(struct mtk
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mtk_usxgmii_setup_phya_force_10000(priv);
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}
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-static void mtk_mac_init(struct mtk_eth_priv *priv)
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+static int mtk_mac_init(struct mtk_eth_priv *priv)
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{
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int i, sgmii_sel_mask = 0, ge_mode = 0;
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u32 mcr;
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@@ -1522,13 +1522,16 @@ static void mtk_mac_init(struct mtk_eth_
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break;
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_2500BASEX:
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+ if (!IS_ENABLED(CONFIG_MTK_ETH_SGMII)) {
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+ printf("Error: SGMII is not supported on this platform\n");
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+ return -ENOTSUPP;
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+ }
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+
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if (MTK_HAS_CAPS(priv->soc->caps, MTK_GMAC2_U3_QPHY)) {
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mtk_infra_rmw(priv, USB_PHY_SWITCH_REG, QPHY_SEL_MASK,
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SGMII_QPHY_SEL);
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}
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- ge_mode = GE_MODE_RGMII;
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-
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if (MTK_HAS_CAPS(priv->soc->caps, MTK_ETH_PATH_MT7622_SGMII))
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sgmii_sel_mask = SYSCFG1_SGMII_SEL_M;
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@@ -1539,6 +1542,8 @@ static void mtk_mac_init(struct mtk_eth_
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mtk_sgmii_an_init(priv);
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else
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mtk_sgmii_force_init(priv);
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+
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+ ge_mode = GE_MODE_RGMII;
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break;
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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@@ -1595,12 +1600,19 @@ static void mtk_mac_init(struct mtk_eth_
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RX_RST | RXC_DQSISEL);
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mtk_gmac_rmw(priv, GMAC_TRGMII_RCK_CTRL, RX_RST, 0);
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}
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+
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+ return 0;
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}
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-static void mtk_xmac_init(struct mtk_eth_priv *priv)
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+static int mtk_xmac_init(struct mtk_eth_priv *priv)
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{
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u32 force_link = 0;
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+ if (!IS_ENABLED(CONFIG_MTK_ETH_XGMII)) {
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+ printf("Error: 10Gb interface is not supported on this platform\n");
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+ return -ENOTSUPP;
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+ }
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+
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switch (priv->phy_interface) {
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case PHY_INTERFACE_MODE_USXGMII:
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mtk_usxgmii_an_init(priv);
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@@ -1633,6 +1645,8 @@ static void mtk_xmac_init(struct mtk_eth
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/* Force GMAC link down */
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mtk_gmac_write(priv, GMAC_PORT_MCR(priv->gmac_id), FORCE_MODE);
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+
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+ return 0;
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}
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static void mtk_eth_fifo_init(struct mtk_eth_priv *priv)
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@@ -1922,9 +1936,12 @@ static int mtk_eth_probe(struct udevice
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if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
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priv->phy_interface == PHY_INTERFACE_MODE_10GBASER ||
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priv->phy_interface == PHY_INTERFACE_MODE_XGMII)
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- mtk_xmac_init(priv);
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+ ret = mtk_xmac_init(priv);
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else
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- mtk_mac_init(priv);
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+ ret = mtk_mac_init(priv);
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+
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+ if (ret)
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+ return ret;
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/* Probe phy if switch is not specified */
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if (priv->sw == SW_NONE)
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@@ -2032,8 +2049,9 @@ static int mtk_eth_of_to_plat(struct ude
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}
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}
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- if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
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- priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
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+ if ((priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
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+ priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) &&
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+ IS_ENABLED(CONFIG_MTK_ETH_SGMII)) {
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/* get corresponding sgmii phandle */
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ret = dev_read_phandle_with_args(dev, "mediatek,sgmiisys",
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NULL, 0, 0, &args);
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@@ -2055,8 +2073,9 @@ static int mtk_eth_of_to_plat(struct ude
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/* Upstream linux use mediatek,pnswap instead of pn_swap */
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priv->pn_swap = ofnode_read_bool(args.node, "pn_swap") ||
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ofnode_read_bool(args.node, "mediatek,pnswap");
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- } else if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
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- priv->phy_interface == PHY_INTERFACE_MODE_10GBASER) {
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+ } else if ((priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
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+ priv->phy_interface == PHY_INTERFACE_MODE_10GBASER) &&
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+ IS_ENABLED(CONFIG_MTK_ETH_XGMII)) {
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/* get corresponding usxgmii phandle */
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ret = dev_read_phandle_with_args(dev, "mediatek,usxgmiisys",
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NULL, 0, 0, &args);
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