34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
61 lines
1.5 KiB
Diff
61 lines
1.5 KiB
Diff
From: Devi Priya <quic_devipriy@quicinc.com>
|
|
Date: Thu, 5 Oct 2023 21:35:48 +0530
|
|
Subject: [PATCH] dt-bindings: pwm: add IPQ6018 binding
|
|
|
|
DT binding for the PWM block in Qualcomm IPQ6018 SoC.
|
|
|
|
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
|
|
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
|
|
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
|
|
---
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml
|
|
@@ -0,0 +1,45 @@
|
|
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
+%YAML 1.2
|
|
+---
|
|
+$id: http://devicetree.org/schemas/pwm/qcom,ipq6018-pwm.yaml#
|
|
+$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
+
|
|
+title: Qualcomm IPQ6018 PWM controller
|
|
+
|
|
+maintainers:
|
|
+ - Baruch Siach <baruch@tkos.co.il>
|
|
+
|
|
+properties:
|
|
+ compatible:
|
|
+ const: qcom,ipq6018-pwm
|
|
+
|
|
+ reg:
|
|
+ description: Offset of PWM register in the TCSR block.
|
|
+ maxItems: 1
|
|
+
|
|
+ clocks:
|
|
+ maxItems: 1
|
|
+
|
|
+ "#pwm-cells":
|
|
+ const: 2
|
|
+
|
|
+required:
|
|
+ - compatible
|
|
+ - reg
|
|
+ - clocks
|
|
+ - "#pwm-cells"
|
|
+
|
|
+additionalProperties: false
|
|
+
|
|
+examples:
|
|
+ - |
|
|
+ #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
|
|
+
|
|
+ pwm: pwm@a010 {
|
|
+ compatible = "qcom,ipq6018-pwm";
|
|
+ reg = <0xa010 0x20>;
|
|
+ clocks = <&gcc GCC_ADSS_PWM_CLK>;
|
|
+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+ #pwm-cells = <2>;
|
|
+ };
|