34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
26 lines
875 B
Diff
26 lines
875 B
Diff
From: George Moussalem <george.moussalem@outlook.com>
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Date: Tue, 07 Jan 2025 17:34:13 +0400
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Subject: [PATCH] phy: qualcomm: qcom-uniphy-pcie add IPQ5018 compatible
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The Qualcomm UNIPHY PCIe PHY 28lp part of the IPQ5332 SoC is also present on
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the IPQ5018 SoC, so adding the compatible for IPQ5018.
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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--- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml
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+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml
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@@ -11,11 +11,12 @@ maintainers:
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- Varadarajan Narayanan <quic_varada@quicinc.com>
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description:
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- PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC
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+ PCIe and USB combo PHY found in Qualcomm IPQ5018 and IPQ5332 SoCs
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properties:
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compatible:
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enum:
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+ - qcom,ipq5018-uniphy-pcie-phy
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- qcom,ipq5332-uniphy-pcie-phy
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reg:
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