412fcf3d44
See also patchwork for submission progress: https://patchwork.kernel.org/project/linux-wireless/cover/cover.1663445157.git.daniel@makrotopia.org/ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
71 lines
2.5 KiB
Diff
71 lines
2.5 KiB
Diff
From patchwork Sat Sep 17 20:29:55 2022
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
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X-Patchwork-Id: 12979256
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X-Patchwork-Delegate: kvalo@adurom.com
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Return-Path: <linux-wireless-owner@kernel.org>
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Date: Sat, 17 Sep 2022 21:29:55 +0100
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From: Daniel Golle <daniel@makrotopia.org>
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To: linux-wireless@vger.kernel.org, Stanislaw Gruszka <stf_xl@wp.pl>,
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Helmut Schaa <helmut.schaa@googlemail.com>
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Cc: Kalle Valo <kvalo@kernel.org>,
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"David S. Miller" <davem@davemloft.net>,
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Eric Dumazet <edumazet@google.com>,
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Jakub Kicinski <kuba@kernel.org>,
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Paolo Abeni <pabeni@redhat.com>,
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Johannes Berg <johannes.berg@intel.com>
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Subject: [PATCH v3 15/16] rt2x00: set SoC wmac clock register
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Message-ID:
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<3e275d259f476f597dab91a9c395015ef3fe3284.1663445157.git.daniel@makrotopia.org>
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References: <cover.1663445157.git.daniel@makrotopia.org>
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MIME-Version: 1.0
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Content-Disposition: inline
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In-Reply-To: <cover.1663445157.git.daniel@makrotopia.org>
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Precedence: bulk
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List-ID: <linux-wireless.vger.kernel.org>
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X-Mailing-List: linux-wireless@vger.kernel.org
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Instead of using the default value 33 (pci), set US_CYC_CNT init based
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on Programming guide:
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If available, set chipset bus clock with fallback to cpu clock/3.
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Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
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---
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.../net/wireless/ralink/rt2x00/rt2800lib.c | 21 +++++++++++++++++++
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1 file changed, 21 insertions(+)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -6229,6 +6229,27 @@ static int rt2800_init_registers(struct
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reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
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rt2x00_set_field32(®, US_CYC_CNT_CLOCK_CYCLE, 125);
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rt2800_register_write(rt2x00dev, US_CYC_CNT, reg);
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+ } else if (rt2x00_is_soc(rt2x00dev)) {
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+ struct clk *clk = clk_get_sys("bus", NULL);
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+ int rate;
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+
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+ if (IS_ERR(clk)) {
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+ clk = clk_get_sys("cpu", NULL);
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+
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+ if (IS_ERR(clk)) {
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+ rate = 125;
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+ } else {
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+ rate = clk_get_rate(clk) / 3000000;
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+ clk_put(clk);
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+ }
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+ } else {
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+ rate = clk_get_rate(clk) / 1000000;
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+ clk_put(clk);
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+ }
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+
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+ reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
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+ rt2x00_set_field32(®, US_CYC_CNT_CLOCK_CYCLE, rate);
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+ rt2800_register_write(rt2x00dev, US_CYC_CNT, reg);
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}
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reg = rt2800_register_read(rt2x00dev, HT_FBK_CFG0);
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