34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
26 lines
968 B
Diff
26 lines
968 B
Diff
From 4d45d56e17348c6b6bb2bce126a4a5ea97b19900 Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
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Date: Mon, 25 Sep 2023 15:58:24 +0530
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Subject: [PATCH] dt-bindings: clock: qcom,a53pll: add IPQ5018 compatible
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Add IPQ5018 compatible to A53 PLL bindings.
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Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Link: https://lore.kernel.org/r/20230925102826.405446-2-quic_gokulsri@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 1 +
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1 file changed, 1 insertion(+)
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--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
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+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
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@@ -16,6 +16,7 @@ description:
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properties:
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compatible:
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enum:
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+ - qcom,ipq5018-a53pll
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- qcom,ipq5332-a53pll
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- qcom,ipq6018-a53pll
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- qcom,ipq8074-a53pll
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