a5d23e3aee
Sync patch with upstream version and tag them. Minor changes done to Pinctrl patch to support older kernel. Patch automatically refreshed with make target/linux/refresh. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
147 lines
4.4 KiB
Diff
147 lines
4.4 KiB
Diff
From b8bdfc666bc5f58caf46e67b615132fccbaca3d4 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Tue, 12 Nov 2024 01:08:50 +0100
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Subject: [PATCH 2/6] clk: en7523: move clock_register in hw_init callback
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Move en7523_register_clocks routine in hw_init callback.
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Introduce en7523_clk_hw_init callback for EN7523 SoC.
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This is a preliminary patch to differentiate IO mapped region between
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EN7523 and EN7581 SoCs in order to access chip-scu IO region
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<0x1fa20000 0x384> on EN7581 SoC as syscon device since it contains
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miscellaneous registers needed by multiple devices (clock, pinctrl ..).
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-3-8ada5e394ae4@kernel.org
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/clk-en7523.c | 82 ++++++++++++++++++++++++----------------
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1 file changed, 50 insertions(+), 32 deletions(-)
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--- a/drivers/clk/clk-en7523.c
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+++ b/drivers/clk/clk-en7523.c
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@@ -78,7 +78,8 @@ struct en_clk_soc_data {
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const u16 *idx_map;
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u16 idx_map_nr;
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} reset;
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- int (*hw_init)(struct platform_device *pdev, void __iomem *np_base);
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+ int (*hw_init)(struct platform_device *pdev,
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+ struct clk_hw_onecell_data *clk_data);
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};
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static const u32 gsw_base[] = { 400000000, 500000000 };
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@@ -406,20 +407,6 @@ static void en7581_pci_disable(struct cl
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usleep_range(1000, 2000);
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}
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-static int en7581_clk_hw_init(struct platform_device *pdev,
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- void __iomem *np_base)
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-{
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- u32 val;
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-
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- val = readl(np_base + REG_NP_SCU_SSTR);
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- val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);
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- writel(val, np_base + REG_NP_SCU_SSTR);
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- val = readl(np_base + REG_NP_SCU_PCIC);
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- writel(val | 3, np_base + REG_NP_SCU_PCIC);
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-
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- return 0;
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-}
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-
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static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data,
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void __iomem *base, void __iomem *np_base)
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{
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@@ -449,6 +436,49 @@ static void en7523_register_clocks(struc
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clk_data->num = EN7523_NUM_CLOCKS;
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}
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+static int en7523_clk_hw_init(struct platform_device *pdev,
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+ struct clk_hw_onecell_data *clk_data)
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+{
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+ void __iomem *base, *np_base;
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+
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+ base = devm_platform_ioremap_resource(pdev, 0);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ np_base = devm_platform_ioremap_resource(pdev, 1);
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+ if (IS_ERR(np_base))
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+ return PTR_ERR(np_base);
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+
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+ en7523_register_clocks(&pdev->dev, clk_data, base, np_base);
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+
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+ return 0;
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+}
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+
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+static int en7581_clk_hw_init(struct platform_device *pdev,
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+ struct clk_hw_onecell_data *clk_data)
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+{
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+ void __iomem *base, *np_base;
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+ u32 val;
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+
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+ base = devm_platform_ioremap_resource(pdev, 0);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ np_base = devm_platform_ioremap_resource(pdev, 1);
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+ if (IS_ERR(np_base))
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+ return PTR_ERR(np_base);
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+
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+ en7523_register_clocks(&pdev->dev, clk_data, base, np_base);
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+
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+ val = readl(np_base + REG_NP_SCU_SSTR);
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+ val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);
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+ writel(val, np_base + REG_NP_SCU_SSTR);
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+ val = readl(np_base + REG_NP_SCU_PCIC);
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+ writel(val | 3, np_base + REG_NP_SCU_PCIC);
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+
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+ return 0;
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+}
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+
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static int en7523_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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@@ -543,31 +573,18 @@ static int en7523_clk_probe(struct platf
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struct device_node *node = pdev->dev.of_node;
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const struct en_clk_soc_data *soc_data;
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struct clk_hw_onecell_data *clk_data;
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- void __iomem *base, *np_base;
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int r;
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- base = devm_platform_ioremap_resource(pdev, 0);
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- if (IS_ERR(base))
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- return PTR_ERR(base);
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-
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- np_base = devm_platform_ioremap_resource(pdev, 1);
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- if (IS_ERR(np_base))
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- return PTR_ERR(np_base);
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-
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- soc_data = device_get_match_data(&pdev->dev);
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- if (soc_data->hw_init) {
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- r = soc_data->hw_init(pdev, np_base);
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- if (r)
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- return r;
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- }
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-
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clk_data = devm_kzalloc(&pdev->dev,
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struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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- en7523_register_clocks(&pdev->dev, clk_data, base, np_base);
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+ soc_data = device_get_match_data(&pdev->dev);
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+ r = soc_data->hw_init(pdev, clk_data);
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+ if (r)
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+ return r;
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r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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if (r)
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@@ -590,6 +607,7 @@ static const struct en_clk_soc_data en75
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.prepare = en7523_pci_prepare,
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.unprepare = en7523_pci_unprepare,
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},
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+ .hw_init = en7523_clk_hw_init,
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};
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static const struct en_clk_soc_data en7581_data = {
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