From 955f675241f93e60ce28eef54c9089def409b454 Mon Sep 17 00:00:00 2001 From: VIKING Date: Fri, 28 Feb 2025 10:19:00 +0800 Subject: [PATCH] Update OWRT Source --- .../uboot-envtools/files/mediatek_filogic | 6 +- package/boot/uboot-mediatek/Makefile | 13 + .../patches/600-add-superbox_s20-plus.patch | 318 +++++++++++++ .../dts/mt7986a-superbox-s20-plus.dts | 431 +++++++++++------- .../filogic/base-files/etc/board.d/01_leds | 5 + .../filogic/base-files/etc/board.d/02_network | 11 +- .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 8 +- .../base-files/lib/upgrade/platform.sh | 6 +- target/linux/mediatek/image/filogic.mk | 27 +- .../arm64/boot/dts/qcom/ipq5018-re-cs-03.dts | 234 +++------- 10 files changed, 691 insertions(+), 368 deletions(-) create mode 100644 package/boot/uboot-mediatek/patches/600-add-superbox_s20-plus.patch diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 014deb10d5..a8aef1c5de 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -64,8 +64,7 @@ glinet,gl-mt6000|\ glinet,gl-x3000|\ glinet,gl-xe3000|\ huasifei,wh3000-emmc|\ -nradio,c8-668gl|\ -superbox,s20-plus) +nradio,c8-668gl) local envdev=$(find_mmc_part "u-boot-env") ubootenv_add_uci_config "$envdev" "0x0" "0x80000" ;; @@ -78,7 +77,8 @@ bananapi,bpi-r4|\ bananapi,bpi-r4-poe|\ cmcc,rax3000m|\ jdcloud,re-cp-03|\ -konka,komi-a31) +konka,komi-a31|\ +superbox,s20-plus) . /lib/upgrade/fit.sh export_fitblk_bootdev case "$CI_METHOD" in diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index a5f5e63eed..5265a04fa9 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -762,6 +762,18 @@ define U-Boot/mt7986_zyxel_ex5601-t0 DEPENDS:=+trusted-firmware-a-mt7986-spim-nand-4k-ddr4 endef +define U-Boot/mt7986_superbox_s20-plus + NAME:=Superbox S20-Plus + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=superbox_s20-plus + UBOOT_CONFIG:=mt7986a_superbox_s20-plus + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=emmc + BL2_SOC:=mt7986 + BL2_DDRTYPE:=ddr4 + DEPENDS:=+trusted-firmware-a-mt7986-emmc-ddr4 +endef + define U-Boot/mt7988_arcadyan_mozart NAME:=Arcadyan Mozart BUILD_SUBTARGET:=filogic @@ -971,6 +983,7 @@ UBOOT_TARGETS := \ mt7986_tplink_tl-xtr8488 \ mt7986_xiaomi_redmi-router-ax6000 \ mt7986_zyxel_ex5601-t0 \ + mt7986_superbox_s20-plus \ mt7986_rfb \ mt7988_arcadyan_mozart \ mt7988_bananapi_bpi-r4-emmc \ diff --git a/package/boot/uboot-mediatek/patches/600-add-superbox_s20-plus.patch b/package/boot/uboot-mediatek/patches/600-add-superbox_s20-plus.patch new file mode 100644 index 0000000000..b561224189 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/600-add-superbox_s20-plus.patch @@ -0,0 +1,318 @@ +--- /dev/null ++++ b/configs/mt7986a_superbox_s20-plus_defconfig +@@ -0,0 +1,124 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x40000 ++CONFIG_ENV_OFFSET=0x400000 ++CONFIG_DEFAULT_DEVICE_TREE="mt7986a-superbox_s20-plus" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7986=y ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_ENV_OFFSET_REDUND=0x440000 ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-superbox_s20-plus.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_LOG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="MT7986> " ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="superbox_s20-plus_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_NETCONSOLE=y ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_MTK_AHCI=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_MMC_MTK=y ++CONFIG_PHY_FIXED=y ++CONFIG_DM_MDIO=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_PINCTRL_MT7986=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_RAM=y ++CONFIG_SCSI=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_MTK=y ++CONFIG_USB_STORAGE=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y ++CONFIG_LMB_MAX_REGIONS=64 +--- /dev/null ++++ b/arch/arm/dts/mt7986a-superbox_s20-plus.dts +@@ -0,0 +1,130 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++ ++/dts-v1/; ++#include "mt7986.dtsi" ++#include ++#include ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ model = "CLX S20P"; ++ compatible = "mediatek,mt7986", "mediatek,mt7986-rfb"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x80000000>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ button-reset { ++ label = "reset"; ++ gpios = <&gpio 16 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ led_sys { ++ label = "sys"; ++ gpios = <&gpio 22 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-1.8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++}; ++ ++ð { ++ status = "okay"; ++ mediatek,gmac-id = <0>; ++ phy-mode = "2500base-x"; ++ mediatek,switch = "mt7531"; ++ reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; ++ ++ fixed-link { ++ speed = <2500>; ++ full-duplex; ++ }; ++}; ++ ++&mmc0 { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ cap-mmc-hw-reset; ++ max-frequency = <200000000>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_default>; ++ vmmc-supply = <®_3p3v>; ++ vqmmc-supply = <®_1p8v>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ mmc0_pins_default: mmc0default { ++ mux { ++ function = "flash"; ++ groups = "emmc_51"; ++ }; ++ ++ conf-cmd-dat { ++ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", ++ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", ++ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ conf-clk { ++ pins = "EMMC_CK"; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ ++ conf-dsl { ++ pins = "EMMC_DSL"; ++ bias-pull-down = ; ++ }; ++ ++ conf-rst { ++ pins = "EMMC_RSTB"; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&watchdog { ++ status = "disabled"; ++}; +--- /dev/null ++++ b/superbox_s20-plus_env +@@ -0,0 +1,55 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootargs=root=/dev/fit0 rootwait ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi ++bootconf=config-1 ++bootdelay=0 ++bootfile=immortalwrt-mediatek-filogic-superbox_s20-plus-initramfs-recovery.itb ++bootfile_bl2=immortalwrt-mediatek-filogic-superbox_s20-plus-preloader.bin ++bootfile_fip=immortalwrt-mediatek-filogic-superbox_s20-plus-bl31-uboot.fip ++bootfile_upg=immortalwrt-mediatek-filogic-superbox_s20-plus-squashfs-sysupgrade.itb ++bootled_pwr=red:status ++bootled_rec=blue:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from eMMC.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from eMMC.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run emmc_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run emmc_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_emmc=run boot_production ; run boot_recovery ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run emmc_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run emmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2 ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size ++mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200 ++part_default=production ++part_recovery=recovery ++reset_factory=eraseenv && reset ++emmc_read_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_read_vol ++emmc_read_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_read_vol ++emmc_write_bl2=mmc partconf 0 1 1 1 && mmc erase 0x0 0x400 && mmc write $fileaddr 0x0 0x400 ; mmc partconf 0 1 1 0 ++emmc_write_fip=mmc erase 0x3400 0x2000 && mmc write $fileaddr 0x3400 0x2000 && mmc erase 0x2000 0x800 ++emmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol ++emmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol ++_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/target/linux/mediatek/dts/mt7986a-superbox-s20-plus.dts b/target/linux/mediatek/dts/mt7986a-superbox-s20-plus.dts index 5f8e6988a4..81695d7d8a 100644 --- a/target/linux/mediatek/dts/mt7986a-superbox-s20-plus.dts +++ b/target/linux/mediatek/dts/mt7986a-superbox-s20-plus.dts @@ -1,28 +1,66 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; -#include -#include -#include #include "mt7986a.dtsi" +#include +#include +#include + / { - model = "Superbox S20 Plus"; + model = "Superbox S20-Plus"; compatible = "superbox,s20-plus", "mediatek,mt7986a"; aliases { serial0 = &uart0; label-mac-device = &gmac1; - led-boot = &led_green; - led-failsafe = &led_green; - led-running = &led_green; - led-upgrade = &led_green; + led-boot = &sys_led; + led-failsafe = &sys_led; + led-running = &sys_led; + led-upgrade = &sys_led; }; chosen { + bootargs-override = "root=/dev/fit0 rootwait"; stdout-path = "serial0:115200n8"; - bootargs-append = " root=PARTLABEL=rootfs rootwait"; + rootdisk = <&emmc_rootdisk>; + }; + + memory { + reg = <0 0x40000000 0 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + linux,code = ; + gpios = <&pio 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + wlan5g_led: wlan5g-led { + function = LED_FUNCTION_WLAN_5GHZ; + color = ; + gpios = <&pio 2 GPIO_ACTIVE_LOW>; + }; + + wlan2g_led: wlan2g-led { + function = LED_FUNCTION_WLAN_2GHZ; + color = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + sys_led: sys-led { + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&pio 22 GPIO_ACTIVE_LOW>; + }; }; reg_1p8v: regulator-1p8v { @@ -43,24 +81,6 @@ regulator-always-on; }; - keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - linux,code = ; - gpios = <&pio 16 GPIO_ACTIVE_LOW>; - }; - }; - - leds { - compatible = "gpio-leds"; - led_green: led_green { - label = "green"; - gpios = <&pio 22 GPIO_ACTIVE_LOW>; - }; - }; - usb_vbus: regulator-usb-vbus { compatible = "regulator-fixed"; regulator-name = "usb_vbus"; @@ -79,8 +99,9 @@ compatible = "mediatek,eth-mac"; reg = <0>; phy-mode = "2500base-x"; - ext-phy-reg = <5>; - ext-phy-reset-gpios = <&pio 48 0>; + nvmem-cells = <&macaddr_factory_2a 0>; + nvmem-cell-names = "mac-address"; + fixed-link { speed = <2500>; full-duplex; @@ -91,35 +112,52 @@ gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; + nvmem-cells = <&macaddr_factory_24 0>; + nvmem-cell-names = "mac-address"; phy-mode = "2500base-x"; - ext-phy-reg = <7>; - ext-phy-reset-gpios = <&pio 6 0>; - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; + phy-handle = <&phy7>; }; mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; - phy5: phy@5 { + phy5: ethernet-phy@5 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <5>; + reset-assert-us = <100000>; + reset-deassert-us = <100000>; + reset-gpios = <&pio 48 GPIO_ACTIVE_LOW>; + interrupt-parent = <&pio>; + interrupts = <47 IRQ_TYPE_LEVEL_LOW>; + realtek,aldps-enable; + realtek,led-link-select = <0xa7 0x03 0x0>; /* led0 at 10/100/1000/2.5G/(2.5G lite), led1 at 10/100 */ + realtek,led-act-select = <0x321b>; /* led on time = 400ms, duty = 12.5%, freq = 60ms, Enable 10M LPI, modeA, led0 led1 act */ + /*realtek,led-polarity-select = <0x0018>; */ }; - phy7: phy@7 { + phy7: ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <7>; + reset-assert-us = <100000>; + reset-deassert-us = <100000>; + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; + interrupt-parent = <&pio>; + interrupts = <46 IRQ_TYPE_LEVEL_LOW>; + realtek,aldps-enable; + realtek,led-link-select = <0xa7 0x03 0x0>; /* led0 at 10/100/1000/2.5G/(2.5G lite), led1 at 10/100 */ + realtek,led-act-select = <0x321b>; /* led on time = 400ms, duty = 12.5%, freq = 60ms, Enable 10M LPI, modeA, led0 led1 act */ + /*realtek,led-polarity-select = <0x0018>; */ }; - - switch@0 { + switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; - reset-gpios = <&pio 5 0>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; ports { #address-cells = <1>; @@ -127,39 +165,34 @@ port@0 { reg = <0>; - label = "lan0"; + label = "lan5"; }; port@1 { reg = <1>; - label = "lan1"; + label = "lan4"; }; port@2 { reg = <2>; - label = "lan2"; + label = "lan3"; }; port@3 { reg = <3>; - label = "lan3"; + label = "lan2"; }; port@4 { reg = <4>; - label = "lan4"; + label = "lan1"; }; port@5 { reg = <5>; - label = "lan5"; + label = "lan6"; phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; + phy-handle = <&phy5>; }; port@6 { @@ -179,117 +212,6 @@ }; }; -&pio { - wf_2g_5g_pins: wf-2g-5g-pins { - mux { - function = "wifi"; - groups = "wf_2g", "wf_5g"; - }; - conf { - pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", - "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", - "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", - "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", - "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", - "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", - "WF1_TOP_CLK", "WF1_TOP_DATA"; - drive-strength = <4>; - }; - }; - - mmc0_pins_default: mmc0-pins-default { - mux { - function = "emmc"; - groups = "emmc_51"; - }; - conf-cmd-dat { - pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", - "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", - "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; - input-enable; - drive-strength = <4>; - mediatek,pull-up-adv = <1>; /* pull-up 10K */ - }; - conf-clk { - pins = "EMMC_CK"; - drive-strength = <6>; - mediatek,pull-down-adv = <2>; /* pull-down 50K */ - }; - conf-ds { - pins = "EMMC_DSL"; - mediatek,pull-down-adv = <2>; /* pull-down 50K */ - }; - conf-rst { - pins = "EMMC_RSTB"; - drive-strength = <4>; - mediatek,pull-up-adv = <1>; /* pull-up 10K */ - }; - }; - - mmc0_pins_uhs: mmc0-uhs-pins { - mux { - function = "emmc"; - groups = "emmc_51"; - }; - conf-cmd-dat { - pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", - "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", - "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; - input-enable; - drive-strength = <4>; - mediatek,pull-up-adv = <1>; /* pull-up 10K */ - }; - conf-clk { - pins = "EMMC_CK"; - drive-strength = <6>; - mediatek,pull-down-adv = <2>; /* pull-down 50K */ - }; - conf-ds { - pins = "EMMC_DSL"; - mediatek,pull-down-adv = <2>; /* pull-down 50K */ - }; - conf-rst { - pins = "EMMC_RSTB"; - drive-strength = <4>; - mediatek,pull-up-adv = <1>; /* pull-up 10K */ - }; - }; -}; - -&crypto { - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <&usb_vbus>; - status = "okay"; -}; - -&trng { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; - -&usb_phy { - status = "okay"; -}; - -&watchdog { - status = "okay"; -}; - -&wifi { - nvmem-cells = <&eeprom_factory_0>; - nvmem-cell-names = "eeprom"; - pinctrl-names = "default"; - pinctrl-0 = <&wf_2g_5g_pins>; - status = "okay"; -}; - &mmc0 { pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; @@ -313,15 +235,8 @@ block { compatible = "block-device"; + partitions { - block-partition-env { - partname = "u-boot-env"; - - nvmem-layout { - compatible = "u-boot,env"; - }; - }; - block-partition-factory { partname = "factory"; @@ -334,14 +249,182 @@ reg = <0x0 0x1000>; }; - macaddr_factory_a: macaddr@a { + macaddr_factory_24: macaddr@24 { compatible = "mac-base"; - reg = <0xa 0x6>; + reg = <0x24 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_factory_2a: macaddr@2a { + compatible = "mac-base"; + reg = <0x2a 0x6>; #nvmem-cell-cells = <1>; }; }; }; + + emmc_rootdisk: block-partition-production { + partname = "production"; + }; }; }; }; }; + +&pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_pereset"; + }; + }; + + wf_2g_5g_pins: wf_2g_5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; +}; + +&wifi { + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>; + pinctrl-1 = <&wf_dbdc_pins>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <&usb_vbus>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&trng { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; \ No newline at end of file diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds index a46e6e9ae4..54b5f0d4a3 100755 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/01_leds @@ -161,6 +161,11 @@ zyxel,ex5601-t0-ubootmod) ucidef_set_led_netdev "wifi-24g" "WIFI-2.4G" "green:wifi24g" "phy0-ap0" "link tx rx" ucidef_set_led_netdev "wifi-5g" "WIFI-5G" "green:wifi5g" "phy1-ap0" "link tx rx" ;; +superbox,s20-plus) + ucidef_set_led_netdev "wlan5g" "5G" "blue:wlan-5ghz" "phy1-ap0" + ucidef_set_led_netdev "wlan2g" "2.4G" "blue:wlan-2ghz" "phy0-ap0" + ucidef_set_led_timer "sys" "SYS" "blue:status" "1000" "2000" + ;; esac board_config_flush diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 96c9888d97..066ed47808 100755 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -134,6 +134,9 @@ mediatek_setup_interfaces() tplink,re6000xd) ucidef_set_interface_lan "lan1 lan2 eth1" ;; + superbox,s20-plus) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6" eth1 + ;; xiaomi,mi-router-ax3000t|\ xiaomi,mi-router-ax3000t-ubootmod|\ xiaomi,mi-router-wr30u-stock|\ @@ -142,9 +145,6 @@ mediatek_setup_interfaces() xiaomi,redmi-router-ax6000-ubootmod) ucidef_set_interfaces_lan_wan "lan2 lan3 lan4" wan ;; - superbox,s20-plus) - ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6" wan - ;; *) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan ;; @@ -212,11 +212,6 @@ mediatek_setup_macs() yuncore,ax835) label_mac=$(mtd_get_mac_binary "Factory" 0x4) ;; - superbox,s20-plus) - wan_mac=$(mmc_get_mac_binary factory 0x24) - lan_mac=$(macaddr_add "$wan_mac" 2) - label_mac=$wan_mac - ;; esac [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index da3882aea7..c2011d8f3b 100755 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -90,8 +90,7 @@ case "$board" in ;; glinet,gl-mt6000|\ glinet,gl-x3000|\ - glinet,gl-xe3000|\ - superbox,s20-plus) + glinet,gl-xe3000) addr=$(mmc_get_mac_binary factory 0x04) [ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress @@ -174,4 +173,9 @@ case "$board" in [ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress ;; + superbox,s20-plus) + addr=$(mmc_get_mac_binary factory 0x4) + [ "$PHYNBR" = "0" ] && $addr > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_setbit_la $addr > /sys${DEVPATH}/macaddress + ;; esac diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 5a1c2f4901..f759f83527 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -97,7 +97,8 @@ platform_do_upgrade() { xiaomi,mi-router-ax3000t-ubootmod|\ xiaomi,redmi-router-ax6000-ubootmod|\ xiaomi,mi-router-wr30u-ubootmod|\ - zyxel,ex5601-t0-ubootmod) + zyxel,ex5601-t0-ubootmod|\ + superbox,s20-plus) fit_do_upgrade "$1" ;; acer,predator-w6|\ @@ -115,8 +116,7 @@ platform_do_upgrade() { smartrg,sdg-8632|\ smartrg,sdg-8733|\ smartrg,sdg-8733a|\ - smartrg,sdg-8734|\ - superbox,s20-plus) + smartrg,sdg-8734) CI_KERNPART="kernel" CI_ROOTPART="rootfs" emmc_do_upgrade "$1" diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 5cd82087be..f0ed660ad1 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -2096,14 +2096,27 @@ endef TARGET_DEVICES += zyxel_nwa50ax-pro define Device/superbox_s20-plus - DEVICE_VENDOR := SuperBox - DEVICE_MODEL := S20 Plus + DEVICE_VENDOR := Superbox + DEVICE_MODEL := S20-Plus DEVICE_DTS := mt7986a-superbox-s20-plus DEVICE_DTS_DIR := ../dts - DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7986-firmware mt7986-wo-firmware \ - automount f2fsck mkf2fs - IMAGES += factory.bin - IMAGE/factory.bin := append-kernel | pad-to 32M | append-rootfs - IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_DTC_FLAGS := --pad 4096 + DEVICE_DTS_LOADADDR := 0x43f00000 + DEVICE_PACKAGES := kmod-mt7915e kmod-mt7986-firmware mt7986-wo-firmware kmod-usb3 \ + automount e2fsprogs f2fsck mkf2fs + KERNEL_LOADADDR := 0x44000000 + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS := kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + IMAGES := sysupgrade.itb + IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m + IMAGE/sysupgrade.itb := append-kernel | \ + fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \ + pad-rootfs | append-metadata + ARTIFACTS :=gpt.bin preloader.bin bl31-uboot.fip + ARTIFACT/gpt.bin := mt798x-gpt emmc + ARTIFACT/preloader.bin := mt7986-bl2 emmc-ddr4 + ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot superbox_s20-plus endef TARGET_DEVICES += superbox_s20-plus diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-re-cs-03.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-re-cs-03.dts index 490485b839..9d69326cc1 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-re-cs-03.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-re-cs-03.dts @@ -24,6 +24,49 @@ led-upgrade = &led_status_red; }; + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 25 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&leds_pins>; + pinctrl-names = "default"; + + led_status_blue: status-blue { + label = "blue:status"; + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: status-green { + label = "green:status"; + gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; + + led_status_red: status-red { + label = "red:status"; + gpio = <&tlmm 33 GPIO_ACTIVE_HIGH>; + }; + }; + reserved-memory { #address-cells = <0x02>; #size-cells = <0x02>; @@ -84,115 +127,6 @@ reg = <0x0 0x51A00000 0x0 0x500000>; }; }; - - soc { - ess-instance { - num_devices = <0x2>; - - ess-switch@0x39c00000 { - compatible = "qcom,ess-switch-ipq50xx"; - reg = <0x39c00000 0x200000>; - switch_access_mode = "local bus"; - device_id = <0>; - switch_mac_mode = ; - cmnblk_clk = "internal_96MHz"; - - qcom,port_phyinfo { - port@0 { - port_id = <1>; - phy_address = <7>; - }; - port@1 { - port_id = <2>; - forced-speed = <1000>; - forced-duplex = <1>; - }; - }; - }; - - ess-switch1@1 { - compatible = "qcom,ess-switch-qca83xx"; - device_id = <1>; - switch_access_mode = "mdio"; - mdio-bus = <&mdio1>; - reset_gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; - switch_cpu_bmp = <0x40>; - switch_lan_bmp = <0x1e>; - switch_wan_bmp = <0x00>; - qca,ar8327-initvals = <0x04 0x7600000 0x08 0x1000000 0x0c 0x80 0x10 0x2613a0 0xe4 0xaa545 0xe0 0xc74164de 0x7c 0x4e 0x94 0x4e>; - - qcom,port_phyinfo { - port@0 { - port_id = <1>; - phy_address = <0>; - }; - port@1 { - port_id = <2>; - phy_address = <1>; - }; - port@2 { - port_id = <3>; - phy_address = <2>; - }; - port@3 { - port_id = <4>; - phy_address = <3>; - }; - }; - }; - }; - - dp1 { - status = "okay"; - }; - - dp2 { - status = "okay"; - }; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - reset { - label = "reset"; - linux,code = ; - gpios = <&tlmm 25 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - debounce-interval = <60>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - debounce-interval = <60>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&leds_pins>; - pinctrl-names = "default"; - - led_status_blue: status-blue { - label = "blue:status"; - gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; - }; - - led_status_green: status-green { - label = "green:status"; - gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; - }; - - led_status_red: status-red { - label = "red:status"; - gpio = <&tlmm 33 GPIO_ACTIVE_HIGH>; - }; - }; }; &blsp1_uart1 { @@ -215,37 +149,6 @@ status = "okay"; }; -&mdio0 { - status = "okay"; - - ethernet-phy@0 { - reg = <7>; - }; -}; - -&mdio1 { - pinctrl-0 = <&mdio1_pins>; - pinctrl-names = "default"; - phy-reset-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; - status = "okay"; - - ethernet-phy@0 { - reg = <0>; - }; - - ethernet-phy@1 { - reg = <1>; - }; - - ethernet-phy@2 { - reg = <2>; - }; - - ethernet-phy@3 { - reg = <3>; - }; -}; - &q6v5_wcss { status = "okay"; @@ -317,22 +220,32 @@ }; }; - mdio1_pins: mdio1-pins { - mdio1_mdc { + mdio1_pins: mdio_pinmux { + mux_0 { pins = "gpio36"; function = "mdc"; - drive-strength = <8>; + drive-strength = <0x08>; bias-pull-up; }; - mdio1_mdio { + mux_1 { pins = "gpio37"; function = "mdio"; - drive-strength = <8>; + drive-strength = <0x08>; bias-pull-up; }; }; + phy_pins: phy-pins { + phy_reset { + pins = "gpio39"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + output-low; + }; + }; + emmc_pins: emmc-pins { emmc_clk { pins = "gpio9"; @@ -348,31 +261,10 @@ bias-pull-up; }; - emmc_data_0 { - pins = "gpio7"; - function = "sdc10"; - drive-strength = <0x08>; - bias-disable; - }; - - emmc_data_1 { - pins = "gpio6"; - function = "sdc11"; - drive-strength = <0x08>; - bias-disable; - }; - - emmc_data_2 { - pins = "gpio5"; - function = "sdc12"; - drive-strength = <0x08>; - bias-disable; - }; - - emmc_data_3 { - pins = "gpio4"; - function = "sdc13"; - drive-strength = <0x08>; + emmc_data { + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + function = "sdc1_data"; + drive-strength = <8>; bias-disable; }; }; @@ -411,4 +303,4 @@ mem-region = <&q6_qcn6122_data1_regions>; qcom,ath11k-calibration-variant = "JDC-RE-CS-03"; qcom,ath11k-fw-memory-mode = <1>; -}; +}; \ No newline at end of file