uboot-sifiveu: bump to 2023.10

Upgrade the u-boot to a more recent version, and drop and refresh
patches while at it. Additionally, use the correct architecture
when running mkimage.

Runtime-tested:
 - SiFive Unleashed
 - SiFive Unmatched

Dropped:
0009-riscv-Fix-build-against-binutils.patch

Added:
0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

package/boot/uboot-sifiveu/Makefile

@@ -7,8 +7,8 @@ include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
 PKG_RELEASE:=1
-PKG_VERSION:=2022.10
+PKG_VERSION:=2023.10
-PKG_HASH:=50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8
+PKG_HASH:=e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900
 
 UBOOT_USE_INTREE_DTC:=1
 
@@ -58,7 +58,7 @@ define Build/InstallDev
 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)-spl
 	$(INSTALL_BIN) $(PKG_BUILD_DIR)/$(DTS_DIR)/$(UBOOT_DTS) $(STAGING_DIR_IMAGE)/$(UBOOT_DTS)
 
-	mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \
+	mkimage -C none -A riscv -T script -d uEnv-$(UENV).txt \
 		$(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr
 endef
 

package/boot/uboot-sifiveu/patches/0001-board-sifive-spl-Initialized-the-PWM-setting-in-the-.patch

@@ -1,19 +1,42 @@
-From 725595e667cc4423347c255da8ca4c5b3aa0980a Mon Sep 17 00:00:00 2001
+From 2ba4e6d78e0a63e5d491f9b01b498899e58cb58d Mon Sep 17 00:00:00 2001
 From: Vincent Chen <vincent.chen@sifive.com>
 Date: Mon, 15 Nov 2021 03:31:04 -0800
-Subject: [PATCH 2/8] board: sifive: spl: Initialized the PWM setting in the
+Subject: [PATCH 1/5] board: sifive: spl: Initialized the PWM setting in the
  SPL stage
 
 LEDs and multiple fans can be controlled by SPL. This patch ensures
 that all fans have been enabled in the SPL stage. In addition, the
 LED's color will be set to yellow.
+
+Upstream-Status: Pending
+Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
 ---
- board/sifive/unmatched/Makefile |  1 +
+ arch/riscv/include/asm/arch-fu740/eeprom.h | 15 ++++++
- board/sifive/unmatched/pwm.c    | 57 +++++++++++++++++++++++++++++++++
+ board/sifive/unmatched/Makefile            |  1 +
- board/sifive/unmatched/spl.c    |  2 ++
+ board/sifive/unmatched/pwm.c               | 57 ++++++++++++++++++++++
- 3 files changed, 60 insertions(+)
+ board/sifive/unmatched/spl.c               |  2 +
+ 4 files changed, 75 insertions(+)
+ create mode 100644 arch/riscv/include/asm/arch-fu740/eeprom.h
  create mode 100644 board/sifive/unmatched/pwm.c
 
+--- /dev/null
++++ b/arch/riscv/include/asm/arch-fu740/eeprom.h
+@@ -0,0 +1,15 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/*
++ * Copyright (C) 2021 SiFive, Inc.
++ *
++ * Zong Li <zong.li@sifve.com>
++ */
++
++#ifndef _ASM_RISCV_EEPROM_H
++#define _ASM_RISCV_EEPROM_H
++
++#define PCB_REVISION_REV3	0x3
++
++u8 get_pcb_revision_from_eeprom(void);
++
++#endif /* _ASM_RISCV_EEPROM_H */
 --- a/board/sifive/unmatched/Makefile
 +++ b/board/sifive/unmatched/Makefile
 @@ -9,3 +9,4 @@ obj-y += spl.o

package/boot/uboot-sifiveu/patches/0002-board-sifive-Set-LED-s-color-to-purple-in-the-U-boot.patch

@@ -1,13 +1,16 @@
-From 7ead6d662a2f9d8498af6650ea38418c64b52048 Mon Sep 17 00:00:00 2001
+From 0dfab8fab80107aa4ad7d41a8ff47e5ff59632f9 Mon Sep 17 00:00:00 2001
 From: Vincent Chen <vincent.chen@sifive.com>
 Date: Mon, 24 Jan 2022 02:42:02 -0800
-Subject: [PATCH 3/8] board: sifive: Set LED's color to purple in the U-boot
+Subject: [PATCH 2/5] board: sifive: Set LED's color to purple in the U-boot
  stage
 
 Set LED's color to purple in the U-boot stage. Because there are still
 some functions to be executed before board_early_init_f(), it means
 the LED's is not changed to purple instantly when entering the U-boot
 stage.
+
+Upstream-Status: Pending
+Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
 ---
  board/sifive/unmatched/pwm.c       | 7 +++++++
  board/sifive/unmatched/unmatched.c | 6 ++++++
@@ -52,7 +55,7 @@ stage.
  	/* enable all cache ways */
 --- a/configs/sifive_unmatched_defconfig
 +++ b/configs/sifive_unmatched_defconfig
-@@ -62,3 +62,4 @@ CONFIG_DM_SCSI=y
+@@ -63,3 +63,4 @@ CONFIG_DM_SCSI=y
  CONFIG_USB=y
  CONFIG_USB_XHCI_HCD=y
  CONFIG_USB_XHCI_PCI=y

package/boot/uboot-sifiveu/patches/0003-board-sifive-Set-LED-s-color-to-blue-before-jumping-.patch

@@ -1,20 +1,23 @@
-From 6ef7023c0dcfde320015ab19e0e0d423921be77d Mon Sep 17 00:00:00 2001
+From 1a48019dd4b69dd76551217a61cc4cab9e92fd39 Mon Sep 17 00:00:00 2001
 From: Vincent Chen <vincent.chen@sifive.com>
 Date: Mon, 15 Nov 2021 03:39:07 -0800
-Subject: [PATCH 1/2] board: sifive: Set LED's color to blue before jumping to
+Subject: [PATCH 3/5] board: sifive: Set LED's color to blue before jumping to
  Linux
 
 The LED's color wil be changed from purple to blue before executing
 the sysboot command. Because the sysboot command includes the image loading
 from the boot partition, It means the LED's color is blue when executing
 "Retrieving file: /Image.gz".
+
+Upstream-Status: Pending
+Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
 ---
  include/configs/sifive-unmatched.h | 7 ++++++-
  1 file changed, 6 insertions(+), 1 deletion(-)
 
 --- a/include/configs/sifive-unmatched.h
 +++ b/include/configs/sifive-unmatched.h
-@@ -49,7 +49,12 @@
+@@ -48,6 +48,11 @@
  	"type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
  	"partitions=" PARTS_DEFAULT "\0" \
  	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
@@ -26,5 +29,4 @@ from the boot partition, It means the LED's color is blue when executing
 +		"sysboot ${devtype} ${devnum}:${distro_bootpart} any " \
 +			"${scriptaddr} ${prefix}${boot_syslinux_conf};\0"
  
- #define CONFIG_SYS_EEPROM_BUS_NUM		0
+ #endif /* __SIFIVE_UNMATCHED_H */
- 

package/boot/uboot-sifiveu/patches/0004-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch

@@ -0,0 +1,67 @@
+From 877afdf63129caa64d70d4a1252eec44778cfa0e Mon Sep 17 00:00:00 2001
+From: Vincent Chen <vincent.chen@sifive.com>
+Date: Mon, 24 Jan 2022 02:57:40 -0800
+Subject: [PATCH 4/5] board: sifive: spl: Set remote thermal of TMP451 to 85
+ deg C
+
+ for the unmatched board
+
+For TMP451 on the unmatched board, the default value of the remote
+thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
+
+Upstream-Status: Pending
+Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
+Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
+---
+ board/sifive/unmatched/spl.c | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+--- a/board/sifive/unmatched/spl.c
++++ b/board/sifive/unmatched/spl.c
+@@ -10,6 +10,8 @@
+ #include <spl.h>
+ #include <misc.h>
+ #include <log.h>
++#include <config.h>
++#include <i2c.h>
+ #include <linux/delay.h>
+ #include <linux/io.h>
+ #include <asm/gpio.h>
+@@ -26,6 +28,24 @@
+ #define MODE_SELECT_SD		0xb
+ #define MODE_SELECT_MASK	GENMASK(3, 0)
+ 
++#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET	0x19
++#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE	0x55
++
++static inline int init_tmp451_remote_therm_limit(void)
++{
++	struct udevice *dev;
++	unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
++	int ret;
++
++	ret = i2c_get_chip_for_busnum(0, 0x4c, 0x1, &dev);
++
++	if (!ret)
++		ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
++				   &r_therm_limit,
++				   sizeof(unsigned char));
++	return ret;
++}
++
+ static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
+ {
+ 	int ret;
+@@ -92,6 +112,12 @@ int spl_board_init_f(void)
+ 
+ 	pwm_device_init();
+ 
++	ret = init_tmp451_remote_therm_limit();
++	if (ret) {
++		debug("TMP451 remote THERM limit init failed: %d\n", ret);
++		goto end;
++	}
++
+ 	ret = spl_gemgxl_init();
+ 	if (ret) {
+ 		debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);

package/boot/uboot-sifiveu/patches/0005-board-sifive-spl-Set-remote-thermal-of-TMP451-to-85-.patch

@@ -1,111 +0,0 @@
-From 07f84ed283b913cbdf87181ae2ed65467d923df5 Mon Sep 17 00:00:00 2001
-From: Vincent Chen <vincent.chen@sifive.com>
-Date: Mon, 24 Jan 2022 02:57:40 -0800
-Subject: [PATCH 2/2] board: sifive: spl: Set remote thermal of TMP451 to 85
- deg C for the unmatched board
-
-For TMP451 on the unmatched board, the default value of the remote
-thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
----
- board/sifive/unmatched/spl.c       | 29 +++++++++++++++++++++++++++++
- drivers/misc/Kconfig               | 10 ++++++++++
- include/configs/sifive-unmatched.h |  4 ++++
- scripts/config_whitelist.txt       |  1 +
- 4 files changed, 44 insertions(+)
-
---- a/board/sifive/unmatched/spl.c
-+++ b/board/sifive/unmatched/spl.c
-@@ -10,6 +10,8 @@
- #include <spl.h>
- #include <misc.h>
- #include <log.h>
-+#include <config.h>
-+#include <i2c.h>
- #include <linux/delay.h>
- #include <linux/io.h>
- #include <asm/gpio.h>
-@@ -26,6 +28,27 @@
- #define MODE_SELECT_SD		0xb
- #define MODE_SELECT_MASK	GENMASK(3, 0)
- 
-+#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET	0x19
-+#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE	0x55
-+
-+static inline int init_tmp451_remote_therm_limit(void)
-+{
-+	struct udevice *dev;
-+	unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
-+	int ret;
-+
-+	ret = i2c_get_chip_for_busnum(CONFIG_SYS_TMP451_BUS_NUM,
-+				      CONFIG_SYS_I2C_TMP451_ADDR,
-+				      CONFIG_SYS_I2C_TMP451_ADDR_LEN,
-+				      &dev);
-+
-+	if (!ret)
-+		ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
-+				   &r_therm_limit,
-+				   sizeof(unsigned char));
-+	return ret;
-+}
-+
- static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
- {
- 	int ret;
-@@ -92,6 +115,12 @@ int spl_board_init_f(void)
- 
- 	pwm_device_init();
- 
-+	ret = init_tmp451_remote_therm_limit();
-+	if (ret) {
-+		debug("TMP451 remote THERM limit init failed: %d\n", ret);
-+		goto end;
-+	}
-+
- 	ret = spl_gemgxl_init();
- 	if (ret) {
- 		debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
---- a/drivers/misc/Kconfig
-+++ b/drivers/misc/Kconfig
-@@ -536,8 +536,18 @@ config SYS_I2C_EEPROM_ADDR
- 	depends on ID_EEPROM || I2C_EEPROM || SPL_I2C_EEPROM || CMD_EEPROM || ENV_IS_IN_EEPROM
- 	default 0
- 
-+config SYS_I2C_TMP451_ADDR
-+	hex "Chip address of the TMP451 device"
-+	default 0
-+
- if I2C_EEPROM
- 
-+config SYS_I2C_TMP451_ADDR_LEN
-+	int "Length in bytes of the TMP451 memory array address"
-+	default 1
-+	help
-+	  Note: This is NOT the chip address length!
-+
- config SYS_I2C_EEPROM_ADDR_OVERFLOW
- 	hex "EEPROM Address Overflow"
- 	default 0x0
---- a/include/configs/sifive-unmatched.h
-+++ b/include/configs/sifive-unmatched.h
-@@ -15,6 +15,10 @@
- 
- #define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
- 
-+#define CONFIG_SYS_TMP451_BUS_NUM	0
-+#define CONFIG_SYS_I2C_TMP451_ADDR	0x4c
-+#define CONFIG_SYS_I2C_TMP451_ADDR_LEN	0x1
-+
- /* Environment options */
- 
- #define BOOT_TARGET_DEVICES(func) \
---- a/scripts/config_whitelist.txt
-+++ b/scripts/config_whitelist.txt
-@@ -1268,6 +1268,7 @@ CONFIG_SYS_TIMER_BASE
- CONFIG_SYS_TIMER_COUNTER
- CONFIG_SYS_TIMER_COUNTS_DOWN
- CONFIG_SYS_TIMER_RATE
-+CONFIG_SYS_TMP451_BUS_NUM
- CONFIG_SYS_TMPVIRT
- CONFIG_SYS_TSEC1_OFFSET
- CONFIG_SYS_TX_ETH_BUFFER

package/boot/uboot-sifiveu/patches/0005-riscv-dts-Add-few-PMU-events.patch

@@ -1,7 +1,7 @@
-From c29e4d84cfa17ab96eff2a9044f486ba3c8b5c43 Mon Sep 17 00:00:00 2001
+From 9b2868e9fda750c985313a40e60b67f96dc77ed1 Mon Sep 17 00:00:00 2001
 From: Atish Patra <atish.patra@wdc.com>
 Date: Mon, 25 Oct 2021 11:35:41 -0700
-Subject: [PATCH] riscv: dts: Add few PMU events
+Subject: [PATCH 5/5] riscv: dts: Add few PMU events
 
 fu740 has 2 HPM counters and many HPM events defined in the fu740 manual[1].
 This patch adds some of these events and their mapping as per the
@@ -9,6 +9,7 @@ OpenSBI PMU DT binding for now.
 
 [1]https://sifive.cdn.prismic.io/sifive/de1491e5-077c-461d-9605-e8a0ce57337d_fu740-c000-manual-v1p3.pdf
 
+Upstream-Status: Pending
 Signed-off-by: Atish Patra <atish.patra@wdc.com>
 ---
  arch/riscv/dts/fu740-c000.dtsi | 11 +++++++++++

package/boot/uboot-sifiveu/patches/0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch

@@ -0,0 +1,22 @@
+From 45f9941ddc6346b38aa9eb7f033e1e169b63bdc7 Mon Sep 17 00:00:00 2001
+From: Thomas Perrot <thomas.perrot@bootlin.com>
+Date: Fri, 8 Dec 2023 11:24:37 +0100
+Subject: [PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to
+ 1600MT/s
+
+Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
+---
+ arch/riscv/dts/fu740-c000-u-boot.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
++++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
+@@ -77,7 +77,7 @@
+ 			       0x0 0x100b2000 0x0 0x2000
+ 			       0x0 0x100b8000 0x0 0x1000>;
+ 			clocks = <&prci FU740_PRCI_CLK_DDRPLL>;
+-			clock-frequency = <933333324>;
++			clock-frequency = <800000004>;
+ 			bootph-pre-ram;
+ 		};
+ 	};

package/boot/uboot-sifiveu/patches/0009-riscv-Fix-build-against-binutils.patch

@@ -1,48 +0,0 @@
-commit 1dde977518f13824b847e23275001191139bc384
-Author: Alexandre Ghiti <alexandre.ghiti@canonical.com>
-Date:   Mon Oct 3 18:07:54 2022 +0200
-
-    riscv: Fix build against binutils 2.38
-    
-    The following description is copied from the equivalent patch for the
-    Linux Kernel proposed by Aurelien Jarno:
-    
-    >From version 2.38, binutils default to ISA spec version 20191213. This
-    means that the csr read/write (csrr*/csrw*) instructions and fence.i
-    instruction has separated from the `I` extension, become two standalone
-    extensions: Zicsr and Zifencei. As the kernel uses those instruction,
-    this causes the following build failure:
-    
-    arch/riscv/cpu/mtrap.S: Assembler messages:
-    arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
-    arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
-    arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
-    arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'
-    
-    Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
-    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-    Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
-    Tested-by: Heiko Stuebner <heiko@sntech.de>
-    Tested-by: Christian Stewart <christian@paral.in>
-    Reviewed-by: Rick Chen <rick@andestech.com>
-
---- a/arch/riscv/Makefile
-+++ b/arch/riscv/Makefile
-@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
- 	CMODEL = medany
- endif
- 
--ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
-+RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
-+
-+# Newer binutils versions default to ISA spec version 20191213 which moves some
-+# instructions from the I extension to the Zicsr and Zifencei extensions.
-+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
-+ifeq ($(toolchain-need-zicsr-zifencei),y)
-+	RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
-+endif
-+
-+ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
- 	     -mcmodel=$(CMODEL)
- 
- PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)

package/boot/uboot-sifiveu/patches/100-mkimage-check-environment-for-dtc-binary-location.patch

@@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
 
 --- a/tools/fit_image.c
 +++ b/tools/fit_image.c
-@@ -729,9 +729,14 @@ static int fit_handle_file(struct image_
+@@ -754,9 +754,14 @@ static int fit_handle_file(struct image_
  		}
  		*cmd = '\0';
  	} else if (params->datafile) {

package/boot/uboot-sifiveu/patches/110-no-kwbimage.patch

@@ -1,10 +1,10 @@
 --- a/tools/Makefile
 +++ b/tools/Makefile
-@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \
+@@ -114,7 +114,6 @@ dumpimage-mkimage-objs := aisimage.o \
  			imximage.o \
  			imx8image.o \
  			imx8mimage.o \
 -			kwbimage.o \
- 			lib/md5.o \
+ 			generated/lib/md5.o \
  			lpc32xximage.o \
  			mxsimage.o \

package/boot/uboot-sifiveu/patches/130-fix-mkimage-host-build.patch

@@ -1,6 +1,6 @@
 --- a/tools/image-host.c
 +++ b/tools/image-host.c
-@@ -1122,6 +1122,7 @@ static int fit_config_add_verification_d
+@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d
   * 2) get public key (X509_get_pubkey)
   * 3) provide der format (d2i_RSAPublicKey)
   */
@@ -8,7 +8,7 @@
  static int read_pub_key(const char *keydir, const void *name,
  			unsigned char **pubkey, int *pubkey_len)
  {
-@@ -1175,6 +1176,13 @@ err_cert:
+@@ -1178,6 +1179,13 @@ err_cert:
  	fclose(f);
  	return ret;
  }