diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0010-add-support-for-dosilicon-fmsh-gsto-spi-nand.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0010-add-support-for-dosilicon-fmsh-gsto-spi-nand.patch new file mode 100644 index 0000000000..36c00d2f35 --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0010-add-support-for-dosilicon-fmsh-gsto-spi-nand.patch @@ -0,0 +1,36 @@ +--- a/plat/mediatek/apsoc_common/drivers/spi_nand/mtk_spi_nand.c ++++ b/plat/mediatek/apsoc_common/drivers/spi_nand/mtk_spi_nand.c +@@ -20,8 +20,11 @@ + + #define SPI_NAND_MAX_ID_LEN 4U + #define DELAY_US_400MS 400000U ++#define DOSILICON_ID 0xE5U + #define ETRON_ID 0xD5U ++#define FMSH_ID 0xA1U + #define GIGADEVICE_ID 0xC8U ++#define GSTO_ID 0x52U + #define MACRONIX_ID 0xC2U + #define MICRON_ID 0x2CU + #define TOSHIBA_ID 0x98U +@@ -145,7 +148,10 @@ static int spi_nand_quad_enable(uint8_t + + if (manufacturer_id != MACRONIX_ID && + manufacturer_id != GIGADEVICE_ID && ++ manufacturer_id != GSTO_ID && ++ manufacturer_id != DOSILICON_ID && + manufacturer_id != ETRON_ID && ++ manufacturer_id != FMSH_ID && + manufacturer_id != FORESEE_ID) { + return 0; + } +@@ -542,6 +548,10 @@ static int spi_nand_check_pp(struct para + INFO("PP COPY %d CRC read: 0x%x, compute: 0x%x\n", + i, crc, crc_compute); + ++ // HACK: for FMSH ++ if (crc != crc_compute) ++ crc = htobe16(pp->integrity_crc); ++ + if (crc != crc_compute) { + ret = -EBADMSG; + continue; diff --git a/package/boot/uboot-envtools/files/ath79 b/package/boot/uboot-envtools/files/ath79 index c989e61bd5..4a76e0ee6d 100644 --- a/package/boot/uboot-envtools/files/ath79 +++ b/package/boot/uboot-envtools/files/ath79 @@ -85,6 +85,7 @@ yuncore,a930|\ yuncore,xd3200|\ yuncore,xd4200|\ ziking,cpe46b|\ +zte,e8820|\ zyxel,nbg6616) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000" ;; diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 76f98d3631..83acf3be31 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -77,6 +77,7 @@ bananapi,bpi-r3-mini|\ bananapi,bpi-r4|\ bananapi,bpi-r4-poe|\ cmcc,rax3000m|\ +cmcc,rax3000me|\ jdcloud,re-cp-03|\ konka,komi-a31|\ superbox,s20-plus) diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index a7ee7cbb27..188b76dadb 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -279,6 +279,42 @@ define U-Boot/mt7981_cmcc_rax3000m-nand DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr4 endef +define U-Boot/mt7981_cmcc_rax3000me-emmc + NAME:=CMCC RAX3000Me + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=cmcc_rax3000me + UBOOT_CONFIG:=mt7981_cmcc_rax3000me-emmc + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=emmc + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr3 + DEPENDS:=+trusted-firmware-a-mt7981-emmc-ddr3 +endef + +define U-Boot/mt7981_cmcc_rax3000me-nand-ddr3 + NAME:=CMCC RAX3000Me + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=cmcc_rax3000me + UBOOT_CONFIG:=mt7981_cmcc_rax3000me-nand-ddr3 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=spim-nand + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr3 + DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3 +endef + +define U-Boot/mt7981_cmcc_rax3000me-nand-ddr4 + NAME:=CMCC RAX3000Me + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=cmcc_rax3000me + UBOOT_CONFIG:=mt7981_cmcc_rax3000me-nand-ddr4 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=spim-nand + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr4 + DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr4 +endef + define U-Boot/mt7981_cudy_tr3000-v1 NAME:=Cudy TR3000 v1 BUILD_SUBTARGET:=filogic @@ -956,6 +992,9 @@ UBOOT_TARGETS := \ mt7981_cmcc_a10 \ mt7981_cmcc_rax3000m-emmc \ mt7981_cmcc_rax3000m-nand \ + mt7981_cmcc_rax3000me-emmc \ + mt7981_cmcc_rax3000me-nand-ddr3 \ + mt7981_cmcc_rax3000me-nand-ddr4 \ mt7981_cudy_tr3000-v1 \ mt7981_gatonetworks_gdsp \ mt7981_glinet_gl-x3000 \ diff --git a/package/boot/uboot-mediatek/patches/341-mtd-spinand-Support-dosilicon.patch b/package/boot/uboot-mediatek/patches/341-mtd-spinand-Support-dosilicon.patch new file mode 100644 index 0000000000..394065f243 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/341-mtd-spinand-Support-dosilicon.patch @@ -0,0 +1,332 @@ +From cead43cc5781492f2706eeed1157c8986a216bc9 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Sun, 17 Oct 2021 09:51:39 +0800 +Subject: [PATCH] mtd: spinand: Support dosilicon + +DS35X1GA, DS35Q2GA, DS35M1GA, DS35M2GA, DS35Q2GB, DS35M1GB + +Change-Id: I5aeb0219f01dbe98d36b398e66b94ab31b07788e +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/dosilicon.c | 187 +++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 190 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/dosilicon.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,5 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + + spinand-objs := core.o esmt.o foresee.o etron.o gigadevice.o macronix.o micron.o paragon.o ++spinand-objs += dosilicon.o + spinand-objs += toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -826,6 +826,7 @@ static const struct nand_ops spinand_ops + }; + + static const struct spinand_manufacturer *spinand_manufacturers[] = { ++ &dosilicon_spinand_manufacturer, + &etron_spinand_manufacturer, + &gigadevice_spinand_manufacturer, + ¯onix_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/dosilicon.c +@@ -0,0 +1,283 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ */ ++ ++#ifndef __UBOOT__ ++#include ++#include ++#endif ++#include ++ ++#define SPINAND_MFR_DOSILICON 0xE5 ++ ++#define DOSICON_STATUS_ECC_MASK GENMASK(6, 4) ++#define DOSICON_STATUS_ECC_NO_BITFLIPS (0 << 4) ++#define DOSICON_STATUS_ECC_1TO3_BITFLIPS (1 << 4) ++#define DOSICON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) ++#define DOSICON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 8; ++ region->length = 8; ++ ++ return 0; ++} ++ ++static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 2; ++ region->length = 6; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxga_ooblayout = { ++ .ecc = ds35xxga_ooblayout_ecc, ++ .rfree = ds35xxga_ooblayout_free, ++}; ++ ++static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ /* Reserve 1 bytes for the BBM. */ ++ region->offset = 1; ++ region->length = 63; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = { ++ .ecc = ds35xxgb_ooblayout_ecc, ++ .rfree = ds35xxgb_ooblayout_free, ++}; ++ ++static int ds35xxgb_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ switch (status & DOSICON_STATUS_ECC_MASK) { ++ case STATUS_ECC_NO_BITFLIPS: ++ return 0; ++ ++ case STATUS_ECC_UNCOR_ERROR: ++ return -EBADMSG; ++ ++ case DOSICON_STATUS_ECC_1TO3_BITFLIPS: ++ return 3; ++ ++ case DOSICON_STATUS_ECC_4TO6_BITFLIPS: ++ return 6; ++ ++ case DOSICON_STATUS_ECC_7TO8_BITFLIPS: ++ return 8; ++ ++ default: ++ break; ++ } ++ ++ return -EINVAL; ++} ++ ++static const struct spinand_info dosilicon_spinand_table[] = { ++ SPINAND_INFO("DS35X1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q4GM", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF4), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GD-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M4GB-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q4GB-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB4), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q12C-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M12C-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q2GBS", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer dosilicon_spinand_manufacturer = { ++ .id = SPINAND_MFR_DOSILICON, ++ .name = "dosilicon", ++ .chips = dosilicon_spinand_table, ++ .nchips = ARRAY_SIZE(dosilicon_spinand_table), ++ .ops = &dosilicon_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -244,6 +244,7 @@ struct spinand_manufacturer { + }; + + /* SPI NAND manufacturers */ ++extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; + extern const struct spinand_manufacturer etron_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; diff --git a/package/boot/uboot-mediatek/patches/342-mtd-spinand-Support-fmsh.patch b/package/boot/uboot-mediatek/patches/342-mtd-spinand-Support-fmsh.patch new file mode 100644 index 0000000000..2e23ba4110 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/342-mtd-spinand-Support-fmsh.patch @@ -0,0 +1,290 @@ +From 205a24e34751220c3ba04f0ac6ecc734e56ed225 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Sun, 17 Oct 2021 09:59:10 +0800 +Subject: [PATCH] mtd: spinand: Support fmsh + +FM25S01A, FM25S02A, FM25S01 + +Change-Id: I7e0ceec39c57dc591d77a4ebde599ad326cf25b7 +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/fmsh.c | 122 ++++++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 125 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/fmsh.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + + spinand-objs := core.o esmt.o foresee.o etron.o gigadevice.o macronix.o micron.o paragon.o +-spinand-objs += dosilicon.o ++spinand-objs += dosilicon.o fmsh.o + spinand-objs += toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -828,6 +828,7 @@ static const struct nand_ops spinand_ops + static const struct spinand_manufacturer *spinand_manufacturers[] = { + &dosilicon_spinand_manufacturer, + &etron_spinand_manufacturer, ++ &fmsh_spinand_manufacturer, + &gigadevice_spinand_manufacturer, + ¯onix_spinand_manufacturer, + µn_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/fmsh.c +@@ -0,0 +1,240 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd. ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#ifndef __UBOOT__ ++#include ++#include ++#endif ++#include ++ ++#define SPINAND_MFR_FMSH 0xA1 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ return -ERANGE; ++} ++ ++static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01a_ooblayout = { ++ .ecc = fm25s01a_ooblayout_ecc, ++ .rfree = fm25s01a_ooblayout_free, ++}; ++ ++static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01_ooblayout = { ++ .ecc = fm25s01_ooblayout_ecc, ++ .rfree = fm25s01_ooblayout_free, ++}; ++ ++/* ++ * ecc bits: 0xC0[4,6] ++ * [0b000], No bit errors were detected; ++ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not ++ * reach Flipping Bits; ++ * [0b101], Bit error count equals the bit flip ++ * detection threshold ++ * [0b010], Multiple bit errors were detected and ++ * not corrected. ++ * others, Reserved. ++ */ ++static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ struct nand_device *nand = spinand_to_nand(spinand); ++ u8 eccsr = (status & GENMASK(6, 4)) >> 4; ++ ++ if (eccsr <= 1 || eccsr == 3) ++ return eccsr; ++ else if (eccsr == 5) ++ return nand->eccreq.strength; ++ else ++ return -EBADMSG; ++} ++ ++static int fm25g0xd_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int fm25g0xd_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ /* Reserve 2 bytes for the BBM. */ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25g0xd_ooblayout = { ++ .ecc = fm25g0xd_ooblayout_ecc, ++ .rfree = fm25g0xd_ooblayout_free, ++}; ++ ++/* ++ * ecc bits: 0xC0[4,6] ++ * [0x0], No bit errors were detected; ++ * [0x001, 0x011], Bit errors were detected and corrected. Not ++ * reach Flipping Bits; ++ * [0x100], Bit error count equals the bit flip ++ * detectionthreshold ++ * [0x101, 0x110], Reserved; ++ * [0x111], Multiple bit errors were detected and ++ * not corrected. ++ */ ++static int fm25g0xd_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ struct nand_device *nand = spinand_to_nand(spinand); ++ u8 eccsr = (status & GENMASK(6, 4)) >> 4; ++ ++ if (eccsr <= 3) ++ return 0; ++ else if (eccsr == 4) ++ return nand->eccreq.strength; ++ else ++ return -EBADMSG; ++} ++ ++static const struct spinand_info fmsh_spinand_table[] = { ++ SPINAND_INFO("FM25S01A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S02A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25LS01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01BI3", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), ++ SPINAND_INFO("FM25S02BI3-DND-A-G3", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD6), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), ++ SPINAND_INFO("FM25G02D", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25g0xd_ooblayout, fm25g0xd_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer fmsh_spinand_manufacturer = { ++ .id = SPINAND_MFR_FMSH, ++ .name = "FMSH", ++ .chips = fmsh_spinand_table, ++ .nchips = ARRAY_SIZE(fmsh_spinand_table), ++ .ops = &fmsh_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -246,6 +246,7 @@ struct spinand_manufacturer { + /* SPI NAND manufacturers */ + extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; + extern const struct spinand_manufacturer etron_spinand_manufacturer; ++extern const struct spinand_manufacturer fmsh_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; + extern const struct spinand_manufacturer micron_spinand_manufacturer; diff --git a/package/boot/uboot-mediatek/patches/343-mtd-spinand-gsto-Add-code.patch b/package/boot/uboot-mediatek/patches/343-mtd-spinand-gsto-Add-code.patch new file mode 100644 index 0000000000..deb7396541 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/343-mtd-spinand-gsto-Add-code.patch @@ -0,0 +1,189 @@ +From 1e5200d59e21c8a8fa63badf415becb2301e78a4 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Thu, 27 Apr 2023 22:00:04 +0800 +Subject: [PATCH] mtd: spinand: gsto: Add code + +GSS01GSAK1, GSS02GSAK1 + +Change-Id: I7ee9048d934694803d6d081cb7d0cdc56f114e79 +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/gsto.c | 90 +++++++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 93 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/gsto.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + + spinand-objs := core.o esmt.o foresee.o etron.o gigadevice.o macronix.o micron.o paragon.o +-spinand-objs += dosilicon.o fmsh.o ++spinand-objs += dosilicon.o fmsh.o gsto.o + spinand-objs += toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -830,6 +830,7 @@ static const struct spinand_manufacturer + &etron_spinand_manufacturer, + &fmsh_spinand_manufacturer, + &gigadevice_spinand_manufacturer, ++ &gsto_spinand_manufacturer, + ¯onix_spinand_manufacturer, + µn_spinand_manufacturer, + ¶gon_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/gsto.c +@@ -0,0 +1,139 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2023 Rockchip Electronics Co., Ltd. ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#ifndef __UBOOT__ ++#include ++#include ++#endif ++#include ++ ++#define SPINAND_MFR_GSTO 0x52 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int gss0xgsak1_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 32; ++ region->length = 32; ++ ++ return 0; ++} ++ ++static int gss0xgsak1_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 30; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops gss0xgsak1_ooblayout = { ++ .ecc = gss0xgsak1_ooblayout_ecc, ++ .rfree = gss0xgsak1_ooblayout_free, ++}; ++ ++static int gss0xgsax1_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int gss0xgsax1_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops gss0xgsax1_ooblayout = { ++ .ecc = gss0xgsax1_ooblayout_ecc, ++ .rfree = gss0xgsax1_ooblayout_free, ++}; ++ ++static const struct spinand_info gsto_spinand_table[] = { ++ SPINAND_INFO("GSS01GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x13), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 10, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), ++ SPINAND_INFO("GSS02GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x23), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++ SPINAND_INFO("GSS02GSAX1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCA, 0x23), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++ SPINAND_INFO("GSS01GSAX1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCA, 0x13), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++}; ++ ++static const struct spinand_manufacturer_ops gsto_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer gsto_spinand_manufacturer = { ++ .id = SPINAND_MFR_GSTO, ++ .name = "GSTO", ++ .chips = gsto_spinand_table, ++ .nchips = ARRAY_SIZE(gsto_spinand_table), ++ .ops = &gsto_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -248,6 +248,7 @@ extern const struct spinand_manufacturer + extern const struct spinand_manufacturer etron_spinand_manufacturer; + extern const struct spinand_manufacturer fmsh_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; ++extern const struct spinand_manufacturer gsto_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; + extern const struct spinand_manufacturer micron_spinand_manufacturer; + extern const struct spinand_manufacturer paragon_spinand_manufacturer; diff --git a/package/boot/uboot-mediatek/patches/471-add-cmcc_rax3000me.patch b/package/boot/uboot-mediatek/patches/471-add-cmcc_rax3000me.patch new file mode 100644 index 0000000000..4b6985af82 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/471-add-cmcc_rax3000me.patch @@ -0,0 +1,575 @@ +--- /dev/null ++++ b/configs/mt7981_cmcc_rax3000me-emmc_defconfig +@@ -0,0 +1,122 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x40000 ++CONFIG_ENV_OFFSET=0x400000 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-rax3000me-emmc" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7981=y ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_ENV_OFFSET_REDUND=0x440000 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000me-emmc.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_LOG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="defenvs/cmcc_rax3000me-emmc_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NETCONSOLE=y ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_MTK_AHCI=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_MMC_MTK=y ++CONFIG_PHY_FIXED=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_RAM=y ++CONFIG_SCSI=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_MTK=y ++CONFIG_USB_STORAGE=y ++CONFIG_LZO=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y +--- /dev/null ++++ b/configs/mt7981_cmcc_rax3000me-nand-ddr3_defconfig +@@ -0,0 +1,122 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-rax3000me-nand" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7981=y ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000me-nand.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_LOG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_CMD_UBI=y ++CONFIG_CMD_UBI_RENAME=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_UBI=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_ENV_UBI_PART="ubi" ++CONFIG_ENV_UBI_VOLUME="ubootenv" ++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="defenvs/cmcc_rax3000me-nand-ddr3_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NETCONSOLE=y ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_MTK_AHCI=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++# CONFIG_MMC is not set ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_MTD_UBI_FASTMAP=y ++CONFIG_PHY_FIXED=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_RAM=y ++CONFIG_SCSI=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MTK_SPIM=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y +--- /dev/null ++++ b/configs/mt7981_cmcc_rax3000me-nand-ddr4_defconfig +@@ -0,0 +1,122 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-rax3000me-nand" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7981=y ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00 ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_BOOTDELAY=30 ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-rax3000me-nand.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_PRE_CONSOLE_BUFFER=y ++CONFIG_LOG=y ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++# CONFIG_CMD_BOOTEFI_BOOTMGR is not set ++CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y ++CONFIG_CMD_UBI=y ++CONFIG_CMD_UBI_RENAME=y ++CONFIG_OF_EMBED=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_UBI=y ++CONFIG_SYS_REDUNDAND_ENVIRONMENT=y ++CONFIG_ENV_UBI_PART="ubi" ++CONFIG_ENV_UBI_VOLUME="ubootenv" ++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="defenvs/cmcc_rax3000me-nand-ddr4_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_VERSION_VARIABLE=y ++CONFIG_NETCONSOLE=y ++CONFIG_USE_IPADDR=y ++CONFIG_IPADDR="192.168.1.1" ++CONFIG_USE_SERVERIP=y ++CONFIG_SERVERIP="192.168.1.254" ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_MTK_AHCI=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++# CONFIG_MMC is not set ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_MTD_UBI_FASTMAP=y ++CONFIG_PHY_FIXED=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7622=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_PWM=y ++CONFIG_PWM_MTK=y ++CONFIG_RAM=y ++CONFIG_SCSI=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MTK_SPIM=y ++CONFIG_ZSTD=y ++CONFIG_HEXDUMP=y +--- /dev/null ++++ b/arch/arm/dts/mt7981-cmcc-rax3000me-emmc.dts +@@ -0,0 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++ ++/dts-v1/; ++#include "mt7981-cmcc-rax3000m-emmc.dts" ++ ++/ { ++ model = "CMCC RAX3000Me"; ++ compatible = "cmcc,rax3000me", "mediatek,mt7981"; ++}; +--- /dev/null ++++ b/arch/arm/dts/mt7981-cmcc-rax3000me-nand.dts +@@ -0,0 +1,9 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++ ++/dts-v1/; ++#include "mt7981-cmcc-rax3000m-nand.dts" ++ ++/ { ++ model = "CMCC RAX3000Me"; ++ compatible = "cmcc,rax3000me", "mediatek,mt7981"; ++}; +--- /dev/null ++++ b/defenvs/cmcc_rax3000me-emmc_env +@@ -0,0 +1,55 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootargs=root=/dev/fit0 rootwait ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi ++bootconf=config-1#mt7981b-cmcc-rax3000m-emmc ++bootdelay=0 ++bootfile=immortalwrt-mediatek-filogic-cmcc_rax3000me-initramfs-recovery.itb ++bootfile_bl2=immortalwrt-mediatek-filogic-cmcc_rax3000me-emmc-preloader.bin ++bootfile_fip=immortalwrt-mediatek-filogic-cmcc_rax3000me-emmc-bl31-uboot.fip ++bootfile_upg=immortalwrt-mediatek-filogic-cmcc_rax3000me-squashfs-sysupgrade.itb ++bootled_pwr=red:status ++bootled_rec=blue:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) [eMMC] ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from eMMC.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from eMMC.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run emmc_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run emmc_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_emmc=run boot_production ; run boot_recovery ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run emmc_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run emmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2 ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size ++mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200 ++part_default=production ++part_recovery=recovery ++reset_factory=eraseenv && reset ++emmc_read_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_read_vol ++emmc_read_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_read_vol ++emmc_write_bl2=mmc partconf 0 1 1 1 && mmc erase 0x0 0x400 && mmc write $fileaddr 0x0 0x400 ; mmc partconf 0 1 1 0 ++emmc_write_fip=mmc erase 0x3400 0x2000 && mmc write $fileaddr 0x3400 0x2000 && mmc erase 0x2000 0x800 ++emmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol ++emmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol ++_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" +--- /dev/null ++++ b/defenvs/cmcc_rax3000me-nand-ddr3_env +@@ -0,0 +1,56 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootconf=config-1#mt7981b-cmcc-rax3000m-nand ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi ++bootdelay=0 ++bootfile=immortalwrt-mediatek-filogic-cmcc_rax3000me-initramfs-recovery.itb ++bootfile_bl2=immortalwrt-mediatek-filogic-cmcc_rax3000me-nand-ddr3-preloader.bin ++bootfile_fip=immortalwrt-mediatek-filogic-cmcc_rax3000me-nand-ddr3-bl31-uboot.fip ++bootfile_upg=immortalwrt-mediatek-filogic-cmcc_rax3000me-squashfs-sysupgrade.itb ++bootled_pwr=red:status ++bootled_rec=blue:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) [SPI-NAND] ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2 ++part_default=production ++part_recovery=recovery ++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800 ++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr ++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr ++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format ++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset ++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi ++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs ++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery ++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data ++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize ++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize ++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" +--- /dev/null ++++ b/defenvs/cmcc_rax3000me-nand-ddr4_env +@@ -0,0 +1,56 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0 ++bootconf=config-1#mt7981b-cmcc-rax3000m-nand#mt7981b-cmcc-rax3000me-nousb ++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi ++bootdelay=0 ++bootfile=immortalwrt-mediatek-filogic-cmcc_rax3000me-initramfs-recovery.itb ++bootfile_bl2=immortalwrt-mediatek-filogic-cmcc_rax3000me-nand-ddr4-preloader.bin ++bootfile_fip=immortalwrt-mediatek-filogic-cmcc_rax3000me-nand-ddr4-bl31-uboot.fip ++bootfile_upg=immortalwrt-mediatek-filogic-cmcc_rax3000me-squashfs-sysupgrade.itb ++bootled_pwr=red:status ++bootled_rec=blue:status ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) [SPI-NAND] ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_8=Reboot.=reset ++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off ++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off ++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever ++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2 ++part_default=production ++part_recovery=recovery ++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800 ++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr ++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr ++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format ++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset ++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi ++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs ++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery ++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data ++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize ++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize ++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/package/libs/libpcap/Makefile b/package/libs/libpcap/Makefile index 14b97f902a..052358b1f5 100644 --- a/package/libs/libpcap/Makefile +++ b/package/libs/libpcap/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libpcap PKG_VERSION:=1.10.5 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://www.tcpdump.org/release/ diff --git a/package/libs/libpcap/patches/001-Add-support-for-Realtek-Ethertype-DSA-data.patch b/package/libs/libpcap/patches/001-Add-support-for-Realtek-Ethertype-DSA-data.patch new file mode 100644 index 0000000000..5ec0e22afa --- /dev/null +++ b/package/libs/libpcap/patches/001-Add-support-for-Realtek-Ethertype-DSA-data.patch @@ -0,0 +1,28 @@ +From fcb2cbc3a306afcf7785a60a74dbea431e609d76 Mon Sep 17 00:00:00 2001 +From: Luiz Angelo Daros de Luca +Date: Thu, 6 Jan 2022 15:51:54 -0300 +Subject: [PATCH 1/2] Add support for Realtek (Ethertype) DSA data + +Realtek switchtag rtl4a (4 bytes long, protocol 0xA) and rtl8_4 (8 bytes +long, protocol 0x04) are Ethertype DSA tags, inserted in the Ethernet +header similar to an 802.1Q tag. Both shares the same Ethertype 0x8899 +as other Realtek proprietary protocols. + +Realtek switchtag rtl8_4t is identical to rtl8_4 but positioned before +the CRC, at the end of the Ethernet frame. +--- + pcap-linux.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/pcap-linux.c ++++ b/pcap-linux.c +@@ -5281,6 +5281,9 @@ static struct dsa_proto { + { "brcm-prepend", DLT_DSA_TAG_BRCM_PREPEND }, + { "dsa", DLT_DSA_TAG_DSA }, + { "edsa", DLT_DSA_TAG_EDSA }, ++ { "rtl4a", DLT_EN10MB }, ++ { "rtl8_4", DLT_EN10MB }, ++ { "rtl8_4t", DLT_EN10MB }, + }; + + static int diff --git a/package/libs/libpcap/patches/002-Linux-handle-other-DSA-tags.patch b/package/libs/libpcap/patches/002-Linux-handle-other-DSA-tags.patch new file mode 100644 index 0000000000..dc87d4010d --- /dev/null +++ b/package/libs/libpcap/patches/002-Linux-handle-other-DSA-tags.patch @@ -0,0 +1,322 @@ +From 7d298976beff0cce310fb53a430f82b53f43a394 Mon Sep 17 00:00:00 2001 +From: Guy Harris +Date: Fri, 14 Feb 2025 19:12:24 -0800 +Subject: [PATCH 2/2] Linux: handle other DSA tags. + +Many of those entries need their own LINKTYPE_/DLT_? values, including +tcpdump and Wireshark support for same, but at least this lets you see +raw hex data from a capture. + +Fixes #1367. + +Supercedes #1451. +--- + pcap-linux.c | 284 ++++++++++++++++++++++++++++++++++++++++++++++++++- + 1 file changed, 280 insertions(+), 4 deletions(-) + +--- a/pcap-linux.c ++++ b/pcap-linux.c +@@ -5267,23 +5267,299 @@ iface_get_offload(pcap_t *handle _U_) + } + #endif /* SIOCETHTOOL */ + ++/* ++ * As per ++ * ++ * https://www.kernel.org/doc/html/latest/networking/dsa/dsa.html#switch-tagging-protocols ++ * ++ * Type 1 means that the tag is prepended to the Ethernet packet. ++ * LINKTYPE_ETHERNET/DLT_EN10MB doesn't work, as it would try to ++ * dissect the tag data as the Ethernet header. These should get ++ * their own LINKTYPE_DLT_ values. ++ * ++ * Type 2 means that the tag is inserted into the Ethernet header ++ * after the source address and before the type/length field. ++ * ++ * Type 3 means that tag is a packet trailer. LINKTYPE_ETHERNET/DLT_EN10MB ++ * works, unless the next-layer protocol has no length field of its own, ++ * so that the tag might be treated as part of the payload. These should ++ * get their own LINKTYPE_/DLT_ values. ++ * ++ * If you get an "unsupported DSA tag" error, please add the tag to here, ++ * complete with a full comment indicating whether it's type 1, 2, or 3, ++ * and, for type 2, indicating whether it has an Ethertype and, if so ++ * what that type is, and whether it's registered with the IEEE or is ++ * self-assigned. Also, point to *something* that indicates the format ++ * of the tag. ++ */ + static struct dsa_proto { + const char *name; + bpf_u_int32 linktype; + } dsa_protos[] = { + /* +- * None is special and indicates that the interface does not have +- * any tagging protocol configured, and is therefore a standard +- * Ethernet interface. ++ * Type 1. See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ar9331.c ++ */ ++ { "ar9331", DLT_EN10MB }, ++ ++ /* ++ * Type 2, without an Ethertype at the beginning, ++ * assigned a LINKTYPE_/DLT_ value. + */ +- { "none", DLT_EN10MB }, + { "brcm", DLT_DSA_TAG_BRCM }, ++ ++ /* ++ * Type 2, with Ethertype 0x8874, assigned to Broadcom. ++ * ++ * This doies not require a LINKTYPE_/DLT_ value, it ++ * just requires that Ethertype 0x8874 be dissected ++ * properly. ++ */ ++ { "brcm-legacy", DLT_EN10MB }, ++ ++ /* ++ * Type 1. ++ */ + { "brcm-prepend", DLT_DSA_TAG_BRCM_PREPEND }, ++ ++ /* ++ * Type 2, without an Etherype at he beginning, ++ * assigned a LINKTYPE_/DLT_ value. ++ */ + { "dsa", DLT_DSA_TAG_DSA }, ++ ++ /* ++ * Type 2, with an Ethertype field, but without ++ * an assigned Ethertype value that can be relied ++ * on; assigned a LINKTYPE_/DLT_ value. ++ */ + { "edsa", DLT_DSA_TAG_EDSA }, ++ ++ /* ++ * Type 1, with different transmit and receive headers, ++ * so can't really be handled well with the current ++ * libpcap API and with pcap files. Use DLT_LINUX_SLL, ++ * to get the direction? ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_gswip.c ++ */ ++ { "gswip", DLT_EN10MB }, ++ ++ /* ++ * Type 3. See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_hellcreek.c ++ */ ++ { "hellcreek", DLT_EN10MB }, ++ ++ /* ++ * Type 3, with different transmit and receive headers, ++ * so can't really be handled well with the current ++ * libpcap API and with pcap files. Use DLT_LINUX_SLL, ++ * to get the direction? ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ksz.c#L102 ++ */ ++ { "ksz8795", DLT_EN10MB }, ++ ++ /* ++ * Type 3, with different transmit and receive headers, ++ * so can't really be handled well with the current ++ * libpcap API and with pcap files. Use DLT_LINUX_SLL, ++ * to get the direction? ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ksz.c#L160 ++ */ ++ { "ksz9477", DLT_EN10MB }, ++ ++ /* ++ * Type 3, with different transmit and receive headers, ++ * so can't really be handled well with the current ++ * libpcap API and with pcap files. Use DLT_LINUX_SLL, ++ * to get the direction? ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ksz.c#L341 ++ */ ++ { "ksz9893", DLT_EN10MB }, ++ ++ /* ++ * Type 3, with different transmit and receive headers, ++ * so can't really be handled well with the current ++ * libpcap API and with pcap files. Use DLT_LINUX_SLL, ++ * to get the direction? ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ksz.c#L386 ++ */ ++ { "lan937x", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8100; the VID can be interpreted ++ * as per ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_lan9303.c#L24 ++ * ++ * so giving its own LINKTYPE_/DLT_ value would allow a ++ * dissector to do so. ++ */ ++ { "lan9303", DLT_EN10MB }, ++ ++ /* ++ * Type 2, without an Etherype at he beginning, ++ * should be assigned a LINKTYPE_/DLT_ value. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_mtk.c#L15 ++ */ ++ { "mtk", DLT_EN10MB }, ++ ++ /* ++ * None is special and indicates that the interface does not have ++ * any tagging protocol configured, and is therefore a standard ++ * Ethernet interface. ++ */ ++ { "none", DLT_EN10MB }, ++ ++ /* ++ * Type 1. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ocelot.c ++ */ ++ { "ocelot", DLT_EN10MB }, ++ ++ /* ++ * Type 1. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_ocelot.c ++ */ ++ { "seville", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8100; the VID can be interpreted ++ * as per ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_8021q.c#L15 ++ * ++ * so giving its own LINKTYPE_/DLT_ value would allow a ++ * dissector to do so. ++ */ ++ { "ocelot-8021q", DLT_EN10MB }, ++ ++ /* ++ * Type 2, without an Etherype at he beginning, ++ * should be assigned a LINKTYPE_/DLT_ value. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_qca.c ++ */ ++ { "qca", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8899, assigned to Realtek; ++ * they use it for several on-the-Ethernet protocols ++ * as well, but there are fields that allow the two ++ * tag formats, and all the protocols in question, ++ * to be distinguiished from one another. ++ * ++ * This doies not require a LINKTYPE_/DLT_ value, it ++ * just requires that Ethertype 0x8899 be dissected ++ * properly. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_rtl4_a.c ++ * ++ * http://realtek.info/pdf/rtl8306sd%28m%29_datasheet_1.1.pdf ++ * ++ * and various pages in tcpdump's print-realtek.c and Wireshark's ++ * epan/dissectors/packet-realtek.c for the other protocols. ++ */ + { "rtl4a", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8899, assigned to Realtek; ++ * see above. ++ */ + { "rtl8_4", DLT_EN10MB }, ++ ++ /* ++ * Type 3, with the same tag format as rtl8_4. ++ */ + { "rtl8_4t", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0xe001; that's probably ++ * self-assigned, so this really should ahve its ++ * own LINKTYPE_/DLT_ value. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_rzn1_a5psw.c ++ */ ++ { "a5psw", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8100 or the self-assigned ++ * 0xdadb, so this really should ahve its own ++ * LINKTYPE_/DLT_ value; that would also allow the ++ * VID of the tag to be dissected as per ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_8021q.c#L15 ++ */ ++ { "sja1105", DLT_EN10MB }, ++ ++ /* ++ * Type "none of the above", with both a header and trailer, ++ * with different transmit and receive tags. Has ++ * Ethertype 0xdadc, which is probably self-assigned. ++ * This should really have its own LINKTYPE_/DLT_ value. ++ */ ++ { "sja1110", DLT_EN10MB }, ++ ++ /* ++ * Type 3, as the name suggests. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_trailer.c ++ */ ++ { "trailer", DLT_EN10MB }, ++ ++ /* ++ * Type 2, with Ethertype 0x8100; the VID can be interpreted ++ * as per ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_8021q.c#L15 ++ * ++ * so giving its own LINKTYPE_/DLT_ value would allow a ++ * dissector to do so. ++ */ ++ { "vsc73xx-8021q", DLT_EN10MB }, ++ ++ /* ++ * Type 3. ++ * ++ * See ++ * ++ * https://elixir.bootlin.com/linux/v6.13.2/source/net/dsa/tag_xrs700x.c ++ */ ++ { "xrs700x", DLT_EN10MB }, + }; + + static int diff --git a/package/network/services/hostapd/src/src/ap/ucode.c b/package/network/services/hostapd/src/src/ap/ucode.c index e496b8b7aa..393e8f86c7 100644 --- a/package/network/services/hostapd/src/src/ap/ucode.c +++ b/package/network/services/hostapd/src/src/ap/ucode.c @@ -23,7 +23,7 @@ hostapd_ucode_bss_get_uval(struct hostapd_data *hapd) uc_value_t *val; if (hapd->ucode.idx) - return wpa_ucode_registry_get(bss_registry, hapd->ucode.idx); + return ucv_get(wpa_ucode_registry_get(bss_registry, hapd->ucode.idx)); val = uc_resource_new(bss_type, hapd); hapd->ucode.idx = wpa_ucode_registry_add(bss_registry, val); @@ -37,7 +37,7 @@ hostapd_ucode_iface_get_uval(struct hostapd_iface *hapd) uc_value_t *val; if (hapd->ucode.idx) - return wpa_ucode_registry_get(iface_registry, hapd->ucode.idx); + return ucv_get(wpa_ucode_registry_get(iface_registry, hapd->ucode.idx)); val = uc_resource_new(iface_type, hapd); hapd->ucode.idx = wpa_ucode_registry_add(iface_registry, val); @@ -54,12 +54,11 @@ hostapd_ucode_update_bss_list(struct hostapd_iface *iface, uc_value_t *if_bss, u list = ucv_array_new(vm); for (i = 0; iface->bss && i < iface->num_bss; i++) { struct hostapd_data *hapd = iface->bss[i]; - uc_value_t *val = hostapd_ucode_bss_get_uval(hapd); - ucv_array_set(list, i, ucv_get(ucv_string_new(hapd->conf->iface))); - ucv_object_add(bss, hapd->conf->iface, ucv_get(val)); + ucv_array_set(list, i, ucv_string_new(hapd->conf->iface)); + ucv_object_add(bss, hapd->conf->iface, hostapd_ucode_bss_get_uval(hapd)); } - ucv_object_add(if_bss, iface->phy, ucv_get(list)); + ucv_object_add(if_bss, iface->phy, list); } static void @@ -73,13 +72,14 @@ hostapd_ucode_update_interfaces(void) for (i = 0; i < interfaces->count; i++) { struct hostapd_iface *iface = interfaces->iface[i]; - ucv_object_add(ifs, iface->phy, ucv_get(hostapd_ucode_iface_get_uval(iface))); + ucv_object_add(ifs, iface->phy, hostapd_ucode_iface_get_uval(iface)); hostapd_ucode_update_bss_list(iface, if_bss, bss); } - ucv_object_add(ucv_prototype_get(global), "interfaces", ucv_get(ifs)); - ucv_object_add(ucv_prototype_get(global), "interface_bss", ucv_get(if_bss)); - ucv_object_add(ucv_prototype_get(global), "bss", ucv_get(bss)); + ucv_object_add(ucv_prototype_get(global), "interfaces", ifs); + ucv_object_add(ucv_prototype_get(global), "interface_bss", if_bss); + ucv_object_add(ucv_prototype_get(global), "bss", bss); + ucv_gc(vm); } @@ -362,6 +362,10 @@ uc_hostapd_iface_add_bss(uc_vm_t *vm, size_t nargs) hapd->driver = iface->bss[0]->driver; hapd->drv_priv = iface->bss[0]->drv_priv; +#ifdef CONFIG_IEEE80211BE + os_strlcpy(hapd->ctrl_sock_iface, hapd->conf->iface, + sizeof(hapd->ctrl_sock_iface)); +#endif if (interfaces->ctrl_iface_init && interfaces->ctrl_iface_init(hapd) < 0) goto free_hapd; @@ -721,11 +725,10 @@ int hostapd_ucode_sta_auth(struct hostapd_data *hapd, struct sta_info *sta) if (wpa_ucode_call_prepare("sta_auth")) return 0; - uc_value_push(ucv_get(ucv_string_new(hapd->conf->iface))); + uc_value_push(ucv_string_new(hapd->conf->iface)); snprintf(addr, sizeof(addr), MACSTR, MAC2STR(sta->addr)); - val = ucv_string_new(addr); - uc_value_push(ucv_get(val)); + uc_value_push(ucv_string_new(addr)); val = wpa_ucode_call(2); @@ -787,16 +790,15 @@ void hostapd_ucode_sta_connected(struct hostapd_data *hapd, struct sta_info *sta if (wpa_ucode_call_prepare("sta_connected")) return; - uc_value_push(ucv_get(ucv_string_new(hapd->conf->iface))); + uc_value_push(ucv_string_new(hapd->conf->iface)); snprintf(addr, sizeof(addr), MACSTR, MAC2STR(sta->addr)); - val = ucv_string_new(addr); - uc_value_push(ucv_get(val)); + uc_value_push(ucv_string_new(addr)); val = ucv_object_new(vm); if (sta->psk_idx) ucv_object_add(val, "psk_idx", ucv_int64_new(sta->psk_idx - 1)); - uc_value_push(ucv_get(val)); + uc_value_push(val); val = wpa_ucode_call(3); if (ucv_type(val) != UC_OBJECT) @@ -918,7 +920,7 @@ void hostapd_ucode_free(void) void hostapd_ucode_free_iface(struct hostapd_iface *iface) { - wpa_ucode_registry_remove(iface_registry, iface->ucode.idx); + ucv_put(wpa_ucode_registry_remove(iface_registry, iface->ucode.idx)); } void hostapd_ucode_bss_cb(struct hostapd_data *hapd, const char *type) @@ -929,10 +931,11 @@ void hostapd_ucode_bss_cb(struct hostapd_data *hapd, const char *type) return; val = hostapd_ucode_bss_get_uval(hapd); - uc_value_push(ucv_get(ucv_string_new(hapd->iface->phy))); - uc_value_push(ucv_get(ucv_string_new(hapd->conf->iface))); + uc_value_push(ucv_string_new(hapd->iface->phy)); + uc_value_push(ucv_string_new(hapd->conf->iface)); uc_value_push(ucv_get(val)); ucv_put(wpa_ucode_call(3)); + ucv_put(val); ucv_gc(vm); } @@ -951,6 +954,8 @@ void hostapd_ucode_free_bss(struct hostapd_data *hapd) uc_value_push(ucv_string_new(hapd->conf->iface)); uc_value_push(ucv_get(val)); ucv_put(wpa_ucode_call(2)); + + ucv_put(val); ucv_gc(vm); } @@ -963,10 +968,11 @@ void hostapd_ucode_apup_newpeer(struct hostapd_data *hapd, const char *ifname) return; val = hostapd_ucode_bss_get_uval(hapd); - uc_value_push(ucv_get(ucv_string_new(hapd->conf->iface))); // BSS ifname + uc_value_push(ucv_string_new(hapd->conf->iface)); // BSS ifname uc_value_push(ucv_get(val)); - uc_value_push(ucv_get(ucv_string_new(ifname))); // APuP peer ifname + uc_value_push(ucv_string_new(ifname)); // APuP peer ifname ucv_put(wpa_ucode_call(2)); + ucv_put(val); ucv_gc(vm); } #endif // def CONFIG_APUP diff --git a/package/network/services/hostapd/src/src/utils/ucode.c b/package/network/services/hostapd/src/src/utils/ucode.c index a1762844b5..a7cc2c7059 100644 --- a/package/network/services/hostapd/src/src/utils/ucode.c +++ b/package/network/services/hostapd/src/src/utils/ucode.c @@ -172,7 +172,7 @@ uc_value_t *uc_wpa_freq_info(uc_vm_t *vm, size_t nargs) ucv_object_add(ret, "op_class", ucv_int64_new(op_class)); ucv_object_add(ret, "channel", ucv_int64_new(channel)); ucv_object_add(ret, "hw_mode", ucv_int64_new(hw_mode)); - ucv_object_add(ret, "hw_mode_str", ucv_get(ucv_string_new(modestr))); + ucv_object_add(ret, "hw_mode_str", ucv_string_new(modestr)); ucv_object_add(ret, "sec_channel", ucv_int64_new(sec_channel)); ucv_object_add(ret, "frequency", ucv_int64_new(freq_val)); @@ -426,7 +426,7 @@ uc_value_t *wpa_ucode_global_init(const char *name, uc_resource_type_t *global_t uc_vm_registry_set(&vm, "hostap.global", global); proto = ucv_prototype_get(global); - ucv_object_add(proto, "data", ucv_get(ucv_object_new(&vm))); + ucv_object_add(proto, "data", ucv_object_new(&vm)); #define ADD_CONST(x) ucv_object_add(proto, #x, ucv_int64_new(x)) ADD_CONST(MSG_EXCESSIVE); @@ -471,6 +471,7 @@ uc_value_t *wpa_ucode_registry_remove(uc_value_t *reg, int idx) if (!val) return NULL; + ucv_get(val); ucv_array_set(reg, idx - 1, NULL); dataptr = ucv_resource_dataptr(val, NULL); if (dataptr) diff --git a/package/network/services/hostapd/src/wpa_supplicant/ucode.c b/package/network/services/hostapd/src/wpa_supplicant/ucode.c index 9380b301c3..8335a27e89 100644 --- a/package/network/services/hostapd/src/wpa_supplicant/ucode.c +++ b/package/network/services/hostapd/src/wpa_supplicant/ucode.c @@ -20,7 +20,7 @@ wpas_ucode_iface_get_uval(struct wpa_supplicant *wpa_s) uc_value_t *val; if (wpa_s->ucode.idx) - return wpa_ucode_registry_get(iface_registry, wpa_s->ucode.idx); + return ucv_get(wpa_ucode_registry_get(iface_registry, wpa_s->ucode.idx)); val = uc_resource_new(iface_type, wpa_s); wpa_s->ucode.idx = wpa_ucode_registry_add(iface_registry, val); @@ -36,9 +36,9 @@ wpas_ucode_update_interfaces(void) int i; for (wpa_s = wpa_global->ifaces; wpa_s; wpa_s = wpa_s->next) - ucv_object_add(ifs, wpa_s->ifname, ucv_get(wpas_ucode_iface_get_uval(wpa_s))); + ucv_object_add(ifs, wpa_s->ifname, wpas_ucode_iface_get_uval(wpa_s)); - ucv_object_add(ucv_prototype_get(global), "interfaces", ucv_get(ifs)); + ucv_object_add(ucv_prototype_get(global), "interfaces", ifs); ucv_gc(vm); } @@ -49,8 +49,8 @@ void wpas_ucode_add_bss(struct wpa_supplicant *wpa_s) if (wpa_ucode_call_prepare("iface_add")) return; - uc_value_push(ucv_get(ucv_string_new(wpa_s->ifname))); - uc_value_push(ucv_get(wpas_ucode_iface_get_uval(wpa_s))); + uc_value_push(ucv_string_new(wpa_s->ifname)); + uc_value_push(wpas_ucode_iface_get_uval(wpa_s)); ucv_put(wpa_ucode_call(2)); ucv_gc(vm); } @@ -67,9 +67,10 @@ void wpas_ucode_free_bss(struct wpa_supplicant *wpa_s) if (wpa_ucode_call_prepare("iface_remove")) return; - uc_value_push(ucv_get(ucv_string_new(wpa_s->ifname))); + uc_value_push(ucv_string_new(wpa_s->ifname)); uc_value_push(ucv_get(val)); ucv_put(wpa_ucode_call(2)); + ucv_put(val); ucv_gc(vm); } @@ -86,9 +87,9 @@ void wpas_ucode_update_state(struct wpa_supplicant *wpa_s) return; state = wpa_supplicant_state_txt(wpa_s->wpa_state); - uc_value_push(ucv_get(ucv_string_new(wpa_s->ifname))); + uc_value_push(ucv_string_new(wpa_s->ifname)); uc_value_push(ucv_get(val)); - uc_value_push(ucv_get(ucv_string_new(state))); + uc_value_push(ucv_string_new(state)); ucv_put(wpa_ucode_call(3)); ucv_gc(vm); } @@ -108,9 +109,9 @@ void wpas_ucode_event(struct wpa_supplicant *wpa_s, int event, union wpa_event_d if (wpa_ucode_call_prepare("event")) return; - uc_value_push(ucv_get(ucv_string_new(wpa_s->ifname))); + uc_value_push(ucv_string_new(wpa_s->ifname)); uc_value_push(ucv_get(val)); - uc_value_push(ucv_get(ucv_string_new(event_to_string(event)))); + uc_value_push(ucv_string_new(event_to_string(event))); val = ucv_object_new(vm); uc_value_push(ucv_get(val)); @@ -212,15 +213,14 @@ uc_wpas_iface_status(uc_vm_t *vm, size_t nargs) { struct wpa_supplicant *wpa_s = uc_fn_thisval("wpas.iface"); struct wpa_bss *bss; - uc_value_t *ret, *val; + uc_value_t *ret; if (!wpa_s) return NULL; ret = ucv_object_new(vm); - val = ucv_string_new(wpa_supplicant_state_txt(wpa_s->wpa_state)); - ucv_object_add(ret, "state", ucv_get(val)); + ucv_object_add(ret, "state", ucv_string_new(wpa_supplicant_state_txt(wpa_s->wpa_state))); bss = wpa_s->current_bss; if (bss) { diff --git a/package/utils/cli/files/usr/sbin/cli b/package/utils/cli/files/usr/sbin/cli index 7d950e6adc..608ae2f97c 100755 --- a/package/utils/cli/files/usr/sbin/cli +++ b/package/utils/cli/files/usr/sbin/cli @@ -40,6 +40,7 @@ model.add_nodes({ el.close(); uloop.end(); interactive = false; + return ctx.ok(); } } } diff --git a/package/utils/cli/files/usr/share/ucode/cli/object-editor.uc b/package/utils/cli/files/usr/share/ucode/cli/object-editor.uc index 49e72f5c38..2a21e8d622 100644 --- a/package/utils/cli/files/usr/share/ucode/cli/object-editor.uc +++ b/package/utils/cli/files/usr/share/ucode/cli/object-editor.uc @@ -609,19 +609,19 @@ export function edit_create_destroy(info, node) select: function(ctx, argv) { let name = argv[0]; if (!name) { - warn(`Missing argument\n`); + ctx.missing_argument(); return; } let obj = object_lookup(ctx, this, this.object_name); if (!obj) { - warn(`Object not found\n`); + ctx.invalid_argument("Object not found"); return; } let entry = obj[name]; if (!entry) { - warn(`${name} not found\n`); + ctx.invalid_argument(`${name} not found: %s`, name); return; } diff --git a/package/utils/ucode-mod-pkgen/src/ucode.c b/package/utils/ucode-mod-pkgen/src/ucode.c index cb5569b977..4b7779f136 100644 --- a/package/utils/ucode-mod-pkgen/src/ucode.c +++ b/package/utils/ucode-mod-pkgen/src/ucode.c @@ -269,7 +269,7 @@ uc_cert_info(uc_vm_t *vm, size_t nargs) uc_value_t *info = ucv_object_new(vm); int len; - ucv_array_push(ret, ucv_get(info)); + ucv_array_push(ret, info); ucv_object_add(info, "version", ucv_int64_new(cur->version)); uc_cert_info_add_name(info, "issuer", &cur->issuer); diff --git a/package/utils/ucode-mod-uline/src/ucode.c b/package/utils/ucode-mod-uline/src/ucode.c index 7f1d9b1e34..4f1a3b627c 100644 --- a/package/utils/ucode-mod-uline/src/ucode.c +++ b/package/utils/ucode-mod-uline/src/ucode.c @@ -153,8 +153,7 @@ uc_uline_get_line(uc_vm_t *vm, size_t nargs) uline_get_line2(&us->s, &line, &len); else uline_get_line(&us->s, &line, &len); - val = ucv_string_new_length(line, len); - ucv_object_add(state, "line", ucv_get(val)); + ucv_object_add(state, "line", ucv_string_new_length(line, len)); ucv_object_add(state, "pos", ucv_int64_new(us->s.line.pos)); return state; @@ -589,7 +588,7 @@ uc_uline_add_pos(uc_vm_t *vm, uc_value_t *list, ssize_t start, ssize_t end) uc_value_t *val = ucv_array_new(vm); ucv_array_push(val, ucv_int64_new(start)); ucv_array_push(val, ucv_int64_new(end)); - ucv_array_push(list, ucv_get(val)); + ucv_array_push(list, val); } static uc_value_t * @@ -630,8 +629,8 @@ uc_uline_parse_args(uc_vm_t *vm, size_t nargs, bool check) if (argp->line_sep) { args = ucv_array_new(vm); pos_args = ucv_array_new(vm); - ucv_array_push(args, ucv_get(list)); - ucv_array_push(pos_args, ucv_get(pos_list)); + ucv_array_push(args, list); + ucv_array_push(pos_args, pos_list); } else { args = list; pos_args = pos_list; @@ -692,10 +691,10 @@ uc_uline_parse_args(uc_vm_t *vm, size_t nargs, bool check) buf = NULL; list = ucv_array_new(vm); - ucv_array_push(args, ucv_get(list)); + ucv_array_push(args, list); pos_list = ucv_array_new(vm); - ucv_array_push(pos_args, ucv_get(pos_list)); + ucv_array_push(pos_args, pos_list); } } continue; @@ -751,7 +750,7 @@ uc_uline_parse_args(uc_vm_t *vm, size_t nargs, bool check) } if (buf) { - ucv_array_push(list, ucv_get(ucv_stringbuf_finish(buf))); + ucv_array_push(list, ucv_stringbuf_finish(buf)); uc_uline_add_pos(vm, pos_list, start_idx, end_idx); } @@ -762,10 +761,10 @@ uc_uline_parse_args(uc_vm_t *vm, size_t nargs, bool check) return missing; ret = ucv_object_new(vm); - ucv_object_add(ret, "args", ucv_get(args)); - ucv_object_add(ret, "pos", ucv_get(pos_args)); + ucv_object_add(ret, "args", args); + ucv_object_add(ret, "pos", pos_args); if (missing) - ucv_object_add(ret, "missing", ucv_get(missing)); + ucv_object_add(ret, "missing", missing); return ret; } diff --git a/target/linux/airoha/an7581/config-6.6 b/target/linux/airoha/an7581/config-6.6 index 812dcd76bb..af13a72d01 100644 --- a/target/linux/airoha/an7581/config-6.6 +++ b/target/linux/airoha/an7581/config-6.6 @@ -9,7 +9,6 @@ CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_FORCE_MAX_ORDER=10 -CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y CONFIG_ARCH_MMAP_RND_BITS=18 @@ -20,64 +19,22 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_STACKWALK=y CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -CONFIG_ARCH_USES_PG_ARCH_X=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_ARM64=y CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_AMU_EXTN=y -CONFIG_ARM64_BTI=y -CONFIG_ARM64_E0PD=y -CONFIG_ARM64_EPAN=y -CONFIG_ARM64_ERRATUM_1024718=y -CONFIG_ARM64_ERRATUM_1165522=y -CONFIG_ARM64_ERRATUM_1286807=y -CONFIG_ARM64_ERRATUM_1319367=y -CONFIG_ARM64_ERRATUM_1463225=y -CONFIG_ARM64_ERRATUM_1508412=y -CONFIG_ARM64_ERRATUM_1530923=y -CONFIG_ARM64_ERRATUM_1542419=y -CONFIG_ARM64_ERRATUM_2051678=y -CONFIG_ARM64_ERRATUM_2054223=y -CONFIG_ARM64_ERRATUM_2067961=y -CONFIG_ARM64_ERRATUM_2077057=y -CONFIG_ARM64_ERRATUM_2441007=y -CONFIG_ARM64_ERRATUM_2441009=y -CONFIG_ARM64_ERRATUM_2457168=y -CONFIG_ARM64_ERRATUM_2658417=y -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_ARM64_HW_AFDBM=y CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y -CONFIG_ARM64_MTE=y CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PA_BITS=48 CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_PTR_AUTH_KERNEL=y -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_SME=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_TLB_RANGE=y CONFIG_ARM64_VA_BITS=39 CONFIG_ARM64_VA_BITS_39=y -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y -CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y -CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y CONFIG_ARM_AIROHA_SOC_CPUFREQ=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y @@ -90,142 +47,72 @@ CONFIG_ARM_SMCCC_SOC_ID=y # CONFIG_ARM_SMMU is not set # CONFIG_ARM_SMMU_V3 is not set CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BINFMT_MISC=y -# CONFIG_BLK_CGROUP is not set -CONFIG_BLK_DEBUG_FS=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_MQ_PCI=y CONFIG_BLK_PM=y -CONFIG_BLOCK_LEGACY_AUTOLOAD=y -# CONFIG_BPF_JIT is not set -# CONFIG_BPF_SYSCALL is not set -# CONFIG_BRIDGE_VLAN_FILTERING is not set CONFIG_BUFFER_HEAD=y CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y -CONFIG_CAVIUM_ERRATUM_22375=y -CONFIG_CAVIUM_ERRATUM_23154=y -CONFIG_CAVIUM_ERRATUM_27456=y -CONFIG_CAVIUM_ERRATUM_30115=y -CONFIG_CAVIUM_TX2_ERRATUM_219=y CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y -# CONFIG_CFS_BANDWIDTH is not set -CONFIG_CGROUPS=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_DEBUG=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CGROUP_FREEZER=y -# CONFIG_CGROUP_NET_CLASSID is not set -# CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_PERF is not set -# CONFIG_CGROUP_PIDS is not set -# CONFIG_CGROUP_RDMA is not set -CONFIG_CGROUP_SCHED=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_EN7523=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 -CONFIG_COMPAT_32BIT_TIME=y +# CONFIG_COMPAT_32BIT_TIME is not set CONFIG_CONTEXT_TRACKING=y CONFIG_CONTEXT_TRACKING_IDLE=y -CONFIG_COREDUMP=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPUSETS=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_ISOLATION=y CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MITIGATIONS=y -CONFIG_CPU_PM=y CONFIG_CPU_RMAP=y CONFIG_CRC16=y CONFIG_CRC_CCITT=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_EIP93=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ECHAINIV=y -CONFIG_CRYPTO_GENIV=y CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=y -# CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_ZSTD=y CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_MISC=y -CONFIG_DEVMEM=y CONFIG_DMADEVICES=y CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y CONFIG_DTC=y CONFIG_EDAC_SUPPORT=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_FAT_DEFAULT_CODEPAGE=936 -CONFIG_FAT_DEFAULT_IOCHARSET="utf8" -CONFIG_FAT_FS=y CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FORTIFY_SOURCE is not set CONFIG_FRAME_POINTER=y -CONFIG_FREEZER=y -CONFIG_FSL_ERRATUM_A008585=y CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FUJITSU_ERRATUM_010001=y CONFIG_FUNCTION_ALIGNMENT=4 CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FWNODE_MDIO=y @@ -246,7 +133,6 @@ CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y @@ -267,17 +153,11 @@ CONFIG_GPIO_CDEV=y CONFIG_GPIO_EN7523=y CONFIG_GPIO_GENERIC=y CONFIG_GRO_CELLS=y -# CONFIG_HARDENED_USERCOPY is not set CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y -CONFIG_HISILICON_ERRATUM_161010101=y -CONFIG_HISILICON_ERRATUM_161600802=y -CONFIG_HOTPLUG_CORE_SYNC=y -CONFIG_HOTPLUG_CORE_SYNC_DEAD=y -CONFIG_HOTPLUG_CPU=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_AIROHA=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 @@ -287,25 +167,6 @@ CONFIG_INET_ESP=y CONFIG_INET_IPCOMP=y CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_TUNNEL=y -CONFIG_INITRAMFS_PRESERVE_MTIME=y -CONFIG_INPUT=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_KEYBOARD=y -# CONFIG_INPUT_MISC is not set -CONFIG_INTERVAL_TREE=y -CONFIG_INTERVAL_TREE_SPAN_ITER=y -CONFIG_IOMMUFD=y -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set -CONFIG_IOMMU_DEFAULT_DMA_STRICT=y -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_IOMMU_DMA=y -CONFIG_IOMMU_IOVA=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_DART is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y CONFIG_IO_URING=y CONFIG_IPC_NS=y CONFIG_IPV6=y @@ -324,25 +185,11 @@ CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MSI_IOMMU=y CONFIG_IRQ_WORK=y -# CONFIG_ISDN is not set CONFIG_JBD2=y -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_SUMMARY is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_KALLSYMS=y -CONFIG_LEGACY_DIRECT_IO=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=8 -CONFIG_LIBCRC32C=y CONFIG_LIBFDT=y -CONFIG_LOCALVERSION_AUTO=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_LRU_GEN is not set CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MDIO_BUS=y @@ -359,33 +206,19 @@ CONFIG_MMC_MTK=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MQ_IOSCHED_DEADLINE=y -CONFIG_MQ_IOSCHED_KYBER=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_AMDSTD is not set -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_NAND_CORE=y CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_MTK_BMT=y -CONFIG_MTD_OF_PARTS_AIROHA=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_SPI_NAND=y CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_FIRMWARE_NAME="tclinux" CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MTD_SPLIT_LZMA_FW=y -# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set CONFIG_MTD_UBI=y CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NAMESPACES=y CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NET_AIROHA=y CONFIG_NET_DEVLINK=y @@ -395,40 +228,26 @@ CONFIG_NET_DSA_MT7530_MDIO=y CONFIG_NET_DSA_MT7530_MMIO=y CONFIG_NET_DSA_TAG_MTK=y CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y # CONFIG_NET_MEDIATEK_SOC is not set -CONFIG_NET_NS=y -# CONFIG_NET_SCHED is not set CONFIG_NET_SELFTESTS=y CONFIG_NET_SWITCHDEV=y # CONFIG_NET_VENDOR_3COM is not set CONFIG_NET_VENDOR_MEDIATEK=y CONFIG_NLS=y -CONFIG_NLS_DEFAULT="utf8" CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=4 -CONFIG_NTFS_DEBUG=y -CONFIG_NTFS_FS=y -CONFIG_NTFS_RW=y -CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y CONFIG_OF_IRQ=y CONFIG_OF_KOBJ=y CONFIG_OF_MDIO=y -# CONFIG_OVERLAY_FS_XINO_AUTO is not set CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 CONFIG_PARTITION_PERCPU=y CONFIG_PCI=y CONFIG_PCIEAER=y @@ -444,7 +263,6 @@ CONFIG_PCIE_PME=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y CONFIG_PCI_MSI=y -CONFIG_PCPU_DEV_REFCNT=y CONFIG_PCS_MTK_LYNXI=y CONFIG_PERF_EVENTS=y CONFIG_PER_VMA_LOCK=y @@ -454,7 +272,6 @@ CONFIG_PHYLIB_LEDS=y CONFIG_PHYLINK=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_AIROHA_PCIE=y -CONFIG_PID_NS=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AIROHA=y # CONFIG_PINCTRL_MT2712 is not set @@ -472,28 +289,17 @@ CONFIG_PINCTRL_AIROHA=y CONFIG_PM=y CONFIG_PM_CLK=y CONFIG_PM_OPP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_SUPPLY=y CONFIG_PREEMPT_NONE_BUILD=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_PID_CPUSET=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_QCOM_FALKOR_ERRATUM_1003=y -CONFIG_QCOM_FALKOR_ERRATUM_1009=y -CONFIG_QCOM_FALKOR_ERRATUM_E1041=y -CONFIG_QCOM_QDF2400_ERRATUM_0065=y CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_RANDSTRUCT_NONE=y CONFIG_RAS=y CONFIG_RATIONAL=y -CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y @@ -503,18 +309,7 @@ CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y CONFIG_RPS=y -CONFIG_RSEQ=y -# CONFIG_RT_GROUP_SCHED is not set CONFIG_RWSEM_SPIN_ON_OWNER=y -# CONFIG_SCHED_CORE is not set -CONFIG_SCHED_DEBUG=y -CONFIG_SCHED_MM_CID=y -CONFIG_SCHED_SMT=y -# CONFIG_SCHED_STACK_END_CHECK is not set -CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY_NETWORK is not set CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=5 @@ -522,16 +317,9 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=5 CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SGETMASK_SYSCALL=y CONFIG_SGL_ALLOC=y CONFIG_SKB_EXTENSIONS=y -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SLAB_FREELIST_RANDOM is not set -CONFIG_SLUB_DEBUG=y CONFIG_SMP=y -CONFIG_SOCIONEXT_SYNQUACER_PREITS=y CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_SOC_BUS=y CONFIG_SOFTIRQ_ON_OWN_STACK=y @@ -546,56 +334,24 @@ CONFIG_SPI_AIROHA_SNFI=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SQUASHFS_ZLIB=y -CONFIG_STACKDEPOT=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_PER_TASK=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_STACKTRACE=y -# CONFIG_STAGING is not set -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_SURFACE_PLATFORMS=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_SWAP is not set CONFIG_SWIOTLB=y CONFIG_SWPHY=y CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFS_SYSCALL=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_MD5SIG=y -CONFIG_TEXTSEARCH_BM=y -CONFIG_TEXTSEARCH_FSM=y -CONFIG_TEXTSEARCH_KMP=y CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_USER_SPACE=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THREAD_INFO_IN_TASK=y CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y -CONFIG_TIME_NS=y -# CONFIG_TMPFS_XATTR is not set CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USELIB=y -CONFIG_USER_NS=y -CONFIG_UTS_NS=y -CONFIG_VFAT_FS=y +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set CONFIG_VMAP_STACK=y -CONFIG_VM_EVENT_COUNTERS=y CONFIG_WATCHDOG_CORE=y # CONFIG_WLAN is not set # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set @@ -606,13 +362,6 @@ CONFIG_XFRM_IPCOMP=y CONFIG_XFRM_MIGRATE=y CONFIG_XPS=y CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_IA64=y -CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_SPARC=y -CONFIG_XZ_DEC_X86=y CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y CONFIG_ZONE_DMA32=y diff --git a/target/linux/airoha/patches-6.6/902-mtd-parser-add-support-for-Airoha-parser.patch b/target/linux/airoha/patches-6.6/902-mtd-parser-add-support-for-Airoha-parser.patch deleted file mode 100644 index 590d0d9faa..0000000000 --- a/target/linux/airoha/patches-6.6/902-mtd-parser-add-support-for-Airoha-parser.patch +++ /dev/null @@ -1,170 +0,0 @@ -From ca46c5834ba3a74595a93d7a491fa9c943be7c30 Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Sun, 28 Jul 2024 12:15:53 +0200 -Subject: [PATCH 3/3] mtd: parser: add support for Airoha parser - -Add support for Airoha parser based on a post parse ofpart function. - -Airoha partition table follow normal fixed-partition implementation -with a special implementation for the ART partition. This is always the -past partition and is placed from the end of the flash - the partition -size. - -To enable this special implementation for ART partition, the relevant -node require the "airoha,dynamic-art" compatible. With that declared, -offset value is ignored and real offset is updated with the calculated -value. - -Due to usage of specific bad block management driver, the MTD size might -vary hence the ART partition offset needs to be dynamically parsed and -can't be declared statically. - -Signed-off-by: Christian Marangi ---- - drivers/mtd/parsers/Kconfig | 10 ++++++ - drivers/mtd/parsers/Makefile | 1 + - drivers/mtd/parsers/ofpart_airoha.c | 56 +++++++++++++++++++++++++++++ - drivers/mtd/parsers/ofpart_airoha.h | 18 ++++++++++ - drivers/mtd/parsers/ofpart_core.c | 6 ++++ - 5 files changed, 91 insertions(+) - create mode 100644 drivers/mtd/parsers/ofpart_airoha.c - create mode 100644 drivers/mtd/parsers/ofpart_airoha.h - ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -93,6 +93,16 @@ config MTD_OF_PARTS - flash memory node, as described in - Documentation/devicetree/bindings/mtd/mtd.yaml. - -+config MTD_OF_PARTS_AIROHA -+ bool "Airoha EN7815 partitioning support" -+ depends on MTD_OF_PARTS && (ARCH_AIROHA || COMPILE_TEST) -+ default ARCH_AIROHA -+ help -+ This provides partitions parser for Airoha EN7815 family devices -+ that can have dynamic "ART" partition at the end of the flash. -+ It takes care of finding the correct offset and update property -+ with it. -+ - config MTD_OF_PARTS_BCM4908 - bool "BCM4908 partitioning support" - depends on MTD_OF_PARTS && (ARCH_BCMBCA || COMPILE_TEST) ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -7,6 +7,7 @@ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdl - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o - obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o - ofpart-y += ofpart_core.o -+ofpart-$(CONFIG_MTD_OF_PARTS_AIROHA) += ofpart_airoha.o - ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o - ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o - obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o ---- /dev/null -+++ b/drivers/mtd/parsers/ofpart_airoha.c -@@ -0,0 +1,56 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (C) 2024 Christian Marangi -+ */ -+ -+#include -+#include -+ -+#include "ofpart_airoha.h" -+ -+int airoha_partitions_post_parse(struct mtd_info *mtd, -+ struct mtd_partition *parts, -+ int nr_parts) -+{ -+ struct mtd_partition *part; -+ int len, a_cells, s_cells; -+ struct device_node *pp; -+ struct property *prop; -+ const __be32 *reg; -+ __be32 *new_reg; -+ -+ part = &parts[nr_parts - 1]; -+ pp = part->of_node; -+ -+ /* Skip if ART partition have a valid offset instead of a dynamic one */ -+ if (!of_device_is_compatible(pp, "airoha,dynamic-art")) -+ return 0; -+ -+ /* ART partition is set at the end of flash - size */ -+ part->offset = mtd->size - part->size; -+ -+ /* Update the offset with the new calculate value in DT */ -+ prop = kzalloc(sizeof(*prop), GFP_KERNEL); -+ if (!prop) -+ return -ENOMEM; -+ -+ /* Reg already validated by fixed-partition parser */ -+ reg = of_get_property(pp, "reg", &len); -+ -+ /* Fixed partition */ -+ a_cells = of_n_addr_cells(pp); -+ s_cells = of_n_size_cells(pp); -+ -+ prop->name = "reg"; -+ prop->length = (a_cells + s_cells) * sizeof(__be32); -+ prop->value = kmemdup(reg, (a_cells + s_cells) * sizeof(__be32), -+ GFP_KERNEL); -+ new_reg = prop->value; -+ memset(new_reg, 0, a_cells * sizeof(__be32)); -+ new_reg[a_cells - 1] = cpu_to_be32(part->offset); -+ if (a_cells > 1) -+ new_reg[0] = cpu_to_be32(part->offset >> 32); -+ of_update_property(pp, prop); -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/mtd/parsers/ofpart_airoha.h -@@ -0,0 +1,18 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+#ifndef __OFPART_AIROHA_H -+#define __OFPART_AIROHA_H -+ -+#ifdef CONFIG_MTD_OF_PARTS_AIROHA -+int airoha_partitions_post_parse(struct mtd_info *mtd, -+ struct mtd_partition *parts, -+ int nr_parts); -+#else -+static inline int airoha_partitions_post_parse(struct mtd_info *mtd, -+ struct mtd_partition *parts, -+ int nr_parts) -+{ -+ return -EOPNOTSUPP; -+} -+#endif -+ -+#endif ---- a/drivers/mtd/parsers/ofpart_core.c -+++ b/drivers/mtd/parsers/ofpart_core.c -@@ -16,6 +16,7 @@ - #include - #include - -+#include "ofpart_airoha.h" - #include "ofpart_bcm4908.h" - #include "ofpart_linksys_ns.h" - -@@ -23,6 +24,10 @@ struct fixed_partitions_quirks { - int (*post_parse)(struct mtd_info *mtd, struct mtd_partition *parts, int nr_parts); - }; - -+static struct fixed_partitions_quirks airoha_partitions_quirks = { -+ .post_parse = airoha_partitions_post_parse, -+}; -+ - static struct fixed_partitions_quirks bcm4908_partitions_quirks = { - .post_parse = bcm4908_partitions_post_parse, - }; -@@ -192,6 +197,7 @@ static const struct of_device_id parse_o - /* Generic */ - { .compatible = "fixed-partitions" }, - /* Customized */ -+ { .compatible = "airoha,fixed-partitions", .data = &airoha_partitions_quirks, }, - { .compatible = "brcm,bcm4908-partitions", .data = &bcm4908_partitions_quirks, }, - { .compatible = "linksys,ns-partitions", .data = &linksys_ns_partitions_quirks, }, - {}, diff --git a/target/linux/ath79/dts/qca9563_zte_e8820.dts b/target/linux/ath79/dts/qca9563_zte_e8820.dts new file mode 100644 index 0000000000..059e844027 --- /dev/null +++ b/target/linux/ath79/dts/qca9563_zte_e8820.dts @@ -0,0 +1,230 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include +#include + +#include "qca956x.dtsi" + +/ { + model = "ZTE E8820"; + compatible = "zte,e8820", "qca,qca9563"; + + aliases { + label-mac-device = ð0; + led-boot = &power_green; + led-failsafe = &power_green; + led-running = &power_green; + led-upgrade = &power_green; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins>; + + led-0 { + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led-1 { + color = ; + function = LED_FUNCTION_USB; + function-enumerator = <2>; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port0>; + linux,default-trigger = "usbport"; + }; + + led-2 { + color = ; + function = LED_FUNCTION_USB; + function-enumerator = <1>; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port1>; + linux,default-trigger = "usbport"; + }; + + led-3 { + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + power_green: led-4 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + }; + + keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-wifi { + label = "wifi"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + button-wps { + label = "wps"; + gpios = <&gpio 21 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + }; +}; + +ð0 { + nvmem-cells = <&macaddr_art_0 0>; + nvmem-cell-names = "mac-address"; + + phy-handle = <&phy0>; + phy-mode = "sgmii"; + pll-data = <0x03000101 0x00000101 0x00001919>; + + status = "okay"; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + + qca,ar8327-initvals = < + 0x04 0x00000080 /* PORT0 PAD MODE CTRL */ + 0x50 0xcc35cc35 /* LED_CTRL0 */ + 0x54 0xca35ca35 /* LED_CTRL1 */ + 0x58 0xc935c935 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +&pcie { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,003c"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&cal_art_5000>, <&macaddr_art_0 1>; + nvmem-cell-names = "calibration", "mac-address"; + }; +}; + +&spi { + num-cs = <1>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0xfa0000>; + }; + + partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + compatible = "mac-base"; + reg = <0x0 0x6>; + #nvmem-cell-cells = <1>; + }; + + cal_art_1000: cal@1000 { + reg = <0x1000 0x440>; + }; + + cal_art_5000: cal@5000 { + reg = <0x5000 0x844>; + }; + }; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&wmac { + nvmem-cells = <&cal_art_1000>, <&macaddr_art_0 0>; + nvmem-cell-names = "calibration", "mac-address"; + status = "okay"; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb_phy1 { + status = "okay"; +}; + +&usb0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub_port0: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&usb1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index 9a9267c8c7..f82f05cf6b 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -341,7 +341,8 @@ ath79_setup_interfaces() sitecom,wlr-7100|\ tplink,archer-c2-v3|\ tplink,tl-wr1043nd-v4|\ - tplink,tl-wr1043n-v5) + tplink,tl-wr1043n-v5|\ + zte,e8820) ucidef_add_switch "switch0" \ "0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan" ;; @@ -870,6 +871,11 @@ ath79_setup_macs() xiaomi,aiot-ac2350) lan_mac=$(mtd_get_mac_binary art 0x1002) ;; + zte,e8820) + wan_mac=$(mtd_get_mac_binary art 0) + lan_mac=$(macaddr_add "$wan_mac" 1) + label_mac=$wan_mac + ;; esac [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index 7c71cbb5e2..d5b08abd81 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -3383,6 +3383,15 @@ define Device/zbtlink_zbt-wd323 endef TARGET_DEVICES += zbtlink_zbt-wd323 +define Device/zte_e8820 + SOC := qca9563 + DEVICE_VENDOR := ZTE + DEVICE_MODEL := E8820 + IMAGE_SIZE := 16000k + DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct-smallbuffers ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += zte_e8820 + define Device/zyxel_nwa11xx $(Device/loader-okli-uimage) SOC := ar9342 diff --git a/target/linux/d1/config-6.6 b/target/linux/d1/config-6.6 index 7330cc0e24..0bfcdf7958 100644 --- a/target/linux/d1/config-6.6 +++ b/target/linux/d1/config-6.6 @@ -217,7 +217,6 @@ CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y # CONFIG_PAGE_TABLE_CHECK is not set CONFIG_PANIC_TIMEOUT=0 -CONFIG_PCPU_DEV_REFCNT=y CONFIG_PGTABLE_LEVELS=5 CONFIG_PHYLIB=y CONFIG_PHYLINK=y diff --git a/target/linux/generic/backport-6.6/753-v6.15-net-ethernet-mediatek-add-EEE-support.patch b/target/linux/generic/backport-6.6/753-v6.15-net-ethernet-mediatek-add-EEE-support.patch new file mode 100644 index 0000000000..d9b86ae36e --- /dev/null +++ b/target/linux/generic/backport-6.6/753-v6.15-net-ethernet-mediatek-add-EEE-support.patch @@ -0,0 +1,144 @@ +From 952d7325362ffbefa6ce5619fb4e53c2159ec7a7 Mon Sep 17 00:00:00 2001 +From: Qingfang Deng +Date: Mon, 17 Feb 2025 17:40:21 +0800 +Subject: [PATCH] net: ethernet: mediatek: add EEE support + +Add EEE support to MediaTek SoC Ethernet. The register fields are +similar to the ones in MT7531, except that the LPI threshold is in +milliseconds. + +Signed-off-by: Qingfang Deng +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 64 +++++++++++++++++++++ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 11 ++++ + 2 files changed, 75 insertions(+) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -786,6 +786,7 @@ static void mtk_mac_link_up(struct phyli + + mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); + mcr &= ~(MAC_MCR_SPEED_100 | MAC_MCR_SPEED_1000 | ++ MAC_MCR_EEE100M | MAC_MCR_EEE1G | + MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_TX_FC | + MAC_MCR_FORCE_RX_FC); + +@@ -811,6 +812,18 @@ static void mtk_mac_link_up(struct phyli + if (rx_pause) + mcr |= MAC_MCR_FORCE_RX_FC; + ++ if (mode == MLO_AN_PHY && phy && phy_init_eee(phy, false) >= 0) { ++ switch (speed) { ++ case SPEED_2500: ++ case SPEED_1000: ++ mcr |= MAC_MCR_EEE1G; ++ break; ++ case SPEED_100: ++ mcr |= MAC_MCR_EEE100M; ++ break; ++ } ++ } ++ + mcr |= MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK; + mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); + } +@@ -3956,6 +3969,7 @@ static int mtk_hw_init(struct mtk_eth *e + continue; + + mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); ++ mtk_w32(eth, FIELD_PREP(MAC_EEE_LPI_TXIDLE_THD, 1), MTK_MAC_EEECR(i)); + mtk_set_mcr_max_rx(netdev_priv(dev), + dev->mtu + MTK_RX_ETH_HLEN); + } +@@ -4476,6 +4490,55 @@ static int mtk_set_pauseparam(struct net + return phylink_ethtool_set_pauseparam(mac->phylink, pause); + } + ++static int mtk_get_eee(struct net_device *dev, struct ethtool_eee *eee) ++{ ++ struct mtk_mac *mac = netdev_priv(dev); ++ u32 reg; ++ int ret; ++ ++ ret = phylink_ethtool_get_eee(mac->phylink, eee); ++ if (ret) ++ return ret; ++ ++ reg = mtk_r32(mac->hw, MTK_MAC_EEECR(mac->id)); ++ eee->tx_lpi_enabled = !(reg & MAC_EEE_LPI_MODE); ++ eee->tx_lpi_timer = FIELD_GET(MAC_EEE_LPI_TXIDLE_THD, reg) * 1000; ++ ++ return 0; ++} ++ ++static int mtk_set_eee(struct net_device *dev, struct ethtool_eee *eee) ++{ ++ struct mtk_mac *mac = netdev_priv(dev); ++ u32 txidle_thd_ms, reg; ++ int ret; ++ ++ /* Tx idle timer in ms */ ++ txidle_thd_ms = DIV_ROUND_UP(eee->tx_lpi_timer, 1000); ++ if (!FIELD_FIT(MAC_EEE_LPI_TXIDLE_THD, txidle_thd_ms)) ++ return -EINVAL; ++ ++ reg = FIELD_PREP(MAC_EEE_LPI_TXIDLE_THD, txidle_thd_ms); ++ ++ /* PHY Wake-up time, this field does not have a reset value, so use the ++ * reset value from MT7531 (36us for 100BaseT and 17us for 1000BaseT). ++ */ ++ reg |= FIELD_PREP(MAC_EEE_WAKEUP_TIME_1000, 17) | ++ FIELD_PREP(MAC_EEE_WAKEUP_TIME_100, 36); ++ ++ if (!txidle_thd_ms) ++ /* Force LPI Mode without a delay */ ++ reg |= MAC_EEE_LPI_MODE; ++ ++ ret = phylink_ethtool_set_eee(mac->phylink, eee); ++ if (ret) ++ return ret; ++ ++ mtk_w32(mac->hw, reg, MTK_MAC_EEECR(mac->id)); ++ ++ return 0; ++} ++ + static u16 mtk_select_queue(struct net_device *dev, struct sk_buff *skb, + struct net_device *sb_dev) + { +@@ -4508,6 +4571,8 @@ static const struct ethtool_ops mtk_etht + .set_pauseparam = mtk_set_pauseparam, + .get_rxnfc = mtk_get_rxnfc, + .set_rxnfc = mtk_set_rxnfc, ++ .get_eee = mtk_get_eee, ++ .set_eee = mtk_set_eee, + }; + + static const struct net_device_ops mtk_netdev_ops = { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -453,6 +453,8 @@ + #define MAC_MCR_RX_FIFO_CLR_DIS BIT(12) + #define MAC_MCR_BACKOFF_EN BIT(9) + #define MAC_MCR_BACKPR_EN BIT(8) ++#define MAC_MCR_EEE1G BIT(7) ++#define MAC_MCR_EEE100M BIT(6) + #define MAC_MCR_FORCE_RX_FC BIT(5) + #define MAC_MCR_FORCE_TX_FC BIT(4) + #define MAC_MCR_SPEED_1000 BIT(3) +@@ -461,6 +463,15 @@ + #define MAC_MCR_FORCE_LINK BIT(0) + #define MAC_MCR_FORCE_LINK_DOWN (MAC_MCR_FORCE_MODE) + ++/* Mac EEE control registers */ ++#define MTK_MAC_EEECR(x) (0x10104 + (x * 0x100)) ++#define MAC_EEE_WAKEUP_TIME_1000 GENMASK(31, 24) ++#define MAC_EEE_WAKEUP_TIME_100 GENMASK(23, 16) ++#define MAC_EEE_LPI_TXIDLE_THD GENMASK(15, 8) ++#define MAC_EEE_CKG_TXIDLE BIT(3) ++#define MAC_EEE_CKG_RXLPI BIT(2) ++#define MAC_EEE_LPI_MODE BIT(0) ++ + /* Mac status registers */ + #define MTK_MAC_MSR(x) (0x10108 + (x * 0x100)) + #define MAC_MSR_EEE1G BIT(7) diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6 index 5fd135fb54..b50cbfa49f 100644 --- a/target/linux/generic/config-6.6 +++ b/target/linux/generic/config-6.6 @@ -4586,7 +4586,7 @@ CONFIG_PCI_SYSCALL=y # CONFIG_PCMCIA_XIRC2PS is not set # CONFIG_PCMCIA_XIRCOM is not set # CONFIG_PCNET32 is not set -# CONFIG_PCPU_DEV_REFCNT is not set +CONFIG_PCPU_DEV_REFCNT=y CONFIG_PCP_BATCH_SCALE_MAX=5 # CONFIG_PCSPKR_PLATFORM is not set # CONFIG_PCS_MTK_USXGMII is not set diff --git a/target/linux/generic/hack-6.6/730-net-ethernet-mtk_eth_soc-add-hw-dump-for-forced-rese.patch b/target/linux/generic/hack-6.6/730-net-ethernet-mtk_eth_soc-add-hw-dump-for-forced-rese.patch index 8a8a5c061a..c25629e830 100644 --- a/target/linux/generic/hack-6.6/730-net-ethernet-mtk_eth_soc-add-hw-dump-for-forced-rese.patch +++ b/target/linux/generic/hack-6.6/730-net-ethernet-mtk_eth_soc-add-hw-dump-for-forced-rese.patch @@ -37,7 +37,7 @@ Signed-off-by: Bo-Cun Chen .glo_cfg = 0x4604, .rst_idx = 0x4608, .delay_irq = 0x460c, -@@ -3885,6 +3888,56 @@ static void mtk_set_mcr_max_rx(struct mt +@@ -3898,6 +3901,56 @@ static void mtk_set_mcr_max_rx(struct mt mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); } @@ -94,7 +94,7 @@ Signed-off-by: Bo-Cun Chen static void mtk_hw_reset(struct mtk_eth *eth) { u32 val; -@@ -4344,6 +4397,8 @@ static void mtk_pending_work(struct work +@@ -4358,6 +4411,8 @@ static void mtk_pending_work(struct work rtnl_lock(); set_bit(MTK_RESETTING, ð->state); @@ -105,7 +105,7 @@ Signed-off-by: Bo-Cun Chen /* Run again reset preliminary configuration in order to avoid any --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1172,6 +1172,7 @@ struct mtk_reg_map { +@@ -1183,6 +1183,7 @@ struct mtk_reg_map { u32 rx_ptr; /* rx base pointer */ u32 rx_cnt_cfg; /* rx max count configuration */ u32 qcrx_ptr; /* rx cpu pointer */ diff --git a/target/linux/generic/pending-6.6/155-usbnet-restore-usb%d-name-exception-for-local-mac-addresses.patch b/target/linux/generic/pending-6.6/155-usbnet-restore-usb%d-name-exception-for-local-mac-addresses.patch new file mode 100644 index 0000000000..0d32800cbc --- /dev/null +++ b/target/linux/generic/pending-6.6/155-usbnet-restore-usb%d-name-exception-for-local-mac-addresses.patch @@ -0,0 +1,63 @@ +From linux-netdev Tue Dec 03 13:04:55 2024 +From: Dominique Martinet +Date: Tue, 03 Dec 2024 13:04:55 +0000 +To: linux-netdev +Subject: [PATCH] net: usb: usbnet: restore usb%d name exception for local mac addresses +Message-Id: <20241203130457.904325-1-asmadeus () codewreck ! org> +X-MARC-Message: https://marc.info/?l=linux-netdev&m=173323431631309 + +From: Dominique Martinet + +The previous commit assumed that local addresses always came from the +kernel, but some devices hand out local mac addresses so we ended up +with point-to-point devices with a mac set by the driver, renaming to +eth%d when they used to be named usb%d. + +Userspace should not rely on device name, but for the sake of stability +restore the local mac address check portion of the naming exception: +point to point devices which either have no mac set by the driver or +have a local mac handed out by the driver will keep the usb%d name. + +Fixes: 8a7d12d674ac ("net: usb: usbnet: fix name regression") +Signed-off-by: Dominique Martinet +--- + drivers/net/usb/usbnet.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +--- a/drivers/net/usb/usbnet.c ++++ b/drivers/net/usb/usbnet.c +@@ -178,6 +178,17 @@ int usbnet_get_ethernet_addr(struct usbn + } + EXPORT_SYMBOL_GPL(usbnet_get_ethernet_addr); + ++static bool usbnet_needs_usb_name_format(struct usbnet *dev, struct net_device *net) ++{ ++ /* Point to point devices which don't have a real MAC address ++ * (or report a fake local one) have historically used the usb%d ++ * naming. Preserve this.. ++ */ ++ return (dev->driver_info->flags & FLAG_POINTTOPOINT) != 0 && ++ (is_zero_ether_addr(net->dev_addr) || ++ is_local_ether_addr(net->dev_addr)); ++} ++ + static void intr_complete (struct urb *urb) + { + struct usbnet *dev = urb->context; +@@ -1766,13 +1777,10 @@ usbnet_probe (struct usb_interface *udev + if (status < 0) + goto out1; + +- // heuristic: "usb%d" for links we know are two-host, +- // else "eth%d" when there's reasonable doubt. userspace +- // can rename the link if it knows better. ++ /* heuristic: rename to "eth%d" if we are not sure this link ++ * is two-host (these links keep "usb%d") */ + if ((dev->driver_info->flags & FLAG_ETHER) != 0 && +- ((dev->driver_info->flags & FLAG_POINTTOPOINT) == 0 || +- /* somebody touched it*/ +- !is_zero_ether_addr(net->dev_addr))) ++ !usbnet_needs_usb_name_format(dev, net)) + strscpy(net->name, "eth%d", sizeof(net->name)); + /* WLAN devices should always be named "wlan%d" */ + if ((dev->driver_info->flags & FLAG_WLAN) != 0) diff --git a/target/linux/generic/pending-6.6/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-6.6/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch index 5563bf1f93..021ed9fa73 100644 --- a/target/linux/generic/pending-6.6/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch +++ b/target/linux/generic/pending-6.6/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -5036,6 +5036,8 @@ static int mtk_probe(struct platform_dev +@@ -5101,6 +5101,8 @@ static int mtk_probe(struct platform_dev * for NAPI to work */ init_dummy_netdev(ð->dummy_dev); diff --git a/target/linux/generic/pending-6.6/730-net-ethernet-mtk_eth_soc-reset-all-TX-queues-on-DMA-.patch b/target/linux/generic/pending-6.6/730-net-ethernet-mtk_eth_soc-reset-all-TX-queues-on-DMA-.patch index 67d0ab4537..6995ad31c1 100644 --- a/target/linux/generic/pending-6.6/730-net-ethernet-mtk_eth_soc-reset-all-TX-queues-on-DMA-.patch +++ b/target/linux/generic/pending-6.6/730-net-ethernet-mtk_eth_soc-reset-all-TX-queues-on-DMA-.patch @@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -3135,11 +3135,19 @@ static int mtk_dma_init(struct mtk_eth * +@@ -3148,11 +3148,19 @@ static int mtk_dma_init(struct mtk_eth * static void mtk_dma_free(struct mtk_eth *eth) { const struct mtk_soc_data *soc = eth->soc; diff --git a/target/linux/generic/pending-6.6/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch b/target/linux/generic/pending-6.6/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch index c3297a1087..e6e97cffff 100644 --- a/target/linux/generic/pending-6.6/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch +++ b/target/linux/generic/pending-6.6/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1336,6 +1336,22 @@ struct mtk_mac { +@@ -1347,6 +1347,22 @@ struct mtk_mac { /* the struct describing the SoC. these are declared in the soc_xyz.c files */ extern const struct of_device_id of_mtk_match[]; @@ -34,7 +34,7 @@ Signed-off-by: Felix Fietkau static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) { return eth->soc->version == 1; -@@ -1350,6 +1366,7 @@ static inline bool mtk_is_netsys_v3_or_g +@@ -1361,6 +1377,7 @@ static inline bool mtk_is_netsys_v3_or_g { return eth->soc->version > 2; } diff --git a/target/linux/generic/pending-6.6/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch b/target/linux/generic/pending-6.6/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch index 53187934d0..8e2c7d5a35 100644 --- a/target/linux/generic/pending-6.6/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch +++ b/target/linux/generic/pending-6.6/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch @@ -24,7 +24,7 @@ Signed-off-by: Felix Fietkau #include #include "mtk_eth_soc.h" -@@ -1596,12 +1597,28 @@ static void mtk_wake_queue(struct mtk_et +@@ -1609,12 +1610,28 @@ static void mtk_wake_queue(struct mtk_et } } @@ -53,7 +53,7 @@ Signed-off-by: Felix Fietkau bool gso = false; int tx_num; -@@ -1623,6 +1640,18 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1636,6 +1653,18 @@ static netdev_tx_t mtk_start_xmit(struct return NETDEV_TX_BUSY; } @@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau /* TSO: fill MSS info in tcp checksum field */ if (skb_is_gso(skb)) { if (skb_cow_head(skb, 0)) { -@@ -1638,8 +1667,14 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1651,8 +1680,14 @@ static netdev_tx_t mtk_start_xmit(struct } } diff --git a/target/linux/generic/pending-6.6/733-01-net-ethernet-mtk_eth_soc-use-napi_build_skb.patch b/target/linux/generic/pending-6.6/733-01-net-ethernet-mtk_eth_soc-use-napi_build_skb.patch index 82ba768fd5..7f1a638af0 100644 --- a/target/linux/generic/pending-6.6/733-01-net-ethernet-mtk_eth_soc-use-napi_build_skb.patch +++ b/target/linux/generic/pending-6.6/733-01-net-ethernet-mtk_eth_soc-use-napi_build_skb.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2140,7 +2140,7 @@ static int mtk_poll_rx(struct napi_struc +@@ -2153,7 +2153,7 @@ static int mtk_poll_rx(struct napi_struc if (ret != XDP_PASS) goto skip_rx; @@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau if (unlikely(!skb)) { page_pool_put_full_page(ring->page_pool, page, true); -@@ -2178,7 +2178,7 @@ static int mtk_poll_rx(struct napi_struc +@@ -2191,7 +2191,7 @@ static int mtk_poll_rx(struct napi_struc dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), ring->buf_size, DMA_FROM_DEVICE); diff --git a/target/linux/generic/pending-6.6/734-net-ethernet-mediatek-enlarge-DMA-reserve-buffer.patch b/target/linux/generic/pending-6.6/734-net-ethernet-mediatek-enlarge-DMA-reserve-buffer.patch index d786b462c2..3d2aee9485 100644 --- a/target/linux/generic/pending-6.6/734-net-ethernet-mediatek-enlarge-DMA-reserve-buffer.patch +++ b/target/linux/generic/pending-6.6/734-net-ethernet-mediatek-enlarge-DMA-reserve-buffer.patch @@ -25,7 +25,7 @@ Signed-off-by: Chad Monroe /* QDMA Flow Control Register */ --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -3309,12 +3309,14 @@ static int mtk_start_dma(struct mtk_eth +@@ -3322,12 +3322,14 @@ static int mtk_start_dma(struct mtk_eth MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO | MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE; diff --git a/target/linux/generic/pending-6.6/735-net-ethernet-mtk_eth_soc-fix-memory-corruption-durin.patch b/target/linux/generic/pending-6.6/735-net-ethernet-mtk_eth_soc-fix-memory-corruption-durin.patch index 5d7902b1cf..419c158c5c 100644 --- a/target/linux/generic/pending-6.6/735-net-ethernet-mtk_eth_soc-fix-memory-corruption-durin.patch +++ b/target/linux/generic/pending-6.6/735-net-ethernet-mtk_eth_soc-fix-memory-corruption-durin.patch @@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1172,7 +1172,7 @@ static int mtk_init_fq_dma(struct mtk_et +@@ -1185,7 +1185,7 @@ static int mtk_init_fq_dma(struct mtk_et if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) return -ENOMEM; diff --git a/target/linux/generic/pending-6.6/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-6.6/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch index f4e12ca63a..09067c4712 100644 --- a/target/linux/generic/pending-6.6/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch +++ b/target/linux/generic/pending-6.6/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch @@ -426,7 +426,7 @@ Signed-off-by: Daniel Golle u32 mcr; mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -@@ -816,9 +903,63 @@ static void mtk_mac_link_up(struct phyli +@@ -829,9 +916,63 @@ static void mtk_mac_link_up(struct phyli mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); } @@ -490,7 +490,7 @@ Signed-off-by: Daniel Golle .mac_finish = mtk_mac_finish, .mac_link_down = mtk_mac_link_down, .mac_link_up = mtk_mac_link_up, -@@ -3417,6 +3558,9 @@ static int mtk_open(struct net_device *d +@@ -3430,6 +3571,9 @@ static int mtk_open(struct net_device *d ppe_num = eth->soc->ppe_num; @@ -500,7 +500,7 @@ Signed-off-by: Daniel Golle err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0); if (err) { netdev_err(dev, "%s: could not attach PHY: %d\n", __func__, -@@ -3567,6 +3711,9 @@ static int mtk_stop(struct net_device *d +@@ -3580,6 +3724,9 @@ static int mtk_stop(struct net_device *d for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) mtk_ppe_stop(eth->ppe[i]); @@ -510,7 +510,7 @@ Signed-off-by: Daniel Golle return 0; } -@@ -4580,6 +4727,7 @@ static const struct net_device_ops mtk_n +@@ -4645,6 +4792,7 @@ static const struct net_device_ops mtk_n static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) { const __be32 *_id = of_get_property(np, "reg", NULL); @@ -518,7 +518,7 @@ Signed-off-by: Daniel Golle phy_interface_t phy_mode; struct phylink *phylink; struct mtk_mac *mac; -@@ -4616,16 +4764,41 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4681,16 +4829,41 @@ static int mtk_add_mac(struct mtk_eth *e mac->id = id; mac->hw = eth; mac->of_node = np; @@ -568,7 +568,7 @@ Signed-off-by: Daniel Golle } memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip)); -@@ -4708,8 +4881,21 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4773,8 +4946,21 @@ static int mtk_add_mac(struct mtk_eth *e phy_interface_zero(mac->phylink_config.supported_interfaces); __set_bit(PHY_INTERFACE_MODE_INTERNAL, mac->phylink_config.supported_interfaces); @@ -590,7 +590,7 @@ Signed-off-by: Daniel Golle phylink = phylink_create(&mac->phylink_config, of_fwnode_handle(mac->of_node), phy_mode, &mtk_phylink_ops); -@@ -4760,6 +4946,26 @@ free_netdev: +@@ -4825,6 +5011,26 @@ free_netdev: return err; } @@ -617,7 +617,7 @@ Signed-off-by: Daniel Golle void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev) { struct net_device *dev, *tmp; -@@ -4906,7 +5112,8 @@ static int mtk_probe(struct platform_dev +@@ -4971,7 +5177,8 @@ static int mtk_probe(struct platform_dev regmap_write(cci, 0, 3); } @@ -627,7 +627,7 @@ Signed-off-by: Daniel Golle err = mtk_sgmii_init(eth); if (err) -@@ -5017,6 +5224,24 @@ static int mtk_probe(struct platform_dev +@@ -5082,6 +5289,24 @@ static int mtk_probe(struct platform_dev } } @@ -652,7 +652,7 @@ Signed-off-by: Daniel Golle if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { err = devm_request_irq(eth->dev, eth->irq[0], mtk_handle_irq, 0, -@@ -5120,6 +5345,11 @@ static int mtk_remove(struct platform_de +@@ -5185,6 +5410,11 @@ static int mtk_remove(struct platform_de mtk_stop(eth->netdev[i]); mac = netdev_priv(eth->netdev[i]); phylink_disconnect_phy(mac->phylink); @@ -674,7 +674,7 @@ Signed-off-by: Daniel Golle #include #include #include -@@ -505,6 +506,21 @@ +@@ -516,6 +517,21 @@ #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED) #define INTF_MODE_RGMII_10_100 0 @@ -696,7 +696,7 @@ Signed-off-by: Daniel Golle /* GPIO port control registers for GMAC 2*/ #define GPIO_OD33_CTRL8 0x4c0 #define GPIO_BIAS_CTRL 0xed0 -@@ -530,6 +546,7 @@ +@@ -541,6 +557,7 @@ #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) #define SYSCFG0_SGMII_GMAC2_V2 BIT(8) @@ -704,7 +704,7 @@ Signed-off-by: Daniel Golle /* ethernet subsystem clock register */ -@@ -568,6 +585,11 @@ +@@ -579,6 +596,11 @@ #define GEPHY_MAC_SEL BIT(1) /* Top misc registers */ @@ -716,7 +716,7 @@ Signed-off-by: Daniel Golle #define USB_PHY_SWITCH_REG 0x218 #define QPHY_SEL_MASK GENMASK(1, 0) #define SGMII_QPHY_SEL 0x2 -@@ -592,6 +614,8 @@ +@@ -603,6 +625,8 @@ #define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) #define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) @@ -725,7 +725,7 @@ Signed-off-by: Daniel Golle #define MTK_FE_CDM1_FSM 0x220 #define MTK_FE_CDM2_FSM 0x224 #define MTK_FE_CDM3_FSM 0x238 -@@ -600,6 +624,11 @@ +@@ -611,6 +635,11 @@ #define MTK_FE_CDM6_FSM 0x328 #define MTK_FE_GDM1_FSM 0x228 #define MTK_FE_GDM2_FSM 0x22C @@ -737,7 +737,7 @@ Signed-off-by: Daniel Golle #define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100)) -@@ -724,12 +753,8 @@ enum mtk_clks_map { +@@ -735,12 +764,8 @@ enum mtk_clks_map { MTK_CLK_ETHWARP_WOCPU2, MTK_CLK_ETHWARP_WOCPU1, MTK_CLK_ETHWARP_WOCPU0, @@ -750,7 +750,7 @@ Signed-off-by: Daniel Golle MTK_CLK_TOP_ETH_GMII_SEL, MTK_CLK_TOP_ETH_REFCK_50M_SEL, MTK_CLK_TOP_ETH_SYS_200M_SEL, -@@ -800,19 +825,9 @@ enum mtk_clks_map { +@@ -811,19 +836,9 @@ enum mtk_clks_map { BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \ BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \ BIT_ULL(MTK_CLK_CRYPTO) | \ @@ -770,7 +770,7 @@ Signed-off-by: Daniel Golle BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \ BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \ BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \ -@@ -946,6 +961,8 @@ enum mkt_eth_capabilities { +@@ -957,6 +972,8 @@ enum mkt_eth_capabilities { MTK_RGMII_BIT = 0, MTK_TRGMII_BIT, MTK_SGMII_BIT, @@ -779,7 +779,7 @@ Signed-off-by: Daniel Golle MTK_ESW_BIT, MTK_GEPHY_BIT, MTK_MUX_BIT, -@@ -966,8 +983,11 @@ enum mkt_eth_capabilities { +@@ -977,8 +994,11 @@ enum mkt_eth_capabilities { MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, @@ -791,7 +791,7 @@ Signed-off-by: Daniel Golle /* PATH BITS */ MTK_ETH_PATH_GMAC1_RGMII_BIT, -@@ -975,14 +995,21 @@ enum mkt_eth_capabilities { +@@ -986,14 +1006,21 @@ enum mkt_eth_capabilities { MTK_ETH_PATH_GMAC1_SGMII_BIT, MTK_ETH_PATH_GMAC2_RGMII_BIT, MTK_ETH_PATH_GMAC2_SGMII_BIT, @@ -813,7 +813,7 @@ Signed-off-by: Daniel Golle #define MTK_ESW BIT_ULL(MTK_ESW_BIT) #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -1005,10 +1032,16 @@ enum mkt_eth_capabilities { +@@ -1016,10 +1043,16 @@ enum mkt_eth_capabilities { BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) @@ -830,7 +830,7 @@ Signed-off-by: Daniel Golle /* Supported path present on SoCs */ #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT) -@@ -1016,8 +1049,13 @@ enum mkt_eth_capabilities { +@@ -1027,8 +1060,13 @@ enum mkt_eth_capabilities { #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) @@ -844,7 +844,7 @@ Signed-off-by: Daniel Golle #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) -@@ -1025,7 +1063,12 @@ enum mkt_eth_capabilities { +@@ -1036,7 +1074,12 @@ enum mkt_eth_capabilities { #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) @@ -857,7 +857,7 @@ Signed-off-by: Daniel Golle /* MUXes present on SoCs */ /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ -@@ -1044,10 +1087,20 @@ enum mkt_eth_capabilities { +@@ -1055,10 +1098,20 @@ enum mkt_eth_capabilities { (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ MTK_SHARED_SGMII) @@ -878,7 +878,7 @@ Signed-off-by: Daniel Golle #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -@@ -1079,8 +1132,12 @@ enum mkt_eth_capabilities { +@@ -1090,8 +1143,12 @@ enum mkt_eth_capabilities { MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ MTK_RSTCTRL_PPE1 | MTK_SRAM) @@ -893,7 +893,7 @@ Signed-off-by: Daniel Golle struct mtk_tx_dma_desc_info { dma_addr_t addr; -@@ -1325,6 +1382,9 @@ struct mtk_mac { +@@ -1336,6 +1393,9 @@ struct mtk_mac { struct device_node *of_node; struct phylink *phylink; struct phylink_config phylink_config; @@ -903,7 +903,7 @@ Signed-off-by: Daniel Golle struct mtk_eth *hw; struct mtk_hw_stats *hw_stats; __be32 hwlro_ip[MTK_MAX_LRO_IP_CNT]; -@@ -1448,6 +1508,19 @@ static inline u32 mtk_get_ib2_multicast_ +@@ -1459,6 +1519,19 @@ static inline u32 mtk_get_ib2_multicast_ return MTK_FOE_IB2_MULTICAST; } @@ -923,7 +923,7 @@ Signed-off-by: Daniel Golle /* read the hardware status register */ void mtk_stats_update_mac(struct mtk_mac *mac); -@@ -1456,8 +1529,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne +@@ -1467,8 +1540,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg); int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); diff --git a/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch index b492f4d0c0..03e610e8c2 100644 --- a/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch +++ b/target/linux/generic/pending-6.6/738-01-net-ethernet-mtk_eth_soc-reduce-rx-ring-size-for-older.patch @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -5381,7 +5381,7 @@ static const struct mtk_soc_data mt2701_ +@@ -5446,7 +5446,7 @@ static const struct mtk_soc_data mt2701_ .desc_size = sizeof(struct mtk_rx_dma), .irq_done_mask = MTK_RX_DONE_INT, .dma_l4_valid = RX_DMA_L4_VALID, @@ -39,7 +39,7 @@ Signed-off-by: Felix Fietkau .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, }, -@@ -5409,7 +5409,7 @@ static const struct mtk_soc_data mt7621_ +@@ -5474,7 +5474,7 @@ static const struct mtk_soc_data mt7621_ .desc_size = sizeof(struct mtk_rx_dma), .irq_done_mask = MTK_RX_DONE_INT, .dma_l4_valid = RX_DMA_L4_VALID, @@ -48,7 +48,7 @@ Signed-off-by: Felix Fietkau .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, }, -@@ -5439,7 +5439,7 @@ static const struct mtk_soc_data mt7622_ +@@ -5504,7 +5504,7 @@ static const struct mtk_soc_data mt7622_ .desc_size = sizeof(struct mtk_rx_dma), .irq_done_mask = MTK_RX_DONE_INT, .dma_l4_valid = RX_DMA_L4_VALID, @@ -57,7 +57,7 @@ Signed-off-by: Felix Fietkau .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, }, -@@ -5468,7 +5468,7 @@ static const struct mtk_soc_data mt7623_ +@@ -5533,7 +5533,7 @@ static const struct mtk_soc_data mt7623_ .desc_size = sizeof(struct mtk_rx_dma), .irq_done_mask = MTK_RX_DONE_INT, .dma_l4_valid = RX_DMA_L4_VALID, @@ -66,7 +66,7 @@ Signed-off-by: Felix Fietkau .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, }, -@@ -5494,7 +5494,7 @@ static const struct mtk_soc_data mt7629_ +@@ -5559,7 +5559,7 @@ static const struct mtk_soc_data mt7629_ .desc_size = sizeof(struct mtk_rx_dma), .irq_done_mask = MTK_RX_DONE_INT, .dma_l4_valid = RX_DMA_L4_VALID, @@ -75,7 +75,7 @@ Signed-off-by: Felix Fietkau .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, }, -@@ -5526,7 +5526,7 @@ static const struct mtk_soc_data mt7981_ +@@ -5591,7 +5591,7 @@ static const struct mtk_soc_data mt7981_ .dma_l4_valid = RX_DMA_L4_VALID_V2, .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, @@ -84,7 +84,7 @@ Signed-off-by: Felix Fietkau }, }; -@@ -5556,7 +5556,7 @@ static const struct mtk_soc_data mt7986_ +@@ -5621,7 +5621,7 @@ static const struct mtk_soc_data mt7986_ .dma_l4_valid = RX_DMA_L4_VALID_V2, .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, @@ -93,7 +93,7 @@ Signed-off-by: Felix Fietkau }, }; -@@ -5609,7 +5609,7 @@ static const struct mtk_soc_data rt5350_ +@@ -5674,7 +5674,7 @@ static const struct mtk_soc_data rt5350_ .dma_l4_valid = RX_DMA_L4_VALID_PDMA, .dma_max_len = MTK_TX_DMA_BUF_LEN, .dma_len_offset = 16, diff --git a/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch index ab374d93e4..c74c9e888f 100644 --- a/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch +++ b/target/linux/generic/pending-6.6/738-02-net-ethernet-mtk_eth_soc-do-not-enable-page-pool-sta.patch @@ -25,7 +25,7 @@ Signed-off-by: Felix Fietkau help --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4552,6 +4552,7 @@ static int mtk_get_sset_count(struct net +@@ -4566,6 +4566,7 @@ static int mtk_get_sset_count(struct net static void mtk_ethtool_pp_stats(struct mtk_eth *eth, u64 *data) { @@ -33,7 +33,7 @@ Signed-off-by: Felix Fietkau struct page_pool_stats stats = {}; int i; -@@ -4564,6 +4565,7 @@ static void mtk_ethtool_pp_stats(struct +@@ -4578,6 +4579,7 @@ static void mtk_ethtool_pp_stats(struct page_pool_get_stats(ring->page_pool, &stats); } page_pool_ethtool_stats_get(data, &stats); diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts index 9238fba5d6..b7cdf9d569 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts @@ -74,17 +74,47 @@ &gswip_mdio { phy11: ethernet-phy@11 { reg = <0x11>; - lantiq,led1h = <0x70>; - lantiq,led1l = <0x00>; - lantiq,led2h = <0x00>; - lantiq,led2l = <0x03>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led-1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + + }; + + led-2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + + }; + }; }; phy13: ethernet-phy@13 { reg = <0x13>; - lantiq,led1h = <0x70>; - lantiq,led1l = <0x00>; - lantiq,led2h = <0x00>; - lantiq,led2l = <0x03>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led-1 { + reg = <1>; + color = ; + function = LED_FUNCTION_LAN; + + }; + + led-2 { + reg = <2>; + color = ; + function = LED_FUNCTION_LAN; + + }; + }; }; }; diff --git a/target/linux/lantiq/patches-6.6/0023-NET-PHY-add-led-support-for-intel-xway.patch b/target/linux/lantiq/patches-6.6/0023-NET-PHY-add-led-support-for-intel-xway.patch deleted file mode 100644 index a6a517dbf6..0000000000 --- a/target/linux/lantiq/patches-6.6/0023-NET-PHY-add-led-support-for-intel-xway.patch +++ /dev/null @@ -1,294 +0,0 @@ -From 0a63ab263725c427051a8bbaa0732b749627da27 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 7 Aug 2014 18:15:36 +0200 -Subject: [PATCH 23/36] NET: PHY: adds driver for lantiq PHY11G - -Signed-off-by: John Crispin ---- - drivers/net/phy/Kconfig | 5 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/lantiq.c | 231 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 237 insertions(+) - create mode 100644 drivers/net/phy/lantiq.c - ---- a/drivers/net/phy/intel-xway.c -+++ b/drivers/net/phy/intel-xway.c -@@ -278,6 +278,51 @@ static int xway_gphy_init_leds(struct ph - return 0; - } - -+#if IS_ENABLED(CONFIG_OF_MDIO) -+static int vr9_gphy_of_reg_init(struct phy_device *phydev) -+{ -+ u32 tmp; -+ -+ /* store the led values if one was passed by the devicetree */ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledch", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledcl", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCL, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0h", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0H, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0l", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0L, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1h", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1H, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1l", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1L, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2h", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2l", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3h", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3H, tmp); -+ -+ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3l", &tmp)) -+ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3L, tmp); -+ -+ return 0; -+} -+#else -+static int vr9_gphy_of_reg_init(struct phy_device *phydev) -+{ -+ return 0; -+} -+#endif /* CONFIG_OF_MDIO */ -+ - static int xway_gphy_config_init(struct phy_device *phydev) - { - struct device_node *np = phydev->mdio.dev.of_node; -@@ -299,6 +344,7 @@ static int xway_gphy_config_init(struct - if (err) - return err; - -+ vr9_gphy_of_reg_init(phydev); - return 0; - } - ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/phy-lanitq.txt -@@ -0,0 +1,216 @@ -+Lanitq PHY binding -+============================================ -+ -+This devicetree binding controls the lantiq ethernet phys led functionality. -+ -+Example: -+ mdio@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "lantiq,xrx200-mdio"; -+ phy5: ethernet-phy@5 { -+ reg = <0x1>; -+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; -+ }; -+ phy11: ethernet-phy@11 { -+ reg = <0x11>; -+ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; -+ lantiq,led2h = <0x00>; -+ lantiq,led2l = <0x03>; -+ }; -+ phy12: ethernet-phy@12 { -+ reg = <0x12>; -+ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; -+ lantiq,led1h = <0x00>; -+ lantiq,led1l = <0x03>; -+ }; -+ phy13: ethernet-phy@13 { -+ reg = <0x13>; -+ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; -+ lantiq,led2h = <0x00>; -+ lantiq,led2l = <0x03>; -+ }; -+ phy14: ethernet-phy@14 { -+ reg = <0x14>; -+ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; -+ lantiq,led1h = <0x00>; -+ lantiq,led1l = <0x03>; -+ }; -+ }; -+ -+Register Description -+============================================ -+ -+LEDCH: -+ -+Name Hardware Reset Value -+LEDCH 0x00C5 -+ -+| 15 | | | | | | | 8 | -+========================================= -+| RES | -+========================================= -+ -+| 7 | | | | | | | 0 | -+========================================= -+| FBF | SBF |RES | NACS | -+========================================= -+ -+Field Bits Type Description -+FBF 7:6 RW Fast Blink Frequency -+ --- -+ 0x0 (00b) F02HZ 2 Hz blinking frequency -+ 0x1 (01b) F04HZ 4 Hz blinking frequency -+ 0x2 (10b) F08HZ 8 Hz blinking frequency -+ 0x3 (11b) F16HZ 16 Hz blinking frequency -+ -+SBF 5:4 RW Slow Blink Frequency -+ --- -+ 0x0 (00b) F02HZ 2 Hz blinking frequency -+ 0x1 (01b) F04HZ 4 Hz blinking frequency -+ 0x2 (10b) F08HZ 8 Hz blinking frequency -+ 0x3 (11b) F16HZ 16 Hz blinking frequency -+ -+NACS 2:0 RW Inverse of Scan Function -+ --- -+ 0x0 (000b) NONE No Function -+ 0x1 (001b) LINK Complex function enabled when link is up -+ 0x2 (010b) PDOWN Complex function enabled when device is powered-down -+ 0x3 (011b) EEE Complex function enabled when device is in EEE mode -+ 0x4 (100b) ANEG Complex function enabled when auto-negotiation is running -+ 0x5 (101b) ABIST Complex function enabled when analog self-test is running -+ 0x6 (110b) CDIAG Complex function enabled when cable diagnostics are running -+ 0x7 (111b) TEST Complex function enabled when test mode is running -+ -+LEDCL: -+ -+Name Hardware Reset Value -+LEDCL 0x0067 -+ -+| 15 | | | | | | | 8 | -+========================================= -+| RES | -+========================================= -+ -+| 7 | | | | | | | 0 | -+========================================= -+|RES | SCAN |RES | CBLINK | -+========================================= -+ -+Field Bits Type Description -+SCAN 6:4 RW Complex Scan Configuration -+ --- -+ 000 B NONE No Function -+ 001 B LINK Complex function enabled when link is up -+ 010 B PDOWN Complex function enabled when device is powered-down -+ 011 B EEE Complex function enabled when device is in EEE mode -+ 100 B ANEG Complex function enabled when auto-negotiation is running -+ 101 B ABIST Complex function enabled when analog self-test is running -+ 110 B CDIAG Complex function enabled when cable diagnostics are running -+ 111 B TEST Complex function enabled when test mode is running -+ -+CBLINK 2:0 RW Complex Blinking Configuration -+ --- -+ 000 B NONE No Function -+ 001 B LINK Complex function enabled when link is up -+ 010 B PDOWN Complex function enabled when device is powered-down -+ 011 B EEE Complex function enabled when device is in EEE mode -+ 100 B ANEG Complex function enabled when auto-negotiation is running -+ 101 B ABIST Complex function enabled when analog self-test is running -+ 110 B CDIAG Complex function enabled when cable diagnostics are running -+ 111 B TEST Complex function enabled when test mode is running -+ -+LEDxH: -+ -+Name Hardware Reset Value -+LED0H 0x0070 -+LED1H 0x0020 -+LED2H 0x0040 -+LED3H 0x0040 -+ -+| 15 | | | | | | | 8 | -+========================================= -+| RES | -+========================================= -+ -+| 7 | | | | | | | 0 | -+========================================= -+| CON | BLINKF | -+========================================= -+ -+Field Bits Type Description -+CON 7:4 RW Constant On Configuration -+ --- -+ 0x0 (0000b) NONE LED does not light up constantly -+ 0x1 (0001b) LINK10 LED is on when link is 10 Mbit/s -+ 0x2 (0010b) LINK100 LED is on when link is 100 Mbit/s -+ 0x3 (0011b) LINK10X LED is on when link is 10/100 Mbit/s -+ 0x4 (0100b) LINK1000 LED is on when link is 1000 Mbit/s -+ 0x5 (0101b) LINK10_0 LED is on when link is 10/1000 Mbit/s -+ 0x6 (0110b) LINK100X LED is on when link is 100/1000 Mbit/s -+ 0x7 (0111b) LINK10XX LED is on when link is 10/100/1000 Mbit/s -+ 0x8 (1000b) PDOWN LED is on when device is powered-down -+ 0x9 (1001b) EEE LED is on when device is in EEE mode -+ 0xA (1010b) ANEG LED is on when auto-negotiation is running -+ 0xB (1011b) ABIST LED is on when analog self-test is running -+ 0xC (1100b) CDIAG LED is on when cable diagnostics are running -+ -+BLINKF 3:0 RW Fast Blinking Configuration -+ --- -+ 0x0 (0000b) NONE No Blinking -+ 0x1 (0001b) LINK10 Blink when link is 10 Mbit/s -+ 0x2 (0010b) LINK100 Blink when link is 100 Mbit/s -+ 0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s -+ 0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s -+ 0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s -+ 0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s -+ 0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s -+ 0x8 (1000b) PDOWN Blink when device is powered-down -+ 0x9 (1001b) EEE Blink when device is in EEE mode -+ 0xA (1010b) ANEG Blink when auto-negotiation is running -+ 0xB (1011b) ABIST Blink when analog self-test is running -+ 0xC (1100b) CDIAG Blink when cable diagnostics are running -+ -+LEDxL: -+ -+Name Hardware Reset Value -+LED0L 0x0003 -+LED1L 0x0000 -+LED2L 0x0000 -+LED3L 0x0020 -+ -+| 15 | | | | | | | 8 | -+========================================= -+| RES | -+========================================= -+ -+| 7 | | | | | | | 0 | -+========================================= -+| BLINKS | PULSE | -+========================================= -+ -+Field Bits Type Description -+BLINKS 7:4 RW Slow Blinkin Configuration -+ --- -+ 0x0 (0000b) NONE No Blinking -+ 0x1 (0001b) LINK10 Blink when link is 10 Mbit/s -+ 0x2 (0010b) LINK100 Blink when link is 100 Mbit/s -+ 0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s -+ 0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s -+ 0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s -+ 0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s -+ 0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s -+ 0x8 (1000b) PDOWN Blink when device is powered-down -+ 0x9 (1001b) EEE Blink when device is in EEE mode -+ 0xA (1010b) ANEG Blink when auto-negotiation is running -+ 0xB (1011b) ABIST Blink when analog self-test is running -+ 0xC (1100b) CDIAG Blink when cable diagnostics are runningning -+ -+PULSE 3:0 RW Pulsing Configuration -+ The pulse field is a mask field by which certain events can be combined -+ --- -+ 0x0 (0000b) NONE No pulsing -+ 0x1 (0001b) TXACT Transmit activity -+ 0x2 (0010b) RXACT Receive activity -+ 0x4 (0100b) COL Collision -+ 0x8 (1000b) RES Reserved diff --git a/target/linux/lantiq/xrx200_legacy/base-files/etc/board.d/01_leds b/target/linux/lantiq/xrx200_legacy/base-files/etc/board.d/01_leds index dec22b51b5..223f1fe0b3 100644 --- a/target/linux/lantiq/xrx200_legacy/base-files/etc/board.d/01_leds +++ b/target/linux/lantiq/xrx200_legacy/base-files/etc/board.d/01_leds @@ -24,6 +24,12 @@ led_dsl="$(get_dt_led dsl)" board=$(board_name) case "$board" in +arcadyan,vg3503j) + ucidef_set_led_netdev "lan1" "LAN1" "mdio-bus:13:amber:lan" "lan1" "rx tx" + ucidef_set_led_netdev "lan1" "LAN1" "mdio-bus:13:green:lan" "lan1" "link" + ucidef_set_led_netdev "lan2" "LAN2" "mdio-bus:11:amber:lan" "lan2" "rx tx" + ucidef_set_led_netdev "lan2" "LAN2" "mdio-bus:11:green:lan" "lan2" "link" + ;; netgear,dm200) ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0" ;; diff --git a/target/linux/loongarch64/config-6.6 b/target/linux/loongarch64/config-6.6 index 5052137b18..553c7acbbc 100644 --- a/target/linux/loongarch64/config-6.6 +++ b/target/linux/loongarch64/config-6.6 @@ -525,7 +525,6 @@ CONFIG_PCI_LOONGSON=y CONFIG_PCI_MSI=y CONFIG_PCI_MSI_ARCH_FALLBACKS=y CONFIG_PCI_REALLOC_ENABLE_AUTO=y -CONFIG_PCPU_DEV_REFCNT=y # CONFIG_PDS_CORE is not set CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_3LEVEL=y diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso index e6b140bfad..dabd4e4327 100644 --- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-emmc.dtso @@ -4,7 +4,7 @@ /plugin/; / { - compatible = "cmcc,rax3000m", "mediatek,mt7981"; + compatible = "cmcc,rax3000m", "cmcc,rax3000me","mediatek,mt7981"; fragment@0 { target = <&chosen>; diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso index fded878332..fad02497a1 100644 --- a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000m-nand.dtso @@ -4,7 +4,7 @@ /plugin/; / { - compatible = "cmcc,rax3000m", "mediatek,mt7981"; + compatible = "cmcc,rax3000m", "cmcc,rax3000me","mediatek,mt7981"; fragment@0 { target = <&chosen>; diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me-nousb.dtso b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me-nousb.dtso new file mode 100644 index 0000000000..e139ff5146 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me-nousb.dtso @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +/plugin/; + +/ { + compatible = "cmcc,rax3000me", "mediatek,mt7981"; + + fragment@0 { + target = <&usb_phy>; + __overlay__ { + status = "disabled"; + }; + }; + + fragment@1 { + target = <&xhci>; + __overlay__ { + status = "disabled"; + }; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me.dts b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me.dts new file mode 100644 index 0000000000..e0490482e8 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cmcc-rax3000me.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include "mt7981b-cmcc-rax3000m.dts" + +/ { + model = "CMCC RAX3000Me"; + compatible = "cmcc,rax3000me", "mediatek,mt7981"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 768ac97b74..95cb9e7e97 100755 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -10,6 +10,7 @@ mediatek_setup_interfaces() case $board in abt,asr3000|\ cmcc,rax3000m|\ + cmcc,rax3000me|\ h3c,magic-nx30-pro|\ h3c,magic-nx30-pro-nmbm|\ imou,lc-hx3001|\ diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index aad099ef60..0299157445 100755 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -60,7 +60,8 @@ case "$board" in [ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "2" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress ;; - cmcc,rax3000m) + cmcc,rax3000m|\ + cmcc,rax3000me) addr=$(cat /sys/class/net/eth0/address) [ "$PHYNBR" = "1" ] && macaddr_add $addr -1 > /sys${DEVPATH}/macaddress ;; diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index d1281e933f..f49a37d1c6 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -74,6 +74,7 @@ platform_do_upgrade() { cetron,ct3003-ubootmod|\ cmcc,a10-ubootmod|\ cmcc,rax3000m|\ + cmcc,rax3000me|\ cudy,tr3000-v1-ubootmod|\ gatonetworks,gdsp|\ h3c,magic-nx30-pro|\ @@ -202,7 +203,8 @@ platform_check_image() { bananapi,bpi-r3-mini|\ bananapi,bpi-r4|\ bananapi,bpi-r4-poe|\ - cmcc,rax3000m) + cmcc,rax3000m|\ + cmcc,rax3000me) [ "$magic" != "d00dfeed" ] && { echo "Invalid image type." return 1 @@ -257,7 +259,8 @@ platform_copy_config() { bananapi,bpi-r3-mini|\ bananapi,bpi-r4|\ bananapi,bpi-r4-poe|\ - cmcc,rax3000m) + cmcc,rax3000m|\ + cmcc,rax3000me) if [ "$CI_METHOD" = "emmc" ]; then emmc_copy_config fi diff --git a/target/linux/mediatek/filogic/config-6.6 b/target/linux/mediatek/filogic/config-6.6 index fe85b9d3f1..47964c2974 100644 --- a/target/linux/mediatek/filogic/config-6.6 +++ b/target/linux/mediatek/filogic/config-6.6 @@ -1,7 +1,7 @@ CONFIG_64BIT=y # CONFIG_AHCI_MTK is not set -CONFIG_AIR_AN8855_PHY=y CONFIG_AIROHA_EN8801SC_PHY=y +CONFIG_AIR_AN8855_PHY=y CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y @@ -33,7 +33,6 @@ CONFIG_ARM64_VA_BITS_39=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y @@ -43,7 +42,6 @@ CONFIG_ARM_MEDIATEK_CPUFREQ=y CONFIG_ARM_PMU=y CONFIG_ARM_PMUV3=y CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ATA=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_BLK_DEV_LOOP=y @@ -97,6 +95,7 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_RMAP=y CONFIG_CPU_THERMAL=y CONFIG_CRC16=y @@ -167,7 +166,6 @@ CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ARCH_TOPOLOGY=y @@ -235,19 +233,19 @@ CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAXLINEAR_GPHY=y +CONFIG_MDIO_AN8855=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -CONFIG_MDIO_AN8855=y CONFIG_MEDIATEK_2P5GE_PHY=y CONFIG_MEDIATEK_GE_PHY=y CONFIG_MEDIATEK_GE_SOC_PHY=y CONFIG_MEDIATEK_WATCHDOG=y CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -CONFIG_MFD_SYSCON=y CONFIG_MFD_AIROHA_AN8855=y +CONFIG_MFD_CORE=y +CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y -# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set CONFIG_MMC=y CONFIG_MMC_BLOCK=y CONFIG_MMC_CQHCI=y @@ -281,6 +279,7 @@ CONFIG_MTK_HSDMA=y CONFIG_MTK_INFRACFG=y CONFIG_MTK_LVTS_THERMAL=y CONFIG_MTK_LVTS_THERMAL_DEBUGFS=y +CONFIG_MTK_NET_PHYLIB=y CONFIG_MTK_PMIC_WRAP=y CONFIG_MTK_REGULATOR_COUPLER=y CONFIG_MTK_SCPSYS=y @@ -336,7 +335,6 @@ CONFIG_PAGE_POOL=y CONFIG_PAGE_POOL_STATS=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y CONFIG_PARTITION_PERCPU=y CONFIG_PCI=y CONFIG_PCIEAER=y @@ -414,6 +412,7 @@ CONFIG_RAS=y CONFIG_RATIONAL=y # CONFIG_RAVE_SP_CORE is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y CONFIG_REED_SOLOMON=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_REED_SOLOMON_ENC8=y diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 10f5b1e1ac..f11bdd3024 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -597,10 +597,7 @@ define Device/cmcc_a10-ubootmod endef TARGET_DEVICES += cmcc_a10-ubootmod -define Device/cmcc_rax3000m - DEVICE_VENDOR := CMCC - DEVICE_MODEL := RAX3000M - DEVICE_DTS := mt7981b-cmcc-rax3000m +define Device/cmcc_rax3000m_common DEVICE_DTS_OVERLAY := mt7981b-cmcc-rax3000m-emmc mt7981b-cmcc-rax3000m-nand DEVICE_DTS_DIR := ../dts DEVICE_DTC_FLAGS := --pad 4096 @@ -619,10 +616,16 @@ define Device/cmcc_rax3000m IMAGE/sysupgrade.itb := append-kernel | \ fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \ pad-rootfs | append-metadata - ARTIFACTS := \ - emmc-gpt.bin emmc-preloader.bin emmc-bl31-uboot.fip \ - nand-preloader.bin nand-bl31-uboot.fip + ARTIFACTS := emmc-gpt.bin emmc-preloader.bin emmc-bl31-uboot.fip ARTIFACT/emmc-gpt.bin := mt798x-gpt emmc +endef + +define Device/cmcc_rax3000m + DEVICE_VENDOR := CMCC + DEVICE_MODEL := RAX3000M + DEVICE_DTS := mt7981b-cmcc-rax3000m + $(call Device/cmcc_rax3000m_common) + ARTIFACTS += nand-preloader.bin nand-bl31-uboot.fip ARTIFACT/emmc-preloader.bin := mt7981-bl2 emmc-ddr4 ARTIFACT/emmc-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000m-emmc ARTIFACT/nand-preloader.bin := mt7981-bl2 spim-nand-ddr4 @@ -630,6 +633,23 @@ define Device/cmcc_rax3000m endef TARGET_DEVICES += cmcc_rax3000m +define Device/cmcc_rax3000me + DEVICE_VENDOR := CMCC + DEVICE_MODEL := RAX3000Me + DEVICE_DTS := mt7981b-cmcc-rax3000me + $(call Device/cmcc_rax3000m_common) + DEVICE_DTS_OVERLAY += mt7981b-cmcc-rax3000me-nousb + ARTIFACTS += nand-ddr3-preloader.bin nand-ddr3-bl31-uboot.fip \ + nand-ddr4-preloader.bin nand-ddr4-bl31-uboot.fip + ARTIFACT/emmc-preloader.bin := mt7981-bl2 emmc-ddr3 + ARTIFACT/emmc-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000me-emmc + ARTIFACT/nand-ddr3-preloader.bin := mt7981-bl2 spim-nand-ddr3 + ARTIFACT/nand-ddr3-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000me-nand-ddr3 + ARTIFACT/nand-ddr4-preloader.bin := mt7981-bl2 spim-nand-ddr4 + ARTIFACT/nand-ddr4-bl31-uboot.fip := mt7981-bl31-uboot cmcc_rax3000me-nand-ddr4 +endef +TARGET_DEVICES += cmcc_rax3000me + define Device/comfast_cf-e393ax DEVICE_VENDOR := COMFAST DEVICE_MODEL := CF-E393AX diff --git a/target/linux/mediatek/mt7622/config-6.6 b/target/linux/mediatek/mt7622/config-6.6 index c3c8b60684..bdfb06af76 100644 --- a/target/linux/mediatek/mt7622/config-6.6 +++ b/target/linux/mediatek/mt7622/config-6.6 @@ -1,7 +1,7 @@ CONFIG_64BIT=y # CONFIG_AHCI_MTK is not set -# CONFIG_AIR_AN8855_PHY is not set # CONFIG_AIROHA_EN8801SC_PHY is not set +# CONFIG_AIR_AN8855_PHY is not set CONFIG_AQUANTIA_PHY=y CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y @@ -34,7 +34,6 @@ CONFIG_ARM64_VA_BITS_39=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -# CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y @@ -44,13 +43,13 @@ CONFIG_ARM_MEDIATEK_CPUFREQ=y CONFIG_ARM_PMU=y CONFIG_ARM_PMUV3=y CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SMMU_V3_PMU is not set CONFIG_ATA=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_SD=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_PM=y +CONFIG_BLOCK_NOTIFIERS=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_BUFFER_HEAD=y @@ -105,6 +104,7 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_RMAP=y CONFIG_CPU_THERMAL=y CONFIG_CRC16=y @@ -173,7 +173,6 @@ CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ARCH_TOPOLOGY=y @@ -241,14 +240,13 @@ CONFIG_MAXLINEAR_GPHY=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_AN8855 is not set # CONFIG_MEDIATEK_2P5GE_PHY is not set CONFIG_MEDIATEK_GE_PHY=y # CONFIG_MEDIATEK_GE_SOC_PHY is not set CONFIG_MEDIATEK_WATCHDOG=y CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -CONFIG_MFD_SYSCON=y # CONFIG_MFD_AIROHA_AN8855 is not set +CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set CONFIG_MMC=y @@ -283,6 +281,7 @@ CONFIG_MTK_CPUX_TIMER=y CONFIG_MTK_HSDMA=y CONFIG_MTK_INFRACFG=y # CONFIG_MTK_LVTS_THERMAL is not set +CONFIG_MTK_NET_PHYLIB=y CONFIG_MTK_PMIC_WRAP=y CONFIG_MTK_REGULATOR_COUPLER=y CONFIG_MTK_SCPSYS=y @@ -297,7 +296,6 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_AN8855 is not set CONFIG_NET_DSA_MT7530=y CONFIG_NET_DSA_MT7530_MDIO=y # CONFIG_NET_DSA_MT7530_MMIO is not set @@ -316,7 +314,6 @@ CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y -# CONFIG_NVMEM_AN8855_EFUSE is not set CONFIG_NVMEM_BLOCK=y CONFIG_NVMEM_LAYOUTS=y CONFIG_NVMEM_LAYOUT_ADTRAN=y @@ -338,7 +335,6 @@ CONFIG_PAGE_POOL=y CONFIG_PAGE_POOL_STATS=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y CONFIG_PARTITION_PERCPU=y CONFIG_PCI=y CONFIG_PCIEAER=y @@ -388,6 +384,7 @@ CONFIG_PM_CLK=y CONFIG_PM_GENERIC_DOMAINS=y CONFIG_PM_GENERIC_DOMAINS_OF=y CONFIG_PM_OPP=y +CONFIG_POLYNOMIAL=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_SYSCON=y @@ -411,6 +408,7 @@ CONFIG_RAS=y CONFIG_RATIONAL=y # CONFIG_RAVE_SP_CORE is not set CONFIG_REALTEK_PHY=y +CONFIG_REALTEK_PHY_HWMON=y CONFIG_REED_SOLOMON=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_REED_SOLOMON_ENC8=y diff --git a/target/linux/mediatek/mt7623/config-6.6 b/target/linux/mediatek/mt7623/config-6.6 index 9d12c48eee..8fd0f3a599 100644 --- a/target/linux/mediatek/mt7623/config-6.6 +++ b/target/linux/mediatek/mt7623/config-6.6 @@ -1,6 +1,6 @@ # CONFIG_AIO is not set -# CONFIG_AIR_AN8855_PHY is not set # CONFIG_AIROHA_EN8801SC_PHY is not set +# CONFIG_AIR_AN8855_PHY is not set CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y @@ -106,6 +106,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_HAS_ASID=y CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_PABRT_V7=y CONFIG_CPU_PM=y CONFIG_CPU_RMAP=y @@ -114,8 +115,6 @@ CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V7=y CONFIG_CPU_V7=y CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y @@ -188,17 +187,8 @@ CONFIG_DRM_MEDIATEK_HDMI=y CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL_BRIDGE=y -# CONFIG_DRM_PANEL_HIMAX_HX8394 is not set -# CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set -# CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set -# CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set -# CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=y -# CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set -# CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set -# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set -# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set CONFIG_DRM_SCHED=y CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DTC=y @@ -239,7 +229,6 @@ CONFIG_FWNODE_MDIO=y CONFIG_FW_CACHE=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y @@ -353,17 +342,16 @@ CONFIG_MDIO_BITBANG=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_AN8855 is not set CONFIG_MDIO_GPIO=y CONFIG_MEDIATEK_GE_PHY=y CONFIG_MEDIATEK_MT6577_AUXADC=y CONFIG_MEDIATEK_WATCHDOG=y CONFIG_MEMORY=y +# CONFIG_MFD_AIROHA_AN8855 is not set CONFIG_MFD_CORE=y # CONFIG_MFD_HI6421_SPMI is not set CONFIG_MFD_MT6397=y CONFIG_MFD_SYSCON=y -# CONFIG_MFD_AIROHA_AN8855 is not set CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGRATION=y CONFIG_MMC=y @@ -395,6 +383,7 @@ CONFIG_MTK_IOMMU=y CONFIG_MTK_IOMMU_V1=y # CONFIG_MTK_LVTS_THERMAL is not set CONFIG_MTK_MMSYS=y +CONFIG_MTK_NET_PHYLIB=y CONFIG_MTK_PMIC_WRAP=y CONFIG_MTK_REGULATOR_COUPLER=y CONFIG_MTK_SCPSYS=y @@ -413,7 +402,6 @@ CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_NEON=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_AN8855 is not set CONFIG_NET_DSA_MT7530=y CONFIG_NET_DSA_MT7530_MDIO=y # CONFIG_NET_DSA_MT7530_MMIO is not set @@ -435,7 +423,6 @@ CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=4 CONFIG_NVMEM=y -# CONFIG_NVMEM_AN8855_EFUSE is not set CONFIG_NVMEM_LAYOUTS=y # CONFIG_NVMEM_LAYOUT_ADTRAN is not set CONFIG_NVMEM_MTK_EFUSE=y @@ -461,7 +448,6 @@ CONFIG_PAGE_POOL=y CONFIG_PAGE_POOL_STATS=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y CONFIG_PCI=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y @@ -588,7 +574,6 @@ CONFIG_TIMER_PROBE=y CONFIG_TOUCHSCREEN_EDT_FT5X06=y CONFIG_TREE_RCU=y CONFIG_TREE_SRCU=y -# CONFIG_UACCE is not set CONFIG_UBIFS_FS=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_UIMAGE_FIT_BLK=y diff --git a/target/linux/mediatek/mt7629/config-6.6 b/target/linux/mediatek/mt7629/config-6.6 index d66a514f63..661f31ced6 100644 --- a/target/linux/mediatek/mt7629/config-6.6 +++ b/target/linux/mediatek/mt7629/config-6.6 @@ -1,5 +1,5 @@ -# CONFIG_AIR_AN8855_PHY is not set # CONFIG_AIROHA_EN8801SC_PHY is not set +# CONFIG_AIR_AN8855_PHY is not set CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y @@ -76,6 +76,7 @@ CONFIG_CPU_HAS_ASID=y CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_PABRT_V7=y CONFIG_CPU_PM=y CONFIG_CPU_RMAP=y @@ -112,7 +113,6 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_GENERIC_BUG=y @@ -182,11 +182,10 @@ CONFIG_MACH_MT7629=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y CONFIG_MDIO_DEVRES=y -# CONFIG_MDIO_AN8855 is not set CONFIG_MEDIATEK_GE_PHY=y CONFIG_MEDIATEK_WATCHDOG=y -CONFIG_MFD_SYSCON=y # CONFIG_MFD_AIROHA_AN8855 is not set +CONFIG_MFD_SYSCON=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGRATION=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y @@ -208,6 +207,7 @@ CONFIG_MTD_UBI_WL_THRESHOLD=4096 # CONFIG_MTK_CMDQ is not set CONFIG_MTK_CPUX_TIMER=y CONFIG_MTK_INFRACFG=y +CONFIG_MTK_NET_PHYLIB=y # CONFIG_MTK_PMIC_WRAP is not set CONFIG_MTK_SCPSYS=y CONFIG_MTK_SCPSYS_PM_DOMAINS=y @@ -219,7 +219,6 @@ CONFIG_NETFILTER=y CONFIG_NETFILTER_BPF_LINK=y CONFIG_NET_DEVLINK=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_AN8855 is not set CONFIG_NET_DSA_MT7530=y CONFIG_NET_DSA_MT7530_MDIO=y # CONFIG_NET_DSA_MT7530_MMIO is not set @@ -238,7 +237,6 @@ CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=2 CONFIG_NVMEM=y -# CONFIG_NVMEM_AN8855_EFUSE is not set CONFIG_NVMEM_LAYOUTS=y # CONFIG_NVMEM_LAYOUT_ADTRAN is not set # CONFIG_NVMEM_MTK_EFUSE is not set @@ -261,7 +259,6 @@ CONFIG_PAGE_POOL=y CONFIG_PAGE_POOL_STATS=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y -CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y CONFIG_PCI=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y diff --git a/target/linux/mediatek/patches-6.6/341-mtd-spinand-Support-dosilicon.patch b/target/linux/mediatek/patches-6.6/341-mtd-spinand-Support-dosilicon.patch new file mode 100644 index 0000000000..b81cdd9114 --- /dev/null +++ b/target/linux/mediatek/patches-6.6/341-mtd-spinand-Support-dosilicon.patch @@ -0,0 +1,329 @@ +From cead43cc5781492f2706eeed1157c8986a216bc9 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Sun, 17 Oct 2021 09:51:39 +0800 +Subject: [PATCH] mtd: spinand: Support dosilicon + +DS35X1GA, DS35Q2GA, DS35M1GA, DS35M2GA, DS35Q2GB, DS35M1GB + +Change-Id: I5aeb0219f01dbe98d36b398e66b94ab31b07788e +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/dosilicon.c | 187 +++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 190 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/dosilicon.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 + spinand-objs := core.o alliancememory.o ato.o esmt.o etron.o fidelix.o foresee.o gigadevice.o ++spinand-objs += dosilicon.o + spinand-objs += macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -940,6 +940,7 @@ static const struct nand_ops spinand_ops + static const struct spinand_manufacturer *spinand_manufacturers[] = { + &alliancememory_spinand_manufacturer, + &ato_spinand_manufacturer, ++ &dosilicon_spinand_manufacturer, + &esmt_c8_spinand_manufacturer, + &etron_spinand_manufacturer, + &fidelix_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/dosilicon.c +@@ -0,0 +1,281 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_DOSILICON 0xE5 ++ ++#define DOSICON_STATUS_ECC_MASK GENMASK(6, 4) ++#define DOSICON_STATUS_ECC_NO_BITFLIPS (0 << 4) ++#define DOSICON_STATUS_ECC_1TO3_BITFLIPS (1 << 4) ++#define DOSICON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) ++#define DOSICON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 8; ++ region->length = 8; ++ ++ return 0; ++} ++ ++static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 2; ++ region->length = 6; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxga_ooblayout = { ++ .ecc = ds35xxga_ooblayout_ecc, ++ .free = ds35xxga_ooblayout_free, ++}; ++ ++static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ /* Reserve 1 bytes for the BBM. */ ++ region->offset = 1; ++ region->length = 63; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = { ++ .ecc = ds35xxgb_ooblayout_ecc, ++ .free = ds35xxgb_ooblayout_free, ++}; ++ ++static int ds35xxgb_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ switch (status & DOSICON_STATUS_ECC_MASK) { ++ case STATUS_ECC_NO_BITFLIPS: ++ return 0; ++ ++ case STATUS_ECC_UNCOR_ERROR: ++ return -EBADMSG; ++ ++ case DOSICON_STATUS_ECC_1TO3_BITFLIPS: ++ return 3; ++ ++ case DOSICON_STATUS_ECC_4TO6_BITFLIPS: ++ return 6; ++ ++ case DOSICON_STATUS_ECC_7TO8_BITFLIPS: ++ return 8; ++ ++ default: ++ break; ++ } ++ ++ return -EINVAL; ++} ++ ++static const struct spinand_info dosilicon_spinand_table[] = { ++ SPINAND_INFO("DS35X1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q4GM", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF4), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GD-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M4GB-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q4GB-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB4), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q12C-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M12C-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q2GBS", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer dosilicon_spinand_manufacturer = { ++ .id = SPINAND_MFR_DOSILICON, ++ .name = "dosilicon", ++ .chips = dosilicon_spinand_table, ++ .nchips = ARRAY_SIZE(dosilicon_spinand_table), ++ .ops = &dosilicon_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -262,6 +262,7 @@ struct spinand_manufacturer { + /* SPI NAND manufacturers */ + extern const struct spinand_manufacturer alliancememory_spinand_manufacturer; + extern const struct spinand_manufacturer ato_spinand_manufacturer; ++extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + extern const struct spinand_manufacturer etron_spinand_manufacturer; + extern const struct spinand_manufacturer fidelix_spinand_manufacturer; diff --git a/target/linux/mediatek/patches-6.6/342-mtd-spinand-Support-fmsh.patch b/target/linux/mediatek/patches-6.6/342-mtd-spinand-Support-fmsh.patch new file mode 100644 index 0000000000..604d48d593 --- /dev/null +++ b/target/linux/mediatek/patches-6.6/342-mtd-spinand-Support-fmsh.patch @@ -0,0 +1,287 @@ +From 205a24e34751220c3ba04f0ac6ecc734e56ed225 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Sun, 17 Oct 2021 09:59:10 +0800 +Subject: [PATCH] mtd: spinand: Support fmsh + +FM25S01A, FM25S02A, FM25S01 + +Change-Id: I7e0ceec39c57dc591d77a4ebde599ad326cf25b7 +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/fmsh.c | 122 ++++++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 125 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/fmsh.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 + spinand-objs := core.o alliancememory.o ato.o esmt.o etron.o fidelix.o foresee.o gigadevice.o +-spinand-objs += dosilicon.o ++spinand-objs += dosilicon.o fmsh.o + spinand-objs += macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -944,6 +944,7 @@ static const struct spinand_manufacturer + &esmt_c8_spinand_manufacturer, + &etron_spinand_manufacturer, + &fidelix_spinand_manufacturer, ++ &fmsh_spinand_manufacturer, + &foresee_spinand_manufacturer, + &gigadevice_spinand_manufacturer, + ¯onix_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/fmsh.c +@@ -0,0 +1,238 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd. ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_FMSH 0xA1 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ return -ERANGE; ++} ++ ++static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01a_ooblayout = { ++ .ecc = fm25s01a_ooblayout_ecc, ++ .free = fm25s01a_ooblayout_free, ++}; ++ ++static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01_ooblayout = { ++ .ecc = fm25s01_ooblayout_ecc, ++ .free = fm25s01_ooblayout_free, ++}; ++ ++/* ++ * ecc bits: 0xC0[4,6] ++ * [0b000], No bit errors were detected; ++ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not ++ * reach Flipping Bits; ++ * [0b101], Bit error count equals the bit flip ++ * detection threshold ++ * [0b010], Multiple bit errors were detected and ++ * not corrected. ++ * others, Reserved. ++ */ ++static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ struct nand_device *nand = spinand_to_nand(spinand); ++ u8 eccsr = (status & GENMASK(6, 4)) >> 4; ++ ++ if (eccsr <= 1 || eccsr == 3) ++ return eccsr; ++ else if (eccsr == 5) ++ return nanddev_get_ecc_requirements(nand)->strength; ++ else ++ return -EBADMSG; ++} ++ ++static int fm25g0xd_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int fm25g0xd_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ /* Reserve 2 bytes for the BBM. */ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25g0xd_ooblayout = { ++ .ecc = fm25g0xd_ooblayout_ecc, ++ .free = fm25g0xd_ooblayout_free, ++}; ++ ++/* ++ * ecc bits: 0xC0[4,6] ++ * [0x0], No bit errors were detected; ++ * [0x001, 0x011], Bit errors were detected and corrected. Not ++ * reach Flipping Bits; ++ * [0x100], Bit error count equals the bit flip ++ * detectionthreshold ++ * [0x101, 0x110], Reserved; ++ * [0x111], Multiple bit errors were detected and ++ * not corrected. ++ */ ++static int fm25g0xd_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ struct nand_device *nand = spinand_to_nand(spinand); ++ u8 eccsr = (status & GENMASK(6, 4)) >> 4; ++ ++ if (eccsr <= 3) ++ return 0; ++ else if (eccsr == 4) ++ return nanddev_get_ecc_requirements(nand)->strength; ++ else ++ return -EBADMSG; ++} ++ ++static const struct spinand_info fmsh_spinand_table[] = { ++ SPINAND_INFO("FM25S01A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S02A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25LS01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01BI3", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), ++ SPINAND_INFO("FM25S02BI3-DND-A-G3", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD6), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), ++ SPINAND_INFO("FM25G02D", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25g0xd_ooblayout, fm25g0xd_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer fmsh_spinand_manufacturer = { ++ .id = SPINAND_MFR_FMSH, ++ .name = "FMSH", ++ .chips = fmsh_spinand_table, ++ .nchips = ARRAY_SIZE(fmsh_spinand_table), ++ .ops = &fmsh_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -266,6 +266,7 @@ extern const struct spinand_manufacturer + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + extern const struct spinand_manufacturer etron_spinand_manufacturer; + extern const struct spinand_manufacturer fidelix_spinand_manufacturer; ++extern const struct spinand_manufacturer fmsh_spinand_manufacturer; + extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; diff --git a/target/linux/mediatek/patches-6.6/343-mtd-spinand-gsto-Add-code.patch b/target/linux/mediatek/patches-6.6/343-mtd-spinand-gsto-Add-code.patch new file mode 100644 index 0000000000..89d8fea463 --- /dev/null +++ b/target/linux/mediatek/patches-6.6/343-mtd-spinand-gsto-Add-code.patch @@ -0,0 +1,186 @@ +From 1e5200d59e21c8a8fa63badf415becb2301e78a4 Mon Sep 17 00:00:00 2001 +From: Jon Lin +Date: Thu, 27 Apr 2023 22:00:04 +0800 +Subject: [PATCH] mtd: spinand: gsto: Add code + +GSS01GSAK1, GSS02GSAK1 + +Change-Id: I7ee9048d934694803d6d081cb7d0cdc56f114e79 +Signed-off-by: Jon Lin +--- + drivers/mtd/nand/spi/Makefile | 2 +- + drivers/mtd/nand/spi/core.c | 1 + + drivers/mtd/nand/spi/gsto.c | 90 +++++++++++++++++++++++++++++++++++ + include/linux/mtd/spinand.h | 1 + + 4 files changed, 93 insertions(+), 1 deletion(-) + create mode 100644 drivers/mtd/nand/spi/gsto.c + +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 + spinand-objs := core.o alliancememory.o ato.o esmt.o etron.o fidelix.o foresee.o gigadevice.o +-spinand-objs += dosilicon.o fmsh.o ++spinand-objs += dosilicon.o fmsh.o gsto.o + spinand-objs += macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -947,6 +947,7 @@ static const struct spinand_manufacturer + &fmsh_spinand_manufacturer, + &foresee_spinand_manufacturer, + &gigadevice_spinand_manufacturer, ++ &gsto_spinand_manufacturer, + ¯onix_spinand_manufacturer, + µn_spinand_manufacturer, + ¶gon_spinand_manufacturer, +--- /dev/null ++++ b/drivers/mtd/nand/spi/gsto.c +@@ -0,0 +1,137 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2023 Rockchip Electronics Co., Ltd. ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_GSTO 0x52 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int gss0xgsak1_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 32; ++ region->length = 32; ++ ++ return 0; ++} ++ ++static int gss0xgsak1_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 30; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops gss0xgsak1_ooblayout = { ++ .ecc = gss0xgsak1_ooblayout_ecc, ++ .free = gss0xgsak1_ooblayout_free, ++}; ++ ++static int gss0xgsax1_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int gss0xgsax1_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops gss0xgsax1_ooblayout = { ++ .ecc = gss0xgsax1_ooblayout_ecc, ++ .free = gss0xgsax1_ooblayout_free, ++}; ++ ++static const struct spinand_info gsto_spinand_table[] = { ++ SPINAND_INFO("GSS01GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x13), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 10, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), ++ SPINAND_INFO("GSS02GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x23), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++ SPINAND_INFO("GSS02GSAX1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCA, 0x23), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++ SPINAND_INFO("GSS01GSAX1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCA, 0x13), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsax1_ooblayout, NULL)), ++}; ++ ++static const struct spinand_manufacturer_ops gsto_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer gsto_spinand_manufacturer = { ++ .id = SPINAND_MFR_GSTO, ++ .name = "GSTO", ++ .chips = gsto_spinand_table, ++ .nchips = ARRAY_SIZE(gsto_spinand_table), ++ .ops = &gsto_spinand_manuf_ops, ++}; +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -269,6 +269,7 @@ extern const struct spinand_manufacturer + extern const struct spinand_manufacturer fmsh_spinand_manufacturer; + extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; ++extern const struct spinand_manufacturer gsto_spinand_manufacturer; + extern const struct spinand_manufacturer macronix_spinand_manufacturer; + extern const struct spinand_manufacturer micron_spinand_manufacturer; + extern const struct spinand_manufacturer paragon_spinand_manufacturer; diff --git a/target/linux/mediatek/patches-6.6/435-drivers-mtd-spinand-Add-calibration-support-for-spin.patch b/target/linux/mediatek/patches-6.6/435-drivers-mtd-spinand-Add-calibration-support-for-spin.patch index 50149fd819..4240675259 100644 --- a/target/linux/mediatek/patches-6.6/435-drivers-mtd-spinand-Add-calibration-support-for-spin.patch +++ b/target/linux/mediatek/patches-6.6/435-drivers-mtd-spinand-Add-calibration-support-for-spin.patch @@ -11,7 +11,7 @@ Signed-off-by: SkyLake.Huang --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c -@@ -980,6 +980,56 @@ static int spinand_manufacturer_match(st +@@ -983,6 +983,56 @@ static int spinand_manufacturer_match(st return -ENOTSUPP; } @@ -68,7 +68,7 @@ Signed-off-by: SkyLake.Huang static int spinand_id_detect(struct spinand_device *spinand) { u8 *id = spinand->id.data; -@@ -1230,6 +1280,10 @@ static int spinand_init(struct spinand_d +@@ -1233,6 +1283,10 @@ static int spinand_init(struct spinand_d if (!spinand->scratchbuf) return -ENOMEM; diff --git a/target/linux/mediatek/patches-6.6/436-drivers-mtd-spi-nor-Add-calibration-support-for-spi-.patch b/target/linux/mediatek/patches-6.6/436-drivers-mtd-spi-nor-Add-calibration-support-for-spi-.patch index 27c5dfd5d6..d1923b4969 100644 --- a/target/linux/mediatek/patches-6.6/436-drivers-mtd-spi-nor-Add-calibration-support-for-spi-.patch +++ b/target/linux/mediatek/patches-6.6/436-drivers-mtd-spi-nor-Add-calibration-support-for-spi-.patch @@ -12,7 +12,7 @@ Signed-off-by: SkyLake.Huang --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c -@@ -1021,7 +1021,10 @@ int spinand_cal_read(void *priv, u32 *ad +@@ -1024,7 +1024,10 @@ int spinand_cal_read(void *priv, u32 *ad if (ret) return ret; diff --git a/target/linux/mediatek/patches-6.6/960-asus-hack-u-boot-ignore-mtdparts.patch b/target/linux/mediatek/patches-6.6/960-asus-hack-u-boot-ignore-mtdparts.patch index 0fe2b95e8a..9ee095b107 100644 --- a/target/linux/mediatek/patches-6.6/960-asus-hack-u-boot-ignore-mtdparts.patch +++ b/target/linux/mediatek/patches-6.6/960-asus-hack-u-boot-ignore-mtdparts.patch @@ -29,7 +29,7 @@ Signed-off-by: Daniel Golle --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c -@@ -1441,6 +1441,7 @@ static int spinand_remove(struct spi_mem +@@ -1444,6 +1444,7 @@ static int spinand_remove(struct spi_mem static const struct spi_device_id spinand_ids[] = { { .name = "spi-nand" }, @@ -37,7 +37,7 @@ Signed-off-by: Daniel Golle { /* sentinel */ }, }; MODULE_DEVICE_TABLE(spi, spinand_ids); -@@ -1448,6 +1449,7 @@ MODULE_DEVICE_TABLE(spi, spinand_ids); +@@ -1451,6 +1452,7 @@ MODULE_DEVICE_TABLE(spi, spinand_ids); #ifdef CONFIG_OF static const struct of_device_id spinand_of_ids[] = { { .compatible = "spi-nand" }, diff --git a/target/linux/mvebu/image/cortexa53.mk b/target/linux/mvebu/image/cortexa53.mk index ee98fd5499..67bff6c0b2 100644 --- a/target/linux/mvebu/image/cortexa53.mk +++ b/target/linux/mvebu/image/cortexa53.mk @@ -13,6 +13,7 @@ define Device/globalscale_espressobin DEVICE_VENDOR := Marvell DEVICE_MODEL := ESPRESSObin DEVICE_VARIANT := Non-eMMC + DEVICE_PACKAGES += kmod-dsa-mv88e6xxx DEVICE_ALT0_VENDOR := Marvell DEVICE_ALT0_MODEL := Armada 3700 Community Board DEVICE_ALT0_VARIANT := Non-eMMC @@ -26,6 +27,7 @@ define Device/globalscale_espressobin-emmc DEVICE_VENDOR := Marvell DEVICE_MODEL := ESPRESSObin DEVICE_VARIANT := eMMC + DEVICE_PACKAGES += kmod-dsa-mv88e6xxx DEVICE_ALT0_VENDOR := Marvell DEVICE_ALT0_MODEL := Armada 3700 Community Board DEVICE_ALT0_VARIANT := eMMC @@ -50,6 +52,7 @@ define Device/globalscale_espressobin-v7 DEVICE_VENDOR := Marvell DEVICE_MODEL := ESPRESSObin DEVICE_VARIANT := V7 Non-eMMC + DEVICE_PACKAGES += kmod-dsa-mv88e6xxx DEVICE_ALT0_VENDOR := Marvell DEVICE_ALT0_MODEL := Armada 3700 Community Board DEVICE_ALT0_VARIANT := V7 Non-eMMC @@ -63,6 +66,7 @@ define Device/globalscale_espressobin-v7-emmc DEVICE_VENDOR := Marvell DEVICE_MODEL := ESPRESSObin DEVICE_VARIANT := V7 eMMC + DEVICE_PACKAGES += kmod-dsa-mv88e6xxx DEVICE_ALT0_VENDOR := Marvell DEVICE_ALT0_MODEL := Armada 3700 Community Board DEVICE_ALT0_VARIANT := V7 eMMC diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-fap650.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-fap650.dts index cfa7ba4055..dc74205c22 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-fap650.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-fap650.dts @@ -204,6 +204,8 @@ spi-max-frequency = <50000000>; partitions { + #address-cells = <1>; + #size-cells = <1>; compatible = "fixed-partitions"; partition@0 { diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index 4b9dd27686..005d24e1fe 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -1,4 +1,3 @@ - . /lib/functions.sh . /lib/functions/uci-defaults.sh . /lib/functions/system.sh @@ -24,6 +23,7 @@ ramips_setup_interfaces() mercusys,mr70x-v1|\ netgear,wax202|\ sim,simax1800t|\ + tplink,mr600-v2-eu|\ xiaomi,mi-router-3-pro|\ xiaomi,mi-router-ac2100|\ xiaomi,mi-router-cr6606|\ @@ -69,12 +69,18 @@ ramips_setup_interfaces() ucidef_set_interface_lan "lan" ;; asiarf,ap7621-001|\ + comfast,cf-e390ax|\ + comfast,cf-ew72-v2|\ + cudy,m1800|\ dna,valokuitu-plus-ex400|\ humax,e10|\ keenetic,kn-3510|\ + meig,slt866|\ openfi,5pro|\ wavlink,ws-wn572hp3-4g|\ - winstars,ws-wn583a6) + winstars,ws-wn583a6|\ + yuncore,ax820|\ + zyxel,nr7101) ucidef_set_interfaces_lan_wan "lan" "wan" ;; asiarf,ap7621-nv1|\ @@ -107,11 +113,6 @@ ramips_setup_interfaces() uci add_list firewall.@zone[1].network='eth_data' uci add_list firewall.@zone[1].network='eth_om' ;; - cudy,m1800|\ - yuncore,ax820|\ - zyxel,nr7101) - ucidef_set_interfaces_lan_wan "lan" "wan" - ;; dlink,covr-x1860-a1) ucidef_set_interfaces_lan_wan "ethernet" "internet" ;; @@ -157,9 +158,6 @@ ramips_setup_interfaces() tplink,tl-wpa8631p-v3) ucidef_set_interface_lan "lan1 lan2 lan3 plc0" ;; - tplink,mr600-v2-eu) - ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan" - ;; ubnt,edgerouter-x) ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4" "eth0" ;; @@ -180,11 +178,6 @@ ramips_setup_interfaces() ruijie,rg-ew1200g-pro-v1.1) ucidef_set_interfaces_lan_wan "lan3 lan2 lan1" "wan" ;; - comfast,cf-e390ax|\ - comfast,cf-ew72-v2|\ - meig,slt866) - ucidef_set_interfaces_lan_wan "lan" "wan" - ;; *) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" ;; @@ -273,7 +266,7 @@ ramips_setup_macs() wan_mac=$label_mac ;; hiwifi,hc5962) - lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ") + lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac") label_mac=$lan_mac [ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address) wan_mac=$(macaddr_add "$lan_mac" 1) diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index a9a43bedd8..dc79be091d 100644 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -103,7 +103,7 @@ case "$board" in macaddr_setbit_la "$(mtd_get_mac_binary factory 0x4)" > /sys${DEVPATH}/macaddress ;; hiwifi,hc5962) - label_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ") + label_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac") [ "$PHYNBR" = "0" ] && [ -n "$label_mac" ] && \ echo -n "$label_mac" > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && [ -n "$label_mac" ] && \ diff --git a/target/linux/stm32/stm32mp1/config-6.6 b/target/linux/stm32/stm32mp1/config-6.6 index 0428216ecb..f7ed9030c6 100644 --- a/target/linux/stm32/stm32mp1/config-6.6 +++ b/target/linux/stm32/stm32mp1/config-6.6 @@ -344,7 +344,6 @@ CONFIG_PAGE_SIZE_LESS_THAN_64KB=y # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 -CONFIG_PCPU_DEV_REFCNT=y CONFIG_PCS_XPCS=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2