324f234966
After booting, a "transmit queue 0 timed out" warning followed by a
register dump was observed. The dump indicates that mtk_hw_init() does
not initialize the EEECR during probe. This occurs because the
netdev is allocated in mtk_add_mac(), which is called after
mtk_hw_init(). Consequently, the EEECR register remains uninitialized
until a reset is triggered, causing mtk_hw_init() to run again with a
valid netdev, at which point the register is finally set.
To address this, instead of modifying the probe sequence, latch the Tx
LPI enable state and timer value, and move the EEECR register
initialization to mtk_mac_link_up() to ensure proper setup when the
interface comes up.
Additionally, the splat reveals that LPI functionality is controlled by
the MAC_MCR_EEE bits in the MCR register. Update mtk_set_eee() to
modify these bits accordingly.
Fixes: d8315d5358d5 ("kernel: backport Mediatek SoC EEE support")
Fixes: edddbaf79ccf ("kernel: Mediatek: set default EEE Tx LPI timer")
Signed-off-by: Qingfang Deng <dqfext@gmail.com>
45 lines
1.6 KiB
Diff
45 lines
1.6 KiB
Diff
From: Chad Monroe <chad@monroe.io>
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Date: Mon, 16 Sep 2024 19:29:03 -0700
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Subject: [PATCH] net: ethernet: mediatek: increase QDMA RESV_BUF size
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Increase QDMA RESV_BUF from 2K to 3K for netsys v2 to match Mediatek SDK[1].
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This helps reduce the possibility of Ethernet transmit timeouts.
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[1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/19d8456c3051e5f6dabf42fa770916a2126ea4bf
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Signed-off-by: Chad Monroe <chad@monroe.io>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 ++++--
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
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2 files changed, 5 insertions(+), 2 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -271,6 +271,7 @@
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#define MTK_WCOMP_EN BIT(24)
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#define MTK_RESV_BUF (0x80 << 16)
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#define MTK_MUTLI_CNT (0x4 << 12)
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+#define MTK_RESV_BUF_MASK (0xff << 16)
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#define MTK_LEAKY_BUCKET_EN BIT(11)
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/* QDMA Flow Control Register */
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -3319,12 +3319,14 @@ static int mtk_start_dma(struct mtk_eth
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MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE;
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- if (mtk_is_netsys_v2_or_greater(eth))
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+ if (mtk_is_netsys_v2_or_greater(eth)) {
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+ val &= ~MTK_RESV_BUF_MASK;
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val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
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MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
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MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN;
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- else
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+ } else {
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val |= MTK_RX_BT_32DWORDS;
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+ }
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mtk_w32(eth, val, reg_map->qdma.glo_cfg);
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mtk_w32(eth,
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