Nanako/DHDAXCW-Rockchip-OpenWrt
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Update rk3568-nanopi-r5c.dts

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骷髅头 2023-01-05 10:19:17 +08:00 committed by GitHub
parent 22d55ccc08
commit 3df4294ce8
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1 changed files with 3 additions and 10 deletions
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13
target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
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@ -450,11 +450,9 @@
status = "okay"; status = "okay";
}; };
&pcie2x1 { &pcie2x1
num-viewport = <4>;
pinctrl-names = "default";
pinctrl-0 = <&m2_w_disable_pin>;
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
}; };
@ -467,6 +465,7 @@
num-lanes = <1>; num-lanes = <1>;
num-viewport = <4>; num-viewport = <4>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
pcie@10 { pcie@10 {
@ -541,12 +540,6 @@
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
}; };
m2-pins {
m2_w_disable_pin: m2-w-disable-pin {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
};
};
}; };
&pmu_io_domains { &pmu_io_domains {