Merge remote-tracking branch 'remotes/source/openwrt-24.10' into openwrt-24.10

This commit is contained in:
Nanako 2025-04-26 05:01:41 +08:00
commit 54eb2d0018
100 changed files with 2686 additions and 457 deletions

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@ -1,30 +1,40 @@
BPF_DEPENDS := @HAS_BPF_TOOLCHAIN +@NEED_BPF_TOOLCHAIN
LLVM_VER:=
CLANG_MIN_VER:=12
ifneq ($(CONFIG_USE_LLVM_HOST),)
find-llvm-tool=$(firstword $(shell PATH='$(BPF_PATH)' command -v $(1) || echo '$(firstword $(1))-not-found'))
BPF_TOOLCHAIN_HOST_PATH:=$(call qstrip,$(CONFIG_BPF_TOOLCHAIN_HOST_PATH))
ifneq ($(BPF_TOOLCHAIN_HOST_PATH),)
BPF_PATH:=$(BPF_TOOLCHAIN_HOST_PATH)/bin:$(PATH)
else
BPF_PATH:=$(PATH)
endif
CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' command -v clang clang-13 clang-12 clang-11))
CLANG:=$(call find-llvm-tool,clang clang-13 clang-12)
LLVM_VER:=$(subst clang,,$(notdir $(CLANG)))
endif
ifneq ($(CONFIG_USE_LLVM_PREBUILT),)
CLANG:=$(TOPDIR)/llvm-bpf/bin/clang
endif
ifneq ($(CONFIG_USE_LLVM_BUILD),)
CLANG:=$(STAGING_DIR_HOST)/llvm-bpf/bin/clang
endif
LLVM_PATH:=$(dir $(CLANG))
LLVM_LLC:=$(LLVM_PATH)/llc$(LLVM_VER)
LLVM_DIS:=$(LLVM_PATH)/llvm-dis$(LLVM_VER)
LLVM_OPT:=$(LLVM_PATH)/opt$(LLVM_VER)
LLVM_STRIP:=$(LLVM_PATH)/llvm-strip$(LLVM_VER)
BPF_PATH:=$(dir $(CLANG)):$(BPF_PATH)
LLVM_LLC:=$(call find-llvm-tool,llc$(LLVM_VER))
LLVM_DIS:=$(call find-llvm-tool,llvm-dis$(LLVM_VER))
LLVM_OPT:=$(call find-llvm-tool,opt$(LLVM_VER))
LLVM_STRIP:=$(call find-llvm-tool,llvm-strip$(LLVM_VER))
else
LLVM_PATH:=/invalid
ifneq ($(CONFIG_USE_LLVM_PREBUILT),)
LLVM_PATH:=$(TOPDIR)/llvm-bpf/bin
endif
ifneq ($(CONFIG_USE_LLVM_BUILD),)
LLVM_PATH:=$(STAGING_DIR_HOST)/llvm-bpf/bin
endif
CLANG:=$(LLVM_PATH)/clang
LLVM_LLC:=$(LLVM_PATH)/llc
LLVM_DIS:=$(LLVM_PATH)/llvm-dis
LLVM_OPT:=$(LLVM_PATH)/opt
LLVM_STRIP:=$(LLVM_PATH)/llvm-strip
endif
BPF_KARCH:=mips
BPF_ARCH:=mips$(if $(CONFIG_ARCH_64BIT),64)$(if $(CONFIG_BIG_ENDIAN),,el)

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@ -1,2 +1,2 @@
LINUX_VERSION-6.6 = .83
LINUX_KERNEL_HASH-6.6.83 = 894bbbe63b7484a0bc576a1e11a8dbc090fbd476d6424431bdc8435e03c2c208
LINUX_VERSION-6.6 = .86
LINUX_KERNEL_HASH-6.6.86 = 49e3ad7423e40735faada0cd39665c071d47efd84ec3548acf119c9704f13e68

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@ -44,6 +44,7 @@ livinet,zr-3020-ubootmod|\
mercusys,mr90x-v1-ubi|\
netcore,n60|\
netcore,n60-pro|\
netis,nx31|\
nokia,ea0326gmp|\
qihoo,360t7|\
routerich,ax3000-ubootmod|\

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@ -30,6 +30,7 @@ alfa-network,ax1800rm|\
allnet,all0256n-4m|\
allnet,all0256n-8m|\
allnet,all5002|\
huasifei,shf283|\
jdcloud,re-cp-02|\
yuncore,ax820)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"

View File

@ -435,6 +435,18 @@ define U-Boot/mt7981_livinet_zr-3020
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_netis_nx31
NAME:=netis NX31
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=netis_nx31
UBOOT_CONFIG:=mt7981_netis_nx31
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_nokia_ea0326gmp
NAME:=Nokia EA0326GMP
BUILD_SUBTARGET:=filogic
@ -994,6 +1006,7 @@ UBOOT_TARGETS := \
mt7981_konka_komi-a31-emmc \
mt7981_konka_komi-a31-nor \
mt7981_livinet_zr-3020 \
mt7981_netis_nx31 \
mt7981_nokia_ea0326gmp \
mt7981_openwrt_one-snand \
mt7981_openwrt_one-nor \

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@ -0,0 +1,334 @@
--- /dev/null
+++ b/configs/mt7981_netis_nx31_defconfig
@@ -0,0 +1,106 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7981-netis_nx31"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_TARGET_MT7981=y
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_PRE_CON_BUF_ADDR=0x4007ef00
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=30
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_MENU_SHOW=y
+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-netis_nx31.dtb"
+CONFIG_LOGLEVEL=7
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_LOG=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="MT7981> "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_UUID=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBI_RENAME=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_UBI_PART="ubi"
+CONFIG_ENV_UBI_VOLUME="ubootenv"
+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_DEFAULT_ENV_FILE=y
+CONFIG_DEFAULT_ENV_FILE="defenvs/netis_nx31_env"
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_NETCONSOLE=y
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_CLK=y
+CONFIG_GPIO_HOG=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHY_FIXED=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7981=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPIM=y
+CONFIG_ZSTD=y
+CONFIG_HEXDUMP=y
--- /dev/null
+++ b/arch/arm/dts/mt7981-netis_nx31.dts
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2025
+ * Author: Mikhail Zhilkin <csharper2005@gmail.com>
+ */
+
+/dts-v1/;
+#include "mt7981.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "netis NX31";
+ compatible = "netis,nx31", "mediatek,mt7981";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ button-0 {
+ label = "mesh";
+ linux,code = <BTN_0>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ button-1 {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "blue:wlan2g";
+ gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ label = "blue:status";
+ gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+ };
+
+ led-2 {
+ label = "blue:wan";
+ gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+ };
+
+ led-3 {
+ label = "blue:wlan5g";
+ gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "u-boot-env (unused)";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@160000 {
+ label = "Factory";
+ reg = <0x180000 0x200000>;
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7a80000>;
+ };
+ };
+ };
+};
+
+&watchdog {
+ status = "disabled";
+};
--- /dev/null
+++ b/defenvs/netis_nx31_env
@@ -0,0 +1,57 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootcmd=run check_buttons ; if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-1
+bootdelay=0
+bootfile=immortalwrt-mediatek-filogic-netis_nx31-initramfs-recovery.itb
+bootfile_bl2=immortalwrt-mediatek-filogic-netis_nx31-preloader.bin
+bootfile_fip=immortalwrt-mediatek-filogic-netis_nx31-bl31-uboot.fip
+bootfile_upg=immortalwrt-mediatek-filogic-netis_nx31-squashfs-sysupgrade.itb
+bootled_status=blue:status
+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
+bootmenu_default=0
+bootmenu_delay=0
+bootmenu_title= ( ( ( OpenWrt ) ) )
+bootmenu_0=Initialize environment.=run _firstboot
+bootmenu_0d=Run default boot command.=run boot_default
+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
+bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_first=if button reset ; then led $bootled_status on ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_status on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led bootled_status off
+boot_recovery=led $bootled_status on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led bootled_status off
+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
+boot_tftp_forever=led $bootled_status on ; while true ; do run boot_tftp ; sleep 1 ; done
+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+check_buttons=if button reset ; then run boot_tftp ; fi
+ethaddr_factory=mtd read Factory 0x40080000 0x1e0000 0x20000 && env readmem -b ethaddr 0x4009ef20 0x6 ; setenv ethaddr_factory
+part_default=production
+part_recovery=recovery
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
+mtd_write_fip=mtd erase FIP && mtd write FIP $loadaddr
+mtd_write_bl2=mtd erase BL2 && mtd write BL2 $loadaddr
+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
+_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"

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@ -1,60 +0,0 @@
From 630df9786fdaeb78c21f1e28c9b70ac83a1b482c Mon Sep 17 00:00:00 2001
From: Vincent Tremblay <vincent@vtremblay.dev>
Date: Sat, 31 Dec 2022 09:24:00 -0500
Subject: [PATCH] ath10k: read qcom,coexist-support as a u32
Read qcom,coexist-support as a u32 instead of a u8
When we set the property to <1> in the DT (as specified in the doc),
"of_property_read_u8" read 0 instead of 1. This is because of the data format.
By default <1> is written with 32 bits.
The problem is that the driver is trying to read a u8.
The difference can be visualized using hexdump in a running device:
Default 32 bits output:
=======================
0000000 0000 0100
0000004
8 bits output:
==============
0000000 0001
0000001
By changing "of_property_read_u8" by "of_property_read_u32", the driver
is aligned with the documentation and is able to read the value without
modifying the DT.
The other solution would be to force the value in the DT to be saved as
an 8 bits value (qcom,coexist-support = /bits/ 8 <1>),
which is against the doc and less intuitive.
Validation:
===========
The patch was tested on a real device and we can see in the debug logs
that the feature is properly initialized:
[ 109.102097] ath10k_ahb a000000.wifi: boot coex_support 1 coex_gpio_pin 52
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
--- a/ath10k-6.10/core.c
+++ b/ath10k-6.10/core.c
@@ -2871,14 +2871,14 @@ done:
static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
{
struct device_node *node;
- u8 coex_support = 0;
+ u32 coex_support = 0;
int ret;
node = ar->dev->of_node;
if (!node)
goto out;
- ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
+ ret = of_property_read_u32(node, "qcom,coexist-support", &coex_support);
if (ret) {
ar->coex_support = true;
goto out;

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@ -0,0 +1,34 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Fri, 28 Mar 2025 20:26:04 +0800
Subject: [PATCH] ath10k-ct: silence warning caused by unsupported retry_limit
value
Some retry_limit values are not supported by ath10k wave2 chips.
We can just skip config it for these chips. And it's safe to
return 0 in this case because the hardware is still working.
Suggested-by: Ben Greear <greearb@candelatech.com>
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
ath10k-6.14/mac.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/ath10k-6.10/mac.c
+++ b/ath10k-6.10/mac.c
@@ -5395,7 +5395,7 @@ static int ath10k_config_retry_limit(str
*/
ath10k_warn(ar, "Firmware lacks feature flag indicating a retry limit of > 2 is OK, requested limit: %d\n",
limit);
- return -EINVAL;
+ goto skip_retry_limit;
}
list_for_each_entry(arvif, &ar->arvifs, list) {
@@ -5406,6 +5406,7 @@ static int ath10k_config_retry_limit(str
}
}
+skip_retry_limit:
return ret;
}

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@ -0,0 +1,31 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Fri, 28 Mar 2025 21:02:27 +0800
Subject: [PATCH] ath10k-ct: silence noisy log caused by flushing queue
.flush() is a regular mac80211 operation aims to clear all pending
frames from the hardware queue. Only developers need to care about it.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
ath10k-6.14/mac.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/ath10k-6.10/mac.c
+++ b/ath10k-6.10/mac.c
@@ -9061,12 +9061,12 @@ static void ath10k_flush(struct ieee8021
if (vif) {
arvif = (void *)vif->drv_priv;
vid = arvif->vdev_id;
- ath10k_info(ar, "mac flush vdev %d drop %d queues 0x%x ar->paused: 0x%lx arvif->paused: 0x%lx\n",
- arvif->vdev_id, drop, queues, ar->tx_paused, arvif->tx_paused);
+ ath10k_dbg(ar, ATH10K_DBG_MAC, "mac flush vdev %d drop %d queues 0x%x ar->paused: 0x%lx arvif->paused: 0x%lx\n",
+ arvif->vdev_id, drop, queues, ar->tx_paused, arvif->tx_paused);
}
else {
- ath10k_info(ar, "mac flush null vif, drop %d queues 0x%x\n",
- drop, queues);
+ ath10k_dbg(ar, ATH10K_DBG_MAC, "mac flush null vif, drop %d queues 0x%x\n",
+ drop, queues);
}

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@ -18,7 +18,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/ath10k-6.10/mac.c
+++ b/ath10k-6.10/mac.c
@@ -11316,7 +11316,6 @@ int ath10k_mac_register(struct ath10k *a
@@ -11317,7 +11317,6 @@ int ath10k_mac_register(struct ath10k *a
ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA);
ieee80211_hw_set(ar->hw, QUEUE_CONTROL);
ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG);

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@ -1098,7 +1098,6 @@ define KernelPackage/ixgbe
TITLE:=Intel(R) 82598/82599 PCI-Express 10 Gigabit Ethernet support
DEPENDS:=@PCI_SUPPORT +kmod-mdio +kmod-ptp +kmod-hwmon-core +kmod-libphy +kmod-mdio-devres
KCONFIG:=CONFIG_IXGBE \
CONFIG_IXGBE_VXLAN=n \
CONFIG_IXGBE_HWMON=y \
CONFIG_IXGBE_DCA=n
FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/ixgbe/ixgbe.ko
@ -1117,7 +1116,6 @@ define KernelPackage/ixgbevf
TITLE:=Intel(R) 82599 Virtual Function Ethernet support
DEPENDS:=@PCI_SUPPORT +kmod-ixgbe
KCONFIG:=CONFIG_IXGBEVF \
CONFIG_IXGBE_VXLAN=n \
CONFIG_IXGBE_HWMON=y \
CONFIG_IXGBE_DCA=n
FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/ixgbevf/ixgbevf.ko
@ -1134,10 +1132,8 @@ $(eval $(call KernelPackage,ixgbevf))
define KernelPackage/i40e
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Intel(R) Ethernet Controller XL710 Family support
DEPENDS:=@PCI_SUPPORT +kmod-mdio +kmod-ptp +kmod-hwmon-core +kmod-libphy
DEPENDS:=@PCI_SUPPORT +kmod-ptp
KCONFIG:=CONFIG_I40E \
CONFIG_I40E_VXLAN=n \
CONFIG_I40E_HWMON=y \
CONFIG_I40E_DCA=n
FILES:=$(LINUX_DIR)/drivers/net/ethernet/intel/i40e/i40e.ko
AUTOLOAD:=$(call AutoProbe,i40e)

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@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8101
PKG_VERSION:=1.039.00
PKG_RELEASE:=2
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8101/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8101
TITLE:=Realtek RTL8101 PCI Fast Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8101.ko
AUTOLOAD:=$(call AutoProbe,r8101)
AUTOLOAD:=$(call AutoProbe,r8101,1)
PROVIDES:=kmod-r8169
endef

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@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8125
PKG_VERSION:=9.015.00
PKG_RELEASE:=1
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8125/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8125
TITLE:=Realtek RTL8125 PCI 2.5 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8125.ko
AUTOLOAD:=$(call AutoProbe,r8125)
AUTOLOAD:=$(call AutoProbe,r8125,1)
PROVIDES:=kmod-r8169 kmod-r8125-rss
endef
@ -28,6 +28,7 @@ define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
CONFIG_ASPM=n \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

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@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8126
PKG_VERSION:=10.015.00
PKG_RELEASE:=1
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8126/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8126
TITLE:=Realtek RTL8126 PCI 5 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8126.ko
AUTOLOAD:=$(call AutoProbe,r8126)
AUTOLOAD:=$(call AutoProbe,r8126,1)
PROVIDES:=kmod-r8169 kmod-r8126-rss
endef
@ -28,6 +28,7 @@ define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
CONFIG_ASPM=n \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

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@ -0,0 +1,35 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=r8127
PKG_VERSION:=11.014.00
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8127/releases/download/$(PKG_VERSION)
PKG_HASH:=f496bc16c32d2e8f9482c57d006604c70d9e8d55b4f1f999b88c602de9104094
PKG_BUILD_PARALLEL:=1
PKG_LICENSE:=GPLv2
PKG_MAINTAINER:=Alvaro Fernandez Rojas <noltari@gmail.com>
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/r8127
SUBMENU:=Network Devices
TITLE:=Realtek RTL8127 PCI 10 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8127.ko
AUTOLOAD:=$(call AutoProbe,r8127,1)
PROVIDES:=kmod-r8169 kmod-r8127-rss
endef
define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef
$(eval $(call KernelPackage,r8127))

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@ -0,0 +1,107 @@
From 5ca1d47e065c0318774a946ffdf76010c78cc164 Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Sat, 10 Aug 2024 20:16:32 +0800
Subject: [PATCH] r8127: print link speed and duplex mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Like other Ethernet drivers, print link speed and duplex mode
when the interface is up. Formatting output at the same time.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
src/r8127.h | 2 ++
src/r8127_n.c | 48 +++++++++++++++++++++++++++++++++++++++++++++---
2 files changed, 47 insertions(+), 3 deletions(-)
--- a/src/r8127.h
+++ b/src/r8127.h
@@ -1753,6 +1753,11 @@ enum RTL8127_register_content {
LinkStatus = 0x02,
FullDup = 0x01,
+#define RTL8127_FULL_DUPLEX_MASK (_10000bpsF | _5000bpsF | _2500bpsF | _1000bpsF | FullDup)
+#define RTL8127_SPEED_1000_MASK (_1000bpsF | _1000bpsL | _2500bpsL)
+#define RTL8127_SPEED_2500_MASK (_2500bpsF | _5000bpsL)
+#define RTL8127_SPEED_5000_MASK (_5000bpsF | _10000bpsL)
+
/* DBG_reg */
Fix_Nak_1 = (1 << 4),
Fix_Nak_2 = (1 << 3),
--- a/src/r8127_n.c
+++ b/src/r8127_n.c
@@ -39,6 +39,7 @@
#include <linux/module.h>
#include <linux/version.h>
#include <linux/pci.h>
+#include <linux/phy.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
@@ -4746,6 +4747,42 @@ rtl8127_link_down_patch(struct net_devic
#endif
}
+static unsigned int rtl8127_phy_duplex(u32 status)
+{
+ unsigned int duplex = DUPLEX_UNKNOWN;
+
+ if (status & LinkStatus) {
+ if (status & RTL8127_FULL_DUPLEX_MASK)
+ duplex = DUPLEX_FULL;
+ else
+ duplex = DUPLEX_HALF;
+ }
+
+ return duplex;
+}
+
+static int rtl8127_phy_speed(u32 status)
+{
+ int speed = SPEED_UNKNOWN;
+
+ if (status & LinkStatus) {
+ if (status & _10000bpsF)
+ speed = SPEED_10000;
+ else if (status & RTL8127_SPEED_5000_MASK)
+ speed = SPEED_5000;
+ else if (status & RTL8127_SPEED_2500_MASK)
+ speed = SPEED_2500;
+ else if (status & RTL8127_SPEED_1000_MASK)
+ speed = SPEED_1000;
+ else if (status & _100bps)
+ speed = SPEED_100;
+ else if (status & _10bps)
+ speed = SPEED_10;
+ }
+
+ return speed;
+}
+
static void
_rtl8127_check_link_status(struct net_device *dev, unsigned int link_state)
{
@@ -4758,11 +4795,18 @@ _rtl8127_check_link_status(struct net_de
if (link_state == R8127_LINK_STATE_ON) {
rtl8127_link_on_patch(dev);
- if (netif_msg_ifup(tp))
- printk(KERN_INFO PFX "%s: link up\n", dev->name);
+ if (netif_msg_ifup(tp)) {
+ const u32 phy_status = RTL_R32(tp, PHYstatus);
+ const unsigned int phy_duplex = rtl8127_phy_duplex(phy_status);
+ const int phy_speed = rtl8127_phy_speed(phy_status);
+ printk(KERN_INFO PFX "%s: Link is Up - %s/%s\n",
+ dev->name,
+ phy_speed_to_str(phy_speed),
+ phy_duplex_to_str(phy_duplex));
+ }
} else {
if (netif_msg_ifdown(tp))
- printk(KERN_INFO PFX "%s: link down\n", dev->name);
+ printk(KERN_INFO PFX "%s: Link is Down\n", dev->name);
rtl8127_link_down_patch(dev);
}

View File

@ -24,10 +24,10 @@ include $(INCLUDE_DIR)/package.mk
define KernelPackage/usb-net-rtl8152-vendor
TITLE:=Kernel module for USB-to-Ethernet Realtek convertors
SUBMENU:=USB Support
DEPENDS:=+kmod-usb-net
DEPENDS:=+kmod-usb-core
CONFLICTS:=kmod-usb-net-rtl8152
FILES:=$(PKG_BUILD_DIR)/r8152.ko
AUTOLOAD:=$(call AutoProbe,r8152)
AUTOLOAD:=$(call AutoProbe,r8152,1)
endef
define KernelPackage/usb-net-rtl8152-vendor/description

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@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8168
PKG_VERSION:=8.055.00
PKG_RELEASE:=1
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8168/releases/download/$(PKG_VERSION)
@ -20,13 +20,14 @@ define KernelPackage/r8168
TITLE:=Realtek RTL8168 PCI Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8168.ko
AUTOLOAD:=$(call AutoProbe,r8168)
PROVIDES:=kmod-r8169
AUTOLOAD:=$(call AutoProbe,r8168,1)
PROVIDES:=kmod-r8169 kmod-r8168-rss
endef
define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

View File

@ -740,8 +740,10 @@ mac80211_prepare_vif() {
mac80211_prepare_iw_htmode() {
case "$htmode" in
VHT20|HT20|HE20) iw_htmode=HT20;;
HT40*|VHT40|VHT160|HE40)
HT20|VHT20|HE20|EHT20)
iw_htmode=HT20
;;
HT40*|VHT40|HE40|EHT40)
case "$band" in
2g)
case "$htmode" in
@ -765,8 +767,11 @@ mac80211_prepare_iw_htmode() {
esac
[ "$auto_channel" -gt 0 ] && iw_htmode="HT40+"
;;
VHT80|HE80)
iw_htmode="80MHZ"
VHT80|HE80|EHT80)
iw_htmode="80MHz"
;;
VHT160|HE160|EHT160)
iw_htmode="160MHz"
;;
NONE|NOHT)
iw_htmode="NOHT"

View File

@ -7,7 +7,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ca-certificates
PKG_VERSION:=20240203
PKG_VERSION:=20241223
PKG_RELEASE:=1
PKG_MAINTAINER:=
@ -16,7 +16,7 @@ PKG_LICENSE_FILES:=debian/copyright
PKG_SOURCE:=$(PKG_NAME)_$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@DEBIAN/pool/main/c/ca-certificates
PKG_HASH:=3286d3fc42c4d11b7086711a85f865b44065ce05cf1fb5376b2abed07622a9c6
PKG_HASH:=dd8286d0a9dd35c756fea5f1df3fed1510fb891f376903891b003cd9b1ad7e03
PKG_INSTALL:=1
include $(INCLUDE_DIR)/package.mk

View File

@ -48,7 +48,7 @@ define Package/busybox/Default
MAINTAINER:=Felix Fietkau <nbd@nbd.name>
TITLE:=Core utilities for embedded Linux
URL:=http://busybox.net/
DEPENDS:=+BUSYBOX_CONFIG_PAM:libpam +BUSYBOX_CONFIG_NTPD:jsonfilter
DEPENDS:=+BUSYBOX_CONFIG_PAM:libpam +BUSYBOX_CONFIG_NTPD:jsonfilter +(USE_GLIBC&&BUSYBOX_CONFIG_FEATURE_MOUNT_NFS)||(USE_GLIBC&&BUSYBOX_CONFIG_FEATURE_INETD_RPC):libtirpc
USERID:=ntp=123:ntp=123
endef
@ -104,6 +104,13 @@ ifeq ($(CONFIG_USE_GLIBC),y)
LDLIBS += $(call BUSYBOX_IF_ENABLED,NSLOOKUP,resolv)
endif
ifneq ($(CONFIG_BUSYBOX_$(BUSYBOX_SYM)_FEATURE_MOUNT_NFS)$(CONFIG_BUSYBOX_$(BUSYBOX_SYM)_FEATURE_INETD_RPC),)
ifndef CONFIG_USE_MUSL
TARGET_CFLAGS += -I$(STAGING_DIR)/usr/include/tirpc
LDLIBS += tirpc
endif
endif
ifeq ($(BUILD_VARIANT),selinux)
LDLIBS += selinux sepol
endif

View File

@ -8,6 +8,7 @@ endef
define Device/nec-netbsd-aterm
DEVICE_VENDOR := NEC
LOADER_TYPE := bin
LZMA_TEXT_START := 0x82800000
KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-kernel | uImage none
ARTIFACTS := uboot.bin

View File

@ -89,7 +89,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
commit->event = kzalloc(sizeof(*commit->event),
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7298,6 +7298,19 @@ int intel_atomic_commit(struct drm_devic
@@ -7297,6 +7297,19 @@ int intel_atomic_commit(struct drm_devic
state->base.legacy_cursor_update = false;
}

View File

@ -23,7 +23,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -243,6 +243,9 @@
@@ -244,6 +244,9 @@
#define USB_VENDOR_ID_BAANTO 0x2453
#define USB_DEVICE_ID_BAANTO_MT_190W2 0x0100
@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
@@ -1405,6 +1408,9 @@
@@ -1408,6 +1411,9 @@
#define USB_VENDOR_ID_XIAOMI 0x2717
#define USB_DEVICE_ID_MI_SILENT_MOUSE 0x5014

View File

@ -423,7 +423,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
v3d_switch_perfmon(v3d, &job->base);
/* XXX: Set the QCFG */
@@ -190,6 +301,7 @@ v3d_tfu_job_run(struct drm_sched_job *sc
@@ -194,6 +305,7 @@ v3d_tfu_job_run(struct drm_sched_job *sc
trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno);
@ -431,7 +431,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
V3D_WRITE(V3D_TFU_IIA, job->args.iia);
V3D_WRITE(V3D_TFU_IIS, job->args.iis);
V3D_WRITE(V3D_TFU_ICA, job->args.ica);
@@ -231,6 +343,7 @@ v3d_csd_job_run(struct drm_sched_job *sc
@@ -238,6 +350,7 @@ v3d_csd_job_run(struct drm_sched_job *sc
trace_v3d_submit_csd(dev, to_v3d_fence(fence)->seqno);
@ -439,7 +439,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
v3d_switch_perfmon(v3d, &job->base);
for (i = 1; i <= 6; i++)
@@ -247,7 +360,10 @@ v3d_cache_clean_job_run(struct drm_sched
@@ -254,7 +367,10 @@ v3d_cache_clean_job_run(struct drm_sched
struct v3d_job *job = to_v3d_job(sched_job);
struct v3d_dev *v3d = job->v3d;
@ -450,7 +450,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
return NULL;
}
@@ -385,8 +501,18 @@ v3d_sched_init(struct v3d_dev *v3d)
@@ -392,8 +508,18 @@ v3d_sched_init(struct v3d_dev *v3d)
int hw_jobs_limit = 1;
int job_hang_limit = 0;
int hang_limit_ms = 500;
@ -469,7 +469,7 @@ Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
ret = drm_sched_init(&v3d->queue[V3D_BIN].sched,
&v3d_bin_sched_ops,
hw_jobs_limit, job_hang_limit,
@@ -440,9 +566,20 @@ void
@@ -447,9 +573,20 @@ void
v3d_sched_fini(struct v3d_dev *v3d)
{
enum v3d_queue q;

View File

@ -600,7 +600,7 @@ v2: fix kernel panic with debug-fs interface to list registers
static struct dma_fence *
v3d_tfu_job_run(struct drm_sched_job *sched_job)
{
@@ -302,20 +304,22 @@ v3d_tfu_job_run(struct drm_sched_job *sc
@@ -306,20 +308,22 @@ v3d_tfu_job_run(struct drm_sched_job *sc
trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno);
v3d_sched_stats_add_job(&v3d->gpu_queue_stats[V3D_TFU], sched_job);
@ -635,16 +635,16 @@ v2: fix kernel panic with debug-fs interface to list registers
return fence;
}
@@ -327,7 +331,7 @@ v3d_csd_job_run(struct drm_sched_job *sc
@@ -331,7 +335,7 @@ v3d_csd_job_run(struct drm_sched_job *sc
struct v3d_dev *v3d = job->base.v3d;
struct drm_device *dev = &v3d->drm;
struct dma_fence *fence;
- int i;
+ int i, csd_cfg0_reg, csd_cfg_reg_count;
v3d->csd_job = job;
@@ -346,10 +350,12 @@ v3d_csd_job_run(struct drm_sched_job *sc
if (unlikely(job->base.base.s_fence->finished.error))
return NULL;
@@ -353,10 +357,12 @@ v3d_csd_job_run(struct drm_sched_job *sc
v3d_sched_stats_add_job(&v3d->gpu_queue_stats[V3D_CSD], sched_job);
v3d_switch_perfmon(v3d, &job->base);
@ -660,7 +660,7 @@ v2: fix kernel panic with debug-fs interface to list registers
return fence;
}
@@ -452,7 +458,8 @@ v3d_csd_job_timedout(struct drm_sched_jo
@@ -459,7 +465,8 @@ v3d_csd_job_timedout(struct drm_sched_jo
{
struct v3d_csd_job *job = to_csd_job(sched_job);
struct v3d_dev *v3d = job->base.v3d;

View File

@ -29,7 +29,7 @@ Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
};
DRM_ENUM_NAME_FN(drm_get_tv_mode_name, drm_tv_mode_enum_list)
@@ -1736,6 +1737,12 @@ EXPORT_SYMBOL(drm_connector_attach_dp_su
@@ -1740,6 +1741,12 @@ EXPORT_SYMBOL(drm_connector_attach_dp_su
* TV Mode is CCIR System B (aka 625-lines) together with
* the SECAM Color Encoding.
*

View File

@ -22,7 +22,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -2698,10 +2698,15 @@ int drm_connector_set_orientation_from_p
@@ -2702,10 +2702,15 @@ int drm_connector_set_orientation_from_p
{
enum drm_panel_orientation orientation;

View File

@ -1,60 +0,0 @@
From 87fc066350358ce45f5ad52424c8a2e351b1720c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Tue, 7 Jan 2025 12:05:41 +0000
Subject: [PATCH] dts: bcm2711: PL011 UARTs are actually r1p5
The ARM PL011 UART instances in BCM2711 are r1p5 spec, which means they
have 32-entry FIFOs. The correct periphid value for this is 0x00341011.
Thanks to N Buchwitz for pointing this out.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/broadcom/bcm2711.dtsi | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi
@@ -134,7 +134,7 @@
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
- arm,primecell-periphid = <0x00241011>;
+ arm,primecell-periphid = <0x00341011>;
status = "disabled";
};
@@ -145,7 +145,7 @@
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
- arm,primecell-periphid = <0x00241011>;
+ arm,primecell-periphid = <0x00341011>;
status = "disabled";
};
@@ -156,7 +156,7 @@
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
- arm,primecell-periphid = <0x00241011>;
+ arm,primecell-periphid = <0x00341011>;
status = "disabled";
};
@@ -167,7 +167,7 @@
clocks = <&clocks BCM2835_CLOCK_UART>,
<&clocks BCM2835_CLOCK_VPU>;
clock-names = "uartclk", "apb_pclk";
- arm,primecell-periphid = <0x00241011>;
+ arm,primecell-periphid = <0x00341011>;
status = "disabled";
};
@@ -1155,6 +1155,7 @@
};
&uart0 {
+ arm,primecell-periphid = <0x00341011>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};

View File

@ -20,17 +20,6 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 2 --
2 files changed, 4 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi
@@ -451,8 +451,6 @@
IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
- /* This only applies to the ARMv7 stub */
- arm,cpu-registers-not-fw-configured;
};
cpus: cpus {
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -741,8 +741,6 @@

View File

@ -1,61 +0,0 @@
From 5258ca4ad089548a72657522443b9c3e46fd125b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ma=C3=ADra=20Canal?= <mcanal@igalia.com>
Date: Sat, 22 Feb 2025 14:40:21 -0300
Subject: [PATCH] drm/v3d: Don't run jobs that have errors flagged in its fence
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The V3D driver still relies on `drm_sched_increase_karma()` and
`drm_sched_resubmit_jobs()` for resubmissions when a timeout occurs.
The function `drm_sched_increase_karma()` marks the job as guilty, while
`drm_sched_resubmit_jobs()` sets an error (-ECANCELED) in the DMA fence of
that guilty job.
Because of this, we must check whether the jobs DMA fence has been
flagged with an error before executing the job. Otherwise, the same guilty
job may be resubmitted indefinitely, causing repeated GPU resets.
This patch adds a check for an error on the job's fence to prevent running
a guilty job that was previously flagged when the GPU timed out.
Note that the CPU and CACHE_CLEAN queues do not require this check, as
their jobs are executed synchronously once the DRM scheduler starts them.
Cc: stable@vger.kernel.org
Fixes: d223f98f0209 ("drm/v3d: Add support for compute shader dispatch.")
Fixes: 1584f16ca96e ("drm/v3d: Add support for submitting jobs to the TFU.")
Signed-off-by: Maíra Canal <mcanal@igalia.com>
---
drivers/gpu/drm/v3d/v3d_sched.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/v3d/v3d_sched.c
+++ b/drivers/gpu/drm/v3d/v3d_sched.c
@@ -292,11 +292,15 @@ v3d_tfu_job_run(struct drm_sched_job *sc
struct drm_device *dev = &v3d->drm;
struct dma_fence *fence;
+ if (unlikely(job->base.base.s_fence->finished.error))
+ return NULL;
+
+ v3d->tfu_job = job;
+
fence = v3d_fence_create(v3d, V3D_TFU);
if (IS_ERR(fence))
return NULL;
- v3d->tfu_job = job;
if (job->base.irq_fence)
dma_fence_put(job->base.irq_fence);
job->base.irq_fence = dma_fence_get(fence);
@@ -333,6 +337,9 @@ v3d_csd_job_run(struct drm_sched_job *sc
struct dma_fence *fence;
int i, csd_cfg0_reg, csd_cfg_reg_count;
+ if (unlikely(job->base.base.s_fence->finished.error))
+ return NULL;
+
v3d->csd_job = job;
v3d_invalidate_caches(v3d);

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@ -0,0 +1,77 @@
From 0553897d77e849a86e836ddf1e0c0dbbd8e64f83 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 20 Jan 2025 10:40:09 +0000
Subject: [PATCH] media: i2c: imx477: Add further link frequency options
https://github.com/raspberrypi/linux/issues/6004 reports further
issues with GPS interference.
Untested, but adds further link frequency options.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/media/i2c/imx477.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
--- a/drivers/media/i2c/imx477.c
+++ b/drivers/media/i2c/imx477.c
@@ -169,12 +169,18 @@ enum {
IMX477_LINK_FREQ_450MHZ,
IMX477_LINK_FREQ_453MHZ,
IMX477_LINK_FREQ_456MHZ,
+ IMX477_LINK_FREQ_459MHZ,
+ IMX477_LINK_FREQ_462MHZ,
+ IMX477_LINK_FREQ_498MHZ,
};
static const s64 link_freqs[] = {
[IMX477_LINK_FREQ_450MHZ] = 450000000,
[IMX477_LINK_FREQ_453MHZ] = 453000000,
[IMX477_LINK_FREQ_456MHZ] = 456000000,
+ [IMX477_LINK_FREQ_459MHZ] = 459000000,
+ [IMX477_LINK_FREQ_462MHZ] = 462000000,
+ [IMX477_LINK_FREQ_498MHZ] = 498000000,
};
/* 450MHz is the nominal "default" link frequency */
@@ -193,6 +199,21 @@ static const struct imx477_reg link_456M
{0x030F, 0x98},
};
+static const struct imx477_reg link_459Mhz_regs[] = {
+ {0x030E, 0x00},
+ {0x030F, 0x99},
+};
+
+static const struct imx477_reg link_462Mhz_regs[] = {
+ {0x030E, 0x00},
+ {0x030F, 0x9a},
+};
+
+static const struct imx477_reg link_498Mhz_regs[] = {
+ {0x030E, 0x00},
+ {0x030F, 0xa6},
+};
+
static const struct imx477_reg_list link_freq_regs[] = {
[IMX477_LINK_FREQ_450MHZ] = {
.regs = link_450Mhz_regs,
@@ -206,6 +227,18 @@ static const struct imx477_reg_list link
.regs = link_456Mhz_regs,
.num_of_regs = ARRAY_SIZE(link_456Mhz_regs)
},
+ [IMX477_LINK_FREQ_459MHZ] = {
+ .regs = link_459Mhz_regs,
+ .num_of_regs = ARRAY_SIZE(link_459Mhz_regs)
+ },
+ [IMX477_LINK_FREQ_462MHZ] = {
+ .regs = link_462Mhz_regs,
+ .num_of_regs = ARRAY_SIZE(link_462Mhz_regs)
+ },
+ [IMX477_LINK_FREQ_498MHZ] = {
+ .regs = link_498Mhz_regs,
+ .num_of_regs = ARRAY_SIZE(link_498Mhz_regs)
+ },
};
static const struct imx477_reg mode_common_regs[] = {

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@ -0,0 +1,82 @@
From 9da8d6df2051478f0ba16d73c65995955c19cb3a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Tue, 18 Mar 2025 13:09:11 +0000
Subject: [PATCH] overlays: Fix some unusable fragments
A forthcoming overlaycheck update looks for dormant fragments with no
parameters to enable them. The test discovered some real errors, which
this patch fixes, and one case where some fragments aren't yet being
used, which this comments out until they are.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 2 +-
arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts | 2 +-
arch/arm/boot/dts/overlays/sx150x-overlay.dts | 2 +-
arch/arm/boot/dts/overlays/vc4-kms-dpi-panel-overlay.dts | 4 ++++
4 files changed, 7 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
+++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
@@ -145,7 +145,7 @@
poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
poe_fan_temp3 = <&trip3>,"temperature:0";
poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
- i2c = <0>, "+5+6",
+ i2c = <0>, "+7+8",
<&fwpwm>,"status=disabled",
<&i2c_bus>,"status=okay",
<&poe_mfd>,"status=okay",
--- a/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
+++ b/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
@@ -28,7 +28,7 @@
};
__overrides__ {
- i2c = <0>, "+5+6",
+ i2c = <0>, "+7+8",
<&fwpwm>,"status=disabled",
<&rpi_poe_power_supply>,"status=disabled",
<&i2c_bus>,"status=okay",
--- a/arch/arm/boot/dts/overlays/sx150x-overlay.dts
+++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
@@ -1681,7 +1681,7 @@
sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
- sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
+ sx1507-0-70-int-gpio = <0>,"+70+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
--- a/arch/arm/boot/dts/overlays/vc4-kms-dpi-panel-overlay.dts
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dpi-panel-overlay.dts
@@ -42,24 +42,28 @@
pinctrl-0 = <&dpi_18bit_gpio0>;
};
};
+#if 0
fragment@92 {
target = <&dpi>;
__dormant__ {
pinctrl-0 = <&dpi_gpio0>;
};
};
+#endif
fragment@93 {
target = <&dpi>;
__dormant__ {
pinctrl-0 = <&dpi_16bit_cpadhi_gpio0>;
};
};
+#if 0
fragment@94 {
target = <&dpi>;
__dormant__ {
pinctrl-0 = <&dpi_16bit_gpio0>;
};
};
+#endif
__overrides__ {
at056tn53v1 = <0>, "+0+90";

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@ -0,0 +1,33 @@
From bba53a117a4a5c29da892962332ff1605990e17a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Wed, 26 Mar 2025 11:28:28 +0000
Subject: [PATCH] dts: rp1: Don't use DMA with UARTs
DMA has been enabled on RP1's UART0, but with mixed success. Transmits
seem to work, but the DMA interface is not well suited to receiving
arbitrary amounts of data. In particular, the PL011 driver is slow to
pass on the received data, batching it into large blocks.
On balance, it's better to just disable the DMA support. As with the
other UARTs, the required runes are left in the DTS as comments.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
arch/arm64/boot/dts/broadcom/rp1.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
@@ -65,9 +65,9 @@
interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
clock-names = "uartclk", "apb_pclk";
- dmas = <&rp1_dma RP1_DMA_UART0_TX>,
- <&rp1_dma RP1_DMA_UART0_RX>;
- dma-names = "tx", "rx";
+ // dmas = <&rp1_dma RP1_DMA_UART0_TX>,
+ // <&rp1_dma RP1_DMA_UART0_RX>;
+ // dma-names = "tx", "rx";
pinctrl-names = "default";
arm,primecell-periphid = <0x00341011>;
uart-has-rtscts;

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@ -0,0 +1,28 @@
From 135c3c86a7cef4ba3d368da15b16c275b74582d3 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:35:24 +0100
Subject: [PATCH] r8169: make Kconfig option for LED support user-visible
Make config option R8169_LEDS user-visible, so that users can remove
support if not needed.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/d29f0cdb-32bf-435f-b59d-dc96bca1e3ab@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/realtek/Kconfig
+++ b/drivers/net/ethernet/realtek/Kconfig
@@ -114,7 +114,8 @@ config R8169
will be called r8169. This is recommended.
config R8169_LEDS
- def_bool R8169 && LEDS_TRIGGER_NETDEV
+ bool "Support for controlling the NIC LEDs"
+ depends on R8169 && LEDS_TRIGGER_NETDEV
depends on !(R8169=y && LEDS_CLASS=m)
help
Optional support for controlling the NIC LED's with the netdev

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@ -0,0 +1,26 @@
From faac69a4ae5abb49e62c79c66b51bb905c9aa5ec Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Tue, 4 Feb 2025 07:58:17 +0100
Subject: [PATCH] r8169: don't scan PHY addresses > 0
The PHY address is a dummy, because r8169 PHY access registers
don't support a PHY address. Therefore scan address 0 only.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/830637dd-4016-4a68-92b3-618fcac6589d@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5230,6 +5230,7 @@ static int r8169_mdio_register(struct rt
new_bus->priv = tp;
new_bus->parent = &pdev->dev;
new_bus->irq[0] = PHY_MAC_INTERRUPT;
+ new_bus->phy_mask = GENMASK(31, 1);
snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x",
pci_domain_nr(pdev->bus), pci_dev_id(pdev));

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@ -0,0 +1,25 @@
From d30460f42675fef5cd4b44ffbc49b545524555e3 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 12 Feb 2025 08:03:56 +0100
Subject: [PATCH] r8169: add support for Intel Killer E5000
This adds support for the Intel Killer E5000 which seems to be a
rebranded RTL8126. Copied from r8126 vendor driver.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/9db73e9b-e2e8-45de-97a5-041c5f71d774@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -169,6 +169,7 @@ static const struct pci_device_id rtl816
{ PCI_VDEVICE(REALTEK, 0x8125) },
{ PCI_VDEVICE(REALTEK, 0x8126) },
{ PCI_VDEVICE(REALTEK, 0x3000) },
+ { PCI_VDEVICE(REALTEK, 0x5000) },
{}
};

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@ -0,0 +1,67 @@
From 853e80369cfceb2331bf34f251ba11c6602cc67f Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:15:42 +0100
Subject: [PATCH] r8169: add PHY c45 ops for MDIO_MMD_VENDOR2 registers
The integrated PHYs on chip versions from RTL8168g allow to address
MDIO_MMD_VEND2 registers. All c22 standard registers are mapped to
MDIO_MMD_VEND2 registers. So far the paging mechanism is used to
address PHY registers. Add support for c45 ops to address MDIO_MMD_VEND2
registers directly, w/o the paging.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/d6f97eaa-0f13-468f-89cb-75a41087bc4a@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 32 +++++++++++++++++++++++
1 file changed, 32 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5208,6 +5208,33 @@ static int r8169_mdio_write_reg(struct m
return 0;
}
+static int r8169_mdio_read_reg_c45(struct mii_bus *mii_bus, int addr,
+ int devnum, int regnum)
+{
+ struct rtl8169_private *tp = mii_bus->priv;
+
+ if (addr > 0)
+ return -ENODEV;
+
+ if (devnum == MDIO_MMD_VEND2 && regnum > MDIO_STAT2)
+ return r8168_phy_ocp_read(tp, regnum);
+
+ return 0;
+}
+
+static int r8169_mdio_write_reg_c45(struct mii_bus *mii_bus, int addr,
+ int devnum, int regnum, u16 val)
+{
+ struct rtl8169_private *tp = mii_bus->priv;
+
+ if (addr > 0 || devnum != MDIO_MMD_VEND2 || regnum <= MDIO_STAT2)
+ return -ENODEV;
+
+ r8168_phy_ocp_write(tp, regnum, val);
+
+ return 0;
+}
+
static int r8169_mdio_register(struct rtl8169_private *tp)
{
struct pci_dev *pdev = tp->pci_dev;
@@ -5238,6 +5265,11 @@ static int r8169_mdio_register(struct rt
new_bus->read = r8169_mdio_read_reg;
new_bus->write = r8169_mdio_write_reg;
+ if (tp->mac_version >= RTL_GIGA_MAC_VER_40) {
+ new_bus->read_c45 = r8169_mdio_read_reg_c45;
+ new_bus->write_c45 = r8169_mdio_write_reg_c45;
+ }
+
ret = devm_mdiobus_register(&pdev->dev, new_bus);
if (ret)
return ret;

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@ -0,0 +1,40 @@
From 473367a5ffe1607a61be481e2feda684eb5faea9 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 7 Mar 2025 08:29:47 +0100
Subject: [PATCH] r8169: increase max jumbo packet size on RTL8125/RTL8126
Realtek confirmed that all RTL8125/RTL8126 chip versions support up to
16K jumbo packets. Reflect this in the driver.
Tested by Rui on RTL8125B with 12K jumbo packets.
Suggested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Tested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/396762ad-cc65-4e60-b01e-8847db89e98b@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -89,6 +89,7 @@
#define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
#define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
#define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
+#define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
static const struct {
const char *name;
@@ -5368,6 +5369,9 @@ static int rtl_jumbo_max(struct rtl8169_
/* RTL8168c */
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
return JUMBO_6K;
+ /* RTL8125/8126 */
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ return JUMBO_16K;
default:
return JUMBO_9K;
}

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@ -0,0 +1,27 @@
From 3d9b8ac5341269d31e59fd5d58d47266ac78bc32 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Tue, 18 Mar 2025 16:37:20 +0800
Subject: [PATCH] r8169: enable RTL8168H/RTL8168EP/RTL8168FP ASPM support
This patch will enable RTL8168H/RTL8168EP/RTL8168FP ASPM support on
the platforms that have tested with ASPM enabled.
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250318083721.4127-2-hau@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5406,7 +5406,7 @@ done:
/* register is set if system vendor successfully tested ASPM 1.2 */
static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
{
- if (tp->mac_version >= RTL_GIGA_MAC_VER_61 &&
+ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
r8168_mac_ocp_read(tp, 0xc0b2) & 0xf)
return true;

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@ -0,0 +1,60 @@
From b48688ea3c9ac8d5d910c6e91fb7f80d846581f0 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Tue, 18 Mar 2025 16:37:21 +0800
Subject: [PATCH] r8169: disable RTL8126 ZRX-DC timeout
Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
device will exit L1 substate every 100ms. Disable it for saving more power
in L1 substate.
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250318083721.4127-3-hau@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2856,6 +2856,32 @@ static u32 rtl_csi_read(struct rtl8169_p
RTL_R32(tp, CSIDR) : ~0;
}
+static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+ u32 csi;
+ int rc;
+ u8 val;
+
+#define RTL_GEN3_RELATED_OFF 0x0890
+#define RTL_GEN3_ZRXDC_NONCOMPL 0x1
+ if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) {
+ rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val);
+ if (rc == PCIBIOS_SUCCESSFUL) {
+ val &= ~RTL_GEN3_ZRXDC_NONCOMPL;
+ rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,
+ val);
+ if (rc == PCIBIOS_SUCCESSFUL)
+ return;
+ }
+ }
+
+ netdev_notice_once(tp->dev,
+ "No native access to PCI extended config space, falling back to CSI\n");
+ csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
+ rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);
+}
+
static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
{
struct pci_dev *pdev = tp->pci_dev;
@@ -3828,6 +3854,7 @@ static void rtl_hw_start_8125d(struct rt
static void rtl_hw_start_8126a(struct rtl8169_private *tp)
{
+ rtl_disable_zrxdc_timeout(tp);
rtl_set_def_aspm_entry_latency(tp);
rtl_hw_start_8125_common(tp);
}

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@ -0,0 +1,35 @@
From 51773846fab24a353bed4ebb660997ced4bc32d7 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:33:39 +0100
Subject: [PATCH] net: phy: realtek: make HWMON support a user-visible Kconfig
symbol
Make config symbol REALTEK_PHY_HWMON user-visible, so that users can
remove support if not needed.
Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/3466ee92-166a-4b0f-9ae7-42b9e046f333@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/Kconfig | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek/Kconfig
+++ b/drivers/net/phy/realtek/Kconfig
@@ -4,8 +4,12 @@ config REALTEK_PHY
help
Currently supports RTL821x/RTL822x and fast ethernet PHYs
+if REALTEK_PHY
+
config REALTEK_PHY_HWMON
- def_bool REALTEK_PHY && HWMON
- depends on !(REALTEK_PHY=y && HWMON=m)
+ bool "HWMON support for Realtek PHYs"
+ depends on HWMON && !(REALTEK_PHY=y && HWMON=m)
help
Optional hwmon support for the temperature sensor
+
+endif # REALTEK_PHY

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@ -0,0 +1,54 @@
From 0bea93fdbaf8675b7e8124bdcaf51497dcc8bcfa Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:41:36 +0100
Subject: [PATCH] net: phy: realtek: use string choices helpers
Use string choices helpers to simplify the code.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202501190707.qQS8PGHW-lkp@intel.com/
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek/realtek_main.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/string_choices.h>
#include "realtek.h"
@@ -422,11 +423,11 @@ static int rtl8211f_config_init(struct p
} else if (ret) {
dev_dbg(dev,
"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
- val_txdly ? "Enabling" : "Disabling");
+ str_enable_disable(val_txdly));
} else {
dev_dbg(dev,
"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
- val_txdly ? "enabled" : "disabled");
+ str_enabled_disabled(val_txdly));
}
ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
@@ -437,11 +438,11 @@ static int rtl8211f_config_init(struct p
} else if (ret) {
dev_dbg(dev,
"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
- val_rxdly ? "Enabling" : "Disabling");
+ str_enable_disable(val_rxdly));
} else {
dev_dbg(dev,
"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
- val_rxdly ? "enabled" : "disabled");
+ str_enabled_disabled(val_rxdly));
}
if (priv->has_phycr2) {

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@ -0,0 +1,134 @@
From da681ed73fb980286fc29de707b35d76bb33e123 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:18:17 +0100
Subject: [PATCH] net: phy: realtek: improve mmd register access for internal
PHY's
r8169 provides the MDIO bus for the internal PHY's. It has been extended
with c45 access functions for addressing MDIO_MMD_VEND2 registers.
So we can switch from paged access to directly addressing the
MDIO_MMD_VEND2 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/a5f2333c-dda9-48ad-9801-77049766e632@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 79 +++++++++++---------------
1 file changed, 33 insertions(+), 46 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -735,29 +735,31 @@ static int rtlgen_read_status(struct phy
return 0;
}
+static int rtlgen_read_vend2(struct phy_device *phydev, int regnum)
+{
+ return __mdiobus_c45_read(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum);
+}
+
+static int rtlgen_write_vend2(struct phy_device *phydev, int regnum, u16 val)
+{
+ return __mdiobus_c45_write(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum,
+ val);
+}
+
static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
{
int ret;
- if (devnum == MDIO_MMD_VEND2) {
- rtl821x_write_page(phydev, regnum >> 4);
- ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
- rtl821x_write_page(phydev, 0xa5c);
- ret = __phy_read(phydev, 0x12);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_read(phydev, 0x10);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_read(phydev, 0x11);
- rtl821x_write_page(phydev, 0);
- } else {
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_read_vend2(phydev, regnum);
+ else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
+ ret = rtlgen_read_vend2(phydev, 0xa5c4);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+ ret = rtlgen_read_vend2(phydev, 0xa5d0);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
+ ret = rtlgen_read_vend2(phydev, 0xa5d2);
+ else
ret = -EOPNOTSUPP;
- }
return ret;
}
@@ -767,17 +769,12 @@ static int rtlgen_write_mmd(struct phy_d
{
int ret;
- if (devnum == MDIO_MMD_VEND2) {
- rtl821x_write_page(phydev, regnum >> 4);
- ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_write(phydev, 0x10, val);
- rtl821x_write_page(phydev, 0);
- } else {
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_write_vend2(phydev, regnum, val);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+ ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
+ else
ret = -EOPNOTSUPP;
- }
return ret;
}
@@ -789,19 +786,12 @@ static int rtl822x_read_mmd(struct phy_d
if (ret != -EOPNOTSUPP)
return ret;
- if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
- rtl821x_write_page(phydev, 0xa6e);
- ret = __phy_read(phydev, 0x16);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_read(phydev, 0x12);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_read(phydev, 0x10);
- rtl821x_write_page(phydev, 0);
- }
+ if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
+ ret = rtlgen_read_vend2(phydev, 0xa6ec);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+ ret = rtlgen_read_vend2(phydev, 0xa6d4);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
+ ret = rtlgen_read_vend2(phydev, 0xa6d0);
return ret;
}
@@ -814,11 +804,8 @@ static int rtl822x_write_mmd(struct phy_
if (ret != -EOPNOTSUPP)
return ret;
- if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_write(phydev, 0x12, val);
- rtl821x_write_page(phydev, 0);
- }
+ if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+ ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
return ret;
}

View File

@ -0,0 +1,52 @@
From 02d3b306ac2f0b174753d1c5b9e4e5fb8ec5057e Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:19:14 +0100
Subject: [PATCH] net: phy: realtek: switch from paged to MMD ops in rtl822x
functions
The MDIO bus provided by r8169 for the internal PHY's now supports
c45 ops for the MDIO_MMD_VEND2 device. So we can switch to standard
MMD ops here.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/81416f95-0fac-4225-87b4-828e3738b8ed@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -901,7 +901,7 @@ static int rtl822x_get_features(struct p
{
int val;
- val = phy_read_paged(phydev, 0xa61, 0x13);
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
if (val < 0)
return val;
@@ -922,10 +922,9 @@ static int rtl822x_config_aneg(struct ph
if (phydev->autoneg == AUTONEG_ENABLE) {
u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
- ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
- MDIO_AN_10GBT_CTRL_ADV2_5G |
- MDIO_AN_10GBT_CTRL_ADV5G,
- adv);
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
+ MDIO_AN_10GBT_CTRL_ADV2_5G |
+ MDIO_AN_10GBT_CTRL_ADV5G, adv);
if (ret < 0)
return ret;
}
@@ -969,7 +968,7 @@ static int rtl822x_read_status(struct ph
!phydev->autoneg_complete)
return 0;
- lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
if (lpadv < 0)
return lpadv;

View File

@ -0,0 +1,48 @@
From 8af2136e77989a64fae0284bf76fd584e32edd3a Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 14 Feb 2025 21:31:14 +0100
Subject: [PATCH] net: phy: realtek: add helper RTL822X_VND2_C22_REG
C22 register space is mapped to 0xa400 in MMD VEND2 register space.
Add a helper to access mapped C22 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/6344277b-c5c7-449b-ac89-d5425306ca76@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -79,9 +79,7 @@
/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
* is set, they cannot be accessed by C45-over-C22.
*/
-#define RTL822X_VND2_GBCR 0xa412
-
-#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -1015,7 +1013,8 @@ static int rtl822x_c45_config_aneg(struc
val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
/* Vendor register as C45 has no standardized support for 1000BaseT */
- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
+ RTL822X_VND2_C22_REG(MII_CTRL1000),
ADVERTISE_1000FULL, val);
if (ret < 0)
return ret;
@@ -1032,7 +1031,7 @@ static int rtl822x_c45_read_status(struc
/* Vendor register as C45 has no standardized support for 1000BaseT */
if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
- RTL822X_VND2_GANLPAR);
+ RTL822X_VND2_C22_REG(MII_STAT1000));
if (val < 0)
return val;
} else {

View File

@ -0,0 +1,113 @@
From fabcfd6d10999024a721ae1b965b57eb8a305ace Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sat, 15 Feb 2025 14:29:15 +0100
Subject: [PATCH] net: phy: realtek: add defines for shadowed c45 standard
registers
Realtek shadows standard c45 registers in VEND2 device register space.
Add defines for these VEND2 registers, based on the names of the
standard c45 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/c90bdf76-f8b8-4d06-9656-7a52d5658ee6@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 33 +++++++++++++++++---------
1 file changed, 22 insertions(+), 11 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -94,6 +94,16 @@
#define RTL_VND2_PHYSR_MASTER BIT(11)
#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+#define RTL_MDIO_PCS_EEE_ABLE 0xa5c4
+#define RTL_MDIO_AN_EEE_ADV 0xa5d0
+#define RTL_MDIO_AN_EEE_LPABLE 0xa5d2
+#define RTL_MDIO_AN_10GBT_CTRL 0xa5d4
+#define RTL_MDIO_AN_10GBT_STAT 0xa5d6
+#define RTL_MDIO_PMA_SPEED 0xa616
+#define RTL_MDIO_AN_EEE_LPABLE2 0xa6d0
+#define RTL_MDIO_AN_EEE_ADV2 0xa6d4
+#define RTL_MDIO_PCS_EEE_ABLE2 0xa6ec
+
#define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878
#define RTL_8221B 0x001cc840
@@ -751,11 +761,11 @@ static int rtlgen_read_mmd(struct phy_de
if (devnum == MDIO_MMD_VEND2)
ret = rtlgen_read_vend2(phydev, regnum);
else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
- ret = rtlgen_read_vend2(phydev, 0xa5c4);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
- ret = rtlgen_read_vend2(phydev, 0xa5d0);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
- ret = rtlgen_read_vend2(phydev, 0xa5d2);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE);
else
ret = -EOPNOTSUPP;
@@ -770,7 +780,7 @@ static int rtlgen_write_mmd(struct phy_d
if (devnum == MDIO_MMD_VEND2)
ret = rtlgen_write_vend2(phydev, regnum, val);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
- ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
+ ret = rtlgen_write_vend2(phydev, regnum, RTL_MDIO_AN_EEE_ADV);
else
ret = -EOPNOTSUPP;
@@ -785,11 +795,11 @@ static int rtl822x_read_mmd(struct phy_d
return ret;
if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
- ret = rtlgen_read_vend2(phydev, 0xa6ec);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE2);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
- ret = rtlgen_read_vend2(phydev, 0xa6d4);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV2);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
- ret = rtlgen_read_vend2(phydev, 0xa6d0);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE2);
return ret;
}
@@ -803,7 +813,7 @@ static int rtl822x_write_mmd(struct phy_
return ret;
if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
- ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
+ ret = rtlgen_write_vend2(phydev, RTL_MDIO_AN_EEE_ADV2, val);
return ret;
}
@@ -899,7 +909,7 @@ static int rtl822x_get_features(struct p
{
int val;
- val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_PMA_SPEED);
if (val < 0)
return val;
@@ -920,7 +930,8 @@ static int rtl822x_config_aneg(struct ph
if (phydev->autoneg == AUTONEG_ENABLE) {
u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
+ RTL_MDIO_AN_10GBT_CTRL,
MDIO_AN_10GBT_CTRL_ADV2_5G |
MDIO_AN_10GBT_CTRL_ADV5G, adv);
if (ret < 0)
@@ -966,7 +977,7 @@ static int rtl822x_read_status(struct ph
!phydev->autoneg_complete)
return 0;
- lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
+ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_AN_10GBT_STAT);
if (lpadv < 0)
return lpadv;

View File

@ -0,0 +1,54 @@
From bfc17c1658353f22843c7c13e27c2d31950f1887 Mon Sep 17 00:00:00 2001
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Date: Sun, 16 Mar 2025 12:39:54 +0000
Subject: [PATCH] net: phy: realtek: disable PHY-mode EEE
Realtek RTL8211F has a "PHY-mode" EEE support which interferes with an
IEEE 802.3 compliant implementation. This mode defaults to enabled, and
results in the MAC receive path not seeing the link transition to LPI
state.
Fix this by disabling PHY-mode EEE.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/E1ttnHW-00785s-Uq@rmk-PC.armlinux.org.uk
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -33,6 +33,9 @@
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
+#define RTL8211F_CLKOUT_EN BIT(0)
+#define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
+
#define RTL8211F_INSR 0x1d
#define RTL8211F_LEDCR 0x10
@@ -55,8 +58,6 @@
#define RTL8211E_TX_DELAY BIT(12)
#define RTL8211E_RX_DELAY BIT(11)
-#define RTL8211F_CLKOUT_EN BIT(0)
-
#define RTL8201F_ISR 0x1e
#define RTL8201F_ISR_ANERR BIT(15)
#define RTL8201F_ISR_DUPLEX BIT(13)
@@ -453,6 +454,12 @@ static int rtl8211f_config_init(struct p
str_enabled_disabled(val_rxdly));
}
+ /* Disable PHY-mode EEE so LPI is passed to the MAC */
+ ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+ RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
+ if (ret)
+ return ret;
+
if (priv->has_phycr2) {
ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
RTL8211F_CLKOUT_EN, priv->phycr2);

View File

@ -0,0 +1,58 @@
From e85d3e6fea05c8ae21a40809a3c6b7adc97411c7 Mon Sep 17 00:00:00 2001
Message-ID: <e85d3e6fea05c8ae21a40809a3c6b7adc97411c7.1728674648.git.mschiffer@universe-factory.net>
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Thu, 20 Jun 2024 19:25:48 +0200
Subject: [PATCH] net: dsa: qca8k: do not write port mask twice in bridge
join/leave
qca8k_port_bridge_join() set QCA8K_PORT_LOOKUP_CTRL() for i == port twice,
once in the loop handling all other port's masks, and finally at the end
with the accumulated port_mask.
The first time it would incorrectly set the port's own bit in the mask,
only to correct the mistake a moment later. qca8k_port_bridge_leave() had
the same issue, but here the regmap_clear_bits() was a no-op rather than
setting an unintended value.
Remove the duplicate assignment by skipping the whole loop iteration for
i == port. The unintended bit setting doesn't seem to have any negative
effects (even when not reverted right away), so the change is submitted
as a simple cleanup rather than a fix.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca/qca8k-common.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-common.c
+++ b/drivers/net/dsa/qca/qca8k-common.c
@@ -654,6 +654,8 @@ int qca8k_port_bridge_join(struct dsa_sw
port_mask = BIT(cpu_port);
for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ if (i == port)
+ continue;
if (dsa_is_cpu_port(ds, i))
continue;
if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))
@@ -666,8 +668,7 @@ int qca8k_port_bridge_join(struct dsa_sw
BIT(port));
if (ret)
return ret;
- if (i != port)
- port_mask |= BIT(i);
+ port_mask |= BIT(i);
}
/* Add all other ports to this ports portvlan mask */
@@ -686,6 +687,8 @@ void qca8k_port_bridge_leave(struct dsa_
cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ if (i == port)
+ continue;
if (dsa_is_cpu_port(ds, i))
continue;
if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))

View File

@ -0,0 +1,153 @@
From 412e1775f413c944b8c51bdadb675be957d83dc8 Mon Sep 17 00:00:00 2001
Message-ID: <412e1775f413c944b8c51bdadb675be957d83dc8.1728674648.git.mschiffer@universe-factory.net>
In-Reply-To: <e85d3e6fea05c8ae21a40809a3c6b7adc97411c7.1728674648.git.mschiffer@universe-factory.net>
References: <e85d3e6fea05c8ae21a40809a3c6b7adc97411c7.1728674648.git.mschiffer@universe-factory.net>
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Thu, 20 Jun 2024 19:25:49 +0200
Subject: [PATCH] net: dsa: qca8k: factor out bridge join/leave logic
Most of the logic in qca8k_port_bridge_join() and qca8k_port_bridge_leave()
is the same. Refactor to reduce duplication and prepare for reusing the
code for implementing bridge port isolation.
dsa_port_offloads_bridge_dev() is used instead of
dsa_port_offloads_bridge(), passing the bridge in as a struct netdevice *,
as we won't have a struct dsa_bridge in qca8k_port_bridge_flags().
The error handling is changed slightly in the bridge leave case,
returning early and emitting an error message when a regmap access fails.
This shouldn't matter in practice, as there isn't much we can do if
communication with the switch breaks down in the middle of reconfiguration.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca/qca8k-common.c | 101 ++++++++++++++---------------
1 file changed, 50 insertions(+), 51 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-common.c
+++ b/drivers/net/dsa/qca/qca8k-common.c
@@ -615,6 +615,49 @@ void qca8k_port_stp_state_set(struct dsa
qca8k_port_configure_learning(ds, port, learning);
}
+static int qca8k_update_port_member(struct qca8k_priv *priv, int port,
+ const struct net_device *bridge_dev,
+ bool join)
+{
+ struct dsa_port *dp = dsa_to_port(priv->ds, port), *other_dp;
+ u32 port_mask = BIT(dp->cpu_dp->index);
+ int i, ret;
+
+ for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ if (i == port)
+ continue;
+ if (dsa_is_cpu_port(priv->ds, i))
+ continue;
+
+ other_dp = dsa_to_port(priv->ds, i);
+ if (!dsa_port_offloads_bridge_dev(other_dp, bridge_dev))
+ continue;
+
+ /* Add/remove this port to/from the portvlan mask of the other
+ * ports in the bridge
+ */
+ if (join) {
+ port_mask |= BIT(i);
+ ret = regmap_set_bits(priv->regmap,
+ QCA8K_PORT_LOOKUP_CTRL(i),
+ BIT(port));
+ } else {
+ ret = regmap_clear_bits(priv->regmap,
+ QCA8K_PORT_LOOKUP_CTRL(i),
+ BIT(port));
+ }
+
+ if (ret)
+ return ret;
+ }
+
+ /* Add/remove all other ports to/from this port's portvlan mask */
+ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
+ QCA8K_PORT_LOOKUP_MEMBER, port_mask);
+
+ return ret;
+}
+
int qca8k_port_pre_bridge_flags(struct dsa_switch *ds, int port,
struct switchdev_brport_flags flags,
struct netlink_ext_ack *extack)
@@ -647,65 +690,21 @@ int qca8k_port_bridge_join(struct dsa_sw
struct netlink_ext_ack *extack)
{
struct qca8k_priv *priv = ds->priv;
- int port_mask, cpu_port;
- int i, ret;
-
- cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
- port_mask = BIT(cpu_port);
- for (i = 0; i < QCA8K_NUM_PORTS; i++) {
- if (i == port)
- continue;
- if (dsa_is_cpu_port(ds, i))
- continue;
- if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))
- continue;
- /* Add this port to the portvlan mask of the other ports
- * in the bridge
- */
- ret = regmap_set_bits(priv->regmap,
- QCA8K_PORT_LOOKUP_CTRL(i),
- BIT(port));
- if (ret)
- return ret;
- port_mask |= BIT(i);
- }
-
- /* Add all other ports to this ports portvlan mask */
- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
- QCA8K_PORT_LOOKUP_MEMBER, port_mask);
-
- return ret;
+ return qca8k_update_port_member(priv, port, bridge.dev, true);
}
void qca8k_port_bridge_leave(struct dsa_switch *ds, int port,
struct dsa_bridge bridge)
{
struct qca8k_priv *priv = ds->priv;
- int cpu_port, i;
-
- cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
-
- for (i = 0; i < QCA8K_NUM_PORTS; i++) {
- if (i == port)
- continue;
- if (dsa_is_cpu_port(ds, i))
- continue;
- if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))
- continue;
- /* Remove this port to the portvlan mask of the other ports
- * in the bridge
- */
- regmap_clear_bits(priv->regmap,
- QCA8K_PORT_LOOKUP_CTRL(i),
- BIT(port));
- }
+ int err;
- /* Set the cpu port to be the only one in the portvlan mask of
- * this port
- */
- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),
- QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port));
+ err = qca8k_update_port_member(priv, port, bridge.dev, false);
+ if (err)
+ dev_err(priv->dev,
+ "Failed to update switch config for bridge leave: %d\n",
+ err);
}
void qca8k_port_fast_age(struct dsa_switch *ds, int port)

View File

@ -0,0 +1,91 @@
From 422b64025ec10981c48f9367311846bf4bd38042 Mon Sep 17 00:00:00 2001
Message-ID: <422b64025ec10981c48f9367311846bf4bd38042.1728674648.git.mschiffer@universe-factory.net>
In-Reply-To: <e85d3e6fea05c8ae21a40809a3c6b7adc97411c7.1728674648.git.mschiffer@universe-factory.net>
References: <e85d3e6fea05c8ae21a40809a3c6b7adc97411c7.1728674648.git.mschiffer@universe-factory.net>
From: Matthias Schiffer <mschiffer@universe-factory.net>
Date: Thu, 20 Jun 2024 19:25:50 +0200
Subject: [PATCH] net: dsa: qca8k: add support for bridge port isolation
Remove a pair of ports from the port matrix when both ports have the
isolated flag set.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/dsa/qca/qca8k-common.c | 22 ++++++++++++++++++++--
drivers/net/dsa/qca/qca8k.h | 1 +
2 files changed, 21 insertions(+), 2 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-common.c
+++ b/drivers/net/dsa/qca/qca8k-common.c
@@ -619,6 +619,7 @@ static int qca8k_update_port_member(stru
const struct net_device *bridge_dev,
bool join)
{
+ bool isolated = !!(priv->port_isolated_map & BIT(port)), other_isolated;
struct dsa_port *dp = dsa_to_port(priv->ds, port), *other_dp;
u32 port_mask = BIT(dp->cpu_dp->index);
int i, ret;
@@ -633,10 +634,12 @@ static int qca8k_update_port_member(stru
if (!dsa_port_offloads_bridge_dev(other_dp, bridge_dev))
continue;
+ other_isolated = !!(priv->port_isolated_map & BIT(i));
+
/* Add/remove this port to/from the portvlan mask of the other
* ports in the bridge
*/
- if (join) {
+ if (join && !(isolated && other_isolated)) {
port_mask |= BIT(i);
ret = regmap_set_bits(priv->regmap,
QCA8K_PORT_LOOKUP_CTRL(i),
@@ -662,7 +665,7 @@ int qca8k_port_pre_bridge_flags(struct d
struct switchdev_brport_flags flags,
struct netlink_ext_ack *extack)
{
- if (flags.mask & ~BR_LEARNING)
+ if (flags.mask & ~(BR_LEARNING | BR_ISOLATED))
return -EINVAL;
return 0;
@@ -672,6 +675,7 @@ int qca8k_port_bridge_flags(struct dsa_s
struct switchdev_brport_flags flags,
struct netlink_ext_ack *extack)
{
+ struct qca8k_priv *priv = ds->priv;
int ret;
if (flags.mask & BR_LEARNING) {
@@ -680,6 +684,20 @@ int qca8k_port_bridge_flags(struct dsa_s
if (ret)
return ret;
}
+
+ if (flags.mask & BR_ISOLATED) {
+ struct dsa_port *dp = dsa_to_port(ds, port);
+ struct net_device *bridge_dev = dsa_port_bridge_dev_get(dp);
+
+ if (flags.val & BR_ISOLATED)
+ priv->port_isolated_map |= BIT(port);
+ else
+ priv->port_isolated_map &= ~BIT(port);
+
+ ret = qca8k_update_port_member(priv, port, bridge_dev, true);
+ if (ret)
+ return ret;
+ }
return 0;
}
--- a/drivers/net/dsa/qca/qca8k.h
+++ b/drivers/net/dsa/qca/qca8k.h
@@ -451,6 +451,7 @@ struct qca8k_priv {
* Bit 1: port enabled. Bit 0: port disabled.
*/
u8 port_enabled_map;
+ u8 port_isolated_map;
struct qca8k_ports_config ports_config;
struct regmap *regmap;
struct mii_bus *bus;

View File

@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3669,7 +3669,7 @@ static int mv88e6xxx_mdio_register(struc
@@ -3699,7 +3699,7 @@ static int mv88e6xxx_mdio_register(struc
if (external) {
mv88e6xxx_reg_lock(chip);

View File

@ -27,7 +27,7 @@ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3669,7 +3669,10 @@ static int mv88e6xxx_mdio_register(struc
@@ -3699,7 +3699,10 @@ static int mv88e6xxx_mdio_register(struc
if (external) {
mv88e6xxx_reg_lock(chip);

View File

@ -127,7 +127,7 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
#include <linux/netdevice.h>
#include <linux/gpio/consumer.h>
#include <linux/phylink.h>
@@ -3235,14 +3236,43 @@ static int mv88e6xxx_setup_upstream_port
@@ -3265,14 +3266,43 @@ static int mv88e6xxx_setup_upstream_port
static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
{
struct device_node *phy_handle = NULL;
@ -173,7 +173,7 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,
SPEED_UNFORCED, DUPLEX_UNFORCED,
@@ -4461,6 +4491,7 @@ static const struct mv88e6xxx_ops mv88e6
@@ -4491,6 +4521,7 @@ static const struct mv88e6xxx_ops mv88e6
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
.port_get_cmode = mv88e6352_port_get_cmode,
@ -181,7 +181,7 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
.port_setup_message_port = mv88e6xxx_setup_message_port,
.stats_snapshot = mv88e6320_g1_stats_snapshot,
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
@@ -4563,6 +4594,7 @@ static const struct mv88e6xxx_ops mv88e6
@@ -4593,6 +4624,7 @@ static const struct mv88e6xxx_ops mv88e6
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
.port_get_cmode = mv88e6352_port_get_cmode,
@ -189,7 +189,7 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
.port_setup_message_port = mv88e6xxx_setup_message_port,
.stats_snapshot = mv88e6320_g1_stats_snapshot,
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
@@ -4838,6 +4870,7 @@ static const struct mv88e6xxx_ops mv88e6
@@ -4868,6 +4900,7 @@ static const struct mv88e6xxx_ops mv88e6
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
.port_get_cmode = mv88e6352_port_get_cmode,
@ -197,7 +197,7 @@ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
.port_setup_message_port = mv88e6xxx_setup_message_port,
.stats_snapshot = mv88e6320_g1_stats_snapshot,
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
@@ -5260,6 +5293,7 @@ static const struct mv88e6xxx_ops mv88e6
@@ -5290,6 +5323,7 @@ static const struct mv88e6xxx_ops mv88e6
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
.port_get_cmode = mv88e6352_port_get_cmode,

View File

@ -0,0 +1,46 @@
From f64f610ec6ab59dd0391b03842cea3a4cd8ee34f Mon Sep 17 00:00:00 2001
From: Lucas Stach <l.stach@pengutronix.de>
Date: Wed, 18 Dec 2024 19:44:33 +0100
Subject: [PATCH] pmdomain: core: add dummy release function to genpd device
The genpd device, which is really only used as a handle to lookup
OPP, but not even registered to the device core otherwise and thus
lifetime linked to the genpd struct it is contained in, is missing
a release function. After b8f7bbd1f4ec ("pmdomain: core: Add
missing put_device()") the device will be cleaned up going through
the driver core device_release() function, which will warn when no
release callback is present for the device. Add a dummy release
function to shut up the warning.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Fixes: b8f7bbd1f4ec ("pmdomain: core: Add missing put_device()")
Cc: stable@vger.kernel.org
Message-ID: <20241218184433.1930532-1-l.stach@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/base/power/domain.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -2040,6 +2040,11 @@ static void genpd_lock_init(struct gener
}
}
+static void genpd_provider_release(struct device *dev)
+{
+ /* nothing to be done here */
+}
+
/**
* pm_genpd_init - Initialize a generic I/O PM domain object.
* @genpd: PM domain object to initialize.
@@ -2106,6 +2111,7 @@ int pm_genpd_init(struct generic_pm_doma
return ret;
device_initialize(&genpd->dev);
+ genpd->dev.release = genpd_provider_release;
dev_set_name(&genpd->dev, "%s", genpd->name);
mutex_lock(&gpd_list_lock);

View File

@ -4916,6 +4916,7 @@ CONFIG_RCU_STALL_COMMON=y
# CONFIG_READABLE_ASM is not set
# CONFIG_READ_ONLY_THP_FOR_FS is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_REALTEK_PHY_HWMON is not set
# CONFIG_REDWOOD is not set
# CONFIG_REED_SOLOMON is not set
# CONFIG_REED_SOLOMON_DEC8 is not set

View File

@ -9,7 +9,7 @@ Subject: [PATCH] net/dsa/mv88e6xxx: disable ATU violation
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3405,6 +3405,9 @@ static int mv88e6xxx_setup_port(struct m
@@ -3435,6 +3435,9 @@ static int mv88e6xxx_setup_port(struct m
else
reg = 1 << port;

View File

@ -73,7 +73,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+MODULE_LICENSE("GPL");
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -4485,6 +4485,7 @@ int wake_up_state(struct task_struct *p,
@@ -4486,6 +4486,7 @@ int wake_up_state(struct task_struct *p,
{
return try_to_wake_up(p, state, 0);
}

View File

@ -1,63 +0,0 @@
From linux-netdev Tue Dec 03 13:04:55 2024
From: Dominique Martinet <asmadeus () codewreck ! org>
Date: Tue, 03 Dec 2024 13:04:55 +0000
To: linux-netdev
Subject: [PATCH] net: usb: usbnet: restore usb%d name exception for local mac addresses
Message-Id: <20241203130457.904325-1-asmadeus () codewreck ! org>
X-MARC-Message: https://marc.info/?l=linux-netdev&m=173323431631309
From: Dominique Martinet <dominique.martinet@atmark-techno.com>
The previous commit assumed that local addresses always came from the
kernel, but some devices hand out local mac addresses so we ended up
with point-to-point devices with a mac set by the driver, renaming to
eth%d when they used to be named usb%d.
Userspace should not rely on device name, but for the sake of stability
restore the local mac address check portion of the naming exception:
point to point devices which either have no mac set by the driver or
have a local mac handed out by the driver will keep the usb%d name.
Fixes: 8a7d12d674ac ("net: usb: usbnet: fix name regression")
Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
---
drivers/net/usb/usbnet.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -178,6 +178,17 @@ int usbnet_get_ethernet_addr(struct usbn
}
EXPORT_SYMBOL_GPL(usbnet_get_ethernet_addr);
+static bool usbnet_needs_usb_name_format(struct usbnet *dev, struct net_device *net)
+{
+ /* Point to point devices which don't have a real MAC address
+ * (or report a fake local one) have historically used the usb%d
+ * naming. Preserve this..
+ */
+ return (dev->driver_info->flags & FLAG_POINTTOPOINT) != 0 &&
+ (is_zero_ether_addr(net->dev_addr) ||
+ is_local_ether_addr(net->dev_addr));
+}
+
static void intr_complete (struct urb *urb)
{
struct usbnet *dev = urb->context;
@@ -1766,13 +1777,10 @@ usbnet_probe (struct usb_interface *udev
if (status < 0)
goto out1;
- // heuristic: "usb%d" for links we know are two-host,
- // else "eth%d" when there's reasonable doubt. userspace
- // can rename the link if it knows better.
+ /* heuristic: rename to "eth%d" if we are not sure this link
+ * is two-host (these links keep "usb%d") */
if ((dev->driver_info->flags & FLAG_ETHER) != 0 &&
- ((dev->driver_info->flags & FLAG_POINTTOPOINT) == 0 ||
- /* somebody touched it*/
- !is_zero_ether_addr(net->dev_addr)))
+ !usbnet_needs_usb_name_format(dev, net))
strscpy(net->name, "eth%d", sizeof(net->name));
/* WLAN devices should always be named "wlan%d" */
if ((dev->driver_info->flags & FLAG_WLAN) != 0)

View File

@ -656,7 +656,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ add_fit_subimage_device(bdev, slot++, start_sect, nr_sects, true);
+ }
+
+ if (!found || !slot)
+ if (!slot)
+ goto out_bootconf;
+
+ dev_info(dev, "mapped %u uImage.FIT filesystem sub-image%s as /dev/fit%s%u%s\n",
@ -675,7 +675,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ kfree(bootconf);
+ kfree(fit);
+out_blkdev:
+ if (!found || ret)
+ if (!slot)
+ blkdev_put(bdev, &_fitblk_claim_ptr);
+
+ return ret;

View File

@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
case RTN_THROW:
case RTN_UNREACHABLE:
default:
@@ -4551,6 +4570,17 @@ static int ip6_pkt_prohibit_out(struct n
@@ -4554,6 +4573,17 @@ static int ip6_pkt_prohibit_out(struct n
return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
}
@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* Allocate a dst for local (unicast / anycast) address.
*/
@@ -5042,7 +5072,8 @@ static int rtm_to_fib6_config(struct sk_
@@ -5045,7 +5075,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
@@ -6304,6 +6335,8 @@ static int ip6_route_dev_notify(struct n
@@ -6307,6 +6338,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
@@ -6315,6 +6348,7 @@ static int ip6_route_dev_notify(struct n
@@ -6318,6 +6351,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
@@ -6515,6 +6549,8 @@ static int __net_init ip6_route_net_init
@@ -6518,6 +6552,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
@@ -6525,11 +6561,21 @@ static int __net_init ip6_route_net_init
@@ -6528,11 +6564,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->dst.rt_uncached);
@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
@@ -6556,6 +6602,8 @@ out:
@@ -6559,6 +6605,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
@@ -6575,6 +6623,7 @@ static void __net_exit ip6_route_net_exi
@@ -6578,6 +6626,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
@@ -6658,6 +6707,9 @@ void __init ip6_route_init_special_entri
@@ -6661,6 +6710,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -8470,7 +8470,7 @@ static int nft_register_flowtable_net_ho
@@ -8469,7 +8469,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View File

@ -27,7 +27,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
.port_mirror_add = qca8k_port_mirror_add,
--- a/drivers/net/dsa/qca/qca8k-common.c
+++ b/drivers/net/dsa/qca/qca8k-common.c
@@ -1215,6 +1215,42 @@ int qca8k_port_lag_leave(struct dsa_swit
@@ -1235,6 +1235,42 @@ int qca8k_port_lag_leave(struct dsa_swit
return qca8k_lag_refresh_portmap(ds, port, lag, true);
}
@ -72,7 +72,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
u32 val;
--- a/drivers/net/dsa/qca/qca8k.h
+++ b/drivers/net/dsa/qca/qca8k.h
@@ -590,5 +590,11 @@ int qca8k_port_lag_join(struct dsa_switc
@@ -591,5 +591,11 @@ int qca8k_port_lag_join(struct dsa_switc
struct netlink_ext_ack *extack);
int qca8k_port_lag_leave(struct dsa_switch *ds, int port,
struct dsa_lag lag);

View File

@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1430,6 +1430,7 @@ static struct phy_driver realtek_drvs[]
@@ -1434,6 +1434,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1440,6 +1441,7 @@ static struct phy_driver realtek_drvs[]
@@ -1444,6 +1445,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_match_phy_device,
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1452,6 +1454,7 @@ static struct phy_driver realtek_drvs[]
@@ -1456,6 +1458,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1462,6 +1465,7 @@ static struct phy_driver realtek_drvs[]
@@ -1466,6 +1469,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1474,6 +1478,7 @@ static struct phy_driver realtek_drvs[]
@@ -1478,6 +1482,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
@@ -1491,6 +1496,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
@@ -1498,6 +1504,7 @@ static struct phy_driver realtek_drvs[]
@@ -1502,6 +1508,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1511,6 +1518,7 @@ static struct phy_driver realtek_drvs[]
@@ -1515,6 +1522,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",

View File

@ -20,7 +20,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -834,8 +834,8 @@ static int rtl822x_probe(struct phy_devi
@@ -837,8 +837,8 @@ static int rtl822x_probe(struct phy_devi
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
@@ -885,7 +885,29 @@ static int rtl822xb_config_init(struct p
@@ -888,7 +888,29 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1111,9 +1111,11 @@ static bool rtlgen_supports_2_5gbps(stru
@@ -1115,9 +1115,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;

View File

@ -14,8 +14,8 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
*/
#define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
@ -24,7 +24,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
@@ -892,6 +896,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
@@ -1170,10 +1170,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{

View File

@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
@@ -1381,6 +1381,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
@@ -1541,6 +1586,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
@@ -1555,6 +1602,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
@@ -1567,6 +1616,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
@@ -1581,6 +1632,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",

View File

@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
@@ -1046,6 +1046,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);

View File

@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
@@ -926,6 +926,22 @@ static int rtl822xb_config_init(struct p
return 0;
}
@ -38,7 +38,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
@@ -1609,7 +1625,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
@@ -1639,7 +1655,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,

View File

@ -13,7 +13,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
@@ -852,6 +852,11 @@ static int rtl822xb_config_init(struct p
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;

View File

@ -274,7 +274,7 @@
pinctrl-0 = <&wifi_0_pins>;
pinctrl-names = "default";
qcom,coexist-support = <1>;
qcom,coexist-support = /bits/ 8 <1>;
qcom,coexist-gpio-pin = <52>;
};

View File

@ -67,27 +67,18 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i);
if ((reg & mask) != mask) {
@@ -653,7 +653,7 @@ int qca8k_port_bridge_join(struct dsa_sw
cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
port_mask = BIT(cpu_port);
@@ -624,7 +624,7 @@ static int qca8k_update_port_member(stru
u32 port_mask = BIT(dp->cpu_dp->index);
int i, ret;
- for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ for (i = 0; i < ds->num_ports; i++) {
if (dsa_is_cpu_port(ds, i))
+ for (i = 0; i < priv->ds->num_ports; i++) {
if (i == port)
continue;
if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))
@@ -685,7 +685,7 @@ void qca8k_port_bridge_leave(struct dsa_
cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
- for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ for (i = 0; i < ds->num_ports; i++) {
if (dsa_is_cpu_port(ds, i))
continue;
if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &bridge))
if (dsa_is_cpu_port(priv->ds, i))
--- /dev/null
+++ b/drivers/net/dsa/qca/qca8k-ipq4019.c
@@ -0,0 +1,948 @@
@@ -0,0 +1,950 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
@ -879,6 +870,8 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+ .port_change_mtu = qca8k_port_change_mtu,
+ .port_max_mtu = qca8k_port_max_mtu,
+ .port_stp_state_set = qca8k_port_stp_state_set,
+ .port_pre_bridge_flags = qca8k_port_pre_bridge_flags,
+ .port_bridge_flags = qca8k_port_bridge_flags,
+ .port_bridge_join = qca8k_port_bridge_join,
+ .port_bridge_leave = qca8k_port_bridge_leave,
+ .port_fast_age = qca8k_port_fast_age,
@ -1119,7 +1112,7 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
enum {
QCA8K_PORT_SPEED_10M = 0,
QCA8K_PORT_SPEED_100M = 1,
@@ -466,6 +518,10 @@ struct qca8k_priv {
@@ -467,6 +519,10 @@ struct qca8k_priv {
struct qca8k_pcs pcs_port_6;
const struct qca8k_match_data *info;
struct qca8k_led ports_led[QCA8K_LED_COUNT];

View File

@ -19,14 +19,10 @@
};
chosen {
bootargs = "root=PARTLABEL=rootfs rootwait rootfstype=squashfs,f2fs";
bootargs = "root=PARTLABEL=rootfs rootwait";
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
};
gpio-keys {
compatible = "gpio-keys";
@ -56,18 +52,14 @@
wlan_led: led-1 {
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_WHITE>;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
usb_vbus: regulator-usb {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
regulator-boot-on;
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
};
};
@ -173,6 +165,10 @@
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
@ -189,11 +185,6 @@
};
};
&usb_phy {
status = "okay";
};
&xhci {
status = "okay";
vbus-supply = <&usb_vbus>;
};

View File

@ -0,0 +1,301 @@
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "netis NX31";
compatible = "netis,nx31", "mediatek,mt7981";
aliases {
label-mac-device = &gmac0;
led-boot = &led_status_blue;
led-failsafe = &led_status_blue;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
serial0 = &uart0;
};
chosen {
rootdisk = <&ubi_fit_volume>;
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
label = "mesh";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
debounce-interval = <60>;
};
button-1 {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_2GHZ;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_status_blue: led-1 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
};
led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_1fef20 0>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_1fef26 0>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <0x1f>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env (unused)";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_1fef20: macaddr@1fef20 {
compatible = "mac-base";
reg = <0x1fef20 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_1fef26: macaddr@1fef26 {
compatible = "mac-base";
reg = <0x1fef26 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7a80000>;
compatible = "linux,ubi";
volumes {
ubi_fit_volume: ubi-volume-fit {
volname = "fit";
};
ubi_ubootenv: ubi-volume-ubootenv {
volname = "ubootenv";
};
ubi_ubootenv2: ubi-volume-ubootenv2 {
volname = "ubootenv2";
};
};
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&ubi_ubootenv {
nvmem-layout {
compatible = "u-boot,env-redundant-bool";
};
};
&ubi_ubootenv2 {
nvmem-layout {
compatible = "u-boot,env-redundant-bool";
};
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;
};

View File

@ -51,7 +51,6 @@ glinet,gl-xe3000)
;;
huasifei,wh3000-emmc)
ucidef_set_led_netdev "wan" "WAN" "red:wan" "eth1"
ucidef_set_led_netdev "wlan" "WLAN" "white:wlan" "phy1-ap0"
;;
imou,lc-hx3001|\
nokia,ea0326gmp)
@ -80,6 +79,9 @@ netcore,n60-pro)
netgear,wax220)
ucidef_set_led_netdev "eth0" "LAN" "green:lan" "eth0"
;;
netis,nx31)
ucidef_set_led_netdev "wan" "wan" "blue:wan" "eth1" "link tx rx"
;;
openembed,som7981)
ucidef_set_led_netdev "lanact" "LANACT" "amber:lan" "eth1" "rx tx"
ucidef_set_led_netdev "lanlink" "LANLINK" "green:lan" "eth1" "link"

View File

@ -15,6 +15,7 @@ mediatek_setup_interfaces()
h3c,magic-nx30-pro-nmbm|\
imou,lc-hx3001|\
konka,komi-a31|\
netis,nx31|\
nokia,ea0326gmp|\
zbtlink,zbt-z8103ax)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1

View File

@ -122,6 +122,14 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
;;
netis,nx31)
addr=$(mtd_get_mac_binary "Factory" 0x4)
addr=$(macaddr_unsetbit $(macaddr_setbit_la $addr) 25)
addr_2g=$(macaddr_unsetbit $(macaddr_unsetbit $addr 26) 27)
addr_5g=$(macaddr_setbit $(macaddr_setbit $addr 26) 27)
[ "$PHYNBR" = "0" ] && echo "$addr_2g" > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && echo "$addr_5g" > /sys${DEVPATH}/macaddress
;;
nokia,ea0326gmp)
addr=$(cat /sys/class/net/eth0/address)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress

View File

@ -86,6 +86,7 @@ platform_do_upgrade() {
mediatek,mt7981-rfb|\
mediatek,mt7988a-rfb|\
mercusys,mr90x-v1-ubi|\
netis,nx31|\
nokia,ea0326gmp|\
openwrt,one|\
netcore,n60|\

View File

@ -1524,6 +1524,31 @@ define Device/netgear_wax220
endef
TARGET_DEVICES += netgear_wax220
define Device/netis_nx31
DEVICE_VENDOR := netis
DEVICE_MODEL := NX31
DEVICE_DTS := mt7981b-netis-nx31
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
UBOOTENV_IN_UBI := 1
IMAGES := sysupgrade.itb
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.itb := append-kernel | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \
append-metadata
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
ARTIFACTS := preloader.bin bl31-uboot.fip
ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot netis_nx31
endef
TARGET_DEVICES += netis_nx31
define Device/nokia_ea0326gmp
DEVICE_VENDOR := Nokia
DEVICE_MODEL := EA0326GMP

View File

@ -31,7 +31,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -835,6 +841,45 @@ static int rtl822x_probe(struct phy_devi
@@ -838,6 +844,45 @@ static int rtl822x_probe(struct phy_devi
return 0;
}
@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@@ -925,7 +970,7 @@ static int rtl822xb_config_init(struct p
@@ -928,7 +973,7 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -0,0 +1,150 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Huasifei SHF283";
compatible = "huasifei,shf283", "mediatek,mt7628an-soc";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyS0,115200";
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_power: led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
};
};
gpio-export {
compatible = "gpio-export";
modem-reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
};
};
};
&ethernet {
nvmem-cells = <&macaddr_factory_28 0>;
nvmem-cell-names = "mac-address";
};
&pcie {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <12000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "config";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x400>;
};
macaddr_factory_28: macaddr@28 {
compatible = "mac-base";
reg = <0x28 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c";
function = "gpio";
};
};
&uart1 {
status = "okay";
};
&wmac {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
};

View File

@ -322,6 +322,15 @@ define Device/hiwifi_hc5861b
endef
TARGET_DEVICES += hiwifi_hc5861b
define Device/huasifei_shf283
IMAGE_SIZE := 16064k
DEVICE_VENDOR := Huasifei
DEVICE_MODEL := SHF283
DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-net-cdc-mbim \
kmod-usb-net-qmi-wwan kmod-usb-net-rndis kmod-usb-serial-option uqmi
endef
TARGET_DEVICES += huasifei_shf283
define Device/iptime_a3
IMAGE_SIZE := 7936k
UIMAGE_NAME := a3

View File

@ -58,6 +58,9 @@ hiwifi,hc5661a|\
hiwifi,hc5761a)
ucidef_set_led_switch "internet" "internet" "blue:internet" "switch0" "0x10"
;;
huasifei,shf283)
ucidef_set_led_switch "wan" "WAN" "green:wan" "switch0" "0x01"
;;
keenetic,kn-1613)
ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x01"
;;

View File

@ -115,6 +115,10 @@ ramips_setup_interfaces()
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "4:wan" "6@eth0"
;;
huasifei,shf283)
ucidef_add_switch "switch0" \
"2:lan" "3:lan" "4:lan" "1:wan" "6@eth0"
;;
iptime,a3|\
totolink,a3)
ucidef_add_switch "switch0" \
@ -268,6 +272,12 @@ ramips_setup_macs()
[ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address)
wan_mac=$(macaddr_add "$lan_mac" 1)
;;
huasifei,shf283|\
rakwireless,rak633|\
unielec,u7628-01-16m|\
wavlink,wl-wn575a3)
wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
;;
iptime,a3|\
iptime,a604m|\
totolink,a3)
@ -301,11 +311,6 @@ ramips_setup_macs()
wavlink,wl-wn576a2)
label_mac=$(mtd_get_mac_binary factory 0x4)
;;
rakwireless,rak633|\
unielec,u7628-01-16m|\
wavlink,wl-wn575a3)
wan_mac=$(macaddr_add "$(mtd_get_mac_binary factory 0x28)" 1)
;;
tplink,archer-c20-v4|\
tplink,archer-c50-v3|\
tplink,tl-mr3420-v5|\

View File

@ -0,0 +1,12 @@
. /lib/functions.sh
preinit_fixup_model_name() {
case "$(board_name)" in
huasifei,shf283)
local model_name="$(fw_printenv -n model_name 2>/dev/null)"
[ -n "$model_name" ] && echo "$model_name" > "/tmp/sysinfo/model"
;;
esac
}
boot_hook_add preinit_main preinit_fixup_model_name

View File

@ -797,10 +797,6 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port,
{
struct rtl838x_switch_priv *priv = ds->priv;
int sds_num;
u32 reg;
pr_info("%s port %d, mode %x, phy-mode: %s, speed %d, link %d\n", __func__,
port, mode, phy_modes(state->interface), state->speed, state->link);
/* Nothing to be done for the CPU-port */
if (port == priv->cpu_port)
@ -815,48 +811,6 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port,
(state->interface == PHY_INTERFACE_MODE_1000BASEX ||
state->interface == PHY_INTERFACE_MODE_10GBASER))
rtl9300_serdes_setup(port, sds_num, state->interface);
reg = sw_r32(priv->r->mac_force_mode_ctrl(port));
reg &= ~(0xf << 3);
switch (state->speed) {
case SPEED_10000:
reg |= 4 << 3;
break;
case SPEED_5000:
reg |= 6 << 3;
break;
case SPEED_2500:
reg |= 5 << 3;
break;
case SPEED_1000:
reg |= 2 << 3;
break;
case SPEED_100:
reg |= 1 << 3;
break;
default:
/* Also covers 10M */
break;
}
if (state->link)
reg |= RTL930X_FORCE_LINK_EN;
if (priv->lagmembers & BIT_ULL(port))
reg |= RTL930X_DUPLEX_MODE | RTL930X_FORCE_LINK_EN;
if (state->duplex == DUPLEX_FULL)
reg |= RTL930X_DUPLEX_MODE;
else
reg &= ~RTL930X_DUPLEX_MODE; /* Clear duplex bit otherwise */
if (priv->ports[port].phy_is_integrated)
reg &= ~RTL930X_FORCE_EN; /* Clear MAC_FORCE_EN to allow SDS-MAC link */
else
reg |= RTL930X_FORCE_EN;
sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
}
static void rtl83xx_phylink_mac_link_down(struct dsa_switch *ds, int port,
@ -962,11 +916,49 @@ static void rtl93xx_phylink_mac_link_up(struct dsa_switch *ds, int port,
int speed, int duplex,
bool tx_pause, bool rx_pause)
{
struct dsa_port *dp = dsa_to_port(ds, port);
struct rtl838x_switch_priv *priv = ds->priv;
u32 mcr, spdsel;
if (speed == SPEED_10000)
spdsel = RTL_SPEED_10000;
else if (speed == SPEED_5000)
spdsel = RTL_SPEED_5000;
else if (speed == SPEED_2500)
spdsel = RTL_SPEED_2500;
else if (speed == SPEED_1000)
spdsel = RTL_SPEED_1000;
else if (speed == SPEED_100)
spdsel = RTL_SPEED_100;
else
spdsel = RTL_SPEED_10;
mcr = sw_r32(priv->r->mac_force_mode_ctrl(port));
if (priv->family_id == RTL9300_FAMILY_ID) {
mcr &= ~RTL930X_RX_PAUSE_EN;
mcr &= ~RTL930X_TX_PAUSE_EN;
mcr &= ~RTL930X_DUPLEX_MODE;
mcr &= ~RTL930X_SPEED_MASK;
mcr |= RTL930X_FORCE_LINK_EN;
mcr |= spdsel << RTL930X_SPEED_SHIFT;
if (tx_pause)
mcr |= RTL930X_TX_PAUSE_EN;
if (rx_pause)
mcr |= RTL930X_RX_PAUSE_EN;
if (duplex == DUPLEX_FULL || priv->lagmembers & BIT_ULL(port))
mcr |= RTL930X_DUPLEX_MODE;
if (dsa_port_is_cpu(dp) || !priv->ports[port].phy_is_integrated)
mcr |= RTL930X_FORCE_EN;
}
pr_debug("%s port %d, mode %x, speed %d, duplex %d, txpause %d, rxpause %d: set mcr=%08x\n",
__func__, port, mode, speed, duplex, tx_pause, rx_pause, mcr);
sw_w32(mcr, priv->r->mac_force_mode_ctrl(port));
/* Restart TX/RX to port */
sw_w32_mask(0, 0x3, priv->r->mac_port_ctrl(port));
/* TODO: Set speed/duplex/pauses */
}
static void rtl83xx_get_strings(struct dsa_switch *ds,

View File

@ -147,6 +147,9 @@
#define RTL_SPEED_10 0
#define RTL_SPEED_100 1
#define RTL_SPEED_1000 2
#define RTL_SPEED_2500 5
#define RTL_SPEED_5000 6
#define RTL_SPEED_10000 4
#define RTL83XX_FORCE_EN (1 << 0)
#define RTL83XX_FORCE_LINK_EN (1 << 1)
@ -169,6 +172,8 @@
#define RTL930X_FORCE_EN (1 << 0)
#define RTL930X_FORCE_LINK_EN (1 << 1)
#define RTL930X_DUPLEX_MODE (1 << 2)
#define RTL930X_SPEED_SHIFT (3)
#define RTL930X_SPEED_MASK (15 << RTL930X_SPEED_SHIFT)
#define RTL930X_TX_PAUSE_EN (1 << 7)
#define RTL930X_RX_PAUSE_EN (1 << 8)
#define RTL930X_MAC_FORCE_FC_EN (1 << 9)

View File

@ -0,0 +1,33 @@
#!/bin/sh /etc/rc.common
START=30
led_set() {
local path="/sys/class/leds/$1"
local params="$2"
local value="$3"
[ -d "$path" ] || return 1
for param in $params; do
echo "$value" > "$path/$param"
done
}
boot() {
case "$(board_name)" in
friendlyarm,nanopi-r3s|\
friendlyarm,nanopi-r4s)
led_set "enp1s0-1::lan" "link_10 link_100 link_1000" "1"
led_set "enp1s0-1::lan" "rx tx" "0"
led_set "enp1s0-2::lan" "link_10 link_100 link_1000" "0"
led_set "enp1s0-2::lan" "rx tx" "1"
;;
huake,guangmiao-g4c)
led_set "enp1s0-0::lan" "link_10 link_100 link_1000" "1"
led_set "enp1s0-0::lan" "rx tx" "0"
led_set "enp1s0-1::lan" "link_10 link_100 link_1000" "0"
led_set "enp1s0-1::lan" "rx tx" "1"
;;
esac
}

View File

@ -11,6 +11,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/usb/pd.h>
#include "rk3588.dtsi"
@ -58,9 +59,11 @@
fan: pwm-fan {
compatible = "pwm-fan";
cooling-levels = <0 50 80 120 160 220>;
fan-supply = <&vcc5v0_sys>;
pwms = <&pwm1 0 10000 0>;
cooling-levels = <0 72 117 162 229 255>;
fan-supply = <&vcc12v_dcin>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PB7 IRQ_TYPE_EDGE_RISING>;
pwms = <&pwm1 0 10000 PWM_POLARITY_INVERTED>;
#cooling-cells = <2>;
};
@ -469,6 +472,70 @@
};
};
&package_thermal {
polling-delay = <1000>;
polling-delay-passive = <2000>;
trips {
cpu_trip_active_cool: cpu-trip-active-cool {
temperature = <45000>;
hysteresis = <2000>;
type = "passive";
};
cpu_trip_active_low: cpu-trip-active-low {
temperature = <55000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: cpu-trip-active-med {
temperature = <65000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_high: cpu-trip-active-high {
temperature = <80000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_hot: cpu-trip-active-hot {
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
};
cooling-maps {
cpu-active-cool {
cooling-device = <&fan THERMAL_NO_LIMIT 1>;
trip = <&cpu_trip_active_cool>;
};
cpu-active-low {
cooling-device = <&fan 1 2>;
trip = <&cpu_trip_active_low>;
};
cpu-active-med {
cooling-device = <&fan 2 3>;
trip = <&cpu_trip_active_med>;
};
cpu-active-high {
cooling-device = <&fan 3 4>;
trip = <&cpu_trip_active_high>;
};
cpu-active-hot {
cooling-device = <&fan 4 THERMAL_NO_LIMIT>;
trip = <&cpu_trip_active_hot>;
};
};
};
/* M.2 M-Key */
&pcie2x1l0 {
max-link-speed = <3>;
@ -598,7 +665,7 @@
};
&pwm1 {
pinctrl-names = "active";
pinctrl-names = "default";
pinctrl-0 = <&pwm1m1_pins>;
status = "okay";
};

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@ -50,7 +50,8 @@ define Device/cyber_cyber3588-aib
SOC := rk3588
BOOT_FLOW := pine64-img
DEVICE_PACKAGES := kmod-ata-ahci-dwc kmod-r8125 kmod-mt7921e wpad-openssl \
kmod-usb-net-cdc-mbim kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
kmod-hwmon-pwmfan kmod-usb-net-cdc-mbim kmod-usb-net-qmi-wwan \
kmod-usb-serial-option uqmi
endef
TARGET_DEVICES += cyber_cyber3588-aib
@ -139,7 +140,7 @@ define Device/friendlyarm_nanopi-r3s
DEVICE_MODEL := NanoPi R3S
SOC := rk3566
BOOT_FLOW := pine64-img
DEVICE_PACKAGES := kmod-r8168
DEVICE_PACKAGES := kmod-r8169
endef
TARGET_DEVICES += friendlyarm_nanopi-r3s
@ -212,7 +213,7 @@ define Device/huake_guangmiao-g4c
DEVICE_MODEL := GuangMiao G4C
SOC := rk3399
BOOT_FLOW := pine64-bin
DEVICE_PACKAGES := kmod-r8168
DEVICE_PACKAGES := kmod-r8169
endef
TARGET_DEVICES += huake_guangmiao-g4c

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@ -3,6 +3,9 @@
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=ld.mold
include $(INCLUDE_DIR)/toolchain-build.mk
define Host/Configure